diff options
| author | Olof Johansson <olof@lixom.net> | 2015-07-28 12:26:14 -0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-07-28 12:26:14 -0400 |
| commit | 2eb084eb1f6eba53e657502c519b52e640e38cde (patch) | |
| tree | 378a4647db279ef502571720faf964115bc854f7 | |
| parent | 0c21bcb616a499c69d3f0f719bac8491e8326630 (diff) | |
| parent | cd871d517d46f26943f3c8f61c0d2ac6665da6a2 (diff) | |
Merge tag 'socfpga_updates_for_v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc
SoCFPGA updates for v4.3
- Add smp.ops.cpu_kill() for kexec
- Add reboot capability for Arria10
* tag 'socfpga_updates_for_v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: add reset for the Arria 10 platform
ARM: socfpga: add smp_ops.cpu_kill to make kexec/kdump available
Signed-off-by: Olof Johansson <olof@lixom.net>
| -rw-r--r-- | arch/arm/mach-socfpga/core.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/platsmp.c | 13 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/socfpga.c | 26 |
3 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 7259c3732702..5bc6ea87cdf7 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #define SOCFPGA_RSTMGR_MODPERRST 0x14 | 25 | #define SOCFPGA_RSTMGR_MODPERRST 0x14 |
| 26 | #define SOCFPGA_RSTMGR_BRGMODRST 0x1c | 26 | #define SOCFPGA_RSTMGR_BRGMODRST 0x1c |
| 27 | 27 | ||
| 28 | #define SOCFPGA_A10_RSTMGR_CTRL 0xC | ||
| 28 | #define SOCFPGA_A10_RSTMGR_MODMPURST 0x20 | 29 | #define SOCFPGA_A10_RSTMGR_MODMPURST 0x20 |
| 29 | 30 | ||
| 30 | /* System Manager bits */ | 31 | /* System Manager bits */ |
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c index c6f1df89f9af..15c8ce8965f4 100644 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c | |||
| @@ -106,11 +106,23 @@ static void socfpga_cpu_die(unsigned int cpu) | |||
| 106 | cpu_do_idle(); | 106 | cpu_do_idle(); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | /* | ||
| 110 | * We need a dummy function so that platform_can_cpu_hotplug() knows | ||
| 111 | * we support CPU hotplug. However, the function does not need to do | ||
| 112 | * anything, because CPUs going offline just do WFI. We could reset | ||
| 113 | * the CPUs but it would increase power consumption. | ||
| 114 | */ | ||
| 115 | static int socfpga_cpu_kill(unsigned int cpu) | ||
| 116 | { | ||
| 117 | return 1; | ||
| 118 | } | ||
| 119 | |||
| 109 | static struct smp_operations socfpga_smp_ops __initdata = { | 120 | static struct smp_operations socfpga_smp_ops __initdata = { |
| 110 | .smp_prepare_cpus = socfpga_smp_prepare_cpus, | 121 | .smp_prepare_cpus = socfpga_smp_prepare_cpus, |
| 111 | .smp_boot_secondary = socfpga_boot_secondary, | 122 | .smp_boot_secondary = socfpga_boot_secondary, |
| 112 | #ifdef CONFIG_HOTPLUG_CPU | 123 | #ifdef CONFIG_HOTPLUG_CPU |
| 113 | .cpu_die = socfpga_cpu_die, | 124 | .cpu_die = socfpga_cpu_die, |
| 125 | .cpu_kill = socfpga_cpu_kill, | ||
| 114 | #endif | 126 | #endif |
| 115 | }; | 127 | }; |
| 116 | 128 | ||
| @@ -119,6 +131,7 @@ static struct smp_operations socfpga_a10_smp_ops __initdata = { | |||
| 119 | .smp_boot_secondary = socfpga_a10_boot_secondary, | 131 | .smp_boot_secondary = socfpga_a10_boot_secondary, |
| 120 | #ifdef CONFIG_HOTPLUG_CPU | 132 | #ifdef CONFIG_HOTPLUG_CPU |
| 121 | .cpu_die = socfpga_cpu_die, | 133 | .cpu_die = socfpga_cpu_die, |
| 134 | .cpu_kill = socfpga_cpu_kill, | ||
| 122 | #endif | 135 | #endif |
| 123 | }; | 136 | }; |
| 124 | 137 | ||
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 19643a756c48..a1c0efaa8794 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c | |||
| @@ -74,6 +74,19 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) | |||
| 74 | writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); | 74 | writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); |
| 75 | } | 75 | } |
| 76 | 76 | ||
| 77 | static void socfpga_arria10_restart(enum reboot_mode mode, const char *cmd) | ||
| 78 | { | ||
| 79 | u32 temp; | ||
| 80 | |||
| 81 | temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); | ||
| 82 | |||
| 83 | if (mode == REBOOT_HARD) | ||
| 84 | temp |= RSTMGR_CTRL_SWCOLDRSTREQ; | ||
| 85 | else | ||
| 86 | temp |= RSTMGR_CTRL_SWWARMRSTREQ; | ||
| 87 | writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); | ||
| 88 | } | ||
| 89 | |||
| 77 | static const char *altera_dt_match[] = { | 90 | static const char *altera_dt_match[] = { |
| 78 | "altr,socfpga", | 91 | "altr,socfpga", |
| 79 | NULL | 92 | NULL |
| @@ -86,3 +99,16 @@ DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA") | |||
| 86 | .restart = socfpga_cyclone5_restart, | 99 | .restart = socfpga_cyclone5_restart, |
| 87 | .dt_compat = altera_dt_match, | 100 | .dt_compat = altera_dt_match, |
| 88 | MACHINE_END | 101 | MACHINE_END |
| 102 | |||
| 103 | static const char *altera_a10_dt_match[] = { | ||
| 104 | "altr,socfpga-arria10", | ||
| 105 | NULL | ||
| 106 | }; | ||
| 107 | |||
| 108 | DT_MACHINE_START(SOCFPGA_A10, "Altera SOCFPGA Arria10") | ||
| 109 | .l2c_aux_val = 0, | ||
| 110 | .l2c_aux_mask = ~0, | ||
| 111 | .init_irq = socfpga_init_irq, | ||
| 112 | .restart = socfpga_arria10_restart, | ||
| 113 | .dt_compat = altera_a10_dt_match, | ||
| 114 | MACHINE_END | ||
