Merge tag 'imx-fixes-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.1:
 - Correct phy mode setting of imx6dl-yapp4 board to fix a problem
   caused by commit 5ecdd77c61c8 ("net: dsa: qca8k: disable delay
   for RGMII mode").
 - Add a missing of_node_put call to fix leaked reference detected by
   coccinelle in imx51 machine code.
 - Fix imx6q cpuidle driver bug which causes that CPU might not wake up
   at expected time.
 - Increase reset duration of Ethernet phy Micrel KSZ9031RNX to fix
   transmission timeouts error seen on imx6qdl-phytec-pfla02 board.
 - Correct SPDX License Identifier style for imx6ull-pinfunc-snvs.h.
 - Fix 'bus-witdh' typos in imx6qdl-icore-rqs.dtsi.
 - Correct pseudo PHY address of switch device for imx6dl-yapp4 board.
 - Update PWM driver options in imx defconfig files due to the change
   on driver part.

* tag 'imx-fixes-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v4_v5_defconfig: enable PWM driver
  ARM: imx_v6_v7_defconfig: continue compiling the pwm driver
  ARM: dts: imx6dl-yapp4: Use correct pseudo PHY address for the switch
  ARM: dts: imx6qdl: Fix typo in imx6qdl-icore-rqs.dtsi
  ARM: dts: imx6ull: Use the correct style for SPDX License Identifier
  ARM: dts: pfla02: increase phy reset duration
  ARM: imx6q: cpuidle: fix bug that CPU might not wake up at expected time
  ARM: imx51: fix a leaked reference by adding missing of_node_put
  ARM: dts: imx6dl-yapp4: Use rgmii-id phy mode on the cpu port

8 files changed, 22 insertions, 24 deletions

diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
index b715ab0fa1ff..e8d800fec637 100644
--- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
+++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
@@ -114,9 +114,9 @@
                         reg = <2>;
                 };
 
-                switch@0 {
+                switch@10 {
                         compatible = "qca,qca8334";
-                        reg = <0>;
+                        reg = <10>;
 
                         switch_ports: ports {
                                 #address-cells = <1>;
@@ -125,7 +125,7 @@
                                 ethphy0: port@0 {
                                         reg = <0>;
                                         label = "cpu";
-                                        phy-mode = "rgmii";
+                                        phy-mode = "rgmii-id";
                                         ethernet = <&fec>;
 
                                         fixed-link {
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
index 1d1b4bd0670f..a4217f564a53 100644
--- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -264,7 +264,7 @@
         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
         vmcc-supply = <&reg_sd3_vmmc>;
         cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
-        bus-witdh = <4>;
+        bus-width = <4>;
         no-1-8-v;
         status = "okay";
 };
@@ -275,7 +275,7 @@
         pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
         pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
         vmcc-supply = <&reg_sd4_vmmc>;
-        bus-witdh = <8>;
+        bus-width = <8>;
         no-1-8-v;
         non-removable;
         status = "okay";
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 433bf09a1954..027df06c5dc7 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -91,6 +91,7 @@
         pinctrl-0 = <&pinctrl_enet>;
         phy-handle = <&ethphy>;
         phy-mode = "rgmii";
+        phy-reset-duration = <10>; /* in msecs */
         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
         phy-supply = <&vdd_eth_io_reg>;
         status = "disabled";
diff --git a/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h
index f6fb6783c193..54cfe72295aa 100644
--- a/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h
+++ b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * Copyright (C) 2016 Freescale Semiconductor, Inc.
  * Copyright (C) 2017 NXP
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 8661dd9b064a..b37f8e675e40 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -170,6 +170,9 @@ CONFIG_IMX_SDMA=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_IIO=y
 CONFIG_FSL_MX25_ADC=y
+CONFIG_PWM=y
+CONFIG_PWM_IMX1=y
+CONFIG_PWM_IMX27=y
 CONFIG_EXT4_FS=y
 # CONFIG_DNOTIFY is not set
 CONFIG_VFAT_FS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 5586a5074a96..50fb01d70b10 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -398,7 +398,7 @@ CONFIG_MAG3110=y
 CONFIG_MPL3115=y
 CONFIG_PWM=y
 CONFIG_PWM_FSL_FTM=y
-CONFIG_PWM_IMX=y
+CONFIG_PWM_IMX27=y
 CONFIG_NVMEM_IMX_OCOTP=y
 CONFIG_NVMEM_VF610_OCOTP=y
 CONFIG_TEE=y
diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
index bfeb25aaf9a2..326e870d7123 100644
--- a/arch/arm/mach-imx/cpuidle-imx6q.c
+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
@@ -16,30 +16,23 @@
 #include "cpuidle.h"
 #include "hardware.h"
 
-static atomic_t master = ATOMIC_INIT(0);
-static DEFINE_SPINLOCK(master_lock);
+static int num_idle_cpus = 0;
+static DEFINE_SPINLOCK(cpuidle_lock);
 
 static int imx6q_enter_wait(struct cpuidle_device *dev,
                             struct cpuidle_driver *drv, int index)
 {
-        if (atomic_inc_return(&master) == num_online_cpus()) {
-                /*
-                 * With this lock, we prevent other cpu to exit and enter
-                 * this function again and become the master.
-                 */
-                if (!spin_trylock(&master_lock))
-                        goto idle;
+        spin_lock(&cpuidle_lock);
+        if (++num_idle_cpus == num_online_cpus())
                 imx6_set_lpm(WAIT_UNCLOCKED);
-                cpu_do_idle();
-                imx6_set_lpm(WAIT_CLOCKED);
-                spin_unlock(&master_lock);
-                goto done;
-        }
+        spin_unlock(&cpuidle_lock);
 
-idle:
         cpu_do_idle();
-done:
-        atomic_dec(&master);
+
+        spin_lock(&cpuidle_lock);
+        if (num_idle_cpus-- == num_online_cpus())
+                imx6_set_lpm(WAIT_CLOCKED);
+        spin_unlock(&cpuidle_lock);
 
         return index;
 }
diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c
index c7169c2f94c4..08c7892866c2 100644
--- a/arch/arm/mach-imx/mach-imx51.c
+++ b/arch/arm/mach-imx/mach-imx51.c
@@ -59,6 +59,7 @@ static void __init imx51_m4if_setup(void)
                 return;
 
         m4if_base = of_iomap(np, 0);
+        of_node_put(np);
         if (!m4if_base) {
                 pr_err("Unable to map M4IF registers\n");
                 return;