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authorJun Nie <jun.nie@linaro.org>2016-09-12 21:42:05 -0400
committerShawn Guo <shawnguo@kernel.org>2016-09-15 22:47:05 -0400
commit2e673c7dc37a51f1c1cdabee22615916cbe0fc27 (patch)
treec600f8f788a7424a45792af4e4246b5e842480ee
parent29b4817d4018df78086157ea3a55c1d9424a7cfc (diff)
arm64: dts: Add ZTE ZX296718 SoC dts and Makefile
Add device tree support for ZX296718 SoC and evaluation board based on it. Also document new values. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/arm/zte.txt24
-rw-r--r--arch/arm64/boot/dts/Makefile1
-rw-r--r--arch/arm64/boot/dts/zte/Makefile5
-rw-r--r--arch/arm64/boot/dts/zte/zx296718-evb.dts64
-rw-r--r--arch/arm64/boot/dts/zte/zx296718.dtsi292
5 files changed, 386 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/zte.txt b/Documentation/devicetree/bindings/arm/zte.txt
index 3ff5c9e85c1c..83369785d29c 100644
--- a/Documentation/devicetree/bindings/arm/zte.txt
+++ b/Documentation/devicetree/bindings/arm/zte.txt
@@ -13,3 +13,27 @@ Low power management required properties:
13 13
14Bus matrix required properties: 14Bus matrix required properties:
15 - compatible = "zte,zx-bus-matrix" 15 - compatible = "zte,zx-bus-matrix"
16
17
18---------------------------------------
19- ZX296718 SoC:
20 Required root node properties:
21 - compatible = "zte,zx296718"
22
23ZX296718 EVB board:
24 - "zte,zx296718-evb"
25
26System management required properties:
27 - compatible = "zte,zx296718-aon-sysctrl"
28 - compatible = "zte,zx296718-sysctrl"
29
30Example:
31aon_sysctrl: aon-sysctrl@116000 {
32 compatible = "zte,zx296718-aon-sysctrl", "syscon";
33 reg = <0x116000 0x1000>;
34};
35
36sysctrl: sysctrl@1463000 {
37 compatible = "zte,zx296718-sysctrl", "syscon";
38 reg = <0x1463000 0x1000>;
39};
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 6e199c903676..6684f97c2722 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -19,6 +19,7 @@ dts-dirs += socionext
19dts-dirs += sprd 19dts-dirs += sprd
20dts-dirs += xilinx 20dts-dirs += xilinx
21dts-dirs += lg 21dts-dirs += lg
22dts-dirs += zte
22 23
23subdir-y := $(dts-dirs) 24subdir-y := $(dts-dirs)
24 25
diff --git a/arch/arm64/boot/dts/zte/Makefile b/arch/arm64/boot/dts/zte/Makefile
new file mode 100644
index 000000000000..667806620f59
--- /dev/null
+++ b/arch/arm64/boot/dts/zte/Makefile
@@ -0,0 +1,5 @@
1dtb-$(CONFIG_ARCH_ZX) += zx296718-evb.dtb
2
3always := $(dtb-y)
4subdir-y := $(dts-dirs)
5clean-files := *.dtb
diff --git a/arch/arm64/boot/dts/zte/zx296718-evb.dts b/arch/arm64/boot/dts/zte/zx296718-evb.dts
new file mode 100644
index 000000000000..e164ff6de5fc
--- /dev/null
+++ b/arch/arm64/boot/dts/zte/zx296718-evb.dts
@@ -0,0 +1,64 @@
1/*
2 * Copyright 2016 ZTE Corporation.
3 * Copyright 2016 Linaro Ltd.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "zx296718.dtsi"
46
47/ {
48 model = "ZTE zx296718 evaluation board";
49 compatible = "zte,zx296718-evb", "zte,zx296718";
50
51 chosen {
52 stdout-path = "serial0:115200n8";
53 };
54
55 memory@40000000 {
56 device_type = "memory";
57 reg = <0x40000000 0x40000000>;
58 };
59
60};
61
62&uart0 {
63 status = "okay";
64};
diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi
new file mode 100644
index 000000000000..a223066f24ce
--- /dev/null
+++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
@@ -0,0 +1,292 @@
1/*
2 * Copyright 2016 ZTE Corporation.
3 * Copyright 2016 Linaro Ltd.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44#include <dt-bindings/input/input.h>
45#include <dt-bindings/interrupt-controller/arm-gic.h>
46#include <dt-bindings/gpio/gpio.h>
47
48/ {
49 compatible = "zte,zx296718";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&gic>;
53
54 aliases {
55 serial0 = &uart0;
56 };
57
58 cpus {
59 #address-cells = <2>;
60 #size-cells = <0>;
61
62 cpu-map {
63 cluster0 {
64 core0 {
65 cpu = <&cpu0>;
66 };
67 core1 {
68 cpu = <&cpu1>;
69 };
70 core2 {
71 cpu = <&cpu2>;
72 };
73 core3 {
74 cpu = <&cpu3>;
75 };
76 };
77 };
78
79 cpu0: cpu@0 {
80 device_type = "cpu";
81 compatible = "arm,cortex-a53","arm,armv8";
82 reg = <0x0 0x0>;
83 enable-method = "psci";
84 };
85
86 cpu1: cpu@1 {
87 device_type = "cpu";
88 compatible = "arm,cortex-a53","arm,armv8";
89 reg = <0x0 0x1>;
90 enable-method = "psci";
91 };
92
93 cpu2: cpu@2 {
94 device_type = "cpu";
95 compatible = "arm,cortex-a53","arm,armv8";
96 reg = <0x0 0x2>;
97 enable-method = "psci";
98 };
99
100 cpu3: cpu@3 {
101 device_type = "cpu";
102 compatible = "arm,cortex-a53","arm,armv8";
103 reg = <0x0 0x3>;
104 enable-method = "psci";
105 };
106 };
107
108 clk24k: clk-24k {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <24000>;
112 clock-output-names = "rtcclk";
113 };
114
115 osc32k: clk-osc32k {
116 compatible = "fixed-clock";
117 #clock-cells = <0>;
118 clock-frequency = <32000>;
119 clock-output-names = "osc32k";
120 };
121
122 osc12m: clk-osc12m {
123 compatible = "fixed-clock";
124 #clock-cells = <0>;
125 clock-frequency = <12000000>;
126 clock-output-names = "osc12m";
127 };
128
129 osc24m: clk-osc24m {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 clock-frequency = <24000000>;
133 clock-output-names = "osc24m";
134 };
135
136 osc25m: clk-osc25m {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 clock-frequency = <25000000>;
140 clock-output-names = "osc25m";
141 };
142
143 osc60m: clk-osc60m {
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
146 clock-frequency = <60000000>;
147 clock-output-names = "osc60m";
148 };
149
150 osc99m: clk-osc99m {
151 compatible = "fixed-clock";
152 #clock-cells = <0>;
153 clock-frequency = <99000000>;
154 clock-output-names = "osc99m";
155 };
156
157 osc125m: clk-osc125m {
158 compatible = "fixed-clock";
159 #clock-cells = <0>;
160 clock-frequency = <125000000>;
161 clock-output-names = "osc125m";
162 };
163
164 osc198m: clk-osc198m {
165 compatible = "fixed-clock";
166 #clock-cells = <0>;
167 clock-frequency = <198000000>;
168 clock-output-names = "osc198m";
169 };
170
171 pll_audio: clk-pll-884m {
172 compatible = "fixed-clock";
173 #clock-cells = <0>;
174 clock-frequency = <884000000>;
175 clock-output-names = "pll_audio";
176 };
177
178 pll_ddr: clk-pll-932m {
179 compatible = "fixed-clock";
180 #clock-cells = <0>;
181 clock-frequency = <932000000>;
182 clock-output-names = "pll_ddr";
183 };
184
185 pll_hsic: clk-pll-960m {
186 compatible = "fixed-clock";
187 #clock-cells = <0>;
188 clock-frequency = <960000000>;
189 clock-output-names = "pll_hsic";
190 };
191
192 pll_mac: clk-pll-1000m {
193 compatible = "fixed-clock";
194 #clock-cells = <0>;
195 clock-frequency = <1000000000>;
196 clock-output-names = "pll_mac";
197 };
198
199 pll_vga: clk-pll-1073m {
200 compatible = "fixed-clock";
201 #clock-cells = <0>;
202 clock-frequency = <1073000000>;
203 clock-output-names = "pll_vga";
204 };
205
206 pll_mm0: clk-pll-1188m {
207 compatible = "fixed-clock";
208 #clock-cells = <0>;
209 clock-frequency = <1188000000>;
210 clock-output-names = "pll_mm0";
211 };
212
213 pll_mm1: clk-pll-1296m {
214 compatible = "fixed-clock";
215 #clock-cells = <0>;
216 clock-frequency = <1296000000>;
217 clock-output-names = "pll_mm1";
218 };
219
220 psci {
221 compatible = "arm,psci-1.0";
222 method = "smc";
223 };
224
225 timer {
226 compatible = "arm,armv8-timer";
227 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
228 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
229 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
230 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
231 };
232
233 pmu {
234 compatible = "arm,cortex-a53-pmu";
235 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
236 };
237
238 gic: interrupt-controller@2a00000 {
239 compatible = "arm,gic-v3";
240 #interrupt-cells = <3>;
241 #address-cells = <0>;
242 #redistributor-regions = <6>;
243 redistributor-stride = <0x0 0x40000>;
244 interrupt-controller;
245 reg = <0x02a00000 0x10000>,
246 <0x02b00000 0x20000>,
247 <0x02b20000 0x20000>,
248 <0x02b40000 0x20000>,
249 <0x02b60000 0x20000>,
250 <0x02b80000 0x20000>,
251 <0x02ba0000 0x20000>;
252 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
253 };
254
255 soc {
256 #address-cells = <1>;
257 #size-cells = <1>;
258 compatible = "simple-bus";
259 ranges;
260
261 aon_sysctrl: aon-sysctrl@116000 {
262 compatible = "zte,zx296718-aon-sysctrl", "syscon";
263 reg = <0x116000 0x1000>;
264 };
265
266 uart0: uart@11f000 {
267 compatible = "arm,pl011", "arm,primecell";
268 arm,primecell-periphid = <0x001feffe>;
269 reg = <0x11f000 0x1000>;
270 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
271 clocks = <&osc24m>;
272 clock-names = "apb_pclk";
273 status = "disabled";
274 };
275
276 dma: dma-controller@1460000 {
277 compatible = "zte,zx296702-dma";
278 reg = <0x01460000 0x1000>;
279 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
280 clocks = <&osc24m>;
281 clock-names = "dmaclk";
282 #dma-cells = <1>;
283 dma-channels = <32>;
284 dma-requests = <32>;
285 };
286
287 sysctrl: sysctrl@1463000 {
288 compatible = "zte,zx296718-sysctrl", "syscon";
289 reg = <0x1463000 0x1000>;
290 };
291 };
292};