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authorElaine Zhang <zhangqing@rock-chips.com>2018-05-23 02:52:03 -0400
committerHeiko Stuebner <heiko@sntech.de>2018-05-23 14:47:57 -0400
commit2dacbd104636f3a864c4866067e555efb8ac8334 (patch)
treecdb4d964950f8aaaee986e8ef93e22e49de8fbb9
parent660175dc1af27f93e1e5843edbfbadc36f0a53fd (diff)
soc: rockchip: power-domain: add power domain support for rk3228
This driver is modified to support RK3228 SoC. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--drivers/soc/rockchip/pm_domains.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index d03468805c94..36ded8396bb5 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/syscon.h> 20#include <linux/mfd/syscon.h>
21#include <dt-bindings/power/rk3036-power.h> 21#include <dt-bindings/power/rk3036-power.h>
22#include <dt-bindings/power/rk3128-power.h> 22#include <dt-bindings/power/rk3128-power.h>
23#include <dt-bindings/power/rk3228-power.h>
23#include <dt-bindings/power/rk3288-power.h> 24#include <dt-bindings/power/rk3288-power.h>
24#include <dt-bindings/power/rk3328-power.h> 25#include <dt-bindings/power/rk3328-power.h>
25#include <dt-bindings/power/rk3366-power.h> 26#include <dt-bindings/power/rk3366-power.h>
@@ -730,6 +731,20 @@ static const struct rockchip_domain_info rk3128_pm_domains[] = {
730 [RK3128_PD_GPU] = DOMAIN_RK3288(1, 1, 3, false), 731 [RK3128_PD_GPU] = DOMAIN_RK3288(1, 1, 3, false),
731}; 732};
732 733
734static const struct rockchip_domain_info rk3228_pm_domains[] = {
735 [RK3228_PD_CORE] = DOMAIN_RK3036(0, 0, 16, true),
736 [RK3228_PD_MSCH] = DOMAIN_RK3036(1, 1, 17, true),
737 [RK3228_PD_BUS] = DOMAIN_RK3036(2, 2, 18, true),
738 [RK3228_PD_SYS] = DOMAIN_RK3036(3, 3, 19, true),
739 [RK3228_PD_VIO] = DOMAIN_RK3036(4, 4, 20, false),
740 [RK3228_PD_VOP] = DOMAIN_RK3036(5, 5, 21, false),
741 [RK3228_PD_VPU] = DOMAIN_RK3036(6, 6, 22, false),
742 [RK3228_PD_RKVDEC] = DOMAIN_RK3036(7, 7, 23, false),
743 [RK3228_PD_GPU] = DOMAIN_RK3036(8, 8, 24, false),
744 [RK3228_PD_PERI] = DOMAIN_RK3036(9, 9, 25, true),
745 [RK3228_PD_GMAC] = DOMAIN_RK3036(10, 10, 26, false),
746};
747
733static const struct rockchip_domain_info rk3288_pm_domains[] = { 748static const struct rockchip_domain_info rk3288_pm_domains[] = {
734 [RK3288_PD_VIO] = DOMAIN_RK3288(7, 7, 4, false), 749 [RK3288_PD_VIO] = DOMAIN_RK3288(7, 7, 4, false),
735 [RK3288_PD_HEVC] = DOMAIN_RK3288(14, 10, 9, false), 750 [RK3288_PD_HEVC] = DOMAIN_RK3288(14, 10, 9, false),
@@ -817,6 +832,15 @@ static const struct rockchip_pmu_info rk3128_pmu = {
817 .domain_info = rk3128_pm_domains, 832 .domain_info = rk3128_pm_domains,
818}; 833};
819 834
835static const struct rockchip_pmu_info rk3228_pmu = {
836 .req_offset = 0x40c,
837 .idle_offset = 0x488,
838 .ack_offset = 0x488,
839
840 .num_domains = ARRAY_SIZE(rk3228_pm_domains),
841 .domain_info = rk3228_pm_domains,
842};
843
820static const struct rockchip_pmu_info rk3288_pmu = { 844static const struct rockchip_pmu_info rk3288_pmu = {
821 .pwr_offset = 0x08, 845 .pwr_offset = 0x08,
822 .status_offset = 0x0c, 846 .status_offset = 0x0c,
@@ -900,6 +924,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
900 .data = (void *)&rk3128_pmu, 924 .data = (void *)&rk3128_pmu,
901 }, 925 },
902 { 926 {
927 .compatible = "rockchip,rk3228-power-controller",
928 .data = (void *)&rk3228_pmu,
929 },
930 {
903 .compatible = "rockchip,rk3288-power-controller", 931 .compatible = "rockchip,rk3288-power-controller",
904 .data = (void *)&rk3288_pmu, 932 .data = (void *)&rk3288_pmu,
905 }, 933 },