diff options
author | Matan Barak <matanb@mellanox.com> | 2018-03-28 02:27:55 -0400 |
---|---|---|
committer | Jason Gunthorpe <jgg@mellanox.com> | 2018-04-04 14:06:28 -0400 |
commit | 2d93fc856959bb940b3cf1e7cbad38721d6bea75 (patch) | |
tree | 78cbf6275d037224778eb6ee6256e52bd30982e1 | |
parent | c03faa562d0279e463900c92d4a54c0dc3c806b0 (diff) |
IB/mlx5: Add ability to hash by IPSEC_SPI when creating a TIR
When a Raw Ethernet QP is created, we actually create a few objects.
One of these objects is a TIR. Currently, a TIR could hash (and spread
the traffic) by IP or port only. Adding a hashing by IPSec SPI to TIR
creation with the required UAPI bit.
Signed-off-by: Matan Barak <matanb@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
-rw-r--r-- | drivers/infiniband/hw/mlx5/main.c | 4 | ||||
-rw-r--r-- | drivers/infiniband/hw/mlx5/qp.c | 16 | ||||
-rw-r--r-- | include/uapi/rdma/mlx5-abi.h | 1 |
3 files changed, 17 insertions, 4 deletions
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c index 25e70ae0b484..31295e39896c 100644 --- a/drivers/infiniband/hw/mlx5/main.c +++ b/drivers/infiniband/hw/mlx5/main.c | |||
@@ -856,6 +856,10 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, | |||
856 | MLX5_RX_HASH_SRC_PORT_UDP | | 856 | MLX5_RX_HASH_SRC_PORT_UDP | |
857 | MLX5_RX_HASH_DST_PORT_UDP | | 857 | MLX5_RX_HASH_DST_PORT_UDP | |
858 | MLX5_RX_HASH_INNER; | 858 | MLX5_RX_HASH_INNER; |
859 | if (mlx5_accel_ipsec_device_caps(dev->mdev) & | ||
860 | MLX5_ACCEL_IPSEC_CAP_DEVICE) | ||
861 | resp.rss_caps.rx_hash_fields_mask |= | ||
862 | MLX5_RX_HASH_IPSEC_SPI; | ||
859 | resp.response_length += sizeof(resp.rss_caps); | 863 | resp.response_length += sizeof(resp.rss_caps); |
860 | } | 864 | } |
861 | } else { | 865 | } else { |
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c index c8f01f32ebb4..0a0524f60924 100644 --- a/drivers/infiniband/hw/mlx5/qp.c +++ b/drivers/infiniband/hw/mlx5/qp.c | |||
@@ -1413,6 +1413,7 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, | |||
1413 | void *tirc; | 1413 | void *tirc; |
1414 | void *hfso; | 1414 | void *hfso; |
1415 | u32 selected_fields = 0; | 1415 | u32 selected_fields = 0; |
1416 | u32 outer_l4; | ||
1416 | size_t min_resp_len; | 1417 | size_t min_resp_len; |
1417 | u32 tdn = mucontext->tdn; | 1418 | u32 tdn = mucontext->tdn; |
1418 | struct mlx5_ib_create_qp_rss ucmd = {}; | 1419 | struct mlx5_ib_create_qp_rss ucmd = {}; |
@@ -1543,10 +1544,14 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, | |||
1543 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, | 1544 | MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, |
1544 | MLX5_L3_PROT_TYPE_IPV6); | 1545 | MLX5_L3_PROT_TYPE_IPV6); |
1545 | 1546 | ||
1546 | if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || | 1547 | outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || |
1547 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) && | 1548 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | |
1548 | ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || | 1549 | ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || |
1549 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))) { | 1550 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | |
1551 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; | ||
1552 | |||
1553 | /* Check that only one l4 protocol is set */ | ||
1554 | if (outer_l4 & (outer_l4 - 1)) { | ||
1550 | err = -EINVAL; | 1555 | err = -EINVAL; |
1551 | goto err; | 1556 | goto err; |
1552 | } | 1557 | } |
@@ -1577,6 +1582,9 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, | |||
1577 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) | 1582 | (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) |
1578 | selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; | 1583 | selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; |
1579 | 1584 | ||
1585 | if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) | ||
1586 | selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; | ||
1587 | |||
1580 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); | 1588 | MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); |
1581 | 1589 | ||
1582 | create_tir: | 1590 | create_tir: |
diff --git a/include/uapi/rdma/mlx5-abi.h b/include/uapi/rdma/mlx5-abi.h index f60d2659cdb7..d86a65b993f8 100644 --- a/include/uapi/rdma/mlx5-abi.h +++ b/include/uapi/rdma/mlx5-abi.h | |||
@@ -327,6 +327,7 @@ enum mlx5_rx_hash_fields { | |||
327 | MLX5_RX_HASH_DST_PORT_TCP = 1 << 5, | 327 | MLX5_RX_HASH_DST_PORT_TCP = 1 << 5, |
328 | MLX5_RX_HASH_SRC_PORT_UDP = 1 << 6, | 328 | MLX5_RX_HASH_SRC_PORT_UDP = 1 << 6, |
329 | MLX5_RX_HASH_DST_PORT_UDP = 1 << 7, | 329 | MLX5_RX_HASH_DST_PORT_UDP = 1 << 7, |
330 | MLX5_RX_HASH_IPSEC_SPI = 1 << 8, | ||
330 | /* Save bits for future fields */ | 331 | /* Save bits for future fields */ |
331 | MLX5_RX_HASH_INNER = (1UL << 31), | 332 | MLX5_RX_HASH_INNER = (1UL << 31), |
332 | }; | 333 | }; |