x86/MCE: Export memory_error()

Export the function which checks whether an MCE is a memory error to
other users so that we can reuse the logic. Drop the boot_cpu_data use,
while at it, as mce.cpuvendor already has the CPU vendor in there.

Integrate a piece from a patch from Vishal Verma
<vishal.l.verma@intel.com> to export it for modules (nfit).

The main reason we're exporting it is that the nfit handler
nfit_handle_mce() needs to detect a memory error properly before doing
its recovery actions.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Vishal Verma <vishal.l.verma@intel.com>
Cc: <stable@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170519093915.15413-2-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

2 files changed, 7 insertions, 7 deletions

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 4fd5195deed0..3f9a3d2a5209 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -266,6 +266,7 @@ static inline int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *s
 #endif
 
 int mce_available(struct cpuinfo_x86 *c);
+bool mce_is_memory_error(struct mce *m);
 
 DECLARE_PER_CPU(unsigned, mce_exception_count);
 DECLARE_PER_CPU(unsigned, mce_poll_count);
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 5abd4bf73d6e..5cfbaeb6529a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -499,16 +499,14 @@ static int mce_usable_address(struct mce *m)
         return 1;
 }
 
-static bool memory_error(struct mce *m)
+bool mce_is_memory_error(struct mce *m)
 {
-        struct cpuinfo_x86 *c = &boot_cpu_data;
-
-        if (c->x86_vendor == X86_VENDOR_AMD) {
+        if (m->cpuvendor == X86_VENDOR_AMD) {
                 /* ErrCodeExt[20:16] */
                 u8 xec = (m->status >> 16) & 0x1f;
 
                 return (xec == 0x0 || xec == 0x8);
-        } else if (c->x86_vendor == X86_VENDOR_INTEL) {
+        } else if (m->cpuvendor == X86_VENDOR_INTEL) {
                 /*
                  * Intel SDM Volume 3B - 15.9.2 Compound Error Codes
                  *
@@ -529,6 +527,7 @@ static bool memory_error(struct mce *m)
 
         return false;
 }
+EXPORT_SYMBOL_GPL(mce_is_memory_error);
 
 static bool cec_add_mce(struct mce *m)
 {
@@ -536,7 +535,7 @@ static bool cec_add_mce(struct mce *m)
                 return false;
 
         /* We eat only correctable DRAM errors with usable addresses. */
-        if (memory_error(m) &&
+        if (mce_is_memory_error(m) &&
             !(m->status & MCI_STATUS_UC) &&
             mce_usable_address(m))
                 if (!cec_add_elem(m->addr >> PAGE_SHIFT))
@@ -713,7 +712,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
 
                 severity = mce_severity(&m, mca_cfg.tolerant, NULL, false);
 
-                if (severity == MCE_DEFERRED_SEVERITY && memory_error(&m))
+                if (severity == MCE_DEFERRED_SEVERITY && mce_is_memory_error(&m))
                         if (m.status & MCI_STATUS_ADDRV)
                                 m.severity = severity;