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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2017-12-13 23:06:13 -0500
committerLinus Walleij <linus.walleij@linaro.org>2018-05-16 07:31:02 -0400
commit2c77aa3d70b9fc798bdf6d60ef362cee6dccab02 (patch)
tree77666e7634ea6164aa0f9a3abb23ad08321e8921
parent7d6989ade916c37227e3054445b3fc3eebacb5d6 (diff)
pinctrl: sh-pfc: r8a77965: Add MSIOF pins, groups and functions
This patch adds MSIOF{0,1,2,3} pins, groups and functions to the R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Correct MSIOF3 SS2_E comment] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a77965.c912
1 files changed, 912 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index cea9d0599c12..54461ebd5db1 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -1706,6 +1706,704 @@ static const unsigned int intc_ex_irq5_mux[] = {
1706 IRQ5_MARK, 1706 IRQ5_MARK,
1707}; 1707};
1708 1708
1709/* - MSIOF0 ----------------------------------------------------------------- */
1710static const unsigned int msiof0_clk_pins[] = {
1711 /* SCK */
1712 RCAR_GP_PIN(5, 17),
1713};
1714static const unsigned int msiof0_clk_mux[] = {
1715 MSIOF0_SCK_MARK,
1716};
1717static const unsigned int msiof0_sync_pins[] = {
1718 /* SYNC */
1719 RCAR_GP_PIN(5, 18),
1720};
1721static const unsigned int msiof0_sync_mux[] = {
1722 MSIOF0_SYNC_MARK,
1723};
1724static const unsigned int msiof0_ss1_pins[] = {
1725 /* SS1 */
1726 RCAR_GP_PIN(5, 19),
1727};
1728static const unsigned int msiof0_ss1_mux[] = {
1729 MSIOF0_SS1_MARK,
1730};
1731static const unsigned int msiof0_ss2_pins[] = {
1732 /* SS2 */
1733 RCAR_GP_PIN(5, 21),
1734};
1735static const unsigned int msiof0_ss2_mux[] = {
1736 MSIOF0_SS2_MARK,
1737};
1738static const unsigned int msiof0_txd_pins[] = {
1739 /* TXD */
1740 RCAR_GP_PIN(5, 20),
1741};
1742static const unsigned int msiof0_txd_mux[] = {
1743 MSIOF0_TXD_MARK,
1744};
1745static const unsigned int msiof0_rxd_pins[] = {
1746 /* RXD */
1747 RCAR_GP_PIN(5, 22),
1748};
1749static const unsigned int msiof0_rxd_mux[] = {
1750 MSIOF0_RXD_MARK,
1751};
1752/* - MSIOF1 ----------------------------------------------------------------- */
1753static const unsigned int msiof1_clk_a_pins[] = {
1754 /* SCK */
1755 RCAR_GP_PIN(6, 8),
1756};
1757static const unsigned int msiof1_clk_a_mux[] = {
1758 MSIOF1_SCK_A_MARK,
1759};
1760static const unsigned int msiof1_sync_a_pins[] = {
1761 /* SYNC */
1762 RCAR_GP_PIN(6, 9),
1763};
1764static const unsigned int msiof1_sync_a_mux[] = {
1765 MSIOF1_SYNC_A_MARK,
1766};
1767static const unsigned int msiof1_ss1_a_pins[] = {
1768 /* SS1 */
1769 RCAR_GP_PIN(6, 5),
1770};
1771static const unsigned int msiof1_ss1_a_mux[] = {
1772 MSIOF1_SS1_A_MARK,
1773};
1774static const unsigned int msiof1_ss2_a_pins[] = {
1775 /* SS2 */
1776 RCAR_GP_PIN(6, 6),
1777};
1778static const unsigned int msiof1_ss2_a_mux[] = {
1779 MSIOF1_SS2_A_MARK,
1780};
1781static const unsigned int msiof1_txd_a_pins[] = {
1782 /* TXD */
1783 RCAR_GP_PIN(6, 7),
1784};
1785static const unsigned int msiof1_txd_a_mux[] = {
1786 MSIOF1_TXD_A_MARK,
1787};
1788static const unsigned int msiof1_rxd_a_pins[] = {
1789 /* RXD */
1790 RCAR_GP_PIN(6, 10),
1791};
1792static const unsigned int msiof1_rxd_a_mux[] = {
1793 MSIOF1_RXD_A_MARK,
1794};
1795static const unsigned int msiof1_clk_b_pins[] = {
1796 /* SCK */
1797 RCAR_GP_PIN(5, 9),
1798};
1799static const unsigned int msiof1_clk_b_mux[] = {
1800 MSIOF1_SCK_B_MARK,
1801};
1802static const unsigned int msiof1_sync_b_pins[] = {
1803 /* SYNC */
1804 RCAR_GP_PIN(5, 3),
1805};
1806static const unsigned int msiof1_sync_b_mux[] = {
1807 MSIOF1_SYNC_B_MARK,
1808};
1809static const unsigned int msiof1_ss1_b_pins[] = {
1810 /* SS1 */
1811 RCAR_GP_PIN(5, 4),
1812};
1813static const unsigned int msiof1_ss1_b_mux[] = {
1814 MSIOF1_SS1_B_MARK,
1815};
1816static const unsigned int msiof1_ss2_b_pins[] = {
1817 /* SS2 */
1818 RCAR_GP_PIN(5, 0),
1819};
1820static const unsigned int msiof1_ss2_b_mux[] = {
1821 MSIOF1_SS2_B_MARK,
1822};
1823static const unsigned int msiof1_txd_b_pins[] = {
1824 /* TXD */
1825 RCAR_GP_PIN(5, 8),
1826};
1827static const unsigned int msiof1_txd_b_mux[] = {
1828 MSIOF1_TXD_B_MARK,
1829};
1830static const unsigned int msiof1_rxd_b_pins[] = {
1831 /* RXD */
1832 RCAR_GP_PIN(5, 7),
1833};
1834static const unsigned int msiof1_rxd_b_mux[] = {
1835 MSIOF1_RXD_B_MARK,
1836};
1837static const unsigned int msiof1_clk_c_pins[] = {
1838 /* SCK */
1839 RCAR_GP_PIN(6, 17),
1840};
1841static const unsigned int msiof1_clk_c_mux[] = {
1842 MSIOF1_SCK_C_MARK,
1843};
1844static const unsigned int msiof1_sync_c_pins[] = {
1845 /* SYNC */
1846 RCAR_GP_PIN(6, 18),
1847};
1848static const unsigned int msiof1_sync_c_mux[] = {
1849 MSIOF1_SYNC_C_MARK,
1850};
1851static const unsigned int msiof1_ss1_c_pins[] = {
1852 /* SS1 */
1853 RCAR_GP_PIN(6, 21),
1854};
1855static const unsigned int msiof1_ss1_c_mux[] = {
1856 MSIOF1_SS1_C_MARK,
1857};
1858static const unsigned int msiof1_ss2_c_pins[] = {
1859 /* SS2 */
1860 RCAR_GP_PIN(6, 27),
1861};
1862static const unsigned int msiof1_ss2_c_mux[] = {
1863 MSIOF1_SS2_C_MARK,
1864};
1865static const unsigned int msiof1_txd_c_pins[] = {
1866 /* TXD */
1867 RCAR_GP_PIN(6, 20),
1868};
1869static const unsigned int msiof1_txd_c_mux[] = {
1870 MSIOF1_TXD_C_MARK,
1871};
1872static const unsigned int msiof1_rxd_c_pins[] = {
1873 /* RXD */
1874 RCAR_GP_PIN(6, 19),
1875};
1876static const unsigned int msiof1_rxd_c_mux[] = {
1877 MSIOF1_RXD_C_MARK,
1878};
1879static const unsigned int msiof1_clk_d_pins[] = {
1880 /* SCK */
1881 RCAR_GP_PIN(5, 12),
1882};
1883static const unsigned int msiof1_clk_d_mux[] = {
1884 MSIOF1_SCK_D_MARK,
1885};
1886static const unsigned int msiof1_sync_d_pins[] = {
1887 /* SYNC */
1888 RCAR_GP_PIN(5, 15),
1889};
1890static const unsigned int msiof1_sync_d_mux[] = {
1891 MSIOF1_SYNC_D_MARK,
1892};
1893static const unsigned int msiof1_ss1_d_pins[] = {
1894 /* SS1 */
1895 RCAR_GP_PIN(5, 16),
1896};
1897static const unsigned int msiof1_ss1_d_mux[] = {
1898 MSIOF1_SS1_D_MARK,
1899};
1900static const unsigned int msiof1_ss2_d_pins[] = {
1901 /* SS2 */
1902 RCAR_GP_PIN(5, 21),
1903};
1904static const unsigned int msiof1_ss2_d_mux[] = {
1905 MSIOF1_SS2_D_MARK,
1906};
1907static const unsigned int msiof1_txd_d_pins[] = {
1908 /* TXD */
1909 RCAR_GP_PIN(5, 14),
1910};
1911static const unsigned int msiof1_txd_d_mux[] = {
1912 MSIOF1_TXD_D_MARK,
1913};
1914static const unsigned int msiof1_rxd_d_pins[] = {
1915 /* RXD */
1916 RCAR_GP_PIN(5, 13),
1917};
1918static const unsigned int msiof1_rxd_d_mux[] = {
1919 MSIOF1_RXD_D_MARK,
1920};
1921static const unsigned int msiof1_clk_e_pins[] = {
1922 /* SCK */
1923 RCAR_GP_PIN(3, 0),
1924};
1925static const unsigned int msiof1_clk_e_mux[] = {
1926 MSIOF1_SCK_E_MARK,
1927};
1928static const unsigned int msiof1_sync_e_pins[] = {
1929 /* SYNC */
1930 RCAR_GP_PIN(3, 1),
1931};
1932static const unsigned int msiof1_sync_e_mux[] = {
1933 MSIOF1_SYNC_E_MARK,
1934};
1935static const unsigned int msiof1_ss1_e_pins[] = {
1936 /* SS1 */
1937 RCAR_GP_PIN(3, 4),
1938};
1939static const unsigned int msiof1_ss1_e_mux[] = {
1940 MSIOF1_SS1_E_MARK,
1941};
1942static const unsigned int msiof1_ss2_e_pins[] = {
1943 /* SS2 */
1944 RCAR_GP_PIN(3, 5),
1945};
1946static const unsigned int msiof1_ss2_e_mux[] = {
1947 MSIOF1_SS2_E_MARK,
1948};
1949static const unsigned int msiof1_txd_e_pins[] = {
1950 /* TXD */
1951 RCAR_GP_PIN(3, 3),
1952};
1953static const unsigned int msiof1_txd_e_mux[] = {
1954 MSIOF1_TXD_E_MARK,
1955};
1956static const unsigned int msiof1_rxd_e_pins[] = {
1957 /* RXD */
1958 RCAR_GP_PIN(3, 2),
1959};
1960static const unsigned int msiof1_rxd_e_mux[] = {
1961 MSIOF1_RXD_E_MARK,
1962};
1963static const unsigned int msiof1_clk_f_pins[] = {
1964 /* SCK */
1965 RCAR_GP_PIN(5, 23),
1966};
1967static const unsigned int msiof1_clk_f_mux[] = {
1968 MSIOF1_SCK_F_MARK,
1969};
1970static const unsigned int msiof1_sync_f_pins[] = {
1971 /* SYNC */
1972 RCAR_GP_PIN(5, 24),
1973};
1974static const unsigned int msiof1_sync_f_mux[] = {
1975 MSIOF1_SYNC_F_MARK,
1976};
1977static const unsigned int msiof1_ss1_f_pins[] = {
1978 /* SS1 */
1979 RCAR_GP_PIN(6, 1),
1980};
1981static const unsigned int msiof1_ss1_f_mux[] = {
1982 MSIOF1_SS1_F_MARK,
1983};
1984static const unsigned int msiof1_ss2_f_pins[] = {
1985 /* SS2 */
1986 RCAR_GP_PIN(6, 2),
1987};
1988static const unsigned int msiof1_ss2_f_mux[] = {
1989 MSIOF1_SS2_F_MARK,
1990};
1991static const unsigned int msiof1_txd_f_pins[] = {
1992 /* TXD */
1993 RCAR_GP_PIN(6, 0),
1994};
1995static const unsigned int msiof1_txd_f_mux[] = {
1996 MSIOF1_TXD_F_MARK,
1997};
1998static const unsigned int msiof1_rxd_f_pins[] = {
1999 /* RXD */
2000 RCAR_GP_PIN(5, 25),
2001};
2002static const unsigned int msiof1_rxd_f_mux[] = {
2003 MSIOF1_RXD_F_MARK,
2004};
2005static const unsigned int msiof1_clk_g_pins[] = {
2006 /* SCK */
2007 RCAR_GP_PIN(3, 6),
2008};
2009static const unsigned int msiof1_clk_g_mux[] = {
2010 MSIOF1_SCK_G_MARK,
2011};
2012static const unsigned int msiof1_sync_g_pins[] = {
2013 /* SYNC */
2014 RCAR_GP_PIN(3, 7),
2015};
2016static const unsigned int msiof1_sync_g_mux[] = {
2017 MSIOF1_SYNC_G_MARK,
2018};
2019static const unsigned int msiof1_ss1_g_pins[] = {
2020 /* SS1 */
2021 RCAR_GP_PIN(3, 10),
2022};
2023static const unsigned int msiof1_ss1_g_mux[] = {
2024 MSIOF1_SS1_G_MARK,
2025};
2026static const unsigned int msiof1_ss2_g_pins[] = {
2027 /* SS2 */
2028 RCAR_GP_PIN(3, 11),
2029};
2030static const unsigned int msiof1_ss2_g_mux[] = {
2031 MSIOF1_SS2_G_MARK,
2032};
2033static const unsigned int msiof1_txd_g_pins[] = {
2034 /* TXD */
2035 RCAR_GP_PIN(3, 9),
2036};
2037static const unsigned int msiof1_txd_g_mux[] = {
2038 MSIOF1_TXD_G_MARK,
2039};
2040static const unsigned int msiof1_rxd_g_pins[] = {
2041 /* RXD */
2042 RCAR_GP_PIN(3, 8),
2043};
2044static const unsigned int msiof1_rxd_g_mux[] = {
2045 MSIOF1_RXD_G_MARK,
2046};
2047/* - MSIOF2 ----------------------------------------------------------------- */
2048static const unsigned int msiof2_clk_a_pins[] = {
2049 /* SCK */
2050 RCAR_GP_PIN(1, 9),
2051};
2052static const unsigned int msiof2_clk_a_mux[] = {
2053 MSIOF2_SCK_A_MARK,
2054};
2055static const unsigned int msiof2_sync_a_pins[] = {
2056 /* SYNC */
2057 RCAR_GP_PIN(1, 8),
2058};
2059static const unsigned int msiof2_sync_a_mux[] = {
2060 MSIOF2_SYNC_A_MARK,
2061};
2062static const unsigned int msiof2_ss1_a_pins[] = {
2063 /* SS1 */
2064 RCAR_GP_PIN(1, 6),
2065};
2066static const unsigned int msiof2_ss1_a_mux[] = {
2067 MSIOF2_SS1_A_MARK,
2068};
2069static const unsigned int msiof2_ss2_a_pins[] = {
2070 /* SS2 */
2071 RCAR_GP_PIN(1, 7),
2072};
2073static const unsigned int msiof2_ss2_a_mux[] = {
2074 MSIOF2_SS2_A_MARK,
2075};
2076static const unsigned int msiof2_txd_a_pins[] = {
2077 /* TXD */
2078 RCAR_GP_PIN(1, 11),
2079};
2080static const unsigned int msiof2_txd_a_mux[] = {
2081 MSIOF2_TXD_A_MARK,
2082};
2083static const unsigned int msiof2_rxd_a_pins[] = {
2084 /* RXD */
2085 RCAR_GP_PIN(1, 10),
2086};
2087static const unsigned int msiof2_rxd_a_mux[] = {
2088 MSIOF2_RXD_A_MARK,
2089};
2090static const unsigned int msiof2_clk_b_pins[] = {
2091 /* SCK */
2092 RCAR_GP_PIN(0, 4),
2093};
2094static const unsigned int msiof2_clk_b_mux[] = {
2095 MSIOF2_SCK_B_MARK,
2096};
2097static const unsigned int msiof2_sync_b_pins[] = {
2098 /* SYNC */
2099 RCAR_GP_PIN(0, 5),
2100};
2101static const unsigned int msiof2_sync_b_mux[] = {
2102 MSIOF2_SYNC_B_MARK,
2103};
2104static const unsigned int msiof2_ss1_b_pins[] = {
2105 /* SS1 */
2106 RCAR_GP_PIN(0, 0),
2107};
2108static const unsigned int msiof2_ss1_b_mux[] = {
2109 MSIOF2_SS1_B_MARK,
2110};
2111static const unsigned int msiof2_ss2_b_pins[] = {
2112 /* SS2 */
2113 RCAR_GP_PIN(0, 1),
2114};
2115static const unsigned int msiof2_ss2_b_mux[] = {
2116 MSIOF2_SS2_B_MARK,
2117};
2118static const unsigned int msiof2_txd_b_pins[] = {
2119 /* TXD */
2120 RCAR_GP_PIN(0, 7),
2121};
2122static const unsigned int msiof2_txd_b_mux[] = {
2123 MSIOF2_TXD_B_MARK,
2124};
2125static const unsigned int msiof2_rxd_b_pins[] = {
2126 /* RXD */
2127 RCAR_GP_PIN(0, 6),
2128};
2129static const unsigned int msiof2_rxd_b_mux[] = {
2130 MSIOF2_RXD_B_MARK,
2131};
2132static const unsigned int msiof2_clk_c_pins[] = {
2133 /* SCK */
2134 RCAR_GP_PIN(2, 12),
2135};
2136static const unsigned int msiof2_clk_c_mux[] = {
2137 MSIOF2_SCK_C_MARK,
2138};
2139static const unsigned int msiof2_sync_c_pins[] = {
2140 /* SYNC */
2141 RCAR_GP_PIN(2, 11),
2142};
2143static const unsigned int msiof2_sync_c_mux[] = {
2144 MSIOF2_SYNC_C_MARK,
2145};
2146static const unsigned int msiof2_ss1_c_pins[] = {
2147 /* SS1 */
2148 RCAR_GP_PIN(2, 10),
2149};
2150static const unsigned int msiof2_ss1_c_mux[] = {
2151 MSIOF2_SS1_C_MARK,
2152};
2153static const unsigned int msiof2_ss2_c_pins[] = {
2154 /* SS2 */
2155 RCAR_GP_PIN(2, 9),
2156};
2157static const unsigned int msiof2_ss2_c_mux[] = {
2158 MSIOF2_SS2_C_MARK,
2159};
2160static const unsigned int msiof2_txd_c_pins[] = {
2161 /* TXD */
2162 RCAR_GP_PIN(2, 14),
2163};
2164static const unsigned int msiof2_txd_c_mux[] = {
2165 MSIOF2_TXD_C_MARK,
2166};
2167static const unsigned int msiof2_rxd_c_pins[] = {
2168 /* RXD */
2169 RCAR_GP_PIN(2, 13),
2170};
2171static const unsigned int msiof2_rxd_c_mux[] = {
2172 MSIOF2_RXD_C_MARK,
2173};
2174static const unsigned int msiof2_clk_d_pins[] = {
2175 /* SCK */
2176 RCAR_GP_PIN(0, 8),
2177};
2178static const unsigned int msiof2_clk_d_mux[] = {
2179 MSIOF2_SCK_D_MARK,
2180};
2181static const unsigned int msiof2_sync_d_pins[] = {
2182 /* SYNC */
2183 RCAR_GP_PIN(0, 9),
2184};
2185static const unsigned int msiof2_sync_d_mux[] = {
2186 MSIOF2_SYNC_D_MARK,
2187};
2188static const unsigned int msiof2_ss1_d_pins[] = {
2189 /* SS1 */
2190 RCAR_GP_PIN(0, 12),
2191};
2192static const unsigned int msiof2_ss1_d_mux[] = {
2193 MSIOF2_SS1_D_MARK,
2194};
2195static const unsigned int msiof2_ss2_d_pins[] = {
2196 /* SS2 */
2197 RCAR_GP_PIN(0, 13),
2198};
2199static const unsigned int msiof2_ss2_d_mux[] = {
2200 MSIOF2_SS2_D_MARK,
2201};
2202static const unsigned int msiof2_txd_d_pins[] = {
2203 /* TXD */
2204 RCAR_GP_PIN(0, 11),
2205};
2206static const unsigned int msiof2_txd_d_mux[] = {
2207 MSIOF2_TXD_D_MARK,
2208};
2209static const unsigned int msiof2_rxd_d_pins[] = {
2210 /* RXD */
2211 RCAR_GP_PIN(0, 10),
2212};
2213static const unsigned int msiof2_rxd_d_mux[] = {
2214 MSIOF2_RXD_D_MARK,
2215};
2216/* - MSIOF3 ----------------------------------------------------------------- */
2217static const unsigned int msiof3_clk_a_pins[] = {
2218 /* SCK */
2219 RCAR_GP_PIN(0, 0),
2220};
2221static const unsigned int msiof3_clk_a_mux[] = {
2222 MSIOF3_SCK_A_MARK,
2223};
2224static const unsigned int msiof3_sync_a_pins[] = {
2225 /* SYNC */
2226 RCAR_GP_PIN(0, 1),
2227};
2228static const unsigned int msiof3_sync_a_mux[] = {
2229 MSIOF3_SYNC_A_MARK,
2230};
2231static const unsigned int msiof3_ss1_a_pins[] = {
2232 /* SS1 */
2233 RCAR_GP_PIN(0, 14),
2234};
2235static const unsigned int msiof3_ss1_a_mux[] = {
2236 MSIOF3_SS1_A_MARK,
2237};
2238static const unsigned int msiof3_ss2_a_pins[] = {
2239 /* SS2 */
2240 RCAR_GP_PIN(0, 15),
2241};
2242static const unsigned int msiof3_ss2_a_mux[] = {
2243 MSIOF3_SS2_A_MARK,
2244};
2245static const unsigned int msiof3_txd_a_pins[] = {
2246 /* TXD */
2247 RCAR_GP_PIN(0, 3),
2248};
2249static const unsigned int msiof3_txd_a_mux[] = {
2250 MSIOF3_TXD_A_MARK,
2251};
2252static const unsigned int msiof3_rxd_a_pins[] = {
2253 /* RXD */
2254 RCAR_GP_PIN(0, 2),
2255};
2256static const unsigned int msiof3_rxd_a_mux[] = {
2257 MSIOF3_RXD_A_MARK,
2258};
2259static const unsigned int msiof3_clk_b_pins[] = {
2260 /* SCK */
2261 RCAR_GP_PIN(1, 2),
2262};
2263static const unsigned int msiof3_clk_b_mux[] = {
2264 MSIOF3_SCK_B_MARK,
2265};
2266static const unsigned int msiof3_sync_b_pins[] = {
2267 /* SYNC */
2268 RCAR_GP_PIN(1, 0),
2269};
2270static const unsigned int msiof3_sync_b_mux[] = {
2271 MSIOF3_SYNC_B_MARK,
2272};
2273static const unsigned int msiof3_ss1_b_pins[] = {
2274 /* SS1 */
2275 RCAR_GP_PIN(1, 4),
2276};
2277static const unsigned int msiof3_ss1_b_mux[] = {
2278 MSIOF3_SS1_B_MARK,
2279};
2280static const unsigned int msiof3_ss2_b_pins[] = {
2281 /* SS2 */
2282 RCAR_GP_PIN(1, 5),
2283};
2284static const unsigned int msiof3_ss2_b_mux[] = {
2285 MSIOF3_SS2_B_MARK,
2286};
2287static const unsigned int msiof3_txd_b_pins[] = {
2288 /* TXD */
2289 RCAR_GP_PIN(1, 1),
2290};
2291static const unsigned int msiof3_txd_b_mux[] = {
2292 MSIOF3_TXD_B_MARK,
2293};
2294static const unsigned int msiof3_rxd_b_pins[] = {
2295 /* RXD */
2296 RCAR_GP_PIN(1, 3),
2297};
2298static const unsigned int msiof3_rxd_b_mux[] = {
2299 MSIOF3_RXD_B_MARK,
2300};
2301static const unsigned int msiof3_clk_c_pins[] = {
2302 /* SCK */
2303 RCAR_GP_PIN(1, 12),
2304};
2305static const unsigned int msiof3_clk_c_mux[] = {
2306 MSIOF3_SCK_C_MARK,
2307};
2308static const unsigned int msiof3_sync_c_pins[] = {
2309 /* SYNC */
2310 RCAR_GP_PIN(1, 13),
2311};
2312static const unsigned int msiof3_sync_c_mux[] = {
2313 MSIOF3_SYNC_C_MARK,
2314};
2315static const unsigned int msiof3_txd_c_pins[] = {
2316 /* TXD */
2317 RCAR_GP_PIN(1, 15),
2318};
2319static const unsigned int msiof3_txd_c_mux[] = {
2320 MSIOF3_TXD_C_MARK,
2321};
2322static const unsigned int msiof3_rxd_c_pins[] = {
2323 /* RXD */
2324 RCAR_GP_PIN(1, 14),
2325};
2326static const unsigned int msiof3_rxd_c_mux[] = {
2327 MSIOF3_RXD_C_MARK,
2328};
2329static const unsigned int msiof3_clk_d_pins[] = {
2330 /* SCK */
2331 RCAR_GP_PIN(1, 22),
2332};
2333static const unsigned int msiof3_clk_d_mux[] = {
2334 MSIOF3_SCK_D_MARK,
2335};
2336static const unsigned int msiof3_sync_d_pins[] = {
2337 /* SYNC */
2338 RCAR_GP_PIN(1, 23),
2339};
2340static const unsigned int msiof3_sync_d_mux[] = {
2341 MSIOF3_SYNC_D_MARK,
2342};
2343static const unsigned int msiof3_ss1_d_pins[] = {
2344 /* SS1 */
2345 RCAR_GP_PIN(1, 26),
2346};
2347static const unsigned int msiof3_ss1_d_mux[] = {
2348 MSIOF3_SS1_D_MARK,
2349};
2350static const unsigned int msiof3_txd_d_pins[] = {
2351 /* TXD */
2352 RCAR_GP_PIN(1, 25),
2353};
2354static const unsigned int msiof3_txd_d_mux[] = {
2355 MSIOF3_TXD_D_MARK,
2356};
2357static const unsigned int msiof3_rxd_d_pins[] = {
2358 /* RXD */
2359 RCAR_GP_PIN(1, 24),
2360};
2361static const unsigned int msiof3_rxd_d_mux[] = {
2362 MSIOF3_RXD_D_MARK,
2363};
2364static const unsigned int msiof3_clk_e_pins[] = {
2365 /* SCK */
2366 RCAR_GP_PIN(2, 3),
2367};
2368static const unsigned int msiof3_clk_e_mux[] = {
2369 MSIOF3_SCK_E_MARK,
2370};
2371static const unsigned int msiof3_sync_e_pins[] = {
2372 /* SYNC */
2373 RCAR_GP_PIN(2, 2),
2374};
2375static const unsigned int msiof3_sync_e_mux[] = {
2376 MSIOF3_SYNC_E_MARK,
2377};
2378static const unsigned int msiof3_ss1_e_pins[] = {
2379 /* SS1 */
2380 RCAR_GP_PIN(2, 1),
2381};
2382static const unsigned int msiof3_ss1_e_mux[] = {
2383 MSIOF3_SS1_E_MARK,
2384};
2385static const unsigned int msiof3_ss2_e_pins[] = {
2386 /* SS2 */
2387 RCAR_GP_PIN(2, 0),
2388};
2389static const unsigned int msiof3_ss2_e_mux[] = {
2390 MSIOF3_SS2_E_MARK,
2391};
2392static const unsigned int msiof3_txd_e_pins[] = {
2393 /* TXD */
2394 RCAR_GP_PIN(2, 5),
2395};
2396static const unsigned int msiof3_txd_e_mux[] = {
2397 MSIOF3_TXD_E_MARK,
2398};
2399static const unsigned int msiof3_rxd_e_pins[] = {
2400 /* RXD */
2401 RCAR_GP_PIN(2, 4),
2402};
2403static const unsigned int msiof3_rxd_e_mux[] = {
2404 MSIOF3_RXD_E_MARK,
2405};
2406
1709/* - SCIF0 ------------------------------------------------------------------ */ 2407/* - SCIF0 ------------------------------------------------------------------ */
1710static const unsigned int scif0_data_pins[] = { 2408static const unsigned int scif0_data_pins[] = {
1711 /* RX, TX */ 2409 /* RX, TX */
@@ -1965,6 +2663,105 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
1965 SH_PFC_PIN_GROUP(intc_ex_irq3), 2663 SH_PFC_PIN_GROUP(intc_ex_irq3),
1966 SH_PFC_PIN_GROUP(intc_ex_irq4), 2664 SH_PFC_PIN_GROUP(intc_ex_irq4),
1967 SH_PFC_PIN_GROUP(intc_ex_irq5), 2665 SH_PFC_PIN_GROUP(intc_ex_irq5),
2666 SH_PFC_PIN_GROUP(msiof0_clk),
2667 SH_PFC_PIN_GROUP(msiof0_sync),
2668 SH_PFC_PIN_GROUP(msiof0_ss1),
2669 SH_PFC_PIN_GROUP(msiof0_ss2),
2670 SH_PFC_PIN_GROUP(msiof0_txd),
2671 SH_PFC_PIN_GROUP(msiof0_rxd),
2672 SH_PFC_PIN_GROUP(msiof1_clk_a),
2673 SH_PFC_PIN_GROUP(msiof1_sync_a),
2674 SH_PFC_PIN_GROUP(msiof1_ss1_a),
2675 SH_PFC_PIN_GROUP(msiof1_ss2_a),
2676 SH_PFC_PIN_GROUP(msiof1_txd_a),
2677 SH_PFC_PIN_GROUP(msiof1_rxd_a),
2678 SH_PFC_PIN_GROUP(msiof1_clk_b),
2679 SH_PFC_PIN_GROUP(msiof1_sync_b),
2680 SH_PFC_PIN_GROUP(msiof1_ss1_b),
2681 SH_PFC_PIN_GROUP(msiof1_ss2_b),
2682 SH_PFC_PIN_GROUP(msiof1_txd_b),
2683 SH_PFC_PIN_GROUP(msiof1_rxd_b),
2684 SH_PFC_PIN_GROUP(msiof1_clk_c),
2685 SH_PFC_PIN_GROUP(msiof1_sync_c),
2686 SH_PFC_PIN_GROUP(msiof1_ss1_c),
2687 SH_PFC_PIN_GROUP(msiof1_ss2_c),
2688 SH_PFC_PIN_GROUP(msiof1_txd_c),
2689 SH_PFC_PIN_GROUP(msiof1_rxd_c),
2690 SH_PFC_PIN_GROUP(msiof1_clk_d),
2691 SH_PFC_PIN_GROUP(msiof1_sync_d),
2692 SH_PFC_PIN_GROUP(msiof1_ss1_d),
2693 SH_PFC_PIN_GROUP(msiof1_ss2_d),
2694 SH_PFC_PIN_GROUP(msiof1_txd_d),
2695 SH_PFC_PIN_GROUP(msiof1_rxd_d),
2696 SH_PFC_PIN_GROUP(msiof1_clk_e),
2697 SH_PFC_PIN_GROUP(msiof1_sync_e),
2698 SH_PFC_PIN_GROUP(msiof1_ss1_e),
2699 SH_PFC_PIN_GROUP(msiof1_ss2_e),
2700 SH_PFC_PIN_GROUP(msiof1_txd_e),
2701 SH_PFC_PIN_GROUP(msiof1_rxd_e),
2702 SH_PFC_PIN_GROUP(msiof1_clk_f),
2703 SH_PFC_PIN_GROUP(msiof1_sync_f),
2704 SH_PFC_PIN_GROUP(msiof1_ss1_f),
2705 SH_PFC_PIN_GROUP(msiof1_ss2_f),
2706 SH_PFC_PIN_GROUP(msiof1_txd_f),
2707 SH_PFC_PIN_GROUP(msiof1_rxd_f),
2708 SH_PFC_PIN_GROUP(msiof1_clk_g),
2709 SH_PFC_PIN_GROUP(msiof1_sync_g),
2710 SH_PFC_PIN_GROUP(msiof1_ss1_g),
2711 SH_PFC_PIN_GROUP(msiof1_ss2_g),
2712 SH_PFC_PIN_GROUP(msiof1_txd_g),
2713 SH_PFC_PIN_GROUP(msiof1_rxd_g),
2714 SH_PFC_PIN_GROUP(msiof2_clk_a),
2715 SH_PFC_PIN_GROUP(msiof2_sync_a),
2716 SH_PFC_PIN_GROUP(msiof2_ss1_a),
2717 SH_PFC_PIN_GROUP(msiof2_ss2_a),
2718 SH_PFC_PIN_GROUP(msiof2_txd_a),
2719 SH_PFC_PIN_GROUP(msiof2_rxd_a),
2720 SH_PFC_PIN_GROUP(msiof2_clk_b),
2721 SH_PFC_PIN_GROUP(msiof2_sync_b),
2722 SH_PFC_PIN_GROUP(msiof2_ss1_b),
2723 SH_PFC_PIN_GROUP(msiof2_ss2_b),
2724 SH_PFC_PIN_GROUP(msiof2_txd_b),
2725 SH_PFC_PIN_GROUP(msiof2_rxd_b),
2726 SH_PFC_PIN_GROUP(msiof2_clk_c),
2727 SH_PFC_PIN_GROUP(msiof2_sync_c),
2728 SH_PFC_PIN_GROUP(msiof2_ss1_c),
2729 SH_PFC_PIN_GROUP(msiof2_ss2_c),
2730 SH_PFC_PIN_GROUP(msiof2_txd_c),
2731 SH_PFC_PIN_GROUP(msiof2_rxd_c),
2732 SH_PFC_PIN_GROUP(msiof2_clk_d),
2733 SH_PFC_PIN_GROUP(msiof2_sync_d),
2734 SH_PFC_PIN_GROUP(msiof2_ss1_d),
2735 SH_PFC_PIN_GROUP(msiof2_ss2_d),
2736 SH_PFC_PIN_GROUP(msiof2_txd_d),
2737 SH_PFC_PIN_GROUP(msiof2_rxd_d),
2738 SH_PFC_PIN_GROUP(msiof3_clk_a),
2739 SH_PFC_PIN_GROUP(msiof3_sync_a),
2740 SH_PFC_PIN_GROUP(msiof3_ss1_a),
2741 SH_PFC_PIN_GROUP(msiof3_ss2_a),
2742 SH_PFC_PIN_GROUP(msiof3_txd_a),
2743 SH_PFC_PIN_GROUP(msiof3_rxd_a),
2744 SH_PFC_PIN_GROUP(msiof3_clk_b),
2745 SH_PFC_PIN_GROUP(msiof3_sync_b),
2746 SH_PFC_PIN_GROUP(msiof3_ss1_b),
2747 SH_PFC_PIN_GROUP(msiof3_ss2_b),
2748 SH_PFC_PIN_GROUP(msiof3_txd_b),
2749 SH_PFC_PIN_GROUP(msiof3_rxd_b),
2750 SH_PFC_PIN_GROUP(msiof3_clk_c),
2751 SH_PFC_PIN_GROUP(msiof3_sync_c),
2752 SH_PFC_PIN_GROUP(msiof3_txd_c),
2753 SH_PFC_PIN_GROUP(msiof3_rxd_c),
2754 SH_PFC_PIN_GROUP(msiof3_clk_d),
2755 SH_PFC_PIN_GROUP(msiof3_sync_d),
2756 SH_PFC_PIN_GROUP(msiof3_ss1_d),
2757 SH_PFC_PIN_GROUP(msiof3_txd_d),
2758 SH_PFC_PIN_GROUP(msiof3_rxd_d),
2759 SH_PFC_PIN_GROUP(msiof3_clk_e),
2760 SH_PFC_PIN_GROUP(msiof3_sync_e),
2761 SH_PFC_PIN_GROUP(msiof3_ss1_e),
2762 SH_PFC_PIN_GROUP(msiof3_ss2_e),
2763 SH_PFC_PIN_GROUP(msiof3_txd_e),
2764 SH_PFC_PIN_GROUP(msiof3_rxd_e),
1968 SH_PFC_PIN_GROUP(scif0_data), 2765 SH_PFC_PIN_GROUP(scif0_data),
1969 SH_PFC_PIN_GROUP(scif0_clk), 2766 SH_PFC_PIN_GROUP(scif0_clk),
1970 SH_PFC_PIN_GROUP(scif0_ctrl), 2767 SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -2022,6 +2819,117 @@ static const char * const intc_ex_groups[] = {
2022 "intc_ex_irq5", 2819 "intc_ex_irq5",
2023}; 2820};
2024 2821
2822static const char * const msiof0_groups[] = {
2823 "msiof0_clk",
2824 "msiof0_sync",
2825 "msiof0_ss1",
2826 "msiof0_ss2",
2827 "msiof0_txd",
2828 "msiof0_rxd",
2829};
2830
2831static const char * const msiof1_groups[] = {
2832 "msiof1_clk_a",
2833 "msiof1_sync_a",
2834 "msiof1_ss1_a",
2835 "msiof1_ss2_a",
2836 "msiof1_txd_a",
2837 "msiof1_rxd_a",
2838 "msiof1_clk_b",
2839 "msiof1_sync_b",
2840 "msiof1_ss1_b",
2841 "msiof1_ss2_b",
2842 "msiof1_txd_b",
2843 "msiof1_rxd_b",
2844 "msiof1_clk_c",
2845 "msiof1_sync_c",
2846 "msiof1_ss1_c",
2847 "msiof1_ss2_c",
2848 "msiof1_txd_c",
2849 "msiof1_rxd_c",
2850 "msiof1_clk_d",
2851 "msiof1_sync_d",
2852 "msiof1_ss1_d",
2853 "msiof1_ss2_d",
2854 "msiof1_txd_d",
2855 "msiof1_rxd_d",
2856 "msiof1_clk_e",
2857 "msiof1_sync_e",
2858 "msiof1_ss1_e",
2859 "msiof1_ss2_e",
2860 "msiof1_txd_e",
2861 "msiof1_rxd_e",
2862 "msiof1_clk_f",
2863 "msiof1_sync_f",
2864 "msiof1_ss1_f",
2865 "msiof1_ss2_f",
2866 "msiof1_txd_f",
2867 "msiof1_rxd_f",
2868 "msiof1_clk_g",
2869 "msiof1_sync_g",
2870 "msiof1_ss1_g",
2871 "msiof1_ss2_g",
2872 "msiof1_txd_g",
2873 "msiof1_rxd_g",
2874};
2875
2876static const char * const msiof2_groups[] = {
2877 "msiof2_clk_a",
2878 "msiof2_sync_a",
2879 "msiof2_ss1_a",
2880 "msiof2_ss2_a",
2881 "msiof2_txd_a",
2882 "msiof2_rxd_a",
2883 "msiof2_clk_b",
2884 "msiof2_sync_b",
2885 "msiof2_ss1_b",
2886 "msiof2_ss2_b",
2887 "msiof2_txd_b",
2888 "msiof2_rxd_b",
2889 "msiof2_clk_c",
2890 "msiof2_sync_c",
2891 "msiof2_ss1_c",
2892 "msiof2_ss2_c",
2893 "msiof2_txd_c",
2894 "msiof2_rxd_c",
2895 "msiof2_clk_d",
2896 "msiof2_sync_d",
2897 "msiof2_ss1_d",
2898 "msiof2_ss2_d",
2899 "msiof2_txd_d",
2900 "msiof2_rxd_d",
2901};
2902
2903static const char * const msiof3_groups[] = {
2904 "msiof3_clk_a",
2905 "msiof3_sync_a",
2906 "msiof3_ss1_a",
2907 "msiof3_ss2_a",
2908 "msiof3_txd_a",
2909 "msiof3_rxd_a",
2910 "msiof3_clk_b",
2911 "msiof3_sync_b",
2912 "msiof3_ss1_b",
2913 "msiof3_ss2_b",
2914 "msiof3_txd_b",
2915 "msiof3_rxd_b",
2916 "msiof3_clk_c",
2917 "msiof3_sync_c",
2918 "msiof3_txd_c",
2919 "msiof3_rxd_c",
2920 "msiof3_clk_d",
2921 "msiof3_sync_d",
2922 "msiof3_ss1_d",
2923 "msiof3_txd_d",
2924 "msiof3_rxd_d",
2925 "msiof3_clk_e",
2926 "msiof3_sync_e",
2927 "msiof3_ss1_e",
2928 "msiof3_ss2_e",
2929 "msiof3_txd_e",
2930 "msiof3_rxd_e",
2931};
2932
2025static const char * const scif0_groups[] = { 2933static const char * const scif0_groups[] = {
2026 "scif0_data", 2934 "scif0_data",
2027 "scif0_clk", 2935 "scif0_clk",
@@ -2086,6 +2994,10 @@ static const char * const usb30_groups[] = {
2086static const struct sh_pfc_function pinmux_functions[] = { 2994static const struct sh_pfc_function pinmux_functions[] = {
2087 SH_PFC_FUNCTION(avb), 2995 SH_PFC_FUNCTION(avb),
2088 SH_PFC_FUNCTION(intc_ex), 2996 SH_PFC_FUNCTION(intc_ex),
2997 SH_PFC_FUNCTION(msiof0),
2998 SH_PFC_FUNCTION(msiof1),
2999 SH_PFC_FUNCTION(msiof2),
3000 SH_PFC_FUNCTION(msiof3),
2089 SH_PFC_FUNCTION(scif0), 3001 SH_PFC_FUNCTION(scif0),
2090 SH_PFC_FUNCTION(scif1), 3002 SH_PFC_FUNCTION(scif1),
2091 SH_PFC_FUNCTION(scif2), 3003 SH_PFC_FUNCTION(scif2),
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-14 20:09:40 -0400