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authorAndy Yan <andy.yan@rock-chips.com>2016-09-08 07:03:43 -0400
committerHeiko Stuebner <heiko@sntech.de>2016-10-15 20:42:59 -0400
commit2c60dc4342f1d95859232d4cd5f77011fc395b31 (patch)
treeb6145b470893c2aec07892b1ab35be7170515ffb
parent1001354ca34179f3db924eb66672442a173147dc (diff)
arm64: dts: rockchip: fix i2c resource error of rk3368
According to the TRM and downstream code from rockchip, the register address of i2c1 on rk3368 is 0xff660000 and i2c2 is 0xff140000. This patch fix the i2c1 & i2c2 register address definition error, also fix the clk and pinctrl reference error. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 0fcb2147c9f9..2f8e19ff65a5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -315,16 +315,16 @@
315 status = "disabled"; 315 status = "disabled";
316 }; 316 };
317 317
318 i2c1: i2c@ff140000 { 318 i2c2: i2c@ff140000 {
319 compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c"; 319 compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
320 reg = <0x0 0xff140000 0x0 0x1000>; 320 reg = <0x0 0xff140000 0x0 0x1000>;
321 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 321 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
322 #address-cells = <1>; 322 #address-cells = <1>;
323 #size-cells = <0>; 323 #size-cells = <0>;
324 clock-names = "i2c"; 324 clock-names = "i2c";
325 clocks = <&cru PCLK_I2C1>; 325 clocks = <&cru PCLK_I2C2>;
326 pinctrl-names = "default"; 326 pinctrl-names = "default";
327 pinctrl-0 = <&i2c1_xfer>; 327 pinctrl-0 = <&i2c2_xfer>;
328 status = "disabled"; 328 status = "disabled";
329 }; 329 };
330 330
@@ -554,16 +554,16 @@
554 status = "disabled"; 554 status = "disabled";
555 }; 555 };
556 556
557 i2c2: i2c@ff660000 { 557 i2c1: i2c@ff660000 {
558 compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c"; 558 compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
559 reg = <0x0 0xff660000 0x0 0x1000>; 559 reg = <0x0 0xff660000 0x0 0x1000>;
560 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 560 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
561 #address-cells = <1>; 561 #address-cells = <1>;
562 #size-cells = <0>; 562 #size-cells = <0>;
563 clock-names = "i2c"; 563 clock-names = "i2c";
564 clocks = <&cru PCLK_I2C2>; 564 clocks = <&cru PCLK_I2C1>;
565 pinctrl-names = "default"; 565 pinctrl-names = "default";
566 pinctrl-0 = <&i2c2_xfer>; 566 pinctrl-0 = <&i2c1_xfer>;
567 status = "disabled"; 567 status = "disabled";
568 }; 568 };
569 569