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authorBen Skeggs <bskeggs@redhat.com>2017-12-12 01:09:03 -0500
committerBen Skeggs <bskeggs@redhat.com>2018-02-02 00:24:05 -0500
commit2c5ac5ba4f855b8cb3f20c52c1a1e0773e671164 (patch)
treefc9d8f34fa5cf5dbb504ff3eb467b4c06ce202b7
parentdcc80c89477891e173d999fa8a13edf10d37b639 (diff)
drm/nouveau/secboot/gp108: implement on top of acr_r370
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Gourav Samaiya <gsamaiya@nvidia.com>
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/base.c5
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/secboot/Kbuild1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp108.c67
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h2
7 files changed, 78 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h
index 59f3ba551681..b57fe4ae93ba 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h
@@ -60,6 +60,7 @@ int nvkm_secboot_reset(struct nvkm_secboot *, unsigned long);
60int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); 60int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
61int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); 61int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
62int gp102_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); 62int gp102_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
63int gp108_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
63int gp10b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **); 64int gp10b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
64 65
65#endif 66#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 00eeaaffeae5..a4a5ffce03d0 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -2345,6 +2345,7 @@ nv138_chipset = {
2345 .mc = gp100_mc_new, 2345 .mc = gp100_mc_new,
2346 .mmu = gp100_mmu_new, 2346 .mmu = gp100_mmu_new,
2347 .therm = gp100_therm_new, 2347 .therm = gp100_therm_new,
2348 .secboot = gp108_secboot_new,
2348 .pci = gp100_pci_new, 2349 .pci = gp100_pci_new,
2349 .pmu = gp102_pmu_new, 2350 .pmu = gp102_pmu_new,
2350 .timer = gk20a_timer_new, 2351 .timer = gk20a_timer_new,
@@ -2356,6 +2357,10 @@ nv138_chipset = {
2356 .disp = gp102_disp_new, 2357 .disp = gp102_disp_new,
2357 .dma = gf119_dma_new, 2358 .dma = gf119_dma_new,
2358 .fifo = gp100_fifo_new, 2359 .fifo = gp100_fifo_new,
2360 .gr = gp107_gr_new,
2361 .nvdec = gp102_nvdec_new,
2362 .sec2 = gp102_sec2_new,
2363 .sw = gf100_sw_new,
2359}; 2364};
2360 2365
2361static const struct nvkm_device_chip 2366static const struct nvkm_device_chip
diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c
index 77273b53672c..58a59b7db2e5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c
+++ b/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c
@@ -505,6 +505,7 @@ nvkm_msgqueue_new(u32 version, struct nvkm_falcon *falcon,
505 ret = msgqueue_0137bca5_new(falcon, sb, queue); 505 ret = msgqueue_0137bca5_new(falcon, sb, queue);
506 break; 506 break;
507 case 0x0148cdec: 507 case 0x0148cdec:
508 case 0x015ccf3e:
508 ret = msgqueue_0148cdec_new(falcon, sb, queue); 509 ret = msgqueue_0148cdec_new(falcon, sb, queue);
509 break; 510 break;
510 default: 511 default:
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/Kbuild
index 35ca716a549b..ed08120eefe0 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/Kbuild
@@ -12,4 +12,5 @@ nvkm-y += nvkm/subdev/secboot/acr_r375.o
12nvkm-y += nvkm/subdev/secboot/gm200.o 12nvkm-y += nvkm/subdev/secboot/gm200.o
13nvkm-y += nvkm/subdev/secboot/gm20b.o 13nvkm-y += nvkm/subdev/secboot/gm20b.o
14nvkm-y += nvkm/subdev/secboot/gp102.o 14nvkm-y += nvkm/subdev/secboot/gp102.o
15nvkm-y += nvkm/subdev/secboot/gp108.o
15nvkm-y += nvkm/subdev/secboot/gp10b.o 16nvkm-y += nvkm/subdev/secboot/gp10b.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c
index f3b3c66349d2..1f7a3c1a7f50 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c
@@ -133,7 +133,7 @@ gp102_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob,
133 return gm200_secboot_run_blob(sb, blob, falcon); 133 return gm200_secboot_run_blob(sb, blob, falcon);
134} 134}
135 135
136static const struct nvkm_secboot_func 136const struct nvkm_secboot_func
137gp102_secboot = { 137gp102_secboot = {
138 .dtor = gm200_secboot_dtor, 138 .dtor = gm200_secboot_dtor,
139 .oneinit = gm200_secboot_oneinit, 139 .oneinit = gm200_secboot_oneinit,
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp108.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp108.c
new file mode 100644
index 000000000000..e8c27ec700de
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp108.c
@@ -0,0 +1,67 @@
1/*
2 * Copyright 2017 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22#include "gm200.h"
23#include "acr.h"
24
25int
26gp108_secboot_new(struct nvkm_device *device, int index,
27 struct nvkm_secboot **psb)
28{
29 struct gm200_secboot *gsb;
30 struct nvkm_acr *acr;
31
32 acr = acr_r370_new(NVKM_SECBOOT_FALCON_SEC2,
33 BIT(NVKM_SECBOOT_FALCON_FECS) |
34 BIT(NVKM_SECBOOT_FALCON_GPCCS) |
35 BIT(NVKM_SECBOOT_FALCON_SEC2));
36 if (IS_ERR(acr))
37 return PTR_ERR(acr);
38
39 if (!(gsb = kzalloc(sizeof(*gsb), GFP_KERNEL))) {
40 acr->func->dtor(acr);
41 return -ENOMEM;
42 }
43 *psb = &gsb->base;
44
45 return nvkm_secboot_ctor(&gp102_secboot, acr, device, index, &gsb->base);
46}
47
48MODULE_FIRMWARE("nvidia/gp108/acr/bl.bin");
49MODULE_FIRMWARE("nvidia/gp108/acr/unload_bl.bin");
50MODULE_FIRMWARE("nvidia/gp108/acr/ucode_load.bin");
51MODULE_FIRMWARE("nvidia/gp108/acr/ucode_unload.bin");
52MODULE_FIRMWARE("nvidia/gp108/gr/fecs_bl.bin");
53MODULE_FIRMWARE("nvidia/gp108/gr/fecs_inst.bin");
54MODULE_FIRMWARE("nvidia/gp108/gr/fecs_data.bin");
55MODULE_FIRMWARE("nvidia/gp108/gr/fecs_sig.bin");
56MODULE_FIRMWARE("nvidia/gp108/gr/gpccs_bl.bin");
57MODULE_FIRMWARE("nvidia/gp108/gr/gpccs_inst.bin");
58MODULE_FIRMWARE("nvidia/gp108/gr/gpccs_data.bin");
59MODULE_FIRMWARE("nvidia/gp108/gr/gpccs_sig.bin");
60MODULE_FIRMWARE("nvidia/gp108/gr/sw_ctx.bin");
61MODULE_FIRMWARE("nvidia/gp108/gr/sw_nonctx.bin");
62MODULE_FIRMWARE("nvidia/gp108/gr/sw_bundle_init.bin");
63MODULE_FIRMWARE("nvidia/gp108/gr/sw_method_init.bin");
64MODULE_FIRMWARE("nvidia/gp108/nvdec/scrubber.bin");
65MODULE_FIRMWARE("nvidia/gp108/sec2/desc.bin");
66MODULE_FIRMWARE("nvidia/gp108/sec2/image.bin");
67MODULE_FIRMWARE("nvidia/gp108/sec2/sig.bin");
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h
index d9091f029506..959a7b2dbdc9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/priv.h
@@ -40,6 +40,8 @@ int nvkm_secboot_ctor(const struct nvkm_secboot_func *, struct nvkm_acr *,
40int nvkm_secboot_falcon_reset(struct nvkm_secboot *); 40int nvkm_secboot_falcon_reset(struct nvkm_secboot *);
41int nvkm_secboot_falcon_run(struct nvkm_secboot *); 41int nvkm_secboot_falcon_run(struct nvkm_secboot *);
42 42
43extern const struct nvkm_secboot_func gp102_secboot;
44
43struct flcn_u64 { 45struct flcn_u64 {
44 u32 lo; 46 u32 lo;
45 u32 hi; 47 u32 hi;