diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-05-20 03:09:56 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2016-05-29 20:37:10 -0400 |
commit | 2c3de36700d4f3a5da1eb67e9340bfccfce19fdb (patch) | |
tree | b2f46a29ccb95ebc1e452bff361423ddf5854981 | |
parent | 51f20c93383805cd4ec9c2f7e180c3dea7aefa81 (diff) |
ARM: dts: r8a7790: Fix W=1 dtc warnings
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Move the cache-controller nodes under the cpus node, and make their unit
names and reg properties match the MPIDR values.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 94 |
1 files changed, 48 insertions, 46 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 97f4c1dc3ae8..9997e7dfabe2 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi | |||
@@ -127,6 +127,22 @@ | |||
127 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; | 127 | power-domains = <&sysc R8A7790_PD_CA7_CPU3>; |
128 | next-level-cache = <&L2_CA7>; | 128 | next-level-cache = <&L2_CA7>; |
129 | }; | 129 | }; |
130 | |||
131 | L2_CA15: cache-controller@0 { | ||
132 | compatible = "cache"; | ||
133 | reg = <0>; | ||
134 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; | ||
135 | cache-unified; | ||
136 | cache-level = <2>; | ||
137 | }; | ||
138 | |||
139 | L2_CA7: cache-controller@100 { | ||
140 | compatible = "cache"; | ||
141 | reg = <0x100>; | ||
142 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; | ||
143 | cache-unified; | ||
144 | cache-level = <2>; | ||
145 | }; | ||
130 | }; | 146 | }; |
131 | 147 | ||
132 | thermal-zones { | 148 | thermal-zones { |
@@ -148,20 +164,6 @@ | |||
148 | }; | 164 | }; |
149 | }; | 165 | }; |
150 | 166 | ||
151 | L2_CA15: cache-controller@0 { | ||
152 | compatible = "cache"; | ||
153 | power-domains = <&sysc R8A7790_PD_CA15_SCU>; | ||
154 | cache-unified; | ||
155 | cache-level = <2>; | ||
156 | }; | ||
157 | |||
158 | L2_CA7: cache-controller@1 { | ||
159 | compatible = "cache"; | ||
160 | power-domains = <&sysc R8A7790_PD_CA7_SCU>; | ||
161 | cache-unified; | ||
162 | cache-level = <2>; | ||
163 | }; | ||
164 | |||
165 | gic: interrupt-controller@f1001000 { | 167 | gic: interrupt-controller@f1001000 { |
166 | compatible = "arm,gic-400"; | 168 | compatible = "arm,gic-400"; |
167 | #interrupt-cells = <3>; | 169 | #interrupt-cells = <3>; |
@@ -1728,79 +1730,79 @@ | |||
1728 | status = "disabled"; | 1730 | status = "disabled"; |
1729 | 1731 | ||
1730 | rcar_sound,dvc { | 1732 | rcar_sound,dvc { |
1731 | dvc0: dvc@0 { | 1733 | dvc0: dvc-0 { |
1732 | dmas = <&audma0 0xbc>; | 1734 | dmas = <&audma0 0xbc>; |
1733 | dma-names = "tx"; | 1735 | dma-names = "tx"; |
1734 | }; | 1736 | }; |
1735 | dvc1: dvc@1 { | 1737 | dvc1: dvc-1 { |
1736 | dmas = <&audma0 0xbe>; | 1738 | dmas = <&audma0 0xbe>; |
1737 | dma-names = "tx"; | 1739 | dma-names = "tx"; |
1738 | }; | 1740 | }; |
1739 | }; | 1741 | }; |
1740 | 1742 | ||
1741 | rcar_sound,mix { | 1743 | rcar_sound,mix { |
1742 | mix0: mix@0 { }; | 1744 | mix0: mix-0 { }; |
1743 | mix1: mix@1 { }; | 1745 | mix1: mix-1 { }; |
1744 | }; | 1746 | }; |
1745 | 1747 | ||
1746 | rcar_sound,ctu { | 1748 | rcar_sound,ctu { |
1747 | ctu00: ctu@0 { }; | 1749 | ctu00: ctu-0 { }; |
1748 | ctu01: ctu@1 { }; | 1750 | ctu01: ctu-1 { }; |
1749 | ctu02: ctu@2 { }; | 1751 | ctu02: ctu-2 { }; |
1750 | ctu03: ctu@3 { }; | 1752 | ctu03: ctu-3 { }; |
1751 | ctu10: ctu@4 { }; | 1753 | ctu10: ctu-4 { }; |
1752 | ctu11: ctu@5 { }; | 1754 | ctu11: ctu-5 { }; |
1753 | ctu12: ctu@6 { }; | 1755 | ctu12: ctu-6 { }; |
1754 | ctu13: ctu@7 { }; | 1756 | ctu13: ctu-7 { }; |
1755 | }; | 1757 | }; |
1756 | 1758 | ||
1757 | rcar_sound,src { | 1759 | rcar_sound,src { |
1758 | src0: src@0 { | 1760 | src0: src-0 { |
1759 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; | 1761 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
1760 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | 1762 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
1761 | dma-names = "rx", "tx"; | 1763 | dma-names = "rx", "tx"; |
1762 | }; | 1764 | }; |
1763 | src1: src@1 { | 1765 | src1: src-1 { |
1764 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; | 1766 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
1765 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | 1767 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
1766 | dma-names = "rx", "tx"; | 1768 | dma-names = "rx", "tx"; |
1767 | }; | 1769 | }; |
1768 | src2: src@2 { | 1770 | src2: src-2 { |
1769 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; | 1771 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
1770 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | 1772 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
1771 | dma-names = "rx", "tx"; | 1773 | dma-names = "rx", "tx"; |
1772 | }; | 1774 | }; |
1773 | src3: src@3 { | 1775 | src3: src-3 { |
1774 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; | 1776 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
1775 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | 1777 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
1776 | dma-names = "rx", "tx"; | 1778 | dma-names = "rx", "tx"; |
1777 | }; | 1779 | }; |
1778 | src4: src@4 { | 1780 | src4: src-4 { |
1779 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; | 1781 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
1780 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | 1782 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
1781 | dma-names = "rx", "tx"; | 1783 | dma-names = "rx", "tx"; |
1782 | }; | 1784 | }; |
1783 | src5: src@5 { | 1785 | src5: src-5 { |
1784 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; | 1786 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
1785 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | 1787 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
1786 | dma-names = "rx", "tx"; | 1788 | dma-names = "rx", "tx"; |
1787 | }; | 1789 | }; |
1788 | src6: src@6 { | 1790 | src6: src-6 { |
1789 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; | 1791 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
1790 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | 1792 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
1791 | dma-names = "rx", "tx"; | 1793 | dma-names = "rx", "tx"; |
1792 | }; | 1794 | }; |
1793 | src7: src@7 { | 1795 | src7: src-7 { |
1794 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; | 1796 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
1795 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | 1797 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
1796 | dma-names = "rx", "tx"; | 1798 | dma-names = "rx", "tx"; |
1797 | }; | 1799 | }; |
1798 | src8: src@8 { | 1800 | src8: src-8 { |
1799 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; | 1801 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
1800 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | 1802 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
1801 | dma-names = "rx", "tx"; | 1803 | dma-names = "rx", "tx"; |
1802 | }; | 1804 | }; |
1803 | src9: src@9 { | 1805 | src9: src-9 { |
1804 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; | 1806 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
1805 | dmas = <&audma0 0x97>, <&audma1 0xba>; | 1807 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
1806 | dma-names = "rx", "tx"; | 1808 | dma-names = "rx", "tx"; |
@@ -1808,52 +1810,52 @@ | |||
1808 | }; | 1810 | }; |
1809 | 1811 | ||
1810 | rcar_sound,ssi { | 1812 | rcar_sound,ssi { |
1811 | ssi0: ssi@0 { | 1813 | ssi0: ssi-0 { |
1812 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; | 1814 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
1813 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; | 1815 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
1814 | dma-names = "rx", "tx", "rxu", "txu"; | 1816 | dma-names = "rx", "tx", "rxu", "txu"; |
1815 | }; | 1817 | }; |
1816 | ssi1: ssi@1 { | 1818 | ssi1: ssi-1 { |
1817 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; | 1819 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
1818 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; | 1820 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
1819 | dma-names = "rx", "tx", "rxu", "txu"; | 1821 | dma-names = "rx", "tx", "rxu", "txu"; |
1820 | }; | 1822 | }; |
1821 | ssi2: ssi@2 { | 1823 | ssi2: ssi-2 { |
1822 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; | 1824 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
1823 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; | 1825 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
1824 | dma-names = "rx", "tx", "rxu", "txu"; | 1826 | dma-names = "rx", "tx", "rxu", "txu"; |
1825 | }; | 1827 | }; |
1826 | ssi3: ssi@3 { | 1828 | ssi3: ssi-3 { |
1827 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; | 1829 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
1828 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; | 1830 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
1829 | dma-names = "rx", "tx", "rxu", "txu"; | 1831 | dma-names = "rx", "tx", "rxu", "txu"; |
1830 | }; | 1832 | }; |
1831 | ssi4: ssi@4 { | 1833 | ssi4: ssi-4 { |
1832 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; | 1834 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
1833 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; | 1835 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
1834 | dma-names = "rx", "tx", "rxu", "txu"; | 1836 | dma-names = "rx", "tx", "rxu", "txu"; |
1835 | }; | 1837 | }; |
1836 | ssi5: ssi@5 { | 1838 | ssi5: ssi-5 { |
1837 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; | 1839 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
1838 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; | 1840 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
1839 | dma-names = "rx", "tx", "rxu", "txu"; | 1841 | dma-names = "rx", "tx", "rxu", "txu"; |
1840 | }; | 1842 | }; |
1841 | ssi6: ssi@6 { | 1843 | ssi6: ssi-6 { |
1842 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; | 1844 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
1843 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; | 1845 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
1844 | dma-names = "rx", "tx", "rxu", "txu"; | 1846 | dma-names = "rx", "tx", "rxu", "txu"; |
1845 | }; | 1847 | }; |
1846 | ssi7: ssi@7 { | 1848 | ssi7: ssi-7 { |
1847 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; | 1849 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
1848 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; | 1850 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
1849 | dma-names = "rx", "tx", "rxu", "txu"; | 1851 | dma-names = "rx", "tx", "rxu", "txu"; |
1850 | }; | 1852 | }; |
1851 | ssi8: ssi@8 { | 1853 | ssi8: ssi-8 { |
1852 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; | 1854 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
1853 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; | 1855 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
1854 | dma-names = "rx", "tx", "rxu", "txu"; | 1856 | dma-names = "rx", "tx", "rxu", "txu"; |
1855 | }; | 1857 | }; |
1856 | ssi9: ssi@9 { | 1858 | ssi9: ssi-9 { |
1857 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; | 1859 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
1858 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; | 1860 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
1859 | dma-names = "rx", "tx", "rxu", "txu"; | 1861 | dma-names = "rx", "tx", "rxu", "txu"; |