diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2018-05-16 09:39:58 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-18 17:08:18 -0400 |
commit | 2b6dc93a3d439136c3fe11291a506e581b84a327 (patch) | |
tree | 915da7bc4887d49919ae9f8dd3f01cd7f4e6e3b4 | |
parent | 563e1e664d27292a3b55ca08366dc8c32db52450 (diff) |
drm/amdgpu/display: remove VEGAM config option
Leftover from bringup. No need to keep it around for
upstream.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
13 files changed, 1 insertions, 42 deletions
diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig index 6dcec9c9126b..a0eef59e65ba 100644 --- a/drivers/gpu/drm/amd/display/Kconfig +++ b/drivers/gpu/drm/amd/display/Kconfig | |||
@@ -34,13 +34,6 @@ config DEBUG_KERNEL_DC | |||
34 | if you want to hit | 34 | if you want to hit |
35 | kdgb_break in assert. | 35 | kdgb_break in assert. |
36 | 36 | ||
37 | config DRM_AMD_DC_VEGAM | ||
38 | bool "VEGAM support" | ||
39 | depends on DRM_AMD_DC | ||
40 | help | ||
41 | Choose this option if you want to have | ||
42 | VEGAM support for display engine | ||
43 | |||
44 | config DRM_AMD_DC_VG20 | 37 | config DRM_AMD_DC_VG20 |
45 | bool "Vega20 support" | 38 | bool "Vega20 support" |
46 | depends on DRM_AMD_DC | 39 | depends on DRM_AMD_DC |
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 6f5cb26b243c..6d0dc1fecb39 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |||
@@ -1514,9 +1514,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) | |||
1514 | case CHIP_POLARIS11: | 1514 | case CHIP_POLARIS11: |
1515 | case CHIP_POLARIS10: | 1515 | case CHIP_POLARIS10: |
1516 | case CHIP_POLARIS12: | 1516 | case CHIP_POLARIS12: |
1517 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
1518 | case CHIP_VEGAM: | 1517 | case CHIP_VEGAM: |
1519 | #endif | ||
1520 | case CHIP_VEGA10: | 1518 | case CHIP_VEGA10: |
1521 | case CHIP_VEGA12: | 1519 | case CHIP_VEGA12: |
1522 | case CHIP_VEGA20: | 1520 | case CHIP_VEGA20: |
@@ -1710,9 +1708,7 @@ static int dm_early_init(void *handle) | |||
1710 | adev->mode_info.plane_type = dm_plane_type_default; | 1708 | adev->mode_info.plane_type = dm_plane_type_default; |
1711 | break; | 1709 | break; |
1712 | case CHIP_POLARIS10: | 1710 | case CHIP_POLARIS10: |
1713 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
1714 | case CHIP_VEGAM: | 1711 | case CHIP_VEGAM: |
1715 | #endif | ||
1716 | adev->mode_info.num_crtc = 6; | 1712 | adev->mode_info.num_crtc = 6; |
1717 | adev->mode_info.num_hpd = 6; | 1713 | adev->mode_info.num_hpd = 6; |
1718 | adev->mode_info.num_dig = 6; | 1714 | adev->mode_info.num_dig = 6; |
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c index be066c49b984..253bbb1eea60 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c | |||
@@ -51,9 +51,7 @@ bool dal_bios_parser_init_cmd_tbl_helper( | |||
51 | return true; | 51 | return true; |
52 | 52 | ||
53 | case DCE_VERSION_11_2: | 53 | case DCE_VERSION_11_2: |
54 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
55 | case DCE_VERSION_11_22: | 54 | case DCE_VERSION_11_22: |
56 | #endif | ||
57 | *h = dal_cmd_tbl_helper_dce112_get_table(); | 55 | *h = dal_cmd_tbl_helper_dce112_get_table(); |
58 | return true; | 56 | return true; |
59 | 57 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c index 9b9e06995805..bbbcef566c55 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c | |||
@@ -52,9 +52,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2( | |||
52 | return true; | 52 | return true; |
53 | 53 | ||
54 | case DCE_VERSION_11_2: | 54 | case DCE_VERSION_11_2: |
55 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
56 | case DCE_VERSION_11_22: | 55 | case DCE_VERSION_11_22: |
57 | #endif | ||
58 | *h = dal_cmd_tbl_helper_dce112_get_table2(); | 56 | *h = dal_cmd_tbl_helper_dce112_get_table2(); |
59 | return true; | 57 | return true; |
60 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) | 58 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) |
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c index 4ee3c26f7c13..2c4e8f0cb2dc 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c | |||
@@ -59,10 +59,8 @@ static enum bw_calcs_version bw_calcs_version_from_asic_id(struct hw_asic_id asi | |||
59 | return BW_CALCS_VERSION_POLARIS10; | 59 | return BW_CALCS_VERSION_POLARIS10; |
60 | if (ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)) | 60 | if (ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)) |
61 | return BW_CALCS_VERSION_POLARIS11; | 61 | return BW_CALCS_VERSION_POLARIS11; |
62 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
63 | if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) | 62 | if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) |
64 | return BW_CALCS_VERSION_VEGAM; | 63 | return BW_CALCS_VERSION_VEGAM; |
65 | #endif | ||
66 | return BW_CALCS_VERSION_INVALID; | 64 | return BW_CALCS_VERSION_INVALID; |
67 | 65 | ||
68 | case FAMILY_AI: | 66 | case FAMILY_AI: |
@@ -2151,11 +2149,9 @@ void bw_calcs_init(struct bw_calcs_dceip *bw_dceip, | |||
2151 | dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/ | 2149 | dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/ |
2152 | break; | 2150 | break; |
2153 | case BW_CALCS_VERSION_POLARIS10: | 2151 | case BW_CALCS_VERSION_POLARIS10: |
2154 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
2155 | /* TODO: Treat VEGAM the same as P10 for now | 2152 | /* TODO: Treat VEGAM the same as P10 for now |
2156 | * Need to tune the para for VEGAM if needed */ | 2153 | * Need to tune the para for VEGAM if needed */ |
2157 | case BW_CALCS_VERSION_VEGAM: | 2154 | case BW_CALCS_VERSION_VEGAM: |
2158 | #endif | ||
2159 | vbios.memory_type = bw_def_gddr5; | 2155 | vbios.memory_type = bw_def_gddr5; |
2160 | vbios.dram_channel_width_in_bits = 32; | 2156 | vbios.dram_channel_width_in_bits = 32; |
2161 | vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; | 2157 | vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 9eb731fb5251..345835ff58d1 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c | |||
@@ -79,10 +79,8 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) | |||
79 | ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { | 79 | ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) { |
80 | dc_version = DCE_VERSION_11_2; | 80 | dc_version = DCE_VERSION_11_2; |
81 | } | 81 | } |
82 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
83 | if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) | 82 | if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev)) |
84 | dc_version = DCE_VERSION_11_22; | 83 | dc_version = DCE_VERSION_11_22; |
85 | #endif | ||
86 | break; | 84 | break; |
87 | case FAMILY_AI: | 85 | case FAMILY_AI: |
88 | dc_version = DCE_VERSION_12_0; | 86 | dc_version = DCE_VERSION_12_0; |
@@ -129,9 +127,7 @@ struct resource_pool *dc_create_resource_pool( | |||
129 | num_virtual_links, dc, asic_id); | 127 | num_virtual_links, dc, asic_id); |
130 | break; | 128 | break; |
131 | case DCE_VERSION_11_2: | 129 | case DCE_VERSION_11_2: |
132 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
133 | case DCE_VERSION_11_22: | 130 | case DCE_VERSION_11_22: |
134 | #endif | ||
135 | res_pool = dce112_create_resource_pool( | 131 | res_pool = dce112_create_resource_pool( |
136 | num_virtual_links, dc); | 132 | num_virtual_links, dc); |
137 | break; | 133 | break; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index 223db98a568a..0570e7e4d0a0 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | |||
@@ -590,9 +590,7 @@ static uint32_t dce110_get_pix_clk_dividers( | |||
590 | pll_settings, pix_clk_params); | 590 | pll_settings, pix_clk_params); |
591 | break; | 591 | break; |
592 | case DCE_VERSION_11_2: | 592 | case DCE_VERSION_11_2: |
593 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
594 | case DCE_VERSION_11_22: | 593 | case DCE_VERSION_11_22: |
595 | #endif | ||
596 | case DCE_VERSION_12_0: | 594 | case DCE_VERSION_12_0: |
597 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) | 595 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) |
598 | case DCN_VERSION_1_0: | 596 | case DCN_VERSION_1_0: |
@@ -982,9 +980,7 @@ static bool dce110_program_pix_clk( | |||
982 | 980 | ||
983 | break; | 981 | break; |
984 | case DCE_VERSION_11_2: | 982 | case DCE_VERSION_11_2: |
985 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
986 | case DCE_VERSION_11_22: | 983 | case DCE_VERSION_11_22: |
987 | #endif | ||
988 | case DCE_VERSION_12_0: | 984 | case DCE_VERSION_12_0: |
989 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) | 985 | #if defined(CONFIG_DRM_AMD_DC_DCN1_0) |
990 | case DCN_VERSION_1_0: | 986 | case DCN_VERSION_1_0: |
diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c b/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c index 61fe484da1a0..0caee3523017 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c | |||
@@ -75,9 +75,7 @@ bool dal_hw_factory_init( | |||
75 | return true; | 75 | return true; |
76 | case DCE_VERSION_11_0: | 76 | case DCE_VERSION_11_0: |
77 | case DCE_VERSION_11_2: | 77 | case DCE_VERSION_11_2: |
78 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
79 | case DCE_VERSION_11_22: | 78 | case DCE_VERSION_11_22: |
80 | #endif | ||
81 | dal_hw_factory_dce110_init(factory); | 79 | dal_hw_factory_dce110_init(factory); |
82 | return true; | 80 | return true; |
83 | case DCE_VERSION_12_0: | 81 | case DCE_VERSION_12_0: |
diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c b/drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c index 910ae2b7bf64..55c707488541 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c | |||
@@ -72,9 +72,7 @@ bool dal_hw_translate_init( | |||
72 | case DCE_VERSION_10_0: | 72 | case DCE_VERSION_10_0: |
73 | case DCE_VERSION_11_0: | 73 | case DCE_VERSION_11_0: |
74 | case DCE_VERSION_11_2: | 74 | case DCE_VERSION_11_2: |
75 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
76 | case DCE_VERSION_11_22: | 75 | case DCE_VERSION_11_22: |
77 | #endif | ||
78 | dal_hw_translate_dce110_init(translate); | 76 | dal_hw_translate_dce110_init(translate); |
79 | return true; | 77 | return true; |
80 | case DCE_VERSION_12_0: | 78 | case DCE_VERSION_12_0: |
diff --git a/drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c b/drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c index c3d7c320fdba..14dc8c94d862 100644 --- a/drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c +++ b/drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c | |||
@@ -83,9 +83,7 @@ struct i2caux *dal_i2caux_create( | |||
83 | case DCE_VERSION_8_3: | 83 | case DCE_VERSION_8_3: |
84 | return dal_i2caux_dce80_create(ctx); | 84 | return dal_i2caux_dce80_create(ctx); |
85 | case DCE_VERSION_11_2: | 85 | case DCE_VERSION_11_2: |
86 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
87 | case DCE_VERSION_11_22: | 86 | case DCE_VERSION_11_22: |
88 | #endif | ||
89 | return dal_i2caux_dce112_create(ctx); | 87 | return dal_i2caux_dce112_create(ctx); |
90 | case DCE_VERSION_11_0: | 88 | case DCE_VERSION_11_0: |
91 | return dal_i2caux_dce110_create(ctx); | 89 | return dal_i2caux_dce110_create(ctx); |
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h b/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h index 933ea7a1e18b..eece165206f9 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h +++ b/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h | |||
@@ -43,9 +43,7 @@ enum bw_calcs_version { | |||
43 | BW_CALCS_VERSION_POLARIS10, | 43 | BW_CALCS_VERSION_POLARIS10, |
44 | BW_CALCS_VERSION_POLARIS11, | 44 | BW_CALCS_VERSION_POLARIS11, |
45 | BW_CALCS_VERSION_POLARIS12, | 45 | BW_CALCS_VERSION_POLARIS12, |
46 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
47 | BW_CALCS_VERSION_VEGAM, | 46 | BW_CALCS_VERSION_VEGAM, |
48 | #endif | ||
49 | BW_CALCS_VERSION_STONEY, | 47 | BW_CALCS_VERSION_STONEY, |
50 | BW_CALCS_VERSION_VEGA10 | 48 | BW_CALCS_VERSION_VEGA10 |
51 | }; | 49 | }; |
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h index 77d2856be9f6..6aeb5a2902c3 100644 --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h | |||
@@ -86,6 +86,7 @@ | |||
86 | #define VI_POLARIS10_P_A0 80 | 86 | #define VI_POLARIS10_P_A0 80 |
87 | #define VI_POLARIS11_M_A0 90 | 87 | #define VI_POLARIS11_M_A0 90 |
88 | #define VI_POLARIS12_V_A0 100 | 88 | #define VI_POLARIS12_V_A0 100 |
89 | #define VI_VEGAM_A0 110 | ||
89 | 90 | ||
90 | #define VI_UNKNOWN 0xFF | 91 | #define VI_UNKNOWN 0xFF |
91 | 92 | ||
@@ -98,14 +99,9 @@ | |||
98 | (eChipRev < VI_POLARIS11_M_A0)) | 99 | (eChipRev < VI_POLARIS11_M_A0)) |
99 | #define ASIC_REV_IS_POLARIS11_M(eChipRev) ((eChipRev >= VI_POLARIS11_M_A0) && \ | 100 | #define ASIC_REV_IS_POLARIS11_M(eChipRev) ((eChipRev >= VI_POLARIS11_M_A0) && \ |
100 | (eChipRev < VI_POLARIS12_V_A0)) | 101 | (eChipRev < VI_POLARIS12_V_A0)) |
101 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
102 | #define VI_VEGAM_A0 110 | ||
103 | #define ASIC_REV_IS_POLARIS12_V(eChipRev) ((eChipRev >= VI_POLARIS12_V_A0) && \ | 102 | #define ASIC_REV_IS_POLARIS12_V(eChipRev) ((eChipRev >= VI_POLARIS12_V_A0) && \ |
104 | (eChipRev < VI_VEGAM_A0)) | 103 | (eChipRev < VI_VEGAM_A0)) |
105 | #define ASIC_REV_IS_VEGAM(eChipRev) (eChipRev >= VI_VEGAM_A0) | 104 | #define ASIC_REV_IS_VEGAM(eChipRev) (eChipRev >= VI_VEGAM_A0) |
106 | #else | ||
107 | #define ASIC_REV_IS_POLARIS12_V(eChipRev) (eChipRev >= VI_POLARIS12_V_A0) | ||
108 | #endif | ||
109 | 105 | ||
110 | /* DCE11 */ | 106 | /* DCE11 */ |
111 | #define CZ_CARRIZO_A0 0x01 | 107 | #define CZ_CARRIZO_A0 0x01 |
diff --git a/drivers/gpu/drm/amd/display/include/dal_types.h b/drivers/gpu/drm/amd/display/include/dal_types.h index 5b1f8cef0c22..840142b65f8b 100644 --- a/drivers/gpu/drm/amd/display/include/dal_types.h +++ b/drivers/gpu/drm/amd/display/include/dal_types.h | |||
@@ -40,9 +40,7 @@ enum dce_version { | |||
40 | DCE_VERSION_10_0, | 40 | DCE_VERSION_10_0, |
41 | DCE_VERSION_11_0, | 41 | DCE_VERSION_11_0, |
42 | DCE_VERSION_11_2, | 42 | DCE_VERSION_11_2, |
43 | #if defined(CONFIG_DRM_AMD_DC_VEGAM) | ||
44 | DCE_VERSION_11_22, | 43 | DCE_VERSION_11_22, |
45 | #endif | ||
46 | DCE_VERSION_12_0, | 44 | DCE_VERSION_12_0, |
47 | DCE_VERSION_MAX, | 45 | DCE_VERSION_MAX, |
48 | DCN_VERSION_1_0, | 46 | DCN_VERSION_1_0, |