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authorJerry Hoemann <jerry.hoemann@hpe.com>2018-02-25 22:22:20 -0500
committerWim Van Sebroeck <wim@linux-watchdog.org>2018-03-03 09:52:33 -0500
commit2b3d89b402b085b08498e896c65267a145bed486 (patch)
tree611dddcec73d573729e2d39a187675521f19e76b
parent93ac3deb7c220cbcec032a967220a1f109d58431 (diff)
watchdog: hpwdt: Remove legacy NMI sourcing.
Gen8 and prior Proliant systems supported the "CRU" interface to firmware. This interfaces allows linux to "call back" into firmware to source the cause of an NMI. This feature isn't fully utilized as the actual source of the NMI isn't printed, the driver only indicates that the source couldn't be determined when the call fails. With the advent of Gen9, iCRU replaces the CRU. The call back feature is no longer available in firmware. To be compatible and not attempt to call back into firmware on system not supporting CRU, the SMBIOS table is consulted to determine if it is safe to make the call back or not. This results in about half of the driver code being devoted to either making CRU calls or determing if it is safe to make CRU calls. As noted, the driver isn't really using the results of the CRU calls. Furthermore, as a consequence of the Spectre security issue, the BIOS/EFI calls are being wrapped into Spectre-disabling section. Removing the call back in hpwdt_pretimeout assists in this effort. As the CRU sourcing of the NMI isn't required for handling the NMI and there are security concerns with making the call back, remove the legacy (pre Gen9) NMI sourcing and the DMI code to determine if the system had the CRU interface. Signed-off-by: Jerry Hoemann <jerry.hoemann@hpe.com> Acked-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat
-rw-r--r--drivers/watchdog/hpwdt.c501
1 files changed, 9 insertions, 492 deletions
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index f1f00dfc0e68..b0a158073abd 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -28,16 +28,7 @@
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/uaccess.h> 29#include <linux/uaccess.h>
30#include <linux/watchdog.h> 30#include <linux/watchdog.h>
31#ifdef CONFIG_HPWDT_NMI_DECODING
32#include <linux/dmi.h>
33#include <linux/spinlock.h>
34#include <linux/nmi.h>
35#include <linux/kdebug.h>
36#include <linux/notifier.h>
37#include <asm/set_memory.h>
38#endif /* CONFIG_HPWDT_NMI_DECODING */
39#include <asm/nmi.h> 31#include <asm/nmi.h>
40#include <asm/frame.h>
41 32
42#define HPWDT_VERSION "1.4.0" 33#define HPWDT_VERSION "1.4.0"
43#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) 34#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
@@ -48,6 +39,9 @@
48static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ 39static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
49static unsigned int reload; /* the computed soft_margin */ 40static unsigned int reload; /* the computed soft_margin */
50static bool nowayout = WATCHDOG_NOWAYOUT; 41static bool nowayout = WATCHDOG_NOWAYOUT;
42#ifdef CONFIG_HPWDT_NMI_DECODING
43static unsigned int allow_kdump = 1;
44#endif
51static char expect_release; 45static char expect_release;
52static unsigned long hpwdt_is_open; 46static unsigned long hpwdt_is_open;
53 47
@@ -63,373 +57,6 @@ static const struct pci_device_id hpwdt_devices[] = {
63}; 57};
64MODULE_DEVICE_TABLE(pci, hpwdt_devices); 58MODULE_DEVICE_TABLE(pci, hpwdt_devices);
65 59
66#ifdef CONFIG_HPWDT_NMI_DECODING
67#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
68#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
69#define PCI_BIOS32_PARAGRAPH_LEN 16
70#define PCI_ROM_BASE1 0x000F0000
71#define ROM_SIZE 0x10000
72
73struct bios32_service_dir {
74 u32 signature;
75 u32 entry_point;
76 u8 revision;
77 u8 length;
78 u8 checksum;
79 u8 reserved[5];
80};
81
82/* type 212 */
83struct smbios_cru64_info {
84 u8 type;
85 u8 byte_length;
86 u16 handle;
87 u32 signature;
88 u64 physical_address;
89 u32 double_length;
90 u32 double_offset;
91};
92#define SMBIOS_CRU64_INFORMATION 212
93
94/* type 219 */
95struct smbios_proliant_info {
96 u8 type;
97 u8 byte_length;
98 u16 handle;
99 u32 power_features;
100 u32 omega_features;
101 u32 reserved;
102 u32 misc_features;
103};
104#define SMBIOS_ICRU_INFORMATION 219
105
106
107struct cmn_registers {
108 union {
109 struct {
110 u8 ral;
111 u8 rah;
112 u16 rea2;
113 };
114 u32 reax;
115 } u1;
116 union {
117 struct {
118 u8 rbl;
119 u8 rbh;
120 u8 reb2l;
121 u8 reb2h;
122 };
123 u32 rebx;
124 } u2;
125 union {
126 struct {
127 u8 rcl;
128 u8 rch;
129 u16 rec2;
130 };
131 u32 recx;
132 } u3;
133 union {
134 struct {
135 u8 rdl;
136 u8 rdh;
137 u16 red2;
138 };
139 u32 redx;
140 } u4;
141
142 u32 resi;
143 u32 redi;
144 u16 rds;
145 u16 res;
146 u32 reflags;
147} __attribute__((packed));
148
149static unsigned int hpwdt_nmi_decoding;
150static unsigned int allow_kdump = 1;
151static unsigned int is_icru;
152static unsigned int is_uefi;
153static DEFINE_SPINLOCK(rom_lock);
154static void *cru_rom_addr;
155static struct cmn_registers cmn_regs;
156
157extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
158 unsigned long *pRomEntry);
159
160#ifdef CONFIG_X86_32
161/* --32 Bit Bios------------------------------------------------------------ */
162
163#define HPWDT_ARCH 32
164
165asm(".text \n\t"
166 ".align 4 \n\t"
167 ".globl asminline_call \n"
168 "asminline_call: \n\t"
169 "pushl %ebp \n\t"
170 "movl %esp, %ebp \n\t"
171 "pusha \n\t"
172 "pushf \n\t"
173 "push %es \n\t"
174 "push %ds \n\t"
175 "pop %es \n\t"
176 "movl 8(%ebp),%eax \n\t"
177 "movl 4(%eax),%ebx \n\t"
178 "movl 8(%eax),%ecx \n\t"
179 "movl 12(%eax),%edx \n\t"
180 "movl 16(%eax),%esi \n\t"
181 "movl 20(%eax),%edi \n\t"
182 "movl (%eax),%eax \n\t"
183 "push %cs \n\t"
184 "call *12(%ebp) \n\t"
185 "pushf \n\t"
186 "pushl %eax \n\t"
187 "movl 8(%ebp),%eax \n\t"
188 "movl %ebx,4(%eax) \n\t"
189 "movl %ecx,8(%eax) \n\t"
190 "movl %edx,12(%eax) \n\t"
191 "movl %esi,16(%eax) \n\t"
192 "movl %edi,20(%eax) \n\t"
193 "movw %ds,24(%eax) \n\t"
194 "movw %es,26(%eax) \n\t"
195 "popl %ebx \n\t"
196 "movl %ebx,(%eax) \n\t"
197 "popl %ebx \n\t"
198 "movl %ebx,28(%eax) \n\t"
199 "pop %es \n\t"
200 "popf \n\t"
201 "popa \n\t"
202 "leave \n\t"
203 "ret \n\t"
204 ".previous");
205
206
207/*
208 * cru_detect
209 *
210 * Routine Description:
211 * This function uses the 32-bit BIOS Service Directory record to
212 * search for a $CRU record.
213 *
214 * Return Value:
215 * 0 : SUCCESS
216 * <0 : FAILURE
217 */
218static int cru_detect(unsigned long map_entry,
219 unsigned long map_offset)
220{
221 void *bios32_map;
222 unsigned long *bios32_entrypoint;
223 unsigned long cru_physical_address;
224 unsigned long cru_length;
225 unsigned long physical_bios_base = 0;
226 unsigned long physical_bios_offset = 0;
227 int retval = -ENODEV;
228
229 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
230
231 if (bios32_map == NULL)
232 return -ENODEV;
233
234 bios32_entrypoint = bios32_map + map_offset;
235
236 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
237
238 set_memory_x((unsigned long)bios32_map, 2);
239 asminline_call(&cmn_regs, bios32_entrypoint);
240
241 if (cmn_regs.u1.ral != 0) {
242 pr_warn("Call succeeded but with an error: 0x%x\n",
243 cmn_regs.u1.ral);
244 } else {
245 physical_bios_base = cmn_regs.u2.rebx;
246 physical_bios_offset = cmn_regs.u4.redx;
247 cru_length = cmn_regs.u3.recx;
248 cru_physical_address =
249 physical_bios_base + physical_bios_offset;
250
251 /* If the values look OK, then map it in. */
252 if ((physical_bios_base + physical_bios_offset)) {
253 cru_rom_addr =
254 ioremap(cru_physical_address, cru_length);
255 if (cru_rom_addr) {
256 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
257 (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
258 retval = 0;
259 }
260 }
261
262 pr_debug("CRU Base Address: 0x%lx\n", physical_bios_base);
263 pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset);
264 pr_debug("CRU Length: 0x%lx\n", cru_length);
265 pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr);
266 }
267 iounmap(bios32_map);
268 return retval;
269}
270
271/*
272 * bios_checksum
273 */
274static int bios_checksum(const char __iomem *ptr, int len)
275{
276 char sum = 0;
277 int i;
278
279 /*
280 * calculate checksum of size bytes. This should add up
281 * to zero if we have a valid header.
282 */
283 for (i = 0; i < len; i++)
284 sum += ptr[i];
285
286 return ((sum == 0) && (len > 0));
287}
288
289/*
290 * bios32_present
291 *
292 * Routine Description:
293 * This function finds the 32-bit BIOS Service Directory
294 *
295 * Return Value:
296 * 0 : SUCCESS
297 * <0 : FAILURE
298 */
299static int bios32_present(const char __iomem *p)
300{
301 struct bios32_service_dir *bios_32_ptr;
302 int length;
303 unsigned long map_entry, map_offset;
304
305 bios_32_ptr = (struct bios32_service_dir *) p;
306
307 /*
308 * Search for signature by checking equal to the swizzled value
309 * instead of calling another routine to perform a strcmp.
310 */
311 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
312 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
313 if (bios_checksum(p, length)) {
314 /*
315 * According to the spec, we're looking for the
316 * first 4KB-aligned address below the entrypoint
317 * listed in the header. The Service Directory code
318 * is guaranteed to occupy no more than 2 4KB pages.
319 */
320 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
321 map_offset = bios_32_ptr->entry_point - map_entry;
322
323 return cru_detect(map_entry, map_offset);
324 }
325 }
326 return -ENODEV;
327}
328
329static int detect_cru_service(void)
330{
331 char __iomem *p, *q;
332 int rc = -1;
333
334 /*
335 * Search from 0x0f0000 through 0x0fffff, inclusive.
336 */
337 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
338 if (p == NULL)
339 return -ENOMEM;
340
341 for (q = p; q < p + ROM_SIZE; q += 16) {
342 rc = bios32_present(q);
343 if (!rc)
344 break;
345 }
346 iounmap(p);
347 return rc;
348}
349/* ------------------------------------------------------------------------- */
350#endif /* CONFIG_X86_32 */
351#ifdef CONFIG_X86_64
352/* --64 Bit Bios------------------------------------------------------------ */
353
354#define HPWDT_ARCH 64
355
356asm(".text \n\t"
357 ".align 4 \n\t"
358 ".globl asminline_call \n\t"
359 ".type asminline_call, @function \n\t"
360 "asminline_call: \n\t"
361 FRAME_BEGIN
362 "pushq %rax \n\t"
363 "pushq %rbx \n\t"
364 "pushq %rdx \n\t"
365 "pushq %r12 \n\t"
366 "pushq %r9 \n\t"
367 "movq %rsi, %r12 \n\t"
368 "movq %rdi, %r9 \n\t"
369 "movl 4(%r9),%ebx \n\t"
370 "movl 8(%r9),%ecx \n\t"
371 "movl 12(%r9),%edx \n\t"
372 "movl 16(%r9),%esi \n\t"
373 "movl 20(%r9),%edi \n\t"
374 "movl (%r9),%eax \n\t"
375 "call *%r12 \n\t"
376 "pushfq \n\t"
377 "popq %r12 \n\t"
378 "movl %eax, (%r9) \n\t"
379 "movl %ebx, 4(%r9) \n\t"
380 "movl %ecx, 8(%r9) \n\t"
381 "movl %edx, 12(%r9) \n\t"
382 "movl %esi, 16(%r9) \n\t"
383 "movl %edi, 20(%r9) \n\t"
384 "movq %r12, %rax \n\t"
385 "movl %eax, 28(%r9) \n\t"
386 "popq %r9 \n\t"
387 "popq %r12 \n\t"
388 "popq %rdx \n\t"
389 "popq %rbx \n\t"
390 "popq %rax \n\t"
391 FRAME_END
392 "ret \n\t"
393 ".previous");
394
395/*
396 * dmi_find_cru
397 *
398 * Routine Description:
399 * This function checks whether or not a SMBIOS/DMI record is
400 * the 64bit CRU info or not
401 */
402static void dmi_find_cru(const struct dmi_header *dm, void *dummy)
403{
404 struct smbios_cru64_info *smbios_cru64_ptr;
405 unsigned long cru_physical_address;
406
407 if (dm->type == SMBIOS_CRU64_INFORMATION) {
408 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
409 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
410 cru_physical_address =
411 smbios_cru64_ptr->physical_address +
412 smbios_cru64_ptr->double_offset;
413 cru_rom_addr = ioremap(cru_physical_address,
414 smbios_cru64_ptr->double_length);
415 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
416 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
417 }
418 }
419}
420
421static int detect_cru_service(void)
422{
423 cru_rom_addr = NULL;
424
425 dmi_walk(dmi_find_cru, NULL);
426
427 /* if cru_rom_addr has been set then we found a CRU service */
428 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
429}
430/* ------------------------------------------------------------------------- */
431#endif /* CONFIG_X86_64 */
432#endif /* CONFIG_HPWDT_NMI_DECODING */
433 60
434/* 61/*
435 * Watchdog operations 62 * Watchdog operations
@@ -486,30 +113,12 @@ static int hpwdt_my_nmi(void)
486 */ 113 */
487static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs) 114static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
488{ 115{
489 unsigned long rom_pl;
490 static int die_nmi_called;
491
492 if (!hpwdt_nmi_decoding)
493 return NMI_DONE;
494
495 if ((ulReason == NMI_UNKNOWN) && !hpwdt_my_nmi()) 116 if ((ulReason == NMI_UNKNOWN) && !hpwdt_my_nmi())
496 return NMI_DONE; 117 return NMI_DONE;
497 118
498 spin_lock_irqsave(&rom_lock, rom_pl);
499 if (!die_nmi_called && !is_icru && !is_uefi)
500 asminline_call(&cmn_regs, cru_rom_addr);
501 die_nmi_called = 1;
502 spin_unlock_irqrestore(&rom_lock, rom_pl);
503
504 if (allow_kdump) 119 if (allow_kdump)
505 hpwdt_stop(); 120 hpwdt_stop();
506 121
507 if (!is_icru && !is_uefi) {
508 if (cmn_regs.u1.ral == 0) {
509 nmi_panic(regs, "An NMI occurred, but unable to determine source.\n");
510 return NMI_HANDLED;
511 }
512 }
513 nmi_panic(regs, "An NMI occurred. Depending on your system the reason " 122 nmi_panic(regs, "An NMI occurred. Depending on your system the reason "
514 "for the NMI is logged in any one of the following " 123 "for the NMI is logged in any one of the following "
515 "resources:\n" 124 "resources:\n"
@@ -675,84 +284,11 @@ static struct miscdevice hpwdt_miscdev = {
675 * Init & Exit 284 * Init & Exit
676 */ 285 */
677 286
678#ifdef CONFIG_HPWDT_NMI_DECODING
679#ifdef CONFIG_X86_LOCAL_APIC
680static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
681{
682 /*
683 * If nmi_watchdog is turned off then we can turn on
684 * our nmi decoding capability.
685 */
686 hpwdt_nmi_decoding = 1;
687}
688#else
689static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
690{
691 dev_warn(&dev->dev, "NMI decoding is disabled. "
692 "Your kernel does not support a NMI Watchdog.\n");
693}
694#endif /* CONFIG_X86_LOCAL_APIC */
695
696/*
697 * dmi_find_icru
698 *
699 * Routine Description:
700 * This function checks whether or not we are on an iCRU-based server.
701 * This check is independent of architecture and needs to be made for
702 * any ProLiant system.
703 */
704static void dmi_find_icru(const struct dmi_header *dm, void *dummy)
705{
706 struct smbios_proliant_info *smbios_proliant_ptr;
707
708 if (dm->type == SMBIOS_ICRU_INFORMATION) {
709 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
710 if (smbios_proliant_ptr->misc_features & 0x01)
711 is_icru = 1;
712 if (smbios_proliant_ptr->misc_features & 0x1400)
713 is_uefi = 1;
714 }
715}
716 287
717static int hpwdt_init_nmi_decoding(struct pci_dev *dev) 288static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
718{ 289{
290#ifdef CONFIG_HPWDT_NMI_DECODING
719 int retval; 291 int retval;
720
721 /*
722 * On typical CRU-based systems we need to map that service in
723 * the BIOS. For 32 bit Operating Systems we need to go through
724 * the 32 Bit BIOS Service Directory. For 64 bit Operating
725 * Systems we get that service through SMBIOS.
726 *
727 * On systems that support the new iCRU service all we need to
728 * do is call dmi_walk to get the supported flag value and skip
729 * the old cru detect code.
730 */
731 dmi_walk(dmi_find_icru, NULL);
732 if (!is_icru && !is_uefi) {
733
734 /*
735 * We need to map the ROM to get the CRU service.
736 * For 32 bit Operating Systems we need to go through the 32 Bit
737 * BIOS Service Directory
738 * For 64 bit Operating Systems we get that service through SMBIOS.
739 */
740 retval = detect_cru_service();
741 if (retval < 0) {
742 dev_warn(&dev->dev,
743 "Unable to detect the %d Bit CRU Service.\n",
744 HPWDT_ARCH);
745 return retval;
746 }
747
748 /*
749 * We know this is the only CRU call we need to make so lets keep as
750 * few instructions as possible once the NMI comes in.
751 */
752 cmn_regs.u1.rah = 0x0D;
753 cmn_regs.u1.ral = 0x02;
754 }
755
756 /* 292 /*
757 * Only one function can register for NMI_UNKNOWN 293 * Only one function can register for NMI_UNKNOWN
758 */ 294 */
@@ -780,45 +316,26 @@ error:
780 dev_warn(&dev->dev, 316 dev_warn(&dev->dev,
781 "Unable to register a die notifier (err=%d).\n", 317 "Unable to register a die notifier (err=%d).\n",
782 retval); 318 retval);
783 if (cru_rom_addr)
784 iounmap(cru_rom_addr);
785 return retval; 319 return retval;
320#endif /* CONFIG_HPWDT_NMI_DECODING */
321 return 0;
786} 322}
787 323
788static void hpwdt_exit_nmi_decoding(void) 324static void hpwdt_exit_nmi_decoding(void)
789{ 325{
326#ifdef CONFIG_HPWDT_NMI_DECODING
790 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); 327 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
791 unregister_nmi_handler(NMI_SERR, "hpwdt"); 328 unregister_nmi_handler(NMI_SERR, "hpwdt");
792 unregister_nmi_handler(NMI_IO_CHECK, "hpwdt"); 329 unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
793 if (cru_rom_addr) 330#endif
794 iounmap(cru_rom_addr);
795}
796#else /* !CONFIG_HPWDT_NMI_DECODING */
797static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
798{
799}
800
801static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
802{
803 return 0;
804} 331}
805 332
806static void hpwdt_exit_nmi_decoding(void)
807{
808}
809#endif /* CONFIG_HPWDT_NMI_DECODING */
810
811static int hpwdt_init_one(struct pci_dev *dev, 333static int hpwdt_init_one(struct pci_dev *dev,
812 const struct pci_device_id *ent) 334 const struct pci_device_id *ent)
813{ 335{
814 int retval; 336 int retval;
815 337
816 /* 338 /*
817 * Check if we can do NMI decoding or not
818 */
819 hpwdt_check_nmi_decoding(dev);
820
821 /*
822 * First let's find out if we are on an iLO2+ server. We will 339 * First let's find out if we are on an iLO2+ server. We will
823 * not run on a legacy ASM box. 340 * not run on a legacy ASM box.
824 * So we only support the G5 ProLiant servers and higher. 341 * So we only support the G5 ProLiant servers and higher.
@@ -922,6 +439,6 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
922#ifdef CONFIG_HPWDT_NMI_DECODING 439#ifdef CONFIG_HPWDT_NMI_DECODING
923module_param(allow_kdump, int, 0); 440module_param(allow_kdump, int, 0);
924MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs"); 441MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
925#endif /* !CONFIG_HPWDT_NMI_DECODING */ 442#endif /* CONFIG_HPWDT_NMI_DECODING */
926 443
927module_pci_driver(hpwdt_driver); 444module_pci_driver(hpwdt_driver);
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-29 22:57:04 -0400