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authorOlof Johansson <olof@lixom.net>2019-04-28 16:02:34 -0400
committerOlof Johansson <olof@lixom.net>2019-04-28 16:02:34 -0400
commit2abeb52e6002bba50b00dfe0d3f5a9e7cef329a2 (patch)
tree17ea69d7ab1f40a9f21038826096265cfca4dc15
parent44b9c8e7729081105f9fb13ca6b8ed4803170954 (diff)
parentb4bcbdee137833aab04942671b48a9a3beb0801b (diff)
Merge tag 'samsung-dt-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.2, second round 1. DTC warning fixes: move timer and pmu nodes outside of soc node, 2. Properly override MDMA0 on Universal C210, 3. Fix camera clock provider (to match bindings and driver) on Goni. * tag 'samsung-dt-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: s5pv210: Fix camera clock provider on Goni board ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210 ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250 ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250 ARM: dts: exynos: Move pmu and timer nodes out of soc Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi72
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi14
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts17
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi40
-rw-r--r--arch/arm/boot/dts/exynos54xx.dtsi38
-rw-r--r--arch/arm/boot/dts/s5pv210-goni.dts2
-rw-r--r--arch/arm/boot/dts/s5pv210.dtsi6
7 files changed, 100 insertions, 89 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 5892a9f7622f..8ce3a7786b19 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -97,42 +97,46 @@
97 }; 97 };
98 }; 98 };
99 99
100 soc: soc { 100 fixed-rate-clocks {
101 compatible = "simple-bus";
102 #address-cells = <1>; 101 #address-cells = <1>;
103 #size-cells = <1>; 102 #size-cells = <0>;
104 ranges;
105
106 fixed-rate-clocks {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 103
110 xusbxti: clock@0 { 104 xusbxti: clock@0 {
111 compatible = "fixed-clock"; 105 compatible = "fixed-clock";
112 #address-cells = <1>; 106 reg = <0>;
113 #size-cells = <0>; 107 clock-frequency = <0>;
114 reg = <0>; 108 #clock-cells = <0>;
115 clock-frequency = <0>; 109 clock-output-names = "xusbxti";
116 #clock-cells = <0>; 110 };
117 clock-output-names = "xusbxti";
118 };
119 111
120 xxti: clock@1 { 112 xxti: clock@1 {
121 compatible = "fixed-clock"; 113 compatible = "fixed-clock";
122 reg = <1>; 114 reg = <1>;
123 clock-frequency = <0>; 115 clock-frequency = <0>;
124 #clock-cells = <0>; 116 #clock-cells = <0>;
125 clock-output-names = "xxti"; 117 clock-output-names = "xxti";
126 }; 118 };
127 119
128 xtcxo: clock@2 { 120 xtcxo: clock@2 {
129 compatible = "fixed-clock"; 121 compatible = "fixed-clock";
130 reg = <2>; 122 reg = <2>;
131 clock-frequency = <0>; 123 clock-frequency = <0>;
132 #clock-cells = <0>; 124 #clock-cells = <0>;
133 clock-output-names = "xtcxo"; 125 clock-output-names = "xtcxo";
134 };
135 }; 126 };
127 };
128
129 pmu {
130 compatible = "arm,cortex-a7-pmu";
131 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
132 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
133 };
134
135 soc: soc {
136 compatible = "simple-bus";
137 #address-cells = <1>;
138 #size-cells = <1>;
139 ranges;
136 140
137 sysram@2020000 { 141 sysram@2020000 {
138 compatible = "mmio-sram"; 142 compatible = "mmio-sram";
@@ -673,12 +677,6 @@
673 status = "disabled"; 677 status = "disabled";
674 }; 678 };
675 679
676 pmu {
677 compatible = "arm,cortex-a7-pmu";
678 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
679 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
680 };
681
682 ppmu_dmc0: ppmu_dmc0@106a0000 { 680 ppmu_dmc0: ppmu_dmc0@106a0000 {
683 compatible = "samsung,exynos-ppmu"; 681 compatible = "samsung,exynos-ppmu";
684 reg = <0x106a0000 0x2000>; 682 reg = <0x106a0000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 6085e92ac2d7..36ccf227434d 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -51,6 +51,12 @@
51 serial3 = &serial_3; 51 serial3 = &serial_3;
52 }; 52 };
53 53
54 pmu: pmu {
55 compatible = "arm,cortex-a9-pmu";
56 interrupt-parent = <&combiner>;
57 interrupts = <2 2>, <3 2>;
58 };
59
54 soc: soc { 60 soc: soc {
55 compatible = "simple-bus"; 61 compatible = "simple-bus";
56 #address-cells = <1>; 62 #address-cells = <1>;
@@ -169,12 +175,6 @@
169 reg = <0x10440000 0x1000>; 175 reg = <0x10440000 0x1000>;
170 }; 176 };
171 177
172 pmu: pmu {
173 compatible = "arm,cortex-a9-pmu";
174 interrupt-parent = <&combiner>;
175 interrupts = <2 2>, <3 2>;
176 };
177
178 sys_reg: syscon@10010000 { 178 sys_reg: syscon@10010000 {
179 compatible = "samsung,exynos4-sysreg", "syscon"; 179 compatible = "samsung,exynos4-sysreg", "syscon";
180 reg = <0x10010000 0x400>; 180 reg = <0x10010000 0x400>;
@@ -675,7 +675,7 @@
675 status = "disabled"; 675 status = "disabled";
676 }; 676 };
677 677
678 amba { 678 amba: amba {
679 #address-cells = <1>; 679 #address-cells = <1>;
680 #size-cells = <1>; 680 #size-cells = <1>;
681 compatible = "simple-bus"; 681 compatible = "simple-bus";
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 07d64a8f82e3..bf092e97e14f 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -177,6 +177,20 @@
177 }; 177 };
178}; 178};
179 179
180&amba {
181 mdma0: mdma@12840000 {
182 compatible = "arm,pl330", "arm,primecell";
183 reg = <0x12840000 0x1000>;
184 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
185 clocks = <&clock CLK_MDMA>;
186 clock-names = "apb_pclk";
187 #dma-cells = <1>;
188 #dma-channels = <8>;
189 #dma-requests = <1>;
190 power-domains = <&pd_lcd0>;
191 };
192};
193
180&camera { 194&camera {
181 status = "okay"; 195 status = "okay";
182 196
@@ -491,7 +505,8 @@
491}; 505};
492 506
493&mdma1 { 507&mdma1 {
494 reg = <0x12840000 0x1000>; 508 /* Use the secure mdma0 */
509 status = "disabled";
495}; 510};
496 511
497&mixer { 512&mixer {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 80986b97dfe5..d5e0392b409e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -157,6 +157,12 @@
157 }; 157 };
158 }; 158 };
159 159
160 pmu {
161 compatible = "arm,cortex-a15-pmu";
162 interrupt-parent = <&combiner>;
163 interrupts = <1 2>, <22 4>;
164 };
165
160 soc: soc { 166 soc: soc {
161 sysram@2020000 { 167 sysram@2020000 {
162 compatible = "mmio-sram"; 168 compatible = "mmio-sram";
@@ -227,20 +233,6 @@
227 power-domains = <&pd_mau>; 233 power-domains = <&pd_mau>;
228 }; 234 };
229 235
230 timer {
231 compatible = "arm,armv7-timer";
232 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
233 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
234 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
235 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
236 /*
237 * Unfortunately we need this since some versions
238 * of U-Boot on Exynos don't set the CNTFRQ register,
239 * so we need the value from DT.
240 */
241 clock-frequency = <24000000>;
242 };
243
244 mct@101c0000 { 236 mct@101c0000 {
245 compatible = "samsung,exynos4210-mct"; 237 compatible = "samsung,exynos4210-mct";
246 reg = <0x101C0000 0x800>; 238 reg = <0x101C0000 0x800>;
@@ -265,12 +257,6 @@
265 }; 257 };
266 }; 258 };
267 259
268 pmu {
269 compatible = "arm,cortex-a15-pmu";
270 interrupt-parent = <&combiner>;
271 interrupts = <1 2>, <22 4>;
272 };
273
274 pinctrl_0: pinctrl@11400000 { 260 pinctrl_0: pinctrl@11400000 {
275 compatible = "samsung,exynos5250-pinctrl"; 261 compatible = "samsung,exynos5250-pinctrl";
276 reg = <0x11400000 0x1000>; 262 reg = <0x11400000 0x1000>;
@@ -1097,6 +1083,20 @@
1097 }; 1083 };
1098 }; 1084 };
1099 }; 1085 };
1086
1087 timer {
1088 compatible = "arm,armv7-timer";
1089 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1090 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1091 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1092 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
1093 /*
1094 * Unfortunately we need this since some versions
1095 * of U-Boot on Exynos don't set the CNTFRQ register,
1096 * so we need the value from DT.
1097 */
1098 clock-frequency = <24000000>;
1099 };
1100}; 1100};
1101 1101
1102&dp { 1102&dp {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index de26e5ee0d2d..ae866bcc30c4 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -25,27 +25,27 @@
25 usbdrdphy1 = &usbdrd_phy1; 25 usbdrdphy1 = &usbdrd_phy1;
26 }; 26 };
27 27
28 soc: soc { 28 arm_a7_pmu: arm-a7-pmu {
29 arm_a7_pmu: arm-a7-pmu { 29 compatible = "arm,cortex-a7-pmu";
30 compatible = "arm,cortex-a7-pmu"; 30 interrupt-parent = <&gic>;
31 interrupt-parent = <&gic>; 31 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
32 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 32 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
33 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 33 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
34 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, 34 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
35 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 35 status = "disabled";
36 status = "disabled"; 36 };
37 };
38 37
39 arm_a15_pmu: arm-a15-pmu { 38 arm_a15_pmu: arm-a15-pmu {
40 compatible = "arm,cortex-a15-pmu"; 39 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&combiner>; 40 interrupt-parent = <&combiner>;
42 interrupts = <1 2>, 41 interrupts = <1 2>,
43 <7 0>, 42 <7 0>,
44 <16 6>, 43 <16 6>,
45 <19 2>; 44 <19 2>;
46 status = "disabled"; 45 status = "disabled";
47 }; 46 };
48 47
48 soc: soc {
49 sysram@2020000 { 49 sysram@2020000 {
50 compatible = "mmio-sram"; 50 compatible = "mmio-sram";
51 reg = <0x02020000 0x54000>; 51 reg = <0x02020000 0x54000>;
diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts
index eb6d1926c0d6..fbbd93707404 100644
--- a/arch/arm/boot/dts/s5pv210-goni.dts
+++ b/arch/arm/boot/dts/s5pv210-goni.dts
@@ -376,7 +376,7 @@
376 vdd_core-supply = <&ldo14_reg>; 376 vdd_core-supply = <&ldo14_reg>;
377 377
378 clock-frequency = <16000000>; 378 clock-frequency = <16000000>;
379 clocks = <&clock_cam 0>; 379 clocks = <&camera 0>;
380 clock-names = "mclk"; 380 clock-names = "mclk";
381 nreset-gpios = <&gpb 2 0>; 381 nreset-gpios = <&gpb 2 0>;
382 nstby-gpios = <&gpb 0 0>; 382 nstby-gpios = <&gpb 0 0>;
diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
index a44d5eb56bed..2ad642f51fd9 100644
--- a/arch/arm/boot/dts/s5pv210.dtsi
+++ b/arch/arm/boot/dts/s5pv210.dtsi
@@ -585,12 +585,10 @@
585 clock-names = "sclk_cam0", "sclk_cam1"; 585 clock-names = "sclk_cam0", "sclk_cam1";
586 #address-cells = <1>; 586 #address-cells = <1>;
587 #size-cells = <1>; 587 #size-cells = <1>;
588 #clock-cells = <1>;
589 clock-output-names = "cam_a_clkout", "cam_b_clkout";
588 ranges; 590 ranges;
589 591
590 clock_cam: clock-controller {
591 #clock-cells = <1>;
592 };
593
594 csis0: csis@fa600000 { 592 csis0: csis@fa600000 {
595 compatible = "samsung,s5pv210-csis"; 593 compatible = "samsung,s5pv210-csis";
596 reg = <0xfa600000 0x4000>; 594 reg = <0xfa600000 0x4000>;
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-01 13:59:36 -0500