diff options
author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2015-06-08 08:19:51 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-06-08 13:53:18 -0400 |
commit | 2a9dd1db70688203e5699f6ea074d41a7ac86378 (patch) | |
tree | 418137026ac9829bfeb9080e04f0766209c7cfae | |
parent | b2822f191a22990f2de80e6eb36000e5f04297f1 (diff) |
ASoC: tas2552: Correct Boost Auto-Pass Through Control register usage
Correct the bit definition so the code will change the bits what it
supposed to change. Also rename the register define to
TAS2552_BOOST_APT_CTRL.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/tas2552.c | 6 | ||||
-rw-r--r-- | sound/soc/codecs/tas2552.h | 21 |
2 files changed, 13 insertions, 14 deletions
diff --git a/sound/soc/codecs/tas2552.c b/sound/soc/codecs/tas2552.c index e4c02ee42966..202c3f4a6390 100644 --- a/sound/soc/codecs/tas2552.c +++ b/sound/soc/codecs/tas2552.c | |||
@@ -45,7 +45,7 @@ static struct reg_default tas2552_reg_defs[] = { | |||
45 | {TAS2552_OUTPUT_DATA, 0xc0}, | 45 | {TAS2552_OUTPUT_DATA, 0xc0}, |
46 | {TAS2552_PDM_CFG, 0x01}, | 46 | {TAS2552_PDM_CFG, 0x01}, |
47 | {TAS2552_PGA_GAIN, 0x00}, | 47 | {TAS2552_PGA_GAIN, 0x00}, |
48 | {TAS2552_BOOST_PT_CTRL, 0x0f}, | 48 | {TAS2552_BOOST_APT_CTRL, 0x0f}, |
49 | {TAS2552_RESERVED_0D, 0xbe}, | 49 | {TAS2552_RESERVED_0D, 0xbe}, |
50 | {TAS2552_LIMIT_RATE_HYS, 0x08}, | 50 | {TAS2552_LIMIT_RATE_HYS, 0x08}, |
51 | {TAS2552_CFG_2, 0xef}, | 51 | {TAS2552_CFG_2, 0xef}, |
@@ -601,8 +601,8 @@ static int tas2552_codec_probe(struct snd_soc_codec *codec) | |||
601 | snd_soc_write(codec, TAS2552_OUTPUT_DATA, | 601 | snd_soc_write(codec, TAS2552_OUTPUT_DATA, |
602 | TAS2552_PDM_DATA_SEL_V_I | | 602 | TAS2552_PDM_DATA_SEL_V_I | |
603 | TAS2552_R_DATA_OUT(TAS2552_DATA_OUT_V_DATA)); | 603 | TAS2552_R_DATA_OUT(TAS2552_DATA_OUT_V_DATA)); |
604 | snd_soc_write(codec, TAS2552_BOOST_PT_CTRL, TAS2552_APT_DELAY_200 | | 604 | snd_soc_write(codec, TAS2552_BOOST_APT_CTRL, TAS2552_APT_DELAY_200 | |
605 | TAS2552_APT_THRESH_2_1_7); | 605 | TAS2552_APT_THRESH_20_17); |
606 | 606 | ||
607 | snd_soc_write(codec, TAS2552_CFG_2, TAS2552_BOOST_EN | | 607 | snd_soc_write(codec, TAS2552_CFG_2, TAS2552_BOOST_EN | |
608 | TAS2552_APT_EN | TAS2552_LIM_EN); | 608 | TAS2552_APT_EN | TAS2552_LIM_EN); |
diff --git a/sound/soc/codecs/tas2552.h b/sound/soc/codecs/tas2552.h index 4a22f598ecb6..f62a1bcb2e49 100644 --- a/sound/soc/codecs/tas2552.h +++ b/sound/soc/codecs/tas2552.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #define TAS2552_PDM_CFG 0x11 | 39 | #define TAS2552_PDM_CFG 0x11 |
40 | #define TAS2552_PGA_GAIN 0x12 | 40 | #define TAS2552_PGA_GAIN 0x12 |
41 | #define TAS2552_EDGE_RATE_CTRL 0x13 | 41 | #define TAS2552_EDGE_RATE_CTRL 0x13 |
42 | #define TAS2552_BOOST_PT_CTRL 0x14 | 42 | #define TAS2552_BOOST_APT_CTRL 0x14 |
43 | #define TAS2552_VER_NUM 0x16 | 43 | #define TAS2552_VER_NUM 0x16 |
44 | #define TAS2552_VBAT_DATA 0x19 | 44 | #define TAS2552_VBAT_DATA 0x19 |
45 | #define TAS2552_MAX_REG 0x20 | 45 | #define TAS2552_MAX_REG 0x20 |
@@ -127,16 +127,15 @@ | |||
127 | #define TAS2552_PDM_CLK_SEL_MASK TAS2552_PDM_CLK_SEL_MCLK | 127 | #define TAS2552_PDM_CLK_SEL_MASK TAS2552_PDM_CLK_SEL_MCLK |
128 | #define TAS2552_PDM_DATA_ES (1 << 2) | 128 | #define TAS2552_PDM_DATA_ES (1 << 2) |
129 | 129 | ||
130 | /* Boost pass-through register */ | 130 | /* Boost Auto-pass through register */ |
131 | #define TAS2552_APT_DELAY_50 0x00 | 131 | #define TAS2552_APT_DELAY_50 (0x0 << 0) |
132 | #define TAS2552_APT_DELAY_75 (1 << 1) | 132 | #define TAS2552_APT_DELAY_75 (0x1 << 0) |
133 | #define TAS2552_APT_DELAY_125 (1 << 2) | 133 | #define TAS2552_APT_DELAY_125 (0x2 << 0) |
134 | #define TAS2552_APT_DELAY_200 (1 << 3) | 134 | #define TAS2552_APT_DELAY_200 (0x3 << 0) |
135 | 135 | #define TAS2552_APT_THRESH_05_02 (0x0 << 2) | |
136 | #define TAS2552_APT_THRESH_2_5 0x00 | 136 | #define TAS2552_APT_THRESH_10_07 (0x1 << 2) |
137 | #define TAS2552_APT_THRESH_1_7 (1 << 3) | 137 | #define TAS2552_APT_THRESH_14_11 (0x2 << 2) |
138 | #define TAS2552_APT_THRESH_1_4_1_1 (1 << 4) | 138 | #define TAS2552_APT_THRESH_20_17 (0x3 << 2) |
139 | #define TAS2552_APT_THRESH_2_1_7 (0x11 << 2) | ||
140 | 139 | ||
141 | /* PLL Control Register */ | 140 | /* PLL Control Register */ |
142 | #define TAS2552_PLL_J_MASK 0x7f | 141 | #define TAS2552_PLL_J_MASK 0x7f |