aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorHans Verkuil <hans.verkuil@cisco.com>2015-04-13 10:18:51 -0400
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2015-04-27 14:17:57 -0400
commit2a700d8edffdbfb8200332d96c3147e042b337f1 (patch)
treeb01c207d2f4a384da674d38a78c662ee5149134a
parent64131a87f2aae2ed9e05d8227c5b009ca6c50d98 (diff)
[media] marvell-ccic: fix Y'CbCr ordering
Various formats had their byte ordering implemented incorrectly, and the V4L2_PIX_FMT_UYVY is actually impossible to create, instead you get V4L2_PIX_FMT_YVYU. This was working before commit ad6ac452227b7cb93ac79beec092850d178740b1 ("add new formats support for marvell-ccic driver"). That commit broke the original format support and the OLPC XO-1 laptop showed wrong colors ever since (if you are crazy enough to attempt to run the latest kernel on it, like I did). The email addresses of the authors of that patch are no longer valid, so without a way to reach them and ask them about their test setup I am going with what I can test on the OLPC laptop. If this breaks something for someone on their non-OLPC setup, then contact the linux-media mailinglist. My suspicion however is that that commit went in untested. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Jonathan Corbet <corbet@lwn.net> Cc: <stable@vger.kernel.org> # for v3.19 and up Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-rw-r--r--drivers/media/platform/marvell-ccic/mcam-core.c14
-rw-r--r--drivers/media/platform/marvell-ccic/mcam-core.h8
2 files changed, 11 insertions, 11 deletions
diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c
index 9c64b5d01c6a..110fd70c7326 100644
--- a/drivers/media/platform/marvell-ccic/mcam-core.c
+++ b/drivers/media/platform/marvell-ccic/mcam-core.c
@@ -116,8 +116,8 @@ static struct mcam_format_struct {
116 .planar = false, 116 .planar = false,
117 }, 117 },
118 { 118 {
119 .desc = "UYVY 4:2:2", 119 .desc = "YVYU 4:2:2",
120 .pixelformat = V4L2_PIX_FMT_UYVY, 120 .pixelformat = V4L2_PIX_FMT_YVYU,
121 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 121 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
122 .bpp = 2, 122 .bpp = 2,
123 .planar = false, 123 .planar = false,
@@ -748,7 +748,7 @@ static void mcam_ctlr_image(struct mcam_camera *cam)
748 748
749 switch (fmt->pixelformat) { 749 switch (fmt->pixelformat) {
750 case V4L2_PIX_FMT_YUYV: 750 case V4L2_PIX_FMT_YUYV:
751 case V4L2_PIX_FMT_UYVY: 751 case V4L2_PIX_FMT_YVYU:
752 widthy = fmt->width * 2; 752 widthy = fmt->width * 2;
753 widthuv = 0; 753 widthuv = 0;
754 break; 754 break;
@@ -784,15 +784,15 @@ static void mcam_ctlr_image(struct mcam_camera *cam)
784 case V4L2_PIX_FMT_YUV420: 784 case V4L2_PIX_FMT_YUV420:
785 case V4L2_PIX_FMT_YVU420: 785 case V4L2_PIX_FMT_YVU420:
786 mcam_reg_write_mask(cam, REG_CTRL0, 786 mcam_reg_write_mask(cam, REG_CTRL0,
787 C0_DF_YUV | C0_YUV_420PL | C0_YUVE_YVYU, C0_DF_MASK); 787 C0_DF_YUV | C0_YUV_420PL | C0_YUVE_VYUY, C0_DF_MASK);
788 break; 788 break;
789 case V4L2_PIX_FMT_YUYV: 789 case V4L2_PIX_FMT_YUYV:
790 mcam_reg_write_mask(cam, REG_CTRL0, 790 mcam_reg_write_mask(cam, REG_CTRL0,
791 C0_DF_YUV | C0_YUV_PACKED | C0_YUVE_UYVY, C0_DF_MASK); 791 C0_DF_YUV | C0_YUV_PACKED | C0_YUVE_NOSWAP, C0_DF_MASK);
792 break; 792 break;
793 case V4L2_PIX_FMT_UYVY: 793 case V4L2_PIX_FMT_YVYU:
794 mcam_reg_write_mask(cam, REG_CTRL0, 794 mcam_reg_write_mask(cam, REG_CTRL0,
795 C0_DF_YUV | C0_YUV_PACKED | C0_YUVE_YUYV, C0_DF_MASK); 795 C0_DF_YUV | C0_YUV_PACKED | C0_YUVE_SWAP24, C0_DF_MASK);
796 break; 796 break;
797 case V4L2_PIX_FMT_JPEG: 797 case V4L2_PIX_FMT_JPEG:
798 mcam_reg_write_mask(cam, REG_CTRL0, 798 mcam_reg_write_mask(cam, REG_CTRL0,
diff --git a/drivers/media/platform/marvell-ccic/mcam-core.h b/drivers/media/platform/marvell-ccic/mcam-core.h
index aa0c6eac254a..7ffdf4dbaf8c 100644
--- a/drivers/media/platform/marvell-ccic/mcam-core.h
+++ b/drivers/media/platform/marvell-ccic/mcam-core.h
@@ -330,10 +330,10 @@ int mccic_resume(struct mcam_camera *cam);
330#define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */ 330#define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */
331#define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */ 331#define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */
332#define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */ 332#define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */
333#define C0_YUVE_XYUV 0x00000000 /* 420: .YUV */ 333#define C0_YUVE_NOSWAP 0x00000000 /* no bytes swapping */
334#define C0_YUVE_XYVU 0x00010000 /* 420: .YVU */ 334#define C0_YUVE_SWAP13 0x00010000 /* swap byte 1 and 3 */
335#define C0_YUVE_XUVY 0x00020000 /* 420: .UVY */ 335#define C0_YUVE_SWAP24 0x00020000 /* swap byte 2 and 4 */
336#define C0_YUVE_XVUY 0x00030000 /* 420: .VUY */ 336#define C0_YUVE_SWAP1324 0x00030000 /* swap bytes 1&3 and 2&4 */
337/* Bayer bits 18,19 if needed */ 337/* Bayer bits 18,19 if needed */
338#define C0_EOF_VSYNC 0x00400000 /* Generate EOF by VSYNC */ 338#define C0_EOF_VSYNC 0x00400000 /* Generate EOF by VSYNC */
339#define C0_VEDGE_CTRL 0x00800000 /* Detect falling edge of VSYNC */ 339#define C0_VEDGE_CTRL 0x00800000 /* Detect falling edge of VSYNC */