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authorDedy Lansky <dlansky@codeaurora.org>2018-01-21 04:14:39 -0500
committerKalle Valo <kvalo@codeaurora.org>2018-01-25 00:32:08 -0500
commit2a0efe6a32ac3792da7a8c94a17fa65541983de7 (patch)
tree0bb152d2828837388cb1f02d17eed2fe892e0566
parent4276d7711e7ccf4d0c0d6dae4ff8a5828269d59b (diff)
wil6210: support flashless device
Talyn device supports boot without flash. Driver detects flashless device and in this case waits for ready indication from HW machine (instead of bootloader ready indication). Also in this case, MAC address is retrieved from OTP. Signed-off-by: Dedy Lansky <dlansky@codeaurora.org> Signed-off-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
-rw-r--r--drivers/net/wireless/ath/wil6210/main.c95
-rw-r--r--drivers/net/wireless/ath/wil6210/pcie_bus.c8
-rw-r--r--drivers/net/wireless/ath/wil6210/wil6210.h13
3 files changed, 87 insertions, 29 deletions
diff --git a/drivers/net/wireless/ath/wil6210/main.c b/drivers/net/wireless/ath/wil6210/main.c
index aa6f9c4a21f1..f6cca0ffbca4 100644
--- a/drivers/net/wireless/ath/wil6210/main.c
+++ b/drivers/net/wireless/ath/wil6210/main.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 * 4 *
4 * Permission to use, copy, modify, and/or distribute this software for any 5 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above 6 * purpose with or without fee is hereby granted, provided that the above
@@ -670,7 +671,7 @@ static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
670 } 671 }
671} 672}
672 673
673static int wil_target_reset(struct wil6210_priv *wil) 674static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
674{ 675{
675 int delay = 0; 676 int delay = 0;
676 u32 x, x1 = 0; 677 u32 x, x1 = 0;
@@ -684,9 +685,11 @@ static int wil_target_reset(struct wil6210_priv *wil)
684 685
685 wil_halt_cpu(wil); 686 wil_halt_cpu(wil);
686 687
687 /* clear all boot loader "ready" bits */ 688 if (!no_flash)
688 wil_w(wil, RGF_USER_BL + 689 /* clear all boot loader "ready" bits */
689 offsetof(struct bl_dedicated_registers_v0, boot_loader_ready), 0); 690 wil_w(wil, RGF_USER_BL +
691 offsetof(struct bl_dedicated_registers_v0,
692 boot_loader_ready), 0);
690 /* Clear Fw Download notification */ 693 /* Clear Fw Download notification */
691 wil_c(wil, RGF_USER_USAGE_6, BIT(0)); 694 wil_c(wil, RGF_USER_USAGE_6, BIT(0));
692 695
@@ -727,21 +730,33 @@ static int wil_target_reset(struct wil6210_priv *wil)
727 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0); 730 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
728 731
729 /* wait until device ready. typical time is 20..80 msec */ 732 /* wait until device ready. typical time is 20..80 msec */
730 do { 733 if (no_flash)
731 msleep(RST_DELAY); 734 do {
732 x = wil_r(wil, RGF_USER_BL + 735 msleep(RST_DELAY);
733 offsetof(struct bl_dedicated_registers_v0, 736 x = wil_r(wil, USER_EXT_USER_PMU_3);
734 boot_loader_ready)); 737 if (delay++ > RST_COUNT) {
735 if (x1 != x) { 738 wil_err(wil, "Reset not completed, PMU_3 0x%08x\n",
736 wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n", x1, x); 739 x);
737 x1 = x; 740 return -ETIME;
738 } 741 }
739 if (delay++ > RST_COUNT) { 742 } while ((x & BIT_PMU_DEVICE_RDY) == 0);
740 wil_err(wil, "Reset not completed, bl.ready 0x%08x\n", 743 else
741 x); 744 do {
742 return -ETIME; 745 msleep(RST_DELAY);
743 } 746 x = wil_r(wil, RGF_USER_BL +
744 } while (x != BL_READY); 747 offsetof(struct bl_dedicated_registers_v0,
748 boot_loader_ready));
749 if (x1 != x) {
750 wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
751 x1, x);
752 x1 = x;
753 }
754 if (delay++ > RST_COUNT) {
755 wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
756 x);
757 return -ETIME;
758 }
759 } while (x != BL_READY);
745 760
746 wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD); 761 wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
747 762
@@ -906,6 +921,27 @@ static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
906 } 921 }
907} 922}
908 923
924static int wil_get_otp_info(struct wil6210_priv *wil)
925{
926 struct net_device *ndev = wil_to_ndev(wil);
927 struct wiphy *wiphy = wil_to_wiphy(wil);
928 u8 mac[8];
929
930 wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(RGF_OTP_MAC),
931 sizeof(mac));
932 if (!is_valid_ether_addr(mac)) {
933 wil_err(wil, "Invalid MAC %pM\n", mac);
934 return -EINVAL;
935 }
936
937 ether_addr_copy(ndev->perm_addr, mac);
938 ether_addr_copy(wiphy->perm_addr, mac);
939 if (!is_valid_ether_addr(ndev->dev_addr))
940 ether_addr_copy(ndev->dev_addr, mac);
941
942 return 0;
943}
944
909static int wil_wait_for_fw_ready(struct wil6210_priv *wil) 945static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
910{ 946{
911 ulong to = msecs_to_jiffies(1000); 947 ulong to = msecs_to_jiffies(1000);
@@ -999,6 +1035,7 @@ int wil_reset(struct wil6210_priv *wil, bool load_fw)
999{ 1035{
1000 int rc; 1036 int rc;
1001 unsigned long status_flags = BIT(wil_status_resetting); 1037 unsigned long status_flags = BIT(wil_status_resetting);
1038 int no_flash;
1002 1039
1003 wil_dbg_misc(wil, "reset\n"); 1040 wil_dbg_misc(wil, "reset\n");
1004 1041
@@ -1074,20 +1111,28 @@ int wil_reset(struct wil6210_priv *wil, bool load_fw)
1074 flush_workqueue(wil->wq_service); 1111 flush_workqueue(wil->wq_service);
1075 flush_workqueue(wil->wmi_wq); 1112 flush_workqueue(wil->wmi_wq);
1076 1113
1077 wil_bl_crash_info(wil, false); 1114 no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
1115 if (!no_flash)
1116 wil_bl_crash_info(wil, false);
1078 wil_disable_irq(wil); 1117 wil_disable_irq(wil);
1079 rc = wil_target_reset(wil); 1118 rc = wil_target_reset(wil, no_flash);
1080 wil6210_clear_irq(wil); 1119 wil6210_clear_irq(wil);
1081 wil_enable_irq(wil); 1120 wil_enable_irq(wil);
1082 wil_rx_fini(wil); 1121 wil_rx_fini(wil);
1083 if (rc) { 1122 if (rc) {
1084 wil_bl_crash_info(wil, true); 1123 if (!no_flash)
1124 wil_bl_crash_info(wil, true);
1085 goto out; 1125 goto out;
1086 } 1126 }
1087 1127
1088 rc = wil_get_bl_info(wil); 1128 if (no_flash) {
1089 if (rc == -EAGAIN && !load_fw) /* ignore RF error if not going up */ 1129 rc = wil_get_otp_info(wil);
1090 rc = 0; 1130 } else {
1131 rc = wil_get_bl_info(wil);
1132 if (rc == -EAGAIN && !load_fw)
1133 /* ignore RF error if not going up */
1134 rc = 0;
1135 }
1091 if (rc) 1136 if (rc)
1092 goto out; 1137 goto out;
1093 1138
diff --git a/drivers/net/wireless/ath/wil6210/pcie_bus.c b/drivers/net/wireless/ath/wil6210/pcie_bus.c
index 6b153fece5b8..ab8cb91b7984 100644
--- a/drivers/net/wireless/ath/wil6210/pcie_bus.c
+++ b/drivers/net/wireless/ath/wil6210/pcie_bus.c
@@ -44,7 +44,7 @@ int wil_set_capabilities(struct wil6210_priv *wil)
44 RGF_USER_REVISION_ID_MASK); 44 RGF_USER_REVISION_ID_MASK);
45 int platform_capa; 45 int platform_capa;
46 46
47 bitmap_zero(wil->hw_capabilities, hw_capability_last); 47 bitmap_zero(wil->hw_capa, hw_capa_last);
48 bitmap_zero(wil->fw_capabilities, WMI_FW_CAPABILITY_MAX); 48 bitmap_zero(wil->fw_capabilities, WMI_FW_CAPABILITY_MAX);
49 bitmap_zero(wil->platform_capa, WIL_PLATFORM_CAPA_MAX); 49 bitmap_zero(wil->platform_capa, WIL_PLATFORM_CAPA_MAX);
50 wil->wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_DEFAULT : 50 wil->wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_DEFAULT :
@@ -83,6 +83,9 @@ int wil_set_capabilities(struct wil6210_priv *wil)
83 memcpy(fw_mapping, talyn_fw_mapping, sizeof(talyn_fw_mapping)); 83 memcpy(fw_mapping, talyn_fw_mapping, sizeof(talyn_fw_mapping));
84 wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE; 84 wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE;
85 wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE; 85 wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE;
86 if (wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1) &
87 BIT_NO_FLASH_INDICATION)
88 set_bit(hw_capa_no_flash, wil->hw_capa);
86 break; 89 break;
87 default: 90 default:
88 wil_err(wil, "Unknown board hardware, chip_id 0x%08x, chip_revision 0x%08x\n", 91 wil_err(wil, "Unknown board hardware, chip_id 0x%08x, chip_revision 0x%08x\n",
@@ -92,7 +95,8 @@ int wil_set_capabilities(struct wil6210_priv *wil)
92 return -EINVAL; 95 return -EINVAL;
93 } 96 }
94 97
95 wil_info(wil, "Board hardware is %s\n", wil->hw_name); 98 wil_info(wil, "Board hardware is %s, flash %sexist\n", wil->hw_name,
99 test_bit(hw_capa_no_flash, wil->hw_capa) ? "doesn't " : "");
96 100
97 /* Get platform capabilities */ 101 /* Get platform capabilities */
98 if (wil->platform_ops.get_capa) { 102 if (wil->platform_ops.get_capa) {
diff --git a/drivers/net/wireless/ath/wil6210/wil6210.h b/drivers/net/wireless/ath/wil6210/wil6210.h
index 79356bbd367e..2273a0550a82 100644
--- a/drivers/net/wireless/ath/wil6210/wil6210.h
+++ b/drivers/net/wireless/ath/wil6210/wil6210.h
@@ -195,6 +195,8 @@ struct RGF_ICR {
195#define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 195#define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
196#define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */ 196#define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
197 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2) 197 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
198#define RGF_USER_OTP_HW_RD_MACHINE_1 (0x880ce0)
199 #define BIT_NO_FLASH_INDICATION BIT(8)
198 200
199#define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 201#define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
200 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 202 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
@@ -285,6 +287,9 @@ struct RGF_ICR {
285#define RGF_CAF_PLL_LOCK_STATUS (0x88afec) 287#define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
286 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0) 288 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
287 289
290#define USER_EXT_USER_PMU_3 (0x88d00c)
291 #define BIT_PMU_DEVICE_RDY BIT(0)
292
288#define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */ 293#define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
289 #define JTAG_DEV_ID_SPARROW (0x2632072f) 294 #define JTAG_DEV_ID_SPARROW (0x2632072f)
290 #define JTAG_DEV_ID_TALYN (0x7e0e1) 295 #define JTAG_DEV_ID_TALYN (0x7e0e1)
@@ -294,6 +299,8 @@ struct RGF_ICR {
294 #define REVISION_ID_SPARROW_B0 (0x0) 299 #define REVISION_ID_SPARROW_B0 (0x0)
295 #define REVISION_ID_SPARROW_D0 (0x3) 300 #define REVISION_ID_SPARROW_D0 (0x3)
296 301
302#define RGF_OTP_MAC (0x8a0620)
303
297/* crash codes for FW/Ucode stored here */ 304/* crash codes for FW/Ucode stored here */
298 305
299/* ASSERT RGFs */ 306/* ASSERT RGFs */
@@ -583,7 +590,8 @@ enum {
583}; 590};
584 591
585enum { 592enum {
586 hw_capability_last 593 hw_capa_no_flash,
594 hw_capa_last
587}; 595};
588 596
589struct wil_probe_client_req { 597struct wil_probe_client_req {
@@ -659,7 +667,8 @@ struct wil6210_priv {
659 u8 chip_revision; 667 u8 chip_revision;
660 const char *hw_name; 668 const char *hw_name;
661 const char *wil_fw_name; 669 const char *wil_fw_name;
662 DECLARE_BITMAP(hw_capabilities, hw_capability_last); 670 char *board_file;
671 DECLARE_BITMAP(hw_capa, hw_capa_last);
663 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX); 672 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX);
664 DECLARE_BITMAP(platform_capa, WIL_PLATFORM_CAPA_MAX); 673 DECLARE_BITMAP(platform_capa, WIL_PLATFORM_CAPA_MAX);
665 u8 n_mids; /* number of additional MIDs as reported by FW */ 674 u8 n_mids; /* number of additional MIDs as reported by FW */