diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2017-01-26 09:28:02 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2017-01-26 09:28:02 -0500 |
commit | 283a981387c498f846e89450bd83b2c349223b4f (patch) | |
tree | 5513aa9484e354f8ab1a5cbd6cac5b1fd3cfd4e6 | |
parent | 6596e59e63cd4c0c0b787ce8c1e8bdd1d957b16e (diff) | |
parent | 2956b5d94a76b596fa5057c2b3ca915cb27d7652 (diff) |
Merge branch 'ib-pinctrl-genprops' of /home/linus/linux-pinctrl into devel
47 files changed, 392 insertions, 257 deletions
diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt index 747c721776ed..ad8f0c0cd13f 100644 --- a/Documentation/gpio/driver.txt +++ b/Documentation/gpio/driver.txt | |||
@@ -146,10 +146,11 @@ a pull-up resistor is needed on the outgoing rail to complete the circuit, and | |||
146 | in the second case, a pull-down resistor is needed on the rail. | 146 | in the second case, a pull-down resistor is needed on the rail. |
147 | 147 | ||
148 | Hardware that supports open drain or open source or both, can implement a | 148 | Hardware that supports open drain or open source or both, can implement a |
149 | special callback in the gpio_chip: .set_single_ended() that takes an enum flag | 149 | special callback in the gpio_chip: .set_config() that takes a generic |
150 | telling whether to configure the line as open drain, open source or push-pull. | 150 | pinconf packed value telling whether to configure the line as open drain, |
151 | This will happen in response to the GPIO_OPEN_DRAIN or GPIO_OPEN_SOURCE flag | 151 | open source or push-pull. This will happen in response to the |
152 | set in the machine file, or coming from other hardware descriptions. | 152 | GPIO_OPEN_DRAIN or GPIO_OPEN_SOURCE flag set in the machine file, or coming |
153 | from other hardware descriptions. | ||
153 | 154 | ||
154 | If this state can not be configured in hardware, i.e. if the GPIO hardware does | 155 | If this state can not be configured in hardware, i.e. if the GPIO hardware does |
155 | not support open drain/open source in hardware, the GPIO library will instead | 156 | not support open drain/open source in hardware, the GPIO library will instead |
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c index 3d1cf018e8e7..41d0ac142580 100644 --- a/drivers/gpio/gpio-bcm-kona.c +++ b/drivers/gpio/gpio-bcm-kona.c | |||
@@ -308,6 +308,18 @@ static int bcm_kona_gpio_set_debounce(struct gpio_chip *chip, unsigned gpio, | |||
308 | return 0; | 308 | return 0; |
309 | } | 309 | } |
310 | 310 | ||
311 | static int bcm_kona_gpio_set_config(struct gpio_chip *chip, unsigned gpio, | ||
312 | unsigned long config) | ||
313 | { | ||
314 | u32 debounce; | ||
315 | |||
316 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
317 | return -ENOTSUPP; | ||
318 | |||
319 | debounce = pinconf_to_config_argument(config); | ||
320 | return bcm_kona_gpio_set_debounce(chip, gpio, debounce); | ||
321 | } | ||
322 | |||
311 | static const struct gpio_chip template_chip = { | 323 | static const struct gpio_chip template_chip = { |
312 | .label = "bcm-kona-gpio", | 324 | .label = "bcm-kona-gpio", |
313 | .owner = THIS_MODULE, | 325 | .owner = THIS_MODULE, |
@@ -318,7 +330,7 @@ static const struct gpio_chip template_chip = { | |||
318 | .get = bcm_kona_gpio_get, | 330 | .get = bcm_kona_gpio_get, |
319 | .direction_output = bcm_kona_gpio_direction_output, | 331 | .direction_output = bcm_kona_gpio_direction_output, |
320 | .set = bcm_kona_gpio_set, | 332 | .set = bcm_kona_gpio_set, |
321 | .set_debounce = bcm_kona_gpio_set_debounce, | 333 | .set_config = bcm_kona_gpio_set_config, |
322 | .to_irq = bcm_kona_gpio_to_irq, | 334 | .to_irq = bcm_kona_gpio_to_irq, |
323 | .base = 0, | 335 | .base = 0, |
324 | }; | 336 | }; |
diff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c index 5d38b08d1ee2..aecb847166f5 100644 --- a/drivers/gpio/gpio-dln2.c +++ b/drivers/gpio/gpio-dln2.c | |||
@@ -272,12 +272,16 @@ static int dln2_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |||
272 | return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_OUT); | 272 | return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_OUT); |
273 | } | 273 | } |
274 | 274 | ||
275 | static int dln2_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | 275 | static int dln2_gpio_set_config(struct gpio_chip *chip, unsigned offset, |
276 | unsigned debounce) | 276 | unsigned long config) |
277 | { | 277 | { |
278 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); | 278 | struct dln2_gpio *dln2 = gpiochip_get_data(chip); |
279 | __le32 duration = cpu_to_le32(debounce); | 279 | __le32 duration; |
280 | 280 | ||
281 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
282 | return -ENOTSUPP; | ||
283 | |||
284 | duration = cpu_to_le32(pinconf_to_config_argument(config)); | ||
281 | return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE, | 285 | return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_SET_DEBOUNCE, |
282 | &duration, sizeof(duration)); | 286 | &duration, sizeof(duration)); |
283 | } | 287 | } |
@@ -474,7 +478,7 @@ static int dln2_gpio_probe(struct platform_device *pdev) | |||
474 | dln2->gpio.get_direction = dln2_gpio_get_direction; | 478 | dln2->gpio.get_direction = dln2_gpio_get_direction; |
475 | dln2->gpio.direction_input = dln2_gpio_direction_input; | 479 | dln2->gpio.direction_input = dln2_gpio_direction_input; |
476 | dln2->gpio.direction_output = dln2_gpio_direction_output; | 480 | dln2->gpio.direction_output = dln2_gpio_direction_output; |
477 | dln2->gpio.set_debounce = dln2_gpio_set_debounce; | 481 | dln2->gpio.set_config = dln2_gpio_set_config; |
478 | 482 | ||
479 | platform_set_drvdata(pdev, dln2); | 483 | platform_set_drvdata(pdev, dln2); |
480 | 484 | ||
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index 6193f62c0df4..9c15ee4ef4e9 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c | |||
@@ -279,6 +279,18 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc, | |||
279 | return 0; | 279 | return 0; |
280 | } | 280 | } |
281 | 281 | ||
282 | static int dwapb_gpio_set_config(struct gpio_chip *gc, unsigned offset, | ||
283 | unsigned long config) | ||
284 | { | ||
285 | u32 debounce; | ||
286 | |||
287 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
288 | return -ENOTSUPP; | ||
289 | |||
290 | debounce = pinconf_to_config_argument(config); | ||
291 | return dwapb_gpio_set_debounce(gc, offset, debounce); | ||
292 | } | ||
293 | |||
282 | static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id) | 294 | static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id) |
283 | { | 295 | { |
284 | u32 worked; | 296 | u32 worked; |
@@ -426,7 +438,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, | |||
426 | 438 | ||
427 | /* Only port A support debounce */ | 439 | /* Only port A support debounce */ |
428 | if (pp->idx == 0) | 440 | if (pp->idx == 0) |
429 | port->gc.set_debounce = dwapb_gpio_set_debounce; | 441 | port->gc.set_config = dwapb_gpio_set_config; |
430 | 442 | ||
431 | if (pp->irq) | 443 | if (pp->irq) |
432 | dwapb_configure_irqs(gpio, port, pp); | 444 | dwapb_configure_irqs(gpio, port, pp); |
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c index d054219e18b9..45d384039e9b 100644 --- a/drivers/gpio/gpio-ep93xx.c +++ b/drivers/gpio/gpio-ep93xx.c | |||
@@ -291,15 +291,20 @@ static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = { | |||
291 | EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false), | 291 | EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false), |
292 | }; | 292 | }; |
293 | 293 | ||
294 | static int ep93xx_gpio_set_debounce(struct gpio_chip *chip, | 294 | static int ep93xx_gpio_set_config(struct gpio_chip *chip, unsigned offset, |
295 | unsigned offset, unsigned debounce) | 295 | unsigned long config) |
296 | { | 296 | { |
297 | int gpio = chip->base + offset; | 297 | int gpio = chip->base + offset; |
298 | int irq = gpio_to_irq(gpio); | 298 | int irq = gpio_to_irq(gpio); |
299 | u32 debounce; | ||
300 | |||
301 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
302 | return -ENOTSUPP; | ||
299 | 303 | ||
300 | if (irq < 0) | 304 | if (irq < 0) |
301 | return -EINVAL; | 305 | return -EINVAL; |
302 | 306 | ||
307 | debounce = pinconf_to_config_argument(config); | ||
303 | ep93xx_gpio_int_debounce(irq, debounce ? true : false); | 308 | ep93xx_gpio_int_debounce(irq, debounce ? true : false); |
304 | 309 | ||
305 | return 0; | 310 | return 0; |
@@ -335,7 +340,7 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev, | |||
335 | gc->base = bank->base; | 340 | gc->base = bank->base; |
336 | 341 | ||
337 | if (bank->has_debounce) { | 342 | if (bank->has_debounce) { |
338 | gc->set_debounce = ep93xx_gpio_set_debounce; | 343 | gc->set_config = ep93xx_gpio_set_config; |
339 | gc->to_irq = ep93xx_gpio_to_irq; | 344 | gc->to_irq = ep93xx_gpio_to_irq; |
340 | } | 345 | } |
341 | 346 | ||
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c index e8accde62aa7..56bd76c33767 100644 --- a/drivers/gpio/gpio-f7188x.c +++ b/drivers/gpio/gpio-f7188x.c | |||
@@ -131,9 +131,8 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset); | |||
131 | static int f7188x_gpio_direction_out(struct gpio_chip *chip, | 131 | static int f7188x_gpio_direction_out(struct gpio_chip *chip, |
132 | unsigned offset, int value); | 132 | unsigned offset, int value); |
133 | static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); | 133 | static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); |
134 | static int f7188x_gpio_set_single_ended(struct gpio_chip *gc, | 134 | static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset, |
135 | unsigned offset, | 135 | unsigned long config); |
136 | enum single_ended_mode mode); | ||
137 | 136 | ||
138 | #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ | 137 | #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ |
139 | { \ | 138 | { \ |
@@ -145,7 +144,7 @@ static int f7188x_gpio_set_single_ended(struct gpio_chip *gc, | |||
145 | .get = f7188x_gpio_get, \ | 144 | .get = f7188x_gpio_get, \ |
146 | .direction_output = f7188x_gpio_direction_out, \ | 145 | .direction_output = f7188x_gpio_direction_out, \ |
147 | .set = f7188x_gpio_set, \ | 146 | .set = f7188x_gpio_set, \ |
148 | .set_single_ended = f7188x_gpio_set_single_ended, \ | 147 | .set_config = f7188x_gpio_set_config, \ |
149 | .base = _base, \ | 148 | .base = _base, \ |
150 | .ngpio = _ngpio, \ | 149 | .ngpio = _ngpio, \ |
151 | .can_sleep = true, \ | 150 | .can_sleep = true, \ |
@@ -326,17 +325,17 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
326 | superio_exit(sio->addr); | 325 | superio_exit(sio->addr); |
327 | } | 326 | } |
328 | 327 | ||
329 | static int f7188x_gpio_set_single_ended(struct gpio_chip *chip, | 328 | static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset, |
330 | unsigned offset, | 329 | unsigned long config) |
331 | enum single_ended_mode mode) | ||
332 | { | 330 | { |
333 | int err; | 331 | int err; |
332 | enum pin_config_param param = pinconf_to_config_param(config); | ||
334 | struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); | 333 | struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); |
335 | struct f7188x_sio *sio = bank->data->sio; | 334 | struct f7188x_sio *sio = bank->data->sio; |
336 | u8 data; | 335 | u8 data; |
337 | 336 | ||
338 | if (mode != LINE_MODE_OPEN_DRAIN && | 337 | if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN && |
339 | mode != LINE_MODE_PUSH_PULL) | 338 | param != PIN_CONFIG_DRIVE_PUSH_PULL) |
340 | return -ENOTSUPP; | 339 | return -ENOTSUPP; |
341 | 340 | ||
342 | err = superio_enter(sio->addr); | 341 | err = superio_enter(sio->addr); |
@@ -345,7 +344,7 @@ static int f7188x_gpio_set_single_ended(struct gpio_chip *chip, | |||
345 | superio_select(sio->addr, SIO_LD_GPIO); | 344 | superio_select(sio->addr, SIO_LD_GPIO); |
346 | 345 | ||
347 | data = superio_inb(sio->addr, gpio_out_mode(bank->regbase)); | 346 | data = superio_inb(sio->addr, gpio_out_mode(bank->regbase)); |
348 | if (mode == LINE_MODE_OPEN_DRAIN) | 347 | if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN) |
349 | data &= ~BIT(offset); | 348 | data &= ~BIT(offset); |
350 | else | 349 | else |
351 | data |= BIT(offset); | 350 | data |= BIT(offset); |
diff --git a/drivers/gpio/gpio-lp873x.c b/drivers/gpio/gpio-lp873x.c index 218c706359aa..df0ad2cef0d2 100644 --- a/drivers/gpio/gpio-lp873x.c +++ b/drivers/gpio/gpio-lp873x.c | |||
@@ -100,21 +100,21 @@ static int lp873x_gpio_request(struct gpio_chip *gc, unsigned int offset) | |||
100 | return 0; | 100 | return 0; |
101 | } | 101 | } |
102 | 102 | ||
103 | static int lp873x_gpio_set_single_ended(struct gpio_chip *gc, | 103 | static int lp873x_gpio_set_config(struct gpio_chip *gc, unsigned offset, |
104 | unsigned int offset, | 104 | unsigned long config) |
105 | enum single_ended_mode mode) | ||
106 | { | 105 | { |
107 | struct lp873x_gpio *gpio = gpiochip_get_data(gc); | 106 | struct lp873x_gpio *gpio = gpiochip_get_data(gc); |
108 | 107 | ||
109 | switch (mode) { | 108 | switch (pinconf_to_config_param(config)) { |
110 | case LINE_MODE_OPEN_DRAIN: | 109 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
111 | return regmap_update_bits(gpio->lp873->regmap, | 110 | return regmap_update_bits(gpio->lp873->regmap, |
112 | LP873X_REG_GPO_CTRL, | 111 | LP873X_REG_GPO_CTRL, |
113 | BIT(offset * BITS_PER_GPO + | 112 | BIT(offset * BITS_PER_GPO + |
114 | LP873X_GPO_CTRL_OD), | 113 | LP873X_GPO_CTRL_OD), |
115 | BIT(offset * BITS_PER_GPO + | 114 | BIT(offset * BITS_PER_GPO + |
116 | LP873X_GPO_CTRL_OD)); | 115 | LP873X_GPO_CTRL_OD)); |
117 | case LINE_MODE_PUSH_PULL: | 116 | |
117 | case PIN_CONFIG_DRIVE_PUSH_PULL: | ||
118 | return regmap_update_bits(gpio->lp873->regmap, | 118 | return regmap_update_bits(gpio->lp873->regmap, |
119 | LP873X_REG_GPO_CTRL, | 119 | LP873X_REG_GPO_CTRL, |
120 | BIT(offset * BITS_PER_GPO + | 120 | BIT(offset * BITS_PER_GPO + |
@@ -133,7 +133,7 @@ static const struct gpio_chip template_chip = { | |||
133 | .direction_output = lp873x_gpio_direction_output, | 133 | .direction_output = lp873x_gpio_direction_output, |
134 | .get = lp873x_gpio_get, | 134 | .get = lp873x_gpio_get, |
135 | .set = lp873x_gpio_set, | 135 | .set = lp873x_gpio_set, |
136 | .set_single_ended = lp873x_gpio_set_single_ended, | 136 | .set_config = lp873x_gpio_set_config, |
137 | .base = -1, | 137 | .base = -1, |
138 | .ngpio = 2, | 138 | .ngpio = 2, |
139 | .can_sleep = true, | 139 | .can_sleep = true, |
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c index ec8de4190db9..743459d9477d 100644 --- a/drivers/gpio/gpio-max77620.c +++ b/drivers/gpio/gpio-max77620.c | |||
@@ -152,11 +152,10 @@ static int max77620_gpio_dir_output(struct gpio_chip *gc, unsigned int offset, | |||
152 | return ret; | 152 | return ret; |
153 | } | 153 | } |
154 | 154 | ||
155 | static int max77620_gpio_set_debounce(struct gpio_chip *gc, | 155 | static int max77620_gpio_set_debounce(struct max77620_gpio *mgpio, |
156 | unsigned int offset, | 156 | unsigned int offset, |
157 | unsigned int debounce) | 157 | unsigned int debounce) |
158 | { | 158 | { |
159 | struct max77620_gpio *mgpio = gpiochip_get_data(gc); | ||
160 | u8 val; | 159 | u8 val; |
161 | int ret; | 160 | int ret; |
162 | 161 | ||
@@ -202,21 +201,23 @@ static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset, | |||
202 | dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret); | 201 | dev_err(mgpio->dev, "CNFG_GPIO_OUT update failed: %d\n", ret); |
203 | } | 202 | } |
204 | 203 | ||
205 | static int max77620_gpio_set_single_ended(struct gpio_chip *gc, | 204 | static int max77620_gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
206 | unsigned int offset, | 205 | unsigned long config) |
207 | enum single_ended_mode mode) | ||
208 | { | 206 | { |
209 | struct max77620_gpio *mgpio = gpiochip_get_data(gc); | 207 | struct max77620_gpio *mgpio = gpiochip_get_data(gc); |
210 | 208 | ||
211 | switch (mode) { | 209 | switch (pinconf_to_config_param(config)) { |
212 | case LINE_MODE_OPEN_DRAIN: | 210 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
213 | return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset), | 211 | return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset), |
214 | MAX77620_CNFG_GPIO_DRV_MASK, | 212 | MAX77620_CNFG_GPIO_DRV_MASK, |
215 | MAX77620_CNFG_GPIO_DRV_OPENDRAIN); | 213 | MAX77620_CNFG_GPIO_DRV_OPENDRAIN); |
216 | case LINE_MODE_PUSH_PULL: | 214 | case PIN_CONFIG_DRIVE_PUSH_PULL: |
217 | return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset), | 215 | return regmap_update_bits(mgpio->rmap, GPIO_REG_ADDR(offset), |
218 | MAX77620_CNFG_GPIO_DRV_MASK, | 216 | MAX77620_CNFG_GPIO_DRV_MASK, |
219 | MAX77620_CNFG_GPIO_DRV_PUSHPULL); | 217 | MAX77620_CNFG_GPIO_DRV_PUSHPULL); |
218 | case PIN_CONFIG_INPUT_DEBOUNCE: | ||
219 | return max77620_gpio_set_debounce(mgpio, offset, | ||
220 | pinconf_to_config_argument(config)); | ||
220 | default: | 221 | default: |
221 | break; | 222 | break; |
222 | } | 223 | } |
@@ -257,9 +258,8 @@ static int max77620_gpio_probe(struct platform_device *pdev) | |||
257 | mgpio->gpio_chip.direction_input = max77620_gpio_dir_input; | 258 | mgpio->gpio_chip.direction_input = max77620_gpio_dir_input; |
258 | mgpio->gpio_chip.get = max77620_gpio_get; | 259 | mgpio->gpio_chip.get = max77620_gpio_get; |
259 | mgpio->gpio_chip.direction_output = max77620_gpio_dir_output; | 260 | mgpio->gpio_chip.direction_output = max77620_gpio_dir_output; |
260 | mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce; | ||
261 | mgpio->gpio_chip.set = max77620_gpio_set; | 261 | mgpio->gpio_chip.set = max77620_gpio_set; |
262 | mgpio->gpio_chip.set_single_ended = max77620_gpio_set_single_ended; | 262 | mgpio->gpio_chip.set_config = max77620_gpio_set_config; |
263 | mgpio->gpio_chip.to_irq = max77620_gpio_to_irq; | 263 | mgpio->gpio_chip.to_irq = max77620_gpio_to_irq; |
264 | mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR; | 264 | mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR; |
265 | mgpio->gpio_chip.can_sleep = 1; | 265 | mgpio->gpio_chip.can_sleep = 1; |
diff --git a/drivers/gpio/gpio-menz127.c b/drivers/gpio/gpio-menz127.c index a1210e330571..e1037582e34d 100644 --- a/drivers/gpio/gpio-menz127.c +++ b/drivers/gpio/gpio-menz127.c | |||
@@ -89,22 +89,18 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio, | |||
89 | 89 | ||
90 | static int men_z127_set_single_ended(struct gpio_chip *gc, | 90 | static int men_z127_set_single_ended(struct gpio_chip *gc, |
91 | unsigned offset, | 91 | unsigned offset, |
92 | enum single_ended_mode mode) | 92 | enum pin_config_param param) |
93 | { | 93 | { |
94 | struct men_z127_gpio *priv = gpiochip_get_data(gc); | 94 | struct men_z127_gpio *priv = gpiochip_get_data(gc); |
95 | u32 od_en; | 95 | u32 od_en; |
96 | 96 | ||
97 | if (mode != LINE_MODE_OPEN_DRAIN && | ||
98 | mode != LINE_MODE_PUSH_PULL) | ||
99 | return -ENOTSUPP; | ||
100 | |||
101 | spin_lock(&gc->bgpio_lock); | 97 | spin_lock(&gc->bgpio_lock); |
102 | od_en = readl(priv->reg_base + MEN_Z127_ODER); | 98 | od_en = readl(priv->reg_base + MEN_Z127_ODER); |
103 | 99 | ||
104 | if (mode == LINE_MODE_OPEN_DRAIN) | 100 | if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN) |
105 | od_en |= BIT(offset); | 101 | od_en |= BIT(offset); |
106 | else | 102 | else |
107 | /* Implicitly LINE_MODE_PUSH_PULL */ | 103 | /* Implicitly PIN_CONFIG_DRIVE_PUSH_PULL */ |
108 | od_en &= ~BIT(offset); | 104 | od_en &= ~BIT(offset); |
109 | 105 | ||
110 | writel(od_en, priv->reg_base + MEN_Z127_ODER); | 106 | writel(od_en, priv->reg_base + MEN_Z127_ODER); |
@@ -113,6 +109,27 @@ static int men_z127_set_single_ended(struct gpio_chip *gc, | |||
113 | return 0; | 109 | return 0; |
114 | } | 110 | } |
115 | 111 | ||
112 | static int men_z127_set_config(struct gpio_chip *gc, unsigned offset, | ||
113 | unsigned long config) | ||
114 | { | ||
115 | enum pin_config_param param = pinconf_to_config_param(config); | ||
116 | |||
117 | switch (param) { | ||
118 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: | ||
119 | case PIN_CONFIG_DRIVE_PUSH_PULL: | ||
120 | return men_z127_set_single_ended(gc, offset, param); | ||
121 | |||
122 | case PIN_CONFIG_INPUT_DEBOUNCE: | ||
123 | return men_z127_debounce(gc, offset, | ||
124 | pinconf_to_config_argument(config)); | ||
125 | |||
126 | default: | ||
127 | break; | ||
128 | } | ||
129 | |||
130 | return -ENOTSUPP; | ||
131 | } | ||
132 | |||
116 | static int men_z127_probe(struct mcb_device *mdev, | 133 | static int men_z127_probe(struct mcb_device *mdev, |
117 | const struct mcb_device_id *id) | 134 | const struct mcb_device_id *id) |
118 | { | 135 | { |
@@ -149,8 +166,7 @@ static int men_z127_probe(struct mcb_device *mdev, | |||
149 | if (ret) | 166 | if (ret) |
150 | goto err_unmap; | 167 | goto err_unmap; |
151 | 168 | ||
152 | men_z127_gpio->gc.set_debounce = men_z127_debounce; | 169 | men_z127_gpio->gc.set_config = men_z127_set_config; |
153 | men_z127_gpio->gc.set_single_ended = men_z127_set_single_ended; | ||
154 | 170 | ||
155 | ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio); | 171 | ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio); |
156 | if (ret) { | 172 | if (ret) { |
diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c index 69e0f4ace465..f40088d268c1 100644 --- a/drivers/gpio/gpio-merrifield.c +++ b/drivers/gpio/gpio-merrifield.c | |||
@@ -190,6 +190,18 @@ static int mrfld_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, | |||
190 | return 0; | 190 | return 0; |
191 | } | 191 | } |
192 | 192 | ||
193 | static int mrfld_gpio_set_config(struct gpio_chip *chip, unsigned int offset, | ||
194 | unsigned long config) | ||
195 | { | ||
196 | u32 debounce; | ||
197 | |||
198 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
199 | return -ENOTSUPP; | ||
200 | |||
201 | debounce = pinconf_to_config_argument(config); | ||
202 | return mrfld_gpio_set_debounce(chip, offset, debounce); | ||
203 | } | ||
204 | |||
193 | static void mrfld_irq_ack(struct irq_data *d) | 205 | static void mrfld_irq_ack(struct irq_data *d) |
194 | { | 206 | { |
195 | struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d); | 207 | struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d); |
@@ -414,7 +426,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id | |||
414 | priv->chip.get = mrfld_gpio_get; | 426 | priv->chip.get = mrfld_gpio_get; |
415 | priv->chip.set = mrfld_gpio_set; | 427 | priv->chip.set = mrfld_gpio_set; |
416 | priv->chip.get_direction = mrfld_gpio_get_direction; | 428 | priv->chip.get_direction = mrfld_gpio_get_direction; |
417 | priv->chip.set_debounce = mrfld_gpio_set_debounce; | 429 | priv->chip.set_config = mrfld_gpio_set_config; |
418 | priv->chip.base = gpio_base; | 430 | priv->chip.base = gpio_base; |
419 | priv->chip.ngpio = MRFLD_NGPIO; | 431 | priv->chip.ngpio = MRFLD_NGPIO; |
420 | priv->chip.can_sleep = false; | 432 | priv->chip.can_sleep = false; |
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index b98ede78c9d8..efc85a279d54 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -974,6 +974,18 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, | |||
974 | return 0; | 974 | return 0; |
975 | } | 975 | } |
976 | 976 | ||
977 | static int omap_gpio_set_config(struct gpio_chip *chip, unsigned offset, | ||
978 | unsigned long config) | ||
979 | { | ||
980 | u32 debounce; | ||
981 | |||
982 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
983 | return -ENOTSUPP; | ||
984 | |||
985 | debounce = pinconf_to_config_argument(config); | ||
986 | return omap_gpio_debounce(chip, offset, debounce); | ||
987 | } | ||
988 | |||
977 | static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 989 | static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
978 | { | 990 | { |
979 | struct gpio_bank *bank; | 991 | struct gpio_bank *bank; |
@@ -1045,7 +1057,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) | |||
1045 | bank->chip.direction_input = omap_gpio_input; | 1057 | bank->chip.direction_input = omap_gpio_input; |
1046 | bank->chip.get = omap_gpio_get; | 1058 | bank->chip.get = omap_gpio_get; |
1047 | bank->chip.direction_output = omap_gpio_output; | 1059 | bank->chip.direction_output = omap_gpio_output; |
1048 | bank->chip.set_debounce = omap_gpio_debounce; | 1060 | bank->chip.set_config = omap_gpio_set_config; |
1049 | bank->chip.set = omap_gpio_set; | 1061 | bank->chip.set = omap_gpio_set; |
1050 | if (bank->is_mpuio) { | 1062 | if (bank->is_mpuio) { |
1051 | bank->chip.label = "mpuio"; | 1063 | bank->chip.label = "mpuio"; |
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c index be97101c2c9a..433b45ef332e 100644 --- a/drivers/gpio/gpio-tc3589x.c +++ b/drivers/gpio/gpio-tc3589x.c | |||
@@ -100,9 +100,8 @@ static int tc3589x_gpio_get_direction(struct gpio_chip *chip, | |||
100 | return !(ret & BIT(pos)); | 100 | return !(ret & BIT(pos)); |
101 | } | 101 | } |
102 | 102 | ||
103 | static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip, | 103 | static int tc3589x_gpio_set_config(struct gpio_chip *chip, unsigned int offset, |
104 | unsigned int offset, | 104 | unsigned long config) |
105 | enum single_ended_mode mode) | ||
106 | { | 105 | { |
107 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); | 106 | struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); |
108 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; | 107 | struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; |
@@ -116,22 +115,22 @@ static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip, | |||
116 | unsigned int pos = offset % 8; | 115 | unsigned int pos = offset % 8; |
117 | int ret; | 116 | int ret; |
118 | 117 | ||
119 | switch(mode) { | 118 | switch (pinconf_to_config_param(config)) { |
120 | case LINE_MODE_OPEN_DRAIN: | 119 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
121 | /* Set open drain mode */ | 120 | /* Set open drain mode */ |
122 | ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0); | 121 | ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0); |
123 | if (ret) | 122 | if (ret) |
124 | return ret; | 123 | return ret; |
125 | /* Enable open drain/source mode */ | 124 | /* Enable open drain/source mode */ |
126 | return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); | 125 | return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); |
127 | case LINE_MODE_OPEN_SOURCE: | 126 | case PIN_CONFIG_DRIVE_OPEN_SOURCE: |
128 | /* Set open source mode */ | 127 | /* Set open source mode */ |
129 | ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos)); | 128 | ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos)); |
130 | if (ret) | 129 | if (ret) |
131 | return ret; | 130 | return ret; |
132 | /* Enable open drain/source mode */ | 131 | /* Enable open drain/source mode */ |
133 | return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); | 132 | return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos)); |
134 | case LINE_MODE_PUSH_PULL: | 133 | case PIN_CONFIG_DRIVE_PUSH_PULL: |
135 | /* Disable open drain/source mode */ | 134 | /* Disable open drain/source mode */ |
136 | return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0); | 135 | return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0); |
137 | default: | 136 | default: |
@@ -148,7 +147,7 @@ static const struct gpio_chip template_chip = { | |||
148 | .direction_output = tc3589x_gpio_direction_output, | 147 | .direction_output = tc3589x_gpio_direction_output, |
149 | .direction_input = tc3589x_gpio_direction_input, | 148 | .direction_input = tc3589x_gpio_direction_input, |
150 | .get_direction = tc3589x_gpio_get_direction, | 149 | .get_direction = tc3589x_gpio_get_direction, |
151 | .set_single_ended = tc3589x_gpio_set_single_ended, | 150 | .set_config = tc3589x_gpio_set_config, |
152 | .can_sleep = true, | 151 | .can_sleep = true, |
153 | }; | 152 | }; |
154 | 153 | ||
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 661b0e34e067..88529d3c06c9 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c | |||
@@ -238,6 +238,18 @@ static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset, | |||
238 | return 0; | 238 | return 0; |
239 | } | 239 | } |
240 | 240 | ||
241 | static int tegra_gpio_set_config(struct gpio_chip *chip, unsigned int offset, | ||
242 | unsigned long config) | ||
243 | { | ||
244 | u32 debounce; | ||
245 | |||
246 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
247 | return -ENOTSUPP; | ||
248 | |||
249 | debounce = pinconf_to_config_argument(config); | ||
250 | return tegra_gpio_set_debounce(chip, offset, debounce); | ||
251 | } | ||
252 | |||
241 | static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 253 | static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
242 | { | 254 | { |
243 | struct tegra_gpio_info *tgi = gpiochip_get_data(chip); | 255 | struct tegra_gpio_info *tgi = gpiochip_get_data(chip); |
@@ -615,7 +627,7 @@ static int tegra_gpio_probe(struct platform_device *pdev) | |||
615 | platform_set_drvdata(pdev, tgi); | 627 | platform_set_drvdata(pdev, tgi); |
616 | 628 | ||
617 | if (config->debounce_supported) | 629 | if (config->debounce_supported) |
618 | tgi->gc.set_debounce = tegra_gpio_set_debounce; | 630 | tgi->gc.set_config = tegra_gpio_set_config; |
619 | 631 | ||
620 | tgi->bank_info = devm_kzalloc(&pdev->dev, tgi->bank_count * | 632 | tgi->bank_info = devm_kzalloc(&pdev->dev, tgi->bank_count * |
621 | sizeof(*tgi->bank_info), GFP_KERNEL); | 633 | sizeof(*tgi->bank_info), GFP_KERNEL); |
diff --git a/drivers/gpio/gpio-tps65218.c b/drivers/gpio/gpio-tps65218.c index 46e6dcc089cb..a379bba57d31 100644 --- a/drivers/gpio/gpio-tps65218.c +++ b/drivers/gpio/gpio-tps65218.c | |||
@@ -139,28 +139,28 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset) | |||
139 | return 0; | 139 | return 0; |
140 | } | 140 | } |
141 | 141 | ||
142 | static int tps65218_gpio_set_single_ended(struct gpio_chip *gc, | 142 | static int tps65218_gpio_set_config(struct gpio_chip *gc, unsigned offset, |
143 | unsigned offset, | 143 | unsigned long config) |
144 | enum single_ended_mode mode) | ||
145 | { | 144 | { |
146 | struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc); | 145 | struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc); |
147 | struct tps65218 *tps65218 = tps65218_gpio->tps65218; | 146 | struct tps65218 *tps65218 = tps65218_gpio->tps65218; |
147 | enum pin_config_param param = pinconf_to_config_param(config); | ||
148 | 148 | ||
149 | switch (offset) { | 149 | switch (offset) { |
150 | case 0: | 150 | case 0: |
151 | case 2: | 151 | case 2: |
152 | /* GPO1 is hardwired to be open drain */ | 152 | /* GPO1 is hardwired to be open drain */ |
153 | if (mode == LINE_MODE_OPEN_DRAIN) | 153 | if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN) |
154 | return 0; | 154 | return 0; |
155 | return -ENOTSUPP; | 155 | return -ENOTSUPP; |
156 | case 1: | 156 | case 1: |
157 | /* GPO2 is push-pull by default, can be set as open drain. */ | 157 | /* GPO2 is push-pull by default, can be set as open drain. */ |
158 | if (mode == LINE_MODE_OPEN_DRAIN) | 158 | if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN) |
159 | return tps65218_clear_bits(tps65218, | 159 | return tps65218_clear_bits(tps65218, |
160 | TPS65218_REG_CONFIG1, | 160 | TPS65218_REG_CONFIG1, |
161 | TPS65218_CONFIG1_GPO2_BUF, | 161 | TPS65218_CONFIG1_GPO2_BUF, |
162 | TPS65218_PROTECT_L1); | 162 | TPS65218_PROTECT_L1); |
163 | if (mode == LINE_MODE_PUSH_PULL) | 163 | if (param == PIN_CONFIG_DRIVE_PUSH_PULL) |
164 | return tps65218_set_bits(tps65218, | 164 | return tps65218_set_bits(tps65218, |
165 | TPS65218_REG_CONFIG1, | 165 | TPS65218_REG_CONFIG1, |
166 | TPS65218_CONFIG1_GPO2_BUF, | 166 | TPS65218_CONFIG1_GPO2_BUF, |
@@ -181,7 +181,7 @@ static const struct gpio_chip template_chip = { | |||
181 | .direction_input = tps65218_gpio_input, | 181 | .direction_input = tps65218_gpio_input, |
182 | .get = tps65218_gpio_get, | 182 | .get = tps65218_gpio_get, |
183 | .set = tps65218_gpio_set, | 183 | .set = tps65218_gpio_set, |
184 | .set_single_ended = tps65218_gpio_set_single_ended, | 184 | .set_config = tps65218_gpio_set_config, |
185 | .can_sleep = true, | 185 | .can_sleep = true, |
186 | .ngpio = 3, | 186 | .ngpio = 3, |
187 | .base = -1, | 187 | .base = -1, |
diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c index 4e450121129b..98a6f1fcc561 100644 --- a/drivers/gpio/gpio-vx855.c +++ b/drivers/gpio/gpio-vx855.c | |||
@@ -186,23 +186,24 @@ static int vx855gpio_direction_output(struct gpio_chip *gpio, | |||
186 | return 0; | 186 | return 0; |
187 | } | 187 | } |
188 | 188 | ||
189 | static int vx855gpio_set_single_ended(struct gpio_chip *gpio, | 189 | static int vx855gpio_set_config(struct gpio_chip *gpio, unsigned int nr, |
190 | unsigned int nr, | 190 | unsigned long config) |
191 | enum single_ended_mode mode) | ||
192 | { | 191 | { |
192 | enum pin_config_param param = pinconf_to_config_param(config); | ||
193 | |||
193 | /* The GPI cannot be single-ended */ | 194 | /* The GPI cannot be single-ended */ |
194 | if (nr < NR_VX855_GPI) | 195 | if (nr < NR_VX855_GPI) |
195 | return -EINVAL; | 196 | return -EINVAL; |
196 | 197 | ||
197 | /* The GPO's are push-pull */ | 198 | /* The GPO's are push-pull */ |
198 | if (nr < NR_VX855_GPInO) { | 199 | if (nr < NR_VX855_GPInO) { |
199 | if (mode != LINE_MODE_PUSH_PULL) | 200 | if (param != PIN_CONFIG_DRIVE_PUSH_PULL) |
200 | return -ENOTSUPP; | 201 | return -ENOTSUPP; |
201 | return 0; | 202 | return 0; |
202 | } | 203 | } |
203 | 204 | ||
204 | /* The GPIO's are open drain */ | 205 | /* The GPIO's are open drain */ |
205 | if (mode != LINE_MODE_OPEN_DRAIN) | 206 | if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN) |
206 | return -ENOTSUPP; | 207 | return -ENOTSUPP; |
207 | 208 | ||
208 | return 0; | 209 | return 0; |
@@ -231,7 +232,7 @@ static void vx855gpio_gpio_setup(struct vx855_gpio *vg) | |||
231 | c->direction_output = vx855gpio_direction_output; | 232 | c->direction_output = vx855gpio_direction_output; |
232 | c->get = vx855gpio_get; | 233 | c->get = vx855gpio_get; |
233 | c->set = vx855gpio_set; | 234 | c->set = vx855gpio_set; |
234 | c->set_single_ended = vx855gpio_set_single_ended; | 235 | c->set_config = vx855gpio_set_config, |
235 | c->dbg_show = NULL; | 236 | c->dbg_show = NULL; |
236 | c->base = 0; | 237 | c->base = 0; |
237 | c->ngpio = NR_VX855_GP; | 238 | c->ngpio = NR_VX855_GP; |
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c index 34baee5b1dd6..97613de5304e 100644 --- a/drivers/gpio/gpio-wcove.c +++ b/drivers/gpio/gpio-wcove.c | |||
@@ -202,17 +202,16 @@ static void wcove_gpio_set(struct gpio_chip *chip, | |||
202 | regmap_update_bits(wg->regmap, to_reg(gpio, CTRL_OUT), 1, 0); | 202 | regmap_update_bits(wg->regmap, to_reg(gpio, CTRL_OUT), 1, 0); |
203 | } | 203 | } |
204 | 204 | ||
205 | static int wcove_gpio_set_single_ended(struct gpio_chip *chip, | 205 | static int wcove_gpio_set_config(struct gpio_chip *chip, unsigned int gpio, |
206 | unsigned int gpio, | 206 | unsigned long config) |
207 | enum single_ended_mode mode) | ||
208 | { | 207 | { |
209 | struct wcove_gpio *wg = gpiochip_get_data(chip); | 208 | struct wcove_gpio *wg = gpiochip_get_data(chip); |
210 | 209 | ||
211 | switch (mode) { | 210 | switch (pinconf_to_config_param(config)) { |
212 | case LINE_MODE_OPEN_DRAIN: | 211 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
213 | return regmap_update_bits(wg->regmap, to_reg(gpio, CTRL_OUT), | 212 | return regmap_update_bits(wg->regmap, to_reg(gpio, CTRL_OUT), |
214 | CTLO_DRV_MASK, CTLO_DRV_OD); | 213 | CTLO_DRV_MASK, CTLO_DRV_OD); |
215 | case LINE_MODE_PUSH_PULL: | 214 | case PIN_CONFIG_DRIVE_PUSH_PULL: |
216 | return regmap_update_bits(wg->regmap, to_reg(gpio, CTRL_OUT), | 215 | return regmap_update_bits(wg->regmap, to_reg(gpio, CTRL_OUT), |
217 | CTLO_DRV_MASK, CTLO_DRV_CMOS); | 216 | CTLO_DRV_MASK, CTLO_DRV_CMOS); |
218 | default: | 217 | default: |
@@ -411,7 +410,7 @@ static int wcove_gpio_probe(struct platform_device *pdev) | |||
411 | wg->chip.get_direction = wcove_gpio_get_direction; | 410 | wg->chip.get_direction = wcove_gpio_get_direction; |
412 | wg->chip.get = wcove_gpio_get; | 411 | wg->chip.get = wcove_gpio_get; |
413 | wg->chip.set = wcove_gpio_set; | 412 | wg->chip.set = wcove_gpio_set; |
414 | wg->chip.set_single_ended = wcove_gpio_set_single_ended, | 413 | wg->chip.set_config = wcove_gpio_set_config, |
415 | wg->chip.base = -1; | 414 | wg->chip.base = -1; |
416 | wg->chip.ngpio = WCOVE_VGPIO_NUM; | 415 | wg->chip.ngpio = WCOVE_VGPIO_NUM; |
417 | wg->chip.can_sleep = true; | 416 | wg->chip.can_sleep = true; |
diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c index 533707f943f4..00e3839b3f96 100644 --- a/drivers/gpio/gpio-wm831x.c +++ b/drivers/gpio/gpio-wm831x.c | |||
@@ -101,11 +101,9 @@ static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
101 | WM831X_IRQ_GPIO_1 + offset); | 101 | WM831X_IRQ_GPIO_1 + offset); |
102 | } | 102 | } |
103 | 103 | ||
104 | static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | 104 | static int wm831x_gpio_set_debounce(struct wm831x *wm831x, unsigned offset, |
105 | unsigned debounce) | 105 | unsigned debounce) |
106 | { | 106 | { |
107 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); | ||
108 | struct wm831x *wm831x = wm831x_gpio->wm831x; | ||
109 | int reg = WM831X_GPIO1_CONTROL + offset; | 107 | int reg = WM831X_GPIO1_CONTROL + offset; |
110 | int ret, fn; | 108 | int ret, fn; |
111 | 109 | ||
@@ -132,21 +130,23 @@ static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | |||
132 | return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn); | 130 | return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn); |
133 | } | 131 | } |
134 | 132 | ||
135 | static int wm831x_set_single_ended(struct gpio_chip *chip, | 133 | static int wm831x_set_config(struct gpio_chip *chip, unsigned int offset, |
136 | unsigned int offset, | 134 | unsigned long config) |
137 | enum single_ended_mode mode) | ||
138 | { | 135 | { |
139 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); | 136 | struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip); |
140 | struct wm831x *wm831x = wm831x_gpio->wm831x; | 137 | struct wm831x *wm831x = wm831x_gpio->wm831x; |
141 | int reg = WM831X_GPIO1_CONTROL + offset; | 138 | int reg = WM831X_GPIO1_CONTROL + offset; |
142 | 139 | ||
143 | switch (mode) { | 140 | switch (pinconf_to_config_param(config)) { |
144 | case LINE_MODE_OPEN_DRAIN: | 141 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
145 | return wm831x_set_bits(wm831x, reg, | 142 | return wm831x_set_bits(wm831x, reg, |
146 | WM831X_GPN_OD_MASK, WM831X_GPN_OD); | 143 | WM831X_GPN_OD_MASK, WM831X_GPN_OD); |
147 | case LINE_MODE_PUSH_PULL: | 144 | case PIN_CONFIG_DRIVE_PUSH_PULL: |
148 | return wm831x_set_bits(wm831x, reg, | 145 | return wm831x_set_bits(wm831x, reg, |
149 | WM831X_GPN_OD_MASK, 0); | 146 | WM831X_GPN_OD_MASK, 0); |
147 | case PIN_CONFIG_INPUT_DEBOUNCE: | ||
148 | return wm831x_gpio_set_debounce(wm831x, offset, | ||
149 | pinconf_to_config_argument(config)); | ||
150 | default: | 150 | default: |
151 | break; | 151 | break; |
152 | } | 152 | } |
@@ -255,8 +255,7 @@ static const struct gpio_chip template_chip = { | |||
255 | .direction_output = wm831x_gpio_direction_out, | 255 | .direction_output = wm831x_gpio_direction_out, |
256 | .set = wm831x_gpio_set, | 256 | .set = wm831x_gpio_set, |
257 | .to_irq = wm831x_gpio_to_irq, | 257 | .to_irq = wm831x_gpio_to_irq, |
258 | .set_debounce = wm831x_gpio_set_debounce, | 258 | .set_config = wm831x_set_config, |
259 | .set_single_ended = wm831x_set_single_ended, | ||
260 | .dbg_show = wm831x_gpio_dbg_show, | 259 | .dbg_show = wm831x_gpio_dbg_show, |
261 | .can_sleep = true, | 260 | .can_sleep = true, |
262 | }; | 261 | }; |
diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c index 68410fda6138..1e35756ac55b 100644 --- a/drivers/gpio/gpio-wm8994.c +++ b/drivers/gpio/gpio-wm8994.c | |||
@@ -103,19 +103,18 @@ static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
103 | wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value); | 103 | wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value); |
104 | } | 104 | } |
105 | 105 | ||
106 | static int wm8994_gpio_set_single_ended(struct gpio_chip *chip, | 106 | static int wm8994_gpio_set_config(struct gpio_chip *chip, unsigned int offset, |
107 | unsigned int offset, | 107 | unsigned long config) |
108 | enum single_ended_mode mode) | ||
109 | { | 108 | { |
110 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); | 109 | struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); |
111 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; | 110 | struct wm8994 *wm8994 = wm8994_gpio->wm8994; |
112 | 111 | ||
113 | switch (mode) { | 112 | switch (pinconf_to_config_param(config)) { |
114 | case LINE_MODE_OPEN_DRAIN: | 113 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
115 | return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, | 114 | return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, |
116 | WM8994_GPN_OP_CFG_MASK, | 115 | WM8994_GPN_OP_CFG_MASK, |
117 | WM8994_GPN_OP_CFG); | 116 | WM8994_GPN_OP_CFG); |
118 | case LINE_MODE_PUSH_PULL: | 117 | case PIN_CONFIG_DRIVE_PUSH_PULL: |
119 | return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, | 118 | return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, |
120 | WM8994_GPN_OP_CFG_MASK, 0); | 119 | WM8994_GPN_OP_CFG_MASK, 0); |
121 | default: | 120 | default: |
@@ -257,7 +256,7 @@ static const struct gpio_chip template_chip = { | |||
257 | .get = wm8994_gpio_get, | 256 | .get = wm8994_gpio_get, |
258 | .direction_output = wm8994_gpio_direction_out, | 257 | .direction_output = wm8994_gpio_direction_out, |
259 | .set = wm8994_gpio_set, | 258 | .set = wm8994_gpio_set, |
260 | .set_single_ended = wm8994_gpio_set_single_ended, | 259 | .set_config = wm8994_gpio_set_config, |
261 | .to_irq = wm8994_gpio_to_irq, | 260 | .to_irq = wm8994_gpio_to_irq, |
262 | .dbg_show = wm8994_gpio_dbg_show, | 261 | .dbg_show = wm8994_gpio_dbg_show, |
263 | .can_sleep = true, | 262 | .can_sleep = true, |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 14ee088c80dd..18a173fc4a21 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -1875,6 +1875,19 @@ void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset) | |||
1875 | } | 1875 | } |
1876 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | 1876 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); |
1877 | 1877 | ||
1878 | /** | ||
1879 | * gpiochip_generic_config() - apply configuration for a pin | ||
1880 | * @chip: the gpiochip owning the GPIO | ||
1881 | * @offset: the offset of the GPIO to apply the configuration | ||
1882 | * @config: the configuration to be applied | ||
1883 | */ | ||
1884 | int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, | ||
1885 | unsigned long config) | ||
1886 | { | ||
1887 | return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config); | ||
1888 | } | ||
1889 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | ||
1890 | |||
1878 | #ifdef CONFIG_PINCTRL | 1891 | #ifdef CONFIG_PINCTRL |
1879 | 1892 | ||
1880 | /** | 1893 | /** |
@@ -2263,6 +2276,14 @@ int gpiod_direction_input(struct gpio_desc *desc) | |||
2263 | } | 2276 | } |
2264 | EXPORT_SYMBOL_GPL(gpiod_direction_input); | 2277 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
2265 | 2278 | ||
2279 | static int gpio_set_drive_single_ended(struct gpio_chip *gc, unsigned offset, | ||
2280 | enum pin_config_param mode) | ||
2281 | { | ||
2282 | unsigned long config = { PIN_CONF_PACKED(mode, 0) }; | ||
2283 | |||
2284 | return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP; | ||
2285 | } | ||
2286 | |||
2266 | static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) | 2287 | static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) |
2267 | { | 2288 | { |
2268 | struct gpio_chip *gc = desc->gdev->chip; | 2289 | struct gpio_chip *gc = desc->gdev->chip; |
@@ -2279,32 +2300,25 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |||
2279 | 2300 | ||
2280 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | 2301 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { |
2281 | /* First see if we can enable open drain in hardware */ | 2302 | /* First see if we can enable open drain in hardware */ |
2282 | if (gc->set_single_ended) { | 2303 | ret = gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc), |
2283 | ret = gc->set_single_ended(gc, gpio_chip_hwgpio(desc), | 2304 | PIN_CONFIG_DRIVE_OPEN_DRAIN); |
2284 | LINE_MODE_OPEN_DRAIN); | 2305 | if (!ret) |
2285 | if (!ret) | 2306 | goto set_output_value; |
2286 | goto set_output_value; | ||
2287 | } | ||
2288 | /* Emulate open drain by not actively driving the line high */ | 2307 | /* Emulate open drain by not actively driving the line high */ |
2289 | if (val) | 2308 | if (val) |
2290 | return gpiod_direction_input(desc); | 2309 | return gpiod_direction_input(desc); |
2291 | } | 2310 | } |
2292 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | 2311 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { |
2293 | if (gc->set_single_ended) { | 2312 | ret = gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc), |
2294 | ret = gc->set_single_ended(gc, gpio_chip_hwgpio(desc), | 2313 | PIN_CONFIG_DRIVE_OPEN_SOURCE); |
2295 | LINE_MODE_OPEN_SOURCE); | 2314 | if (!ret) |
2296 | if (!ret) | 2315 | goto set_output_value; |
2297 | goto set_output_value; | ||
2298 | } | ||
2299 | /* Emulate open source by not actively driving the line low */ | 2316 | /* Emulate open source by not actively driving the line low */ |
2300 | if (!val) | 2317 | if (!val) |
2301 | return gpiod_direction_input(desc); | 2318 | return gpiod_direction_input(desc); |
2302 | } else { | 2319 | } else { |
2303 | /* Make sure to disable open drain/source hardware, if any */ | 2320 | gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc), |
2304 | if (gc->set_single_ended) | 2321 | PIN_CONFIG_DRIVE_PUSH_PULL); |
2305 | gc->set_single_ended(gc, | ||
2306 | gpio_chip_hwgpio(desc), | ||
2307 | LINE_MODE_PUSH_PULL); | ||
2308 | } | 2322 | } |
2309 | 2323 | ||
2310 | set_output_value: | 2324 | set_output_value: |
@@ -2375,17 +2389,19 @@ EXPORT_SYMBOL_GPL(gpiod_direction_output); | |||
2375 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) | 2389 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) |
2376 | { | 2390 | { |
2377 | struct gpio_chip *chip; | 2391 | struct gpio_chip *chip; |
2392 | unsigned long config; | ||
2378 | 2393 | ||
2379 | VALIDATE_DESC(desc); | 2394 | VALIDATE_DESC(desc); |
2380 | chip = desc->gdev->chip; | 2395 | chip = desc->gdev->chip; |
2381 | if (!chip->set || !chip->set_debounce) { | 2396 | if (!chip->set || !chip->set_config) { |
2382 | gpiod_dbg(desc, | 2397 | gpiod_dbg(desc, |
2383 | "%s: missing set() or set_debounce() operations\n", | 2398 | "%s: missing set() or set_config() operations\n", |
2384 | __func__); | 2399 | __func__); |
2385 | return -ENOTSUPP; | 2400 | return -ENOTSUPP; |
2386 | } | 2401 | } |
2387 | 2402 | ||
2388 | return chip->set_debounce(chip, gpio_chip_hwgpio(desc), debounce); | 2403 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
2404 | return chip->set_config(chip, gpio_chip_hwgpio(desc), config); | ||
2389 | } | 2405 | } |
2390 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); | 2406 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
2391 | 2407 | ||
diff --git a/drivers/pinctrl/bcm/pinctrl-bcm281xx.c b/drivers/pinctrl/bcm/pinctrl-bcm281xx.c index a5331fdfc795..810a81786f62 100644 --- a/drivers/pinctrl/bcm/pinctrl-bcm281xx.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm281xx.c | |||
@@ -1106,7 +1106,7 @@ static int bcm281xx_std_pin_update(struct pinctrl_dev *pctldev, | |||
1106 | struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | 1106 | struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); |
1107 | int i; | 1107 | int i; |
1108 | enum pin_config_param param; | 1108 | enum pin_config_param param; |
1109 | u16 arg; | 1109 | u32 arg; |
1110 | 1110 | ||
1111 | for (i = 0; i < num_configs; i++) { | 1111 | for (i = 0; i < num_configs; i++) { |
1112 | param = pinconf_to_config_param(configs[i]); | 1112 | param = pinconf_to_config_param(configs[i]); |
@@ -1222,7 +1222,7 @@ static int bcm281xx_i2c_pin_update(struct pinctrl_dev *pctldev, | |||
1222 | struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | 1222 | struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); |
1223 | int i, j; | 1223 | int i, j; |
1224 | enum pin_config_param param; | 1224 | enum pin_config_param param; |
1225 | u16 arg; | 1225 | u32 arg; |
1226 | 1226 | ||
1227 | for (i = 0; i < num_configs; i++) { | 1227 | for (i = 0; i < num_configs; i++) { |
1228 | param = pinconf_to_config_param(configs[i]); | 1228 | param = pinconf_to_config_param(configs[i]); |
@@ -1292,7 +1292,7 @@ static int bcm281xx_hdmi_pin_update(struct pinctrl_dev *pctldev, | |||
1292 | struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | 1292 | struct bcm281xx_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); |
1293 | int i; | 1293 | int i; |
1294 | enum pin_config_param param; | 1294 | enum pin_config_param param; |
1295 | u16 arg; | 1295 | u32 arg; |
1296 | 1296 | ||
1297 | for (i = 0; i < num_configs; i++) { | 1297 | for (i = 0; i < num_configs; i++) { |
1298 | param = pinconf_to_config_param(configs[i]); | 1298 | param = pinconf_to_config_param(configs[i]); |
diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c index 5d1e505c3c63..3ca925dfefd1 100644 --- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | |||
@@ -619,7 +619,7 @@ static int iproc_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
619 | { | 619 | { |
620 | struct iproc_gpio *chip = pinctrl_dev_get_drvdata(pctldev); | 620 | struct iproc_gpio *chip = pinctrl_dev_get_drvdata(pctldev); |
621 | enum pin_config_param param; | 621 | enum pin_config_param param; |
622 | u16 arg; | 622 | u32 arg; |
623 | unsigned i, gpio = iproc_pin_to_gpio(pin); | 623 | unsigned i, gpio = iproc_pin_to_gpio(pin); |
624 | int ret = -ENOTSUPP; | 624 | int ret = -ENOTSUPP; |
625 | 625 | ||
diff --git a/drivers/pinctrl/bcm/pinctrl-ns2-mux.c b/drivers/pinctrl/bcm/pinctrl-ns2-mux.c index 13a4c2774157..4b5cf0e0f16e 100644 --- a/drivers/pinctrl/bcm/pinctrl-ns2-mux.c +++ b/drivers/pinctrl/bcm/pinctrl-ns2-mux.c | |||
@@ -703,7 +703,7 @@ static int ns2_pin_get_enable(struct pinctrl_dev *pctrldev, unsigned int pin) | |||
703 | } | 703 | } |
704 | 704 | ||
705 | static int ns2_pin_set_slew(struct pinctrl_dev *pctrldev, unsigned int pin, | 705 | static int ns2_pin_set_slew(struct pinctrl_dev *pctrldev, unsigned int pin, |
706 | u16 slew) | 706 | u32 slew) |
707 | { | 707 | { |
708 | struct ns2_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrldev); | 708 | struct ns2_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrldev); |
709 | struct ns2_pin *pin_data = pctrldev->desc->pins[pin].drv_data; | 709 | struct ns2_pin *pin_data = pctrldev->desc->pins[pin].drv_data; |
@@ -793,7 +793,7 @@ static void ns2_pin_get_pull(struct pinctrl_dev *pctrldev, | |||
793 | } | 793 | } |
794 | 794 | ||
795 | static int ns2_pin_set_strength(struct pinctrl_dev *pctrldev, unsigned int pin, | 795 | static int ns2_pin_set_strength(struct pinctrl_dev *pctrldev, unsigned int pin, |
796 | u16 strength) | 796 | u32 strength) |
797 | { | 797 | { |
798 | struct ns2_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrldev); | 798 | struct ns2_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrldev); |
799 | struct ns2_pin *pin_data = pctrldev->desc->pins[pin].drv_data; | 799 | struct ns2_pin *pin_data = pctrldev->desc->pins[pin].drv_data; |
@@ -904,7 +904,7 @@ static int ns2_pin_config_set(struct pinctrl_dev *pctrldev, unsigned int pin, | |||
904 | struct ns2_pin *pin_data = pctrldev->desc->pins[pin].drv_data; | 904 | struct ns2_pin *pin_data = pctrldev->desc->pins[pin].drv_data; |
905 | enum pin_config_param param; | 905 | enum pin_config_param param; |
906 | unsigned int i; | 906 | unsigned int i; |
907 | u16 arg; | 907 | u32 arg; |
908 | int ret = -ENOTSUPP; | 908 | int ret = -ENOTSUPP; |
909 | 909 | ||
910 | if (pin_data->pin_conf.base == -1) | 910 | if (pin_data->pin_conf.base == -1) |
diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c index c8deb8be1da7..91ea32dc1e7f 100644 --- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | |||
@@ -366,7 +366,7 @@ static const struct pinctrl_ops nsp_pctrl_ops = { | |||
366 | .dt_free_map = pinctrl_utils_free_map, | 366 | .dt_free_map = pinctrl_utils_free_map, |
367 | }; | 367 | }; |
368 | 368 | ||
369 | static int nsp_gpio_set_slew(struct nsp_gpio *chip, unsigned gpio, u16 slew) | 369 | static int nsp_gpio_set_slew(struct nsp_gpio *chip, unsigned gpio, u32 slew) |
370 | { | 370 | { |
371 | if (slew) | 371 | if (slew) |
372 | nsp_set_bit(chip, IO_CTRL, NSP_GPIO_SLEW_RATE_EN, gpio, true); | 372 | nsp_set_bit(chip, IO_CTRL, NSP_GPIO_SLEW_RATE_EN, gpio, true); |
@@ -403,7 +403,7 @@ static void nsp_gpio_get_pull(struct nsp_gpio *chip, unsigned gpio, | |||
403 | } | 403 | } |
404 | 404 | ||
405 | static int nsp_gpio_set_strength(struct nsp_gpio *chip, unsigned gpio, | 405 | static int nsp_gpio_set_strength(struct nsp_gpio *chip, unsigned gpio, |
406 | u16 strength) | 406 | u32 strength) |
407 | { | 407 | { |
408 | u32 offset, shift, i; | 408 | u32 offset, shift, i; |
409 | u32 val; | 409 | u32 val; |
@@ -522,7 +522,7 @@ static int nsp_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
522 | { | 522 | { |
523 | struct nsp_gpio *chip = pinctrl_dev_get_drvdata(pctldev); | 523 | struct nsp_gpio *chip = pinctrl_dev_get_drvdata(pctldev); |
524 | enum pin_config_param param; | 524 | enum pin_config_param param; |
525 | u16 arg; | 525 | u32 arg; |
526 | unsigned int i, gpio; | 526 | unsigned int i, gpio; |
527 | int ret = -ENOTSUPP; | 527 | int ret = -ENOTSUPP; |
528 | 528 | ||
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index fb38e208f32d..597d4641e348 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c | |||
@@ -688,6 +688,35 @@ int pinctrl_gpio_direction_output(unsigned gpio) | |||
688 | } | 688 | } |
689 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | 689 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); |
690 | 690 | ||
691 | /** | ||
692 | * pinctrl_gpio_set_config() - Apply config to given GPIO pin | ||
693 | * @gpio: the GPIO pin number from the GPIO subsystem number space | ||
694 | * @config: the configuration to apply to the GPIO | ||
695 | * | ||
696 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, if | ||
697 | * they need to call the underlying pin controller to change GPIO config | ||
698 | * (for example set debounce time). | ||
699 | */ | ||
700 | int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) | ||
701 | { | ||
702 | unsigned long configs[] = { config }; | ||
703 | struct pinctrl_gpio_range *range; | ||
704 | struct pinctrl_dev *pctldev; | ||
705 | int ret, pin; | ||
706 | |||
707 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | ||
708 | if (ret) | ||
709 | return ret; | ||
710 | |||
711 | mutex_lock(&pctldev->mutex); | ||
712 | pin = gpio_to_pin(range, gpio); | ||
713 | ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs)); | ||
714 | mutex_unlock(&pctldev->mutex); | ||
715 | |||
716 | return ret; | ||
717 | } | ||
718 | EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); | ||
719 | |||
691 | static struct pinctrl_state *find_state(struct pinctrl *p, | 720 | static struct pinctrl_state *find_state(struct pinctrl *p, |
692 | const char *name) | 721 | const char *name) |
693 | { | 722 | { |
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 5e66860a5e67..f80134e3e0b6 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c | |||
@@ -1059,7 +1059,7 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned pin, | |||
1059 | } | 1059 | } |
1060 | 1060 | ||
1061 | static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, | 1061 | static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned pin, |
1062 | enum pin_config_param param, u16 arg) | 1062 | enum pin_config_param param, u32 arg) |
1063 | { | 1063 | { |
1064 | void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); | 1064 | void __iomem *reg = chv_padreg(pctrl, pin, CHV_PADCTRL0); |
1065 | unsigned long flags; | 1065 | unsigned long flags; |
@@ -1151,7 +1151,7 @@ static int chv_config_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
1151 | struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); | 1151 | struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); |
1152 | enum pin_config_param param; | 1152 | enum pin_config_param param; |
1153 | int i, ret; | 1153 | int i, ret; |
1154 | u16 arg; | 1154 | u32 arg; |
1155 | 1155 | ||
1156 | if (chv_pad_locked(pctrl, pin)) | 1156 | if (chv_pad_locked(pctrl, pin)) |
1157 | return -EBUSY; | 1157 | return -EBUSY; |
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index f9aef2ac03a1..3cf384f8b122 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c | |||
@@ -1054,6 +1054,18 @@ static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | |||
1054 | return 0; | 1054 | return 0; |
1055 | } | 1055 | } |
1056 | 1056 | ||
1057 | static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned offset, | ||
1058 | unsigned long config) | ||
1059 | { | ||
1060 | u32 debounce; | ||
1061 | |||
1062 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
1063 | return -ENOTSUPP; | ||
1064 | |||
1065 | debounce = pinconf_to_config_argument(config); | ||
1066 | return mtk_gpio_set_debounce(chip, offset, debounce); | ||
1067 | } | ||
1068 | |||
1057 | static const struct gpio_chip mtk_gpio_chip = { | 1069 | static const struct gpio_chip mtk_gpio_chip = { |
1058 | .owner = THIS_MODULE, | 1070 | .owner = THIS_MODULE, |
1059 | .request = gpiochip_generic_request, | 1071 | .request = gpiochip_generic_request, |
@@ -1064,7 +1076,7 @@ static const struct gpio_chip mtk_gpio_chip = { | |||
1064 | .get = mtk_gpio_get, | 1076 | .get = mtk_gpio_get, |
1065 | .set = mtk_gpio_set, | 1077 | .set = mtk_gpio_set, |
1066 | .to_irq = mtk_gpio_to_irq, | 1078 | .to_irq = mtk_gpio_to_irq, |
1067 | .set_debounce = mtk_gpio_set_debounce, | 1079 | .set_config = mtk_gpio_set_config, |
1068 | .of_gpio_n_cells = 2, | 1080 | .of_gpio_n_cells = 2, |
1069 | }; | 1081 | }; |
1070 | 1082 | ||
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index a579126832af..8fbb571f50de 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c | |||
@@ -260,7 +260,6 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin, | |||
260 | enum pin_config_param param; | 260 | enum pin_config_param param; |
261 | unsigned int reg, bit; | 261 | unsigned int reg, bit; |
262 | int i, ret; | 262 | int i, ret; |
263 | u16 arg; | ||
264 | 263 | ||
265 | ret = meson_get_bank(pc, pin, &bank); | 264 | ret = meson_get_bank(pc, pin, &bank); |
266 | if (ret) | 265 | if (ret) |
@@ -268,7 +267,6 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin, | |||
268 | 267 | ||
269 | for (i = 0; i < num_configs; i++) { | 268 | for (i = 0; i < num_configs; i++) { |
270 | param = pinconf_to_config_param(configs[i]); | 269 | param = pinconf_to_config_param(configs[i]); |
271 | arg = pinconf_to_config_argument(configs[i]); | ||
272 | 270 | ||
273 | switch (param) { | 271 | switch (param) { |
274 | case PIN_CONFIG_BIAS_DISABLE: | 272 | case PIN_CONFIG_BIAS_DISABLE: |
diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c index 799048f3c8d4..c1c1ccc58267 100644 --- a/drivers/pinctrl/pinconf.c +++ b/drivers/pinctrl/pinconf.c | |||
@@ -200,6 +200,18 @@ int pinconf_apply_setting(struct pinctrl_setting const *setting) | |||
200 | return 0; | 200 | return 0; |
201 | } | 201 | } |
202 | 202 | ||
203 | int pinconf_set_config(struct pinctrl_dev *pctldev, unsigned pin, | ||
204 | unsigned long *configs, size_t nconfigs) | ||
205 | { | ||
206 | const struct pinconf_ops *ops; | ||
207 | |||
208 | ops = pctldev->desc->confops; | ||
209 | if (!ops) | ||
210 | return -ENOTSUPP; | ||
211 | |||
212 | return ops->pin_config_set(pctldev, pin, configs, nconfigs); | ||
213 | } | ||
214 | |||
203 | #ifdef CONFIG_DEBUG_FS | 215 | #ifdef CONFIG_DEBUG_FS |
204 | 216 | ||
205 | static void pinconf_show_config(struct seq_file *s, struct pinctrl_dev *pctldev, | 217 | static void pinconf_show_config(struct seq_file *s, struct pinctrl_dev *pctldev, |
diff --git a/drivers/pinctrl/pinconf.h b/drivers/pinctrl/pinconf.h index 55c75780b3b2..bf8aff9abf32 100644 --- a/drivers/pinctrl/pinconf.h +++ b/drivers/pinctrl/pinconf.h | |||
@@ -20,6 +20,9 @@ int pinconf_map_to_setting(struct pinctrl_map const *map, | |||
20 | void pinconf_free_setting(struct pinctrl_setting const *setting); | 20 | void pinconf_free_setting(struct pinctrl_setting const *setting); |
21 | int pinconf_apply_setting(struct pinctrl_setting const *setting); | 21 | int pinconf_apply_setting(struct pinctrl_setting const *setting); |
22 | 22 | ||
23 | int pinconf_set_config(struct pinctrl_dev *pctldev, unsigned pin, | ||
24 | unsigned long *configs, size_t nconfigs); | ||
25 | |||
23 | /* | 26 | /* |
24 | * You will only be interested in these if you're using PINCONF | 27 | * You will only be interested in these if you're using PINCONF |
25 | * so don't supply any stubs for these. | 28 | * so don't supply any stubs for these. |
@@ -56,6 +59,12 @@ static inline int pinconf_apply_setting(struct pinctrl_setting const *setting) | |||
56 | return 0; | 59 | return 0; |
57 | } | 60 | } |
58 | 61 | ||
62 | static inline int pinconf_set_config(struct pinctrl_dev *pctldev, unsigned pin, | ||
63 | unsigned long *configs, size_t nconfigs) | ||
64 | { | ||
65 | return -ENOTSUPP; | ||
66 | } | ||
67 | |||
59 | #endif | 68 | #endif |
60 | 69 | ||
61 | #if defined(CONFIG_PINCONF) && defined(CONFIG_DEBUG_FS) | 70 | #if defined(CONFIG_PINCONF) && defined(CONFIG_DEBUG_FS) |
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index aea310a91821..e440665ecc35 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c | |||
@@ -164,6 +164,18 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset, | |||
164 | return ret; | 164 | return ret; |
165 | } | 165 | } |
166 | 166 | ||
167 | static int amd_gpio_set_config(struct gpio_chip *gc, unsigned offset, | ||
168 | unsigned long config) | ||
169 | { | ||
170 | u32 debounce; | ||
171 | |||
172 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
173 | return -ENOTSUPP; | ||
174 | |||
175 | debounce = pinconf_to_config_argument(config); | ||
176 | return amd_gpio_set_debounce(gc, offset, debounce); | ||
177 | } | ||
178 | |||
167 | #ifdef CONFIG_DEBUG_FS | 179 | #ifdef CONFIG_DEBUG_FS |
168 | static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) | 180 | static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) |
169 | { | 181 | { |
@@ -761,7 +773,7 @@ static int amd_gpio_probe(struct platform_device *pdev) | |||
761 | gpio_dev->gc.direction_output = amd_gpio_direction_output; | 773 | gpio_dev->gc.direction_output = amd_gpio_direction_output; |
762 | gpio_dev->gc.get = amd_gpio_get_value; | 774 | gpio_dev->gc.get = amd_gpio_get_value; |
763 | gpio_dev->gc.set = amd_gpio_set_value; | 775 | gpio_dev->gc.set = amd_gpio_set_value; |
764 | gpio_dev->gc.set_debounce = amd_gpio_set_debounce; | 776 | gpio_dev->gc.set_config = amd_gpio_set_config; |
765 | gpio_dev->gc.dbg_show = amd_gpio_dbg_show; | 777 | gpio_dev->gc.dbg_show = amd_gpio_dbg_show; |
766 | 778 | ||
767 | gpio_dev->gc.base = 0; | 779 | gpio_dev->gc.base = 0; |
diff --git a/drivers/pinctrl/pinctrl-da850-pupd.c b/drivers/pinctrl/pinctrl-da850-pupd.c index b36a90a3f3e4..44d5f5f5b07f 100644 --- a/drivers/pinctrl/pinctrl-da850-pupd.c +++ b/drivers/pinctrl/pinctrl-da850-pupd.c | |||
@@ -113,7 +113,6 @@ static int da850_pupd_pin_config_group_set(struct pinctrl_dev *pctldev, | |||
113 | struct da850_pupd_data *data = pinctrl_dev_get_drvdata(pctldev); | 113 | struct da850_pupd_data *data = pinctrl_dev_get_drvdata(pctldev); |
114 | u32 ena, sel; | 114 | u32 ena, sel; |
115 | enum pin_config_param param; | 115 | enum pin_config_param param; |
116 | u16 arg; | ||
117 | int i; | 116 | int i; |
118 | 117 | ||
119 | ena = readl(data->base + DA850_PUPD_ENA); | 118 | ena = readl(data->base + DA850_PUPD_ENA); |
@@ -121,7 +120,6 @@ static int da850_pupd_pin_config_group_set(struct pinctrl_dev *pctldev, | |||
121 | 120 | ||
122 | for (i = 0; i < num_configs; i++) { | 121 | for (i = 0; i < num_configs; i++) { |
123 | param = pinconf_to_config_param(configs[i]); | 122 | param = pinconf_to_config_param(configs[i]); |
124 | arg = pinconf_to_config_argument(configs[i]); | ||
125 | 123 | ||
126 | switch (param) { | 124 | switch (param) { |
127 | case PIN_CONFIG_BIAS_DISABLE: | 125 | case PIN_CONFIG_BIAS_DISABLE: |
diff --git a/drivers/pinctrl/pinctrl-lpc18xx.c b/drivers/pinctrl/pinctrl-lpc18xx.c index e053f1fa5512..d090f37ca4a1 100644 --- a/drivers/pinctrl/pinctrl-lpc18xx.c +++ b/drivers/pinctrl/pinctrl-lpc18xx.c | |||
@@ -904,7 +904,7 @@ static int lpc18xx_pconf_get(struct pinctrl_dev *pctldev, unsigned pin, | |||
904 | 904 | ||
905 | static int lpc18xx_pconf_set_usb1(struct pinctrl_dev *pctldev, | 905 | static int lpc18xx_pconf_set_usb1(struct pinctrl_dev *pctldev, |
906 | enum pin_config_param param, | 906 | enum pin_config_param param, |
907 | u16 param_val, u32 *reg) | 907 | u32 param_val, u32 *reg) |
908 | { | 908 | { |
909 | switch (param) { | 909 | switch (param) { |
910 | case PIN_CONFIG_LOW_POWER_MODE: | 910 | case PIN_CONFIG_LOW_POWER_MODE: |
@@ -932,7 +932,7 @@ static int lpc18xx_pconf_set_usb1(struct pinctrl_dev *pctldev, | |||
932 | 932 | ||
933 | static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev, | 933 | static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev, |
934 | enum pin_config_param param, | 934 | enum pin_config_param param, |
935 | u16 param_val, u32 *reg, | 935 | u32 param_val, u32 *reg, |
936 | unsigned pin) | 936 | unsigned pin) |
937 | { | 937 | { |
938 | u8 shift; | 938 | u8 shift; |
@@ -982,7 +982,7 @@ static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev, | |||
982 | } | 982 | } |
983 | 983 | ||
984 | static int lpc18xx_pconf_set_gpio_pin_int(struct pinctrl_dev *pctldev, | 984 | static int lpc18xx_pconf_set_gpio_pin_int(struct pinctrl_dev *pctldev, |
985 | u16 param_val, unsigned pin) | 985 | u32 param_val, unsigned pin) |
986 | { | 986 | { |
987 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); | 987 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); |
988 | u32 val, reg_val, reg_offset = LPC18XX_SCU_PINTSEL0; | 988 | u32 val, reg_val, reg_offset = LPC18XX_SCU_PINTSEL0; |
@@ -1008,7 +1008,7 @@ static int lpc18xx_pconf_set_gpio_pin_int(struct pinctrl_dev *pctldev, | |||
1008 | } | 1008 | } |
1009 | 1009 | ||
1010 | static int lpc18xx_pconf_set_pin(struct pinctrl_dev *pctldev, unsigned param, | 1010 | static int lpc18xx_pconf_set_pin(struct pinctrl_dev *pctldev, unsigned param, |
1011 | u16 param_val, u32 *reg, unsigned pin, | 1011 | u32 param_val, u32 *reg, unsigned pin, |
1012 | struct lpc18xx_pin_caps *pin_cap) | 1012 | struct lpc18xx_pin_caps *pin_cap) |
1013 | { | 1013 | { |
1014 | switch (param) { | 1014 | switch (param) { |
@@ -1088,7 +1088,7 @@ static int lpc18xx_pconf_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
1088 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); | 1088 | struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev); |
1089 | struct lpc18xx_pin_caps *pin_cap; | 1089 | struct lpc18xx_pin_caps *pin_cap; |
1090 | enum pin_config_param param; | 1090 | enum pin_config_param param; |
1091 | u16 param_val; | 1091 | u32 param_val; |
1092 | u32 reg; | 1092 | u32 reg; |
1093 | int ret; | 1093 | int ret; |
1094 | int i; | 1094 | int i; |
diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c index d9ff53e8f715..b8d2180a2bea 100644 --- a/drivers/pinctrl/pinctrl-max77620.c +++ b/drivers/pinctrl/pinctrl-max77620.c | |||
@@ -402,7 +402,7 @@ static int max77620_pinconf_set(struct pinctrl_dev *pctldev, | |||
402 | struct device *dev = mpci->dev; | 402 | struct device *dev = mpci->dev; |
403 | struct max77620_fps_config *fps_config; | 403 | struct max77620_fps_config *fps_config; |
404 | int param; | 404 | int param; |
405 | u16 param_val; | 405 | u32 param_val; |
406 | unsigned int val; | 406 | unsigned int val; |
407 | unsigned int pu_val; | 407 | unsigned int pu_val; |
408 | unsigned int pd_val; | 408 | unsigned int pd_val; |
diff --git a/drivers/pinctrl/pinctrl-palmas.c b/drivers/pinctrl/pinctrl-palmas.c index a30146da7ffd..4d6a5015b927 100644 --- a/drivers/pinctrl/pinctrl-palmas.c +++ b/drivers/pinctrl/pinctrl-palmas.c | |||
@@ -860,7 +860,7 @@ static int palmas_pinconf_set(struct pinctrl_dev *pctldev, | |||
860 | { | 860 | { |
861 | struct palmas_pctrl_chip_info *pci = pinctrl_dev_get_drvdata(pctldev); | 861 | struct palmas_pctrl_chip_info *pci = pinctrl_dev_get_drvdata(pctldev); |
862 | enum pin_config_param param; | 862 | enum pin_config_param param; |
863 | u16 param_val; | 863 | u32 param_val; |
864 | const struct palmas_pingroup *g; | 864 | const struct palmas_pingroup *g; |
865 | const struct palmas_pin_info *opt; | 865 | const struct palmas_pin_info *opt; |
866 | int ret; | 866 | int ret; |
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 08765f58253c..7813599e43fa 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c | |||
@@ -1441,7 +1441,7 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, | |||
1441 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); | 1441 | struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); |
1442 | struct rockchip_pin_bank *bank = pin_to_bank(info, pin); | 1442 | struct rockchip_pin_bank *bank = pin_to_bank(info, pin); |
1443 | enum pin_config_param param; | 1443 | enum pin_config_param param; |
1444 | u16 arg; | 1444 | u32 arg; |
1445 | int i; | 1445 | int i; |
1446 | int rc; | 1446 | int rc; |
1447 | 1447 | ||
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index a5a0392ab817..f71f2e813ea6 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c | |||
@@ -622,7 +622,7 @@ static int pcs_pinconf_set(struct pinctrl_dev *pctldev, | |||
622 | struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); | 622 | struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); |
623 | struct pcs_function *func; | 623 | struct pcs_function *func; |
624 | unsigned offset = 0, shift = 0, i, data, ret; | 624 | unsigned offset = 0, shift = 0, i, data, ret; |
625 | u16 arg; | 625 | u32 arg; |
626 | int j; | 626 | int j; |
627 | 627 | ||
628 | ret = pcs_get_function(pctldev, pin, &func); | 628 | ret = pcs_get_function(pctldev, pin, &func); |
diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c index 29fb7403d24e..7450f5118445 100644 --- a/drivers/pinctrl/pinctrl-sx150x.c +++ b/drivers/pinctrl/pinctrl-sx150x.c | |||
@@ -424,41 +424,6 @@ static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset) | |||
424 | return !!(value & BIT(offset)); | 424 | return !!(value & BIT(offset)); |
425 | } | 425 | } |
426 | 426 | ||
427 | static int sx150x_gpio_set_single_ended(struct gpio_chip *chip, | ||
428 | unsigned int offset, | ||
429 | enum single_ended_mode mode) | ||
430 | { | ||
431 | struct sx150x_pinctrl *pctl = gpiochip_get_data(chip); | ||
432 | int ret; | ||
433 | |||
434 | switch (mode) { | ||
435 | case LINE_MODE_PUSH_PULL: | ||
436 | if (pctl->data->model != SX150X_789 || | ||
437 | sx150x_pin_is_oscio(pctl, offset)) | ||
438 | return 0; | ||
439 | |||
440 | ret = regmap_write_bits(pctl->regmap, | ||
441 | pctl->data->pri.x789.reg_drain, | ||
442 | BIT(offset), 0); | ||
443 | break; | ||
444 | |||
445 | case LINE_MODE_OPEN_DRAIN: | ||
446 | if (pctl->data->model != SX150X_789 || | ||
447 | sx150x_pin_is_oscio(pctl, offset)) | ||
448 | return -ENOTSUPP; | ||
449 | |||
450 | ret = regmap_write_bits(pctl->regmap, | ||
451 | pctl->data->pri.x789.reg_drain, | ||
452 | BIT(offset), BIT(offset)); | ||
453 | break; | ||
454 | default: | ||
455 | ret = -ENOTSUPP; | ||
456 | break; | ||
457 | } | ||
458 | |||
459 | return ret; | ||
460 | } | ||
461 | |||
462 | static int __sx150x_gpio_set(struct sx150x_pinctrl *pctl, unsigned int offset, | 427 | static int __sx150x_gpio_set(struct sx150x_pinctrl *pctl, unsigned int offset, |
463 | int value) | 428 | int value) |
464 | { | 429 | { |
@@ -811,16 +776,26 @@ static int sx150x_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, | |||
811 | break; | 776 | break; |
812 | 777 | ||
813 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: | 778 | case PIN_CONFIG_DRIVE_OPEN_DRAIN: |
814 | ret = sx150x_gpio_set_single_ended(&pctl->gpio, | 779 | if (pctl->data->model != SX150X_789 || |
815 | pin, LINE_MODE_OPEN_DRAIN); | 780 | sx150x_pin_is_oscio(pctl, pin)) |
781 | return -ENOTSUPP; | ||
782 | |||
783 | ret = regmap_write_bits(pctl->regmap, | ||
784 | pctl->data->pri.x789.reg_drain, | ||
785 | BIT(pin), BIT(pin)); | ||
816 | if (ret < 0) | 786 | if (ret < 0) |
817 | return ret; | 787 | return ret; |
818 | 788 | ||
819 | break; | 789 | break; |
820 | 790 | ||
821 | case PIN_CONFIG_DRIVE_PUSH_PULL: | 791 | case PIN_CONFIG_DRIVE_PUSH_PULL: |
822 | ret = sx150x_gpio_set_single_ended(&pctl->gpio, | 792 | if (pctl->data->model != SX150X_789 || |
823 | pin, LINE_MODE_PUSH_PULL); | 793 | sx150x_pin_is_oscio(pctl, pin)) |
794 | return 0; | ||
795 | |||
796 | ret = regmap_write_bits(pctl->regmap, | ||
797 | pctl->data->pri.x789.reg_drain, | ||
798 | BIT(pin), 0); | ||
824 | if (ret < 0) | 799 | if (ret < 0) |
825 | return ret; | 800 | return ret; |
826 | 801 | ||
@@ -1178,7 +1153,7 @@ static int sx150x_probe(struct i2c_client *client, | |||
1178 | pctl->gpio.direction_output = sx150x_gpio_direction_output; | 1153 | pctl->gpio.direction_output = sx150x_gpio_direction_output; |
1179 | pctl->gpio.get = sx150x_gpio_get; | 1154 | pctl->gpio.get = sx150x_gpio_get; |
1180 | pctl->gpio.set = sx150x_gpio_set; | 1155 | pctl->gpio.set = sx150x_gpio_set; |
1181 | pctl->gpio.set_single_ended = sx150x_gpio_set_single_ended; | 1156 | pctl->gpio.set_config = gpiochip_generic_config; |
1182 | pctl->gpio.parent = dev; | 1157 | pctl->gpio.parent = dev; |
1183 | #ifdef CONFIG_OF_GPIO | 1158 | #ifdef CONFIG_OF_GPIO |
1184 | pctl->gpio.of_node = dev->of_node; | 1159 | pctl->gpio.of_node = dev->of_node; |
diff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c index 7f3041697813..82b8a429743d 100644 --- a/drivers/pinctrl/sirf/pinctrl-atlas7.c +++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c | |||
@@ -5322,7 +5322,8 @@ static int atlas7_pin_config_set(struct pinctrl_dev *pctldev, | |||
5322 | unsigned pin, unsigned long *configs, | 5322 | unsigned pin, unsigned long *configs, |
5323 | unsigned num_configs) | 5323 | unsigned num_configs) |
5324 | { | 5324 | { |
5325 | u16 param, arg; | 5325 | u16 param; |
5326 | u32 arg; | ||
5326 | int idx, err; | 5327 | int idx, err; |
5327 | 5328 | ||
5328 | for (idx = 0; idx < num_configs; idx++) { | 5329 | for (idx = 0; idx < num_configs; idx++) { |
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 0eb51e33cb1b..28bfa5f413e4 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c | |||
@@ -540,7 +540,7 @@ static int sunxi_pconf_group_set(struct pinctrl_dev *pctldev, | |||
540 | enum pin_config_param param; | 540 | enum pin_config_param param; |
541 | unsigned long flags; | 541 | unsigned long flags; |
542 | u32 offset, shift, mask, reg; | 542 | u32 offset, shift, mask, reg; |
543 | u16 arg, val; | 543 | u32 arg, val; |
544 | int ret; | 544 | int ret; |
545 | 545 | ||
546 | param = pinconf_to_config_param(configs[i]); | 546 | param = pinconf_to_config_param(configs[i]); |
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index 9b2ee717bccc..546f23c9040c 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | |||
@@ -297,7 +297,7 @@ static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev, | |||
297 | 297 | ||
298 | static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, | 298 | static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, |
299 | const struct pin_desc *desc, | 299 | const struct pin_desc *desc, |
300 | enum pin_config_param param, u16 arg) | 300 | enum pin_config_param param, u32 arg) |
301 | { | 301 | { |
302 | struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); | 302 | struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
303 | enum uniphier_pin_pull_dir pull_dir = | 303 | enum uniphier_pin_pull_dir pull_dir = |
@@ -468,7 +468,7 @@ static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev, | |||
468 | for (i = 0; i < num_configs; i++) { | 468 | for (i = 0; i < num_configs; i++) { |
469 | enum pin_config_param param = | 469 | enum pin_config_param param = |
470 | pinconf_to_config_param(configs[i]); | 470 | pinconf_to_config_param(configs[i]); |
471 | u16 arg = pinconf_to_config_argument(configs[i]); | 471 | u32 arg = pinconf_to_config_argument(configs[i]); |
472 | 472 | ||
473 | switch (param) { | 473 | switch (param) { |
474 | case PIN_CONFIG_BIAS_DISABLE: | 474 | case PIN_CONFIG_BIAS_DISABLE: |
diff --git a/drivers/pinctrl/vt8500/pinctrl-wmt.c b/drivers/pinctrl/vt8500/pinctrl-wmt.c index 270ca2a47a8c..c207e60b734f 100644 --- a/drivers/pinctrl/vt8500/pinctrl-wmt.c +++ b/drivers/pinctrl/vt8500/pinctrl-wmt.c | |||
@@ -428,7 +428,7 @@ static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, | |||
428 | { | 428 | { |
429 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | 429 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); |
430 | enum pin_config_param param; | 430 | enum pin_config_param param; |
431 | u16 arg; | 431 | u32 arg; |
432 | u32 bank = WMT_BANK_FROM_PIN(pin); | 432 | u32 bank = WMT_BANK_FROM_PIN(pin); |
433 | u32 bit = WMT_BIT_FROM_PIN(pin); | 433 | u32 bit = WMT_BIT_FROM_PIN(pin); |
434 | u32 reg_pull_en = data->banks[bank].reg_pull_en; | 434 | u32 reg_pull_en = data->banks[bank].reg_pull_en; |
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index 51e52446eacb..73594f38c453 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c | |||
@@ -610,7 +610,7 @@ static int rtc_pinconf_set(struct pinctrl_dev *pctldev, | |||
610 | struct omap_rtc *rtc = pinctrl_dev_get_drvdata(pctldev); | 610 | struct omap_rtc *rtc = pinctrl_dev_get_drvdata(pctldev); |
611 | u32 val; | 611 | u32 val; |
612 | unsigned int param; | 612 | unsigned int param; |
613 | u16 param_val; | 613 | u32 param_val; |
614 | int i; | 614 | int i; |
615 | 615 | ||
616 | rtc->type->unlock(rtc); | 616 | rtc->type->unlock(rtc); |
diff --git a/drivers/staging/greybus/gpio.c b/drivers/staging/greybus/gpio.c index 250caa00de5e..51384bdde450 100644 --- a/drivers/staging/greybus/gpio.c +++ b/drivers/staging/greybus/gpio.c | |||
@@ -474,17 +474,20 @@ static void gb_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
474 | gb_gpio_set_value_operation(ggc, (u8)offset, !!value); | 474 | gb_gpio_set_value_operation(ggc, (u8)offset, !!value); |
475 | } | 475 | } |
476 | 476 | ||
477 | static int gb_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, | 477 | static int gb_gpio_set_config(struct gpio_chip *chip, unsigned offset, |
478 | unsigned debounce) | 478 | unsigned long config) |
479 | { | 479 | { |
480 | struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); | 480 | struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); |
481 | u16 usec; | 481 | u32 debounce; |
482 | 482 | ||
483 | if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) | ||
484 | return -ENOTSUPP; | ||
485 | |||
486 | debounce = pinconf_to_config_argument(config); | ||
483 | if (debounce > U16_MAX) | 487 | if (debounce > U16_MAX) |
484 | return -EINVAL; | 488 | return -EINVAL; |
485 | usec = (u16)debounce; | ||
486 | 489 | ||
487 | return gb_gpio_set_debounce_operation(ggc, (u8)offset, usec); | 490 | return gb_gpio_set_debounce_operation(ggc, (u8)offset, (u16)debounce); |
488 | } | 491 | } |
489 | 492 | ||
490 | static int gb_gpio_controller_setup(struct gb_gpio_controller *ggc) | 493 | static int gb_gpio_controller_setup(struct gb_gpio_controller *ggc) |
@@ -689,7 +692,7 @@ static int gb_gpio_probe(struct gbphy_device *gbphy_dev, | |||
689 | gpio->direction_output = gb_gpio_direction_output; | 692 | gpio->direction_output = gb_gpio_direction_output; |
690 | gpio->get = gb_gpio_get; | 693 | gpio->get = gb_gpio_get; |
691 | gpio->set = gb_gpio_set; | 694 | gpio->set = gb_gpio_set; |
692 | gpio->set_debounce = gb_gpio_set_debounce; | 695 | gpio->set_config = gb_gpio_set_config; |
693 | gpio->to_irq = gb_gpio_to_irq; | 696 | gpio->to_irq = gb_gpio_to_irq; |
694 | gpio->base = -1; /* Allocate base dynamically */ | 697 | gpio->base = -1; /* Allocate base dynamically */ |
695 | gpio->ngpio = ggc->line_max + 1; | 698 | gpio->ngpio = ggc->line_max + 1; |
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index fff718352e0c..5d61d0871f2e 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c | |||
@@ -1329,17 +1329,20 @@ static int cp210x_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio, | |||
1329 | return 0; | 1329 | return 0; |
1330 | } | 1330 | } |
1331 | 1331 | ||
1332 | static int cp210x_gpio_set_single_ended(struct gpio_chip *gc, unsigned int gpio, | 1332 | static int cp210x_gpio_set_config(struct gpio_chip *gc, unsigned int gpio, |
1333 | enum single_ended_mode mode) | 1333 | unsigned long config) |
1334 | { | 1334 | { |
1335 | struct usb_serial *serial = gpiochip_get_data(gc); | 1335 | struct usb_serial *serial = gpiochip_get_data(gc); |
1336 | struct cp210x_serial_private *priv = usb_get_serial_data(serial); | 1336 | struct cp210x_serial_private *priv = usb_get_serial_data(serial); |
1337 | enum pin_config_param param = pinconf_to_config_param(config); | ||
1337 | 1338 | ||
1338 | /* Succeed only if in correct mode (this can't be set at runtime) */ | 1339 | /* Succeed only if in correct mode (this can't be set at runtime) */ |
1339 | if ((mode == LINE_MODE_PUSH_PULL) && (priv->gpio_mode & BIT(gpio))) | 1340 | if ((param == PIN_CONFIG_DRIVE_PUSH_PULL) && |
1341 | (priv->gpio_mode & BIT(gpio))) | ||
1340 | return 0; | 1342 | return 0; |
1341 | 1343 | ||
1342 | if ((mode == LINE_MODE_OPEN_DRAIN) && !(priv->gpio_mode & BIT(gpio))) | 1344 | if ((param == PIN_CONFIG_DRIVE_OPEN_DRAIN) && |
1345 | !(priv->gpio_mode & BIT(gpio))) | ||
1343 | return 0; | 1346 | return 0; |
1344 | 1347 | ||
1345 | return -ENOTSUPP; | 1348 | return -ENOTSUPP; |
@@ -1402,7 +1405,7 @@ static int cp2105_shared_gpio_init(struct usb_serial *serial) | |||
1402 | priv->gc.direction_output = cp210x_gpio_direction_output; | 1405 | priv->gc.direction_output = cp210x_gpio_direction_output; |
1403 | priv->gc.get = cp210x_gpio_get; | 1406 | priv->gc.get = cp210x_gpio_get; |
1404 | priv->gc.set = cp210x_gpio_set; | 1407 | priv->gc.set = cp210x_gpio_set; |
1405 | priv->gc.set_single_ended = cp210x_gpio_set_single_ended; | 1408 | priv->gc.set_config = cp210x_gpio_set_config; |
1406 | priv->gc.owner = THIS_MODULE; | 1409 | priv->gc.owner = THIS_MODULE; |
1407 | priv->gc.parent = &serial->interface->dev; | 1410 | priv->gc.parent = &serial->interface->dev; |
1408 | priv->gc.base = -1; | 1411 | priv->gc.base = -1; |
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index c2748accea71..db2022910caf 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/irqdomain.h> | 8 | #include <linux/irqdomain.h> |
9 | #include <linux/lockdep.h> | 9 | #include <linux/lockdep.h> |
10 | #include <linux/pinctrl/pinctrl.h> | 10 | #include <linux/pinctrl/pinctrl.h> |
11 | #include <linux/pinctrl/pinconf-generic.h> | ||
11 | 12 | ||
12 | struct gpio_desc; | 13 | struct gpio_desc; |
13 | struct of_phandle_args; | 14 | struct of_phandle_args; |
@@ -19,18 +20,6 @@ struct module; | |||
19 | #ifdef CONFIG_GPIOLIB | 20 | #ifdef CONFIG_GPIOLIB |
20 | 21 | ||
21 | /** | 22 | /** |
22 | * enum single_ended_mode - mode for single ended operation | ||
23 | * @LINE_MODE_PUSH_PULL: normal mode for a GPIO line, drive actively high/low | ||
24 | * @LINE_MODE_OPEN_DRAIN: set line to be open drain | ||
25 | * @LINE_MODE_OPEN_SOURCE: set line to be open source | ||
26 | */ | ||
27 | enum single_ended_mode { | ||
28 | LINE_MODE_PUSH_PULL, | ||
29 | LINE_MODE_OPEN_DRAIN, | ||
30 | LINE_MODE_OPEN_SOURCE, | ||
31 | }; | ||
32 | |||
33 | /** | ||
34 | * struct gpio_chip - abstract a GPIO controller | 23 | * struct gpio_chip - abstract a GPIO controller |
35 | * @label: a functional name for the GPIO device, such as a part | 24 | * @label: a functional name for the GPIO device, such as a part |
36 | * number or the name of the SoC IP-block implementing it. | 25 | * number or the name of the SoC IP-block implementing it. |
@@ -48,16 +37,8 @@ enum single_ended_mode { | |||
48 | * @get: returns value for signal "offset", 0=low, 1=high, or negative error | 37 | * @get: returns value for signal "offset", 0=low, 1=high, or negative error |
49 | * @set: assigns output value for signal "offset" | 38 | * @set: assigns output value for signal "offset" |
50 | * @set_multiple: assigns output values for multiple signals defined by "mask" | 39 | * @set_multiple: assigns output values for multiple signals defined by "mask" |
51 | * @set_debounce: optional hook for setting debounce time for specified gpio in | 40 | * @set_config: optional hook for all kinds of settings. Uses the same |
52 | * interrupt triggered gpio chips | 41 | * packed config format as generic pinconf. |
53 | * @set_single_ended: optional hook for setting a line as open drain, open | ||
54 | * source, or non-single ended (restore from open drain/source to normal | ||
55 | * push-pull mode) this should be implemented if the hardware supports | ||
56 | * open drain or open source settings. The GPIOlib will otherwise try | ||
57 | * to emulate open drain/source by not actively driving lines high/low | ||
58 | * if a consumer request this. The driver may return -ENOTSUPP if e.g. | ||
59 | * it supports just open drain but not open source and is called | ||
60 | * with LINE_MODE_OPEN_SOURCE as mode argument. | ||
61 | * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; | 42 | * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; |
62 | * implementation may not sleep | 43 | * implementation may not sleep |
63 | * @dbg_show: optional routine to show contents in debugfs; default code | 44 | * @dbg_show: optional routine to show contents in debugfs; default code |
@@ -150,13 +131,9 @@ struct gpio_chip { | |||
150 | void (*set_multiple)(struct gpio_chip *chip, | 131 | void (*set_multiple)(struct gpio_chip *chip, |
151 | unsigned long *mask, | 132 | unsigned long *mask, |
152 | unsigned long *bits); | 133 | unsigned long *bits); |
153 | int (*set_debounce)(struct gpio_chip *chip, | 134 | int (*set_config)(struct gpio_chip *chip, |
154 | unsigned offset, | 135 | unsigned offset, |
155 | unsigned debounce); | 136 | unsigned long config); |
156 | int (*set_single_ended)(struct gpio_chip *chip, | ||
157 | unsigned offset, | ||
158 | enum single_ended_mode mode); | ||
159 | |||
160 | int (*to_irq)(struct gpio_chip *chip, | 137 | int (*to_irq)(struct gpio_chip *chip, |
161 | unsigned offset); | 138 | unsigned offset); |
162 | 139 | ||
@@ -310,6 +287,8 @@ static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip, | |||
310 | 287 | ||
311 | int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset); | 288 | int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset); |
312 | void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset); | 289 | void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset); |
290 | int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, | ||
291 | unsigned long config); | ||
313 | 292 | ||
314 | #ifdef CONFIG_PINCTRL | 293 | #ifdef CONFIG_PINCTRL |
315 | 294 | ||
diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h index d7e5d608faa7..a0f2aba72fa9 100644 --- a/include/linux/pinctrl/consumer.h +++ b/include/linux/pinctrl/consumer.h | |||
@@ -29,6 +29,7 @@ extern int pinctrl_request_gpio(unsigned gpio); | |||
29 | extern void pinctrl_free_gpio(unsigned gpio); | 29 | extern void pinctrl_free_gpio(unsigned gpio); |
30 | extern int pinctrl_gpio_direction_input(unsigned gpio); | 30 | extern int pinctrl_gpio_direction_input(unsigned gpio); |
31 | extern int pinctrl_gpio_direction_output(unsigned gpio); | 31 | extern int pinctrl_gpio_direction_output(unsigned gpio); |
32 | extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config); | ||
32 | 33 | ||
33 | extern struct pinctrl * __must_check pinctrl_get(struct device *dev); | 34 | extern struct pinctrl * __must_check pinctrl_get(struct device *dev); |
34 | extern void pinctrl_put(struct pinctrl *p); | 35 | extern void pinctrl_put(struct pinctrl *p); |
@@ -80,6 +81,11 @@ static inline int pinctrl_gpio_direction_output(unsigned gpio) | |||
80 | return 0; | 81 | return 0; |
81 | } | 82 | } |
82 | 83 | ||
84 | static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) | ||
85 | { | ||
86 | return 0; | ||
87 | } | ||
88 | |||
83 | static inline struct pinctrl * __must_check pinctrl_get(struct device *dev) | 89 | static inline struct pinctrl * __must_check pinctrl_get(struct device *dev) |
84 | { | 90 | { |
85 | return NULL; | 91 | return NULL; |
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h index 12343caa114e..7620eb127cff 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h | |||
@@ -12,12 +12,6 @@ | |||
12 | #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H | 12 | #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H |
13 | #define __LINUX_PINCTRL_PINCONF_GENERIC_H | 13 | #define __LINUX_PINCTRL_PINCONF_GENERIC_H |
14 | 14 | ||
15 | /* | ||
16 | * You shouldn't even be able to compile with these enums etc unless you're | ||
17 | * using generic pin config. That is why this is defined out. | ||
18 | */ | ||
19 | #ifdef CONFIG_GENERIC_PINCONF | ||
20 | |||
21 | /** | 15 | /** |
22 | * enum pin_config_param - possible pin configuration parameters | 16 | * enum pin_config_param - possible pin configuration parameters |
23 | * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it | 17 | * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it |
@@ -92,6 +86,8 @@ | |||
92 | * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if | 86 | * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if |
93 | * you need to pass in custom configurations to the pin controller, use | 87 | * you need to pass in custom configurations to the pin controller, use |
94 | * PIN_CONFIG_END+1 as the base offset. | 88 | * PIN_CONFIG_END+1 as the base offset. |
89 | * @PIN_CONFIG_MAX: this is the maximum configuration value that can be | ||
90 | * presented using the packed format. | ||
95 | */ | 91 | */ |
96 | enum pin_config_param { | 92 | enum pin_config_param { |
97 | PIN_CONFIG_BIAS_BUS_HOLD, | 93 | PIN_CONFIG_BIAS_BUS_HOLD, |
@@ -112,49 +108,53 @@ enum pin_config_param { | |||
112 | PIN_CONFIG_OUTPUT, | 108 | PIN_CONFIG_OUTPUT, |
113 | PIN_CONFIG_POWER_SOURCE, | 109 | PIN_CONFIG_POWER_SOURCE, |
114 | PIN_CONFIG_SLEW_RATE, | 110 | PIN_CONFIG_SLEW_RATE, |
115 | PIN_CONFIG_END = 0x7FFF, | 111 | PIN_CONFIG_END = 0x7F, |
116 | }; | 112 | PIN_CONFIG_MAX = 0xFF, |
117 | |||
118 | #ifdef CONFIG_DEBUG_FS | ||
119 | #define PCONFDUMP(a, b, c, d) { .param = a, .display = b, .format = c, \ | ||
120 | .has_arg = d } | ||
121 | |||
122 | struct pin_config_item { | ||
123 | const enum pin_config_param param; | ||
124 | const char * const display; | ||
125 | const char * const format; | ||
126 | bool has_arg; | ||
127 | }; | 113 | }; |
128 | #endif /* CONFIG_DEBUG_FS */ | ||
129 | 114 | ||
130 | /* | 115 | /* |
131 | * Helpful configuration macro to be used in tables etc. | 116 | * Helpful configuration macro to be used in tables etc. |
132 | */ | 117 | */ |
133 | #define PIN_CONF_PACKED(p, a) ((a << 16) | ((unsigned long) p & 0xffffUL)) | 118 | #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL)) |
134 | 119 | ||
135 | /* | 120 | /* |
136 | * The following inlines stuffs a configuration parameter and data value | 121 | * The following inlines stuffs a configuration parameter and data value |
137 | * into and out of an unsigned long argument, as used by the generic pin config | 122 | * into and out of an unsigned long argument, as used by the generic pin config |
138 | * system. We put the parameter in the lower 16 bits and the argument in the | 123 | * system. We put the parameter in the lower 8 bits and the argument in the |
139 | * upper 16 bits. | 124 | * upper 24 bits. |
140 | */ | 125 | */ |
141 | 126 | ||
142 | static inline enum pin_config_param pinconf_to_config_param(unsigned long config) | 127 | static inline enum pin_config_param pinconf_to_config_param(unsigned long config) |
143 | { | 128 | { |
144 | return (enum pin_config_param) (config & 0xffffUL); | 129 | return (enum pin_config_param) (config & 0xffUL); |
145 | } | 130 | } |
146 | 131 | ||
147 | static inline u16 pinconf_to_config_argument(unsigned long config) | 132 | static inline u32 pinconf_to_config_argument(unsigned long config) |
148 | { | 133 | { |
149 | return (enum pin_config_param) ((config >> 16) & 0xffffUL); | 134 | return (u32) ((config >> 8) & 0xffffffUL); |
150 | } | 135 | } |
151 | 136 | ||
152 | static inline unsigned long pinconf_to_config_packed(enum pin_config_param param, | 137 | static inline unsigned long pinconf_to_config_packed(enum pin_config_param param, |
153 | u16 argument) | 138 | u32 argument) |
154 | { | 139 | { |
155 | return PIN_CONF_PACKED(param, argument); | 140 | return PIN_CONF_PACKED(param, argument); |
156 | } | 141 | } |
157 | 142 | ||
143 | #ifdef CONFIG_GENERIC_PINCONF | ||
144 | |||
145 | #ifdef CONFIG_DEBUG_FS | ||
146 | #define PCONFDUMP(a, b, c, d) { \ | ||
147 | .param = a, .display = b, .format = c, .has_arg = d \ | ||
148 | } | ||
149 | |||
150 | struct pin_config_item { | ||
151 | const enum pin_config_param param; | ||
152 | const char * const display; | ||
153 | const char * const format; | ||
154 | bool has_arg; | ||
155 | }; | ||
156 | #endif /* CONFIG_DEBUG_FS */ | ||
157 | |||
158 | #ifdef CONFIG_OF | 158 | #ifdef CONFIG_OF |
159 | 159 | ||
160 | #include <linux/device.h> | 160 | #include <linux/device.h> |