diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2017-01-17 03:29:09 -0500 |
|---|---|---|
| committer | Archit Taneja <architt@codeaurora.org> | 2017-01-17 22:59:37 -0500 |
| commit | 2668db37888ff63282147b00dcf54fa491831df3 (patch) | |
| tree | 7b61afb6931e9c3db351177376e40ecc81e678f3 | |
| parent | 54d72737b098f3597c57693e1aa96699a21b11fe (diff) | |
drm: bridge: dw-hdmi: Assert SVSRET before resetting the PHY
According to the PHY IP core vendor, the SVSRET signal must be asserted
before resetting the PHY. Tests on RK3288 and R-Car Gen3 showed no
regression, the change should thus be safe.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-20-laurent.pinchart+renesas@ideasonboard.com
| -rw-r--r-- | drivers/gpu/drm/bridge/dw-hdmi.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c index 93e8816f1f78..4fda0717e789 100644 --- a/drivers/gpu/drm/bridge/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/dw-hdmi.c | |||
| @@ -986,6 +986,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon) | |||
| 986 | /* gen2 pddq */ | 986 | /* gen2 pddq */ |
| 987 | dw_hdmi_phy_gen2_pddq(hdmi, 1); | 987 | dw_hdmi_phy_gen2_pddq(hdmi, 1); |
| 988 | 988 | ||
| 989 | /* Leave low power consumption mode by asserting SVSRET. */ | ||
| 990 | if (hdmi->phy->has_svsret) | ||
| 991 | dw_hdmi_phy_enable_svsret(hdmi, 1); | ||
| 992 | |||
| 989 | /* PHY reset. The reset signal is active high on Gen2 PHYs. */ | 993 | /* PHY reset. The reset signal is active high on Gen2 PHYs. */ |
| 990 | hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); | 994 | hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ); |
| 991 | hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); | 995 | hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ); |
| @@ -1028,11 +1032,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon) | |||
| 1028 | dw_hdmi_phy_gen2_txpwron(hdmi, 1); | 1032 | dw_hdmi_phy_gen2_txpwron(hdmi, 1); |
| 1029 | dw_hdmi_phy_gen2_pddq(hdmi, 0); | 1033 | dw_hdmi_phy_gen2_pddq(hdmi, 0); |
| 1030 | 1034 | ||
| 1031 | /* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */ | 1035 | /* Wait for PHY PLL lock */ |
| 1032 | if (hdmi->phy->has_svsret) | ||
| 1033 | dw_hdmi_phy_enable_svsret(hdmi, 1); | ||
| 1034 | |||
| 1035 | /*Wait for PHY PLL lock */ | ||
| 1036 | msec = 5; | 1036 | msec = 5; |
| 1037 | do { | 1037 | do { |
| 1038 | val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK; | 1038 | val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK; |
