platform/x86: mlx-platform: Add more reset cause attributes

Add more attributes for reset cause indication for the cases when
system reset has been caused by watchdog, BIOS reload and COMEX
thermal shutdown.

Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

1 files changed, 36 insertions, 0 deletions

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 858156deff45..2b98f299faa4 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -1127,6 +1127,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = {
                 .mode = 0444,
         },
         {
+                .label = "reset_sff_wd",
+                .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,
+                .mask = GENMASK(7, 0) & ~BIT(6),
+                .mode = 0444,
+        },
+        {
                 .label = "psu1_on",
                 .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
                 .mask = GENMASK(7, 0) & ~BIT(0),
@@ -1215,6 +1221,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                 .mode = 0444,
         },
         {
+                .label = "reset_from_asic",
+                .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
+                .mask = GENMASK(7, 0) & ~BIT(5),
+                .mode = 0444,
+        },
+        {
+                .label = "reset_swb_wd",
+                .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
+                .mask = GENMASK(7, 0) & ~BIT(6),
+                .mode = 0444,
+        },
+        {
                 .label = "reset_asic_thermal",
                 .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
                 .mask = GENMASK(7, 0) & ~BIT(7),
@@ -1227,6 +1245,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                 .mode = 0444,
         },
         {
+                .label = "reset_comex_wd",
+                .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,
+                .mask = GENMASK(7, 0) & ~BIT(6),
+                .mode = 0444,
+        },
+        {
                 .label = "reset_voltmon_upgrade_fail",
                 .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
                 .mask = GENMASK(7, 0) & ~BIT(0),
@@ -1239,6 +1263,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                 .mode = 0444,
         },
         {
+                .label = "reset_comex_thermal",
+                .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
+                .mask = GENMASK(7, 0) & ~BIT(3),
+                .mode = 0444,
+        },
+        {
+                .label = "reset_reload_bios",
+                .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
+                .mask = GENMASK(7, 0) & ~BIT(5),
+                .mode = 0444,
+        },
+        {
                 .label = "psu1_on",
                 .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
                 .mask = GENMASK(7, 0) & ~BIT(0),