diff options
| author | Adriana Reus <adriana.reus@nxp.com> | 2017-10-02 06:32:11 -0400 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-11-02 03:26:18 -0400 |
| commit | 259bc283069975004067c51cc09525a50db4b470 (patch) | |
| tree | e7b4cc16c4eacba3d6bce4b51ece275be8db952f | |
| parent | edc5a8e754aba9c6eaeddd18cb1e72462f99b16c (diff) | |
clk: imx: imx7d: Remove ARM_M0 clock
IMX7d does not have an M0 Core and this particular
clock doesn't seem connected to anything else.
Remove this entry from the CCM driver.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| -rw-r--r-- | drivers/clk/imx/clk-imx7d.c | 9 | ||||
| -rw-r--r-- | include/dt-bindings/clock/imx7d-clock.h | 8 |
2 files changed, 4 insertions, 13 deletions
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 0ac9b30c8b90..80dc211eb74b 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c | |||
| @@ -54,11 +54,6 @@ static const char *arm_m4_sel[] = { "osc", "pll_sys_main_240m_clk", | |||
| 54 | "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_main_clk", | 54 | "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_main_clk", |
| 55 | "pll_usb_main_clk", }; | 55 | "pll_usb_main_clk", }; |
| 56 | 56 | ||
| 57 | static const char *arm_m0_sel[] = { "osc", "pll_sys_main_120m_clk", | ||
| 58 | "pll_enet_125m_clk", "pll_sys_pfd2_135m_clk", | ||
| 59 | "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_main_clk", | ||
| 60 | "pll_usb_main_clk", }; | ||
| 61 | |||
| 62 | static const char *axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk", | 57 | static const char *axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk", |
| 63 | "pll_dram_533m_clk", "pll_enet_250m_clk", "pll_sys_pfd5_clk", | 58 | "pll_dram_533m_clk", "pll_enet_250m_clk", "pll_sys_pfd5_clk", |
| 64 | "pll_audio_post_div", "pll_video_main_clk", "pll_sys_pfd7_clk", }; | 59 | "pll_audio_post_div", "pll_video_main_clk", "pll_sys_pfd7_clk", }; |
| @@ -510,7 +505,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) | |||
| 510 | 505 | ||
| 511 | clks[IMX7D_ARM_A7_ROOT_SRC] = imx_clk_mux2("arm_a7_src", base + 0x8000, 24, 3, arm_a7_sel, ARRAY_SIZE(arm_a7_sel)); | 506 | clks[IMX7D_ARM_A7_ROOT_SRC] = imx_clk_mux2("arm_a7_src", base + 0x8000, 24, 3, arm_a7_sel, ARRAY_SIZE(arm_a7_sel)); |
| 512 | clks[IMX7D_ARM_M4_ROOT_SRC] = imx_clk_mux2("arm_m4_src", base + 0x8080, 24, 3, arm_m4_sel, ARRAY_SIZE(arm_m4_sel)); | 507 | clks[IMX7D_ARM_M4_ROOT_SRC] = imx_clk_mux2("arm_m4_src", base + 0x8080, 24, 3, arm_m4_sel, ARRAY_SIZE(arm_m4_sel)); |
| 513 | clks[IMX7D_ARM_M0_ROOT_SRC] = imx_clk_mux2("arm_m0_src", base + 0x8100, 24, 3, arm_m0_sel, ARRAY_SIZE(arm_m0_sel)); | ||
| 514 | clks[IMX7D_MAIN_AXI_ROOT_SRC] = imx_clk_mux2("axi_src", base + 0x8800, 24, 3, axi_sel, ARRAY_SIZE(axi_sel)); | 508 | clks[IMX7D_MAIN_AXI_ROOT_SRC] = imx_clk_mux2("axi_src", base + 0x8800, 24, 3, axi_sel, ARRAY_SIZE(axi_sel)); |
| 515 | clks[IMX7D_DISP_AXI_ROOT_SRC] = imx_clk_mux2("disp_axi_src", base + 0x8880, 24, 3, disp_axi_sel, ARRAY_SIZE(disp_axi_sel)); | 509 | clks[IMX7D_DISP_AXI_ROOT_SRC] = imx_clk_mux2("disp_axi_src", base + 0x8880, 24, 3, disp_axi_sel, ARRAY_SIZE(disp_axi_sel)); |
| 516 | clks[IMX7D_ENET_AXI_ROOT_SRC] = imx_clk_mux2("enet_axi_src", base + 0x8900, 24, 3, enet_axi_sel, ARRAY_SIZE(enet_axi_sel)); | 510 | clks[IMX7D_ENET_AXI_ROOT_SRC] = imx_clk_mux2("enet_axi_src", base + 0x8900, 24, 3, enet_axi_sel, ARRAY_SIZE(enet_axi_sel)); |
| @@ -582,7 +576,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) | |||
| 582 | 576 | ||
| 583 | clks[IMX7D_ARM_A7_ROOT_CG] = imx_clk_gate3("arm_a7_cg", "arm_a7_src", base + 0x8000, 28); | 577 | clks[IMX7D_ARM_A7_ROOT_CG] = imx_clk_gate3("arm_a7_cg", "arm_a7_src", base + 0x8000, 28); |
| 584 | clks[IMX7D_ARM_M4_ROOT_CG] = imx_clk_gate3("arm_m4_cg", "arm_m4_src", base + 0x8080, 28); | 578 | clks[IMX7D_ARM_M4_ROOT_CG] = imx_clk_gate3("arm_m4_cg", "arm_m4_src", base + 0x8080, 28); |
| 585 | clks[IMX7D_ARM_M0_ROOT_CG] = imx_clk_gate3("arm_m0_cg", "arm_m0_src", base + 0x8100, 28); | ||
| 586 | clks[IMX7D_MAIN_AXI_ROOT_CG] = imx_clk_gate3("axi_cg", "axi_src", base + 0x8800, 28); | 579 | clks[IMX7D_MAIN_AXI_ROOT_CG] = imx_clk_gate3("axi_cg", "axi_src", base + 0x8800, 28); |
| 587 | clks[IMX7D_DISP_AXI_ROOT_CG] = imx_clk_gate3("disp_axi_cg", "disp_axi_src", base + 0x8880, 28); | 580 | clks[IMX7D_DISP_AXI_ROOT_CG] = imx_clk_gate3("disp_axi_cg", "disp_axi_src", base + 0x8880, 28); |
| 588 | clks[IMX7D_ENET_AXI_ROOT_CG] = imx_clk_gate3("enet_axi_cg", "enet_axi_src", base + 0x8900, 28); | 581 | clks[IMX7D_ENET_AXI_ROOT_CG] = imx_clk_gate3("enet_axi_cg", "enet_axi_src", base + 0x8900, 28); |
| @@ -721,7 +714,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) | |||
| 721 | 714 | ||
| 722 | clks[IMX7D_ARM_A7_ROOT_DIV] = imx_clk_divider2("arm_a7_div", "arm_a7_cg", base + 0x8000, 0, 3); | 715 | clks[IMX7D_ARM_A7_ROOT_DIV] = imx_clk_divider2("arm_a7_div", "arm_a7_cg", base + 0x8000, 0, 3); |
| 723 | clks[IMX7D_ARM_M4_ROOT_DIV] = imx_clk_divider2("arm_m4_div", "arm_m4_cg", base + 0x8080, 0, 3); | 716 | clks[IMX7D_ARM_M4_ROOT_DIV] = imx_clk_divider2("arm_m4_div", "arm_m4_cg", base + 0x8080, 0, 3); |
| 724 | clks[IMX7D_ARM_M0_ROOT_DIV] = imx_clk_divider2("arm_m0_div", "arm_m0_cg", base + 0x8100, 0, 3); | ||
| 725 | clks[IMX7D_MAIN_AXI_ROOT_DIV] = imx_clk_divider2("axi_post_div", "axi_pre_div", base + 0x8800, 0, 6); | 717 | clks[IMX7D_MAIN_AXI_ROOT_DIV] = imx_clk_divider2("axi_post_div", "axi_pre_div", base + 0x8800, 0, 6); |
| 726 | clks[IMX7D_DISP_AXI_ROOT_DIV] = imx_clk_divider2("disp_axi_post_div", "disp_axi_pre_div", base + 0x8880, 0, 6); | 718 | clks[IMX7D_DISP_AXI_ROOT_DIV] = imx_clk_divider2("disp_axi_post_div", "disp_axi_pre_div", base + 0x8880, 0, 6); |
| 727 | clks[IMX7D_ENET_AXI_ROOT_DIV] = imx_clk_divider2("enet_axi_post_div", "enet_axi_pre_div", base + 0x8900, 0, 6); | 719 | clks[IMX7D_ENET_AXI_ROOT_DIV] = imx_clk_divider2("enet_axi_post_div", "enet_axi_pre_div", base + 0x8900, 0, 6); |
| @@ -793,7 +785,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) | |||
| 793 | 785 | ||
| 794 | clks[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_gate4("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0); | 786 | clks[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_gate4("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0); |
| 795 | clks[IMX7D_ARM_M4_ROOT_CLK] = imx_clk_gate4("arm_m4_root_clk", "arm_m4_div", base + 0x4010, 0); | 787 | clks[IMX7D_ARM_M4_ROOT_CLK] = imx_clk_gate4("arm_m4_root_clk", "arm_m4_div", base + 0x4010, 0); |
| 796 | clks[IMX7D_ARM_M0_ROOT_CLK] = imx_clk_gate4("arm_m0_root_clk", "arm_m0_div", base + 0x4020, 0); | ||
| 797 | clks[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_gate4("main_axi_root_clk", "axi_post_div", base + 0x4040, 0); | 788 | clks[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_gate4("main_axi_root_clk", "axi_post_div", base + 0x4040, 0); |
| 798 | clks[IMX7D_DISP_AXI_ROOT_CLK] = imx_clk_gate4("disp_axi_root_clk", "disp_axi_post_div", base + 0x4050, 0); | 789 | clks[IMX7D_DISP_AXI_ROOT_CLK] = imx_clk_gate4("disp_axi_root_clk", "disp_axi_post_div", base + 0x4050, 0); |
| 799 | clks[IMX7D_ENET_AXI_ROOT_CLK] = imx_clk_gate4("enet_axi_root_clk", "enet_axi_post_div", base + 0x4060, 0); | 790 | clks[IMX7D_ENET_AXI_ROOT_CLK] = imx_clk_gate4("enet_axi_root_clk", "enet_axi_post_div", base + 0x4060, 0); |
diff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h index de62a83b6c80..e2f99ae72d5c 100644 --- a/include/dt-bindings/clock/imx7d-clock.h +++ b/include/dt-bindings/clock/imx7d-clock.h | |||
| @@ -80,10 +80,10 @@ | |||
| 80 | #define IMX7D_ARM_M4_ROOT_SRC 67 | 80 | #define IMX7D_ARM_M4_ROOT_SRC 67 |
| 81 | #define IMX7D_ARM_M4_ROOT_CG 68 | 81 | #define IMX7D_ARM_M4_ROOT_CG 68 |
| 82 | #define IMX7D_ARM_M4_ROOT_DIV 69 | 82 | #define IMX7D_ARM_M4_ROOT_DIV 69 |
| 83 | #define IMX7D_ARM_M0_ROOT_CLK 70 | 83 | #define IMX7D_ARM_M0_ROOT_CLK 70 /* unused */ |
| 84 | #define IMX7D_ARM_M0_ROOT_SRC 71 | 84 | #define IMX7D_ARM_M0_ROOT_SRC 71 /* unused */ |
| 85 | #define IMX7D_ARM_M0_ROOT_CG 72 | 85 | #define IMX7D_ARM_M0_ROOT_CG 72 /* unused */ |
| 86 | #define IMX7D_ARM_M0_ROOT_DIV 73 | 86 | #define IMX7D_ARM_M0_ROOT_DIV 73 /* unused */ |
| 87 | #define IMX7D_MAIN_AXI_ROOT_CLK 74 | 87 | #define IMX7D_MAIN_AXI_ROOT_CLK 74 |
| 88 | #define IMX7D_MAIN_AXI_ROOT_SRC 75 | 88 | #define IMX7D_MAIN_AXI_ROOT_SRC 75 |
| 89 | #define IMX7D_MAIN_AXI_ROOT_CG 76 | 89 | #define IMX7D_MAIN_AXI_ROOT_CG 76 |
