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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-01-20 08:44:58 -0500
committerSimon Horman <horms+renesas@verge.net.au>2016-04-27 00:16:18 -0400
commit25611e4ef5bb290805305d499715a840826462f3 (patch)
tree20ccfe75acaab84ba81852753b5cfd27b892b66e
parentf1ba73eae71fde882dcb6ca5fa61f1b3bffb7e3e (diff)
ARM: dts: r8a7794: Use SYSC "always-on" PM Domain
Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi106
1 files changed, 53 insertions, 53 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 70eff80a813e..136911c1dc74 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -86,7 +86,7 @@
86 #interrupt-cells = <2>; 86 #interrupt-cells = <2>;
87 interrupt-controller; 87 interrupt-controller;
88 clocks = <&mstp9_clks R8A7794_CLK_GPIO0>; 88 clocks = <&mstp9_clks R8A7794_CLK_GPIO0>;
89 power-domains = <&cpg_clocks>; 89 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
90 }; 90 };
91 91
92 gpio1: gpio@e6051000 { 92 gpio1: gpio@e6051000 {
@@ -99,7 +99,7 @@
99 #interrupt-cells = <2>; 99 #interrupt-cells = <2>;
100 interrupt-controller; 100 interrupt-controller;
101 clocks = <&mstp9_clks R8A7794_CLK_GPIO1>; 101 clocks = <&mstp9_clks R8A7794_CLK_GPIO1>;
102 power-domains = <&cpg_clocks>; 102 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
103 }; 103 };
104 104
105 gpio2: gpio@e6052000 { 105 gpio2: gpio@e6052000 {
@@ -112,7 +112,7 @@
112 #interrupt-cells = <2>; 112 #interrupt-cells = <2>;
113 interrupt-controller; 113 interrupt-controller;
114 clocks = <&mstp9_clks R8A7794_CLK_GPIO2>; 114 clocks = <&mstp9_clks R8A7794_CLK_GPIO2>;
115 power-domains = <&cpg_clocks>; 115 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
116 }; 116 };
117 117
118 gpio3: gpio@e6053000 { 118 gpio3: gpio@e6053000 {
@@ -125,7 +125,7 @@
125 #interrupt-cells = <2>; 125 #interrupt-cells = <2>;
126 interrupt-controller; 126 interrupt-controller;
127 clocks = <&mstp9_clks R8A7794_CLK_GPIO3>; 127 clocks = <&mstp9_clks R8A7794_CLK_GPIO3>;
128 power-domains = <&cpg_clocks>; 128 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
129 }; 129 };
130 130
131 gpio4: gpio@e6054000 { 131 gpio4: gpio@e6054000 {
@@ -138,7 +138,7 @@
138 #interrupt-cells = <2>; 138 #interrupt-cells = <2>;
139 interrupt-controller; 139 interrupt-controller;
140 clocks = <&mstp9_clks R8A7794_CLK_GPIO4>; 140 clocks = <&mstp9_clks R8A7794_CLK_GPIO4>;
141 power-domains = <&cpg_clocks>; 141 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
142 }; 142 };
143 143
144 gpio5: gpio@e6055000 { 144 gpio5: gpio@e6055000 {
@@ -151,7 +151,7 @@
151 #interrupt-cells = <2>; 151 #interrupt-cells = <2>;
152 interrupt-controller; 152 interrupt-controller;
153 clocks = <&mstp9_clks R8A7794_CLK_GPIO5>; 153 clocks = <&mstp9_clks R8A7794_CLK_GPIO5>;
154 power-domains = <&cpg_clocks>; 154 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
155 }; 155 };
156 156
157 gpio6: gpio@e6055400 { 157 gpio6: gpio@e6055400 {
@@ -164,7 +164,7 @@
164 #interrupt-cells = <2>; 164 #interrupt-cells = <2>;
165 interrupt-controller; 165 interrupt-controller;
166 clocks = <&mstp9_clks R8A7794_CLK_GPIO6>; 166 clocks = <&mstp9_clks R8A7794_CLK_GPIO6>;
167 power-domains = <&cpg_clocks>; 167 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
168 }; 168 };
169 169
170 cmt0: timer@ffca0000 { 170 cmt0: timer@ffca0000 {
@@ -174,7 +174,7 @@
174 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 174 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
175 clocks = <&mstp1_clks R8A7794_CLK_CMT0>; 175 clocks = <&mstp1_clks R8A7794_CLK_CMT0>;
176 clock-names = "fck"; 176 clock-names = "fck";
177 power-domains = <&cpg_clocks>; 177 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
178 178
179 renesas,channels-mask = <0x60>; 179 renesas,channels-mask = <0x60>;
180 180
@@ -194,7 +194,7 @@
194 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 194 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
195 clocks = <&mstp3_clks R8A7794_CLK_CMT1>; 195 clocks = <&mstp3_clks R8A7794_CLK_CMT1>;
196 clock-names = "fck"; 196 clock-names = "fck";
197 power-domains = <&cpg_clocks>; 197 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
198 198
199 renesas,channels-mask = <0xff>; 199 renesas,channels-mask = <0xff>;
200 200
@@ -225,7 +225,7 @@
225 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 225 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 226 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
227 clocks = <&mstp4_clks R8A7794_CLK_IRQC>; 227 clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
228 power-domains = <&cpg_clocks>; 228 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
229 }; 229 };
230 230
231 pfc: pin-controller@e6060000 { 231 pfc: pin-controller@e6060000 {
@@ -259,7 +259,7 @@
259 "ch12", "ch13", "ch14"; 259 "ch12", "ch13", "ch14";
260 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>; 260 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>;
261 clock-names = "fck"; 261 clock-names = "fck";
262 power-domains = <&cpg_clocks>; 262 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
263 #dma-cells = <1>; 263 #dma-cells = <1>;
264 dma-channels = <15>; 264 dma-channels = <15>;
265 }; 265 };
@@ -290,7 +290,7 @@
290 "ch12", "ch13", "ch14"; 290 "ch12", "ch13", "ch14";
291 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>; 291 clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>;
292 clock-names = "fck"; 292 clock-names = "fck";
293 power-domains = <&cpg_clocks>; 293 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
294 #dma-cells = <1>; 294 #dma-cells = <1>;
295 dma-channels = <15>; 295 dma-channels = <15>;
296 }; 296 };
@@ -304,7 +304,7 @@
304 clock-names = "fck"; 304 clock-names = "fck";
305 dmas = <&dmac0 0x21>, <&dmac0 0x22>; 305 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
306 dma-names = "tx", "rx"; 306 dma-names = "tx", "rx";
307 power-domains = <&cpg_clocks>; 307 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
308 status = "disabled"; 308 status = "disabled";
309 }; 309 };
310 310
@@ -317,7 +317,7 @@
317 clock-names = "fck"; 317 clock-names = "fck";
318 dmas = <&dmac0 0x25>, <&dmac0 0x26>; 318 dmas = <&dmac0 0x25>, <&dmac0 0x26>;
319 dma-names = "tx", "rx"; 319 dma-names = "tx", "rx";
320 power-domains = <&cpg_clocks>; 320 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
321 status = "disabled"; 321 status = "disabled";
322 }; 322 };
323 323
@@ -330,7 +330,7 @@
330 clock-names = "fck"; 330 clock-names = "fck";
331 dmas = <&dmac0 0x27>, <&dmac0 0x28>; 331 dmas = <&dmac0 0x27>, <&dmac0 0x28>;
332 dma-names = "tx", "rx"; 332 dma-names = "tx", "rx";
333 power-domains = <&cpg_clocks>; 333 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
334 status = "disabled"; 334 status = "disabled";
335 }; 335 };
336 336
@@ -343,7 +343,7 @@
343 clock-names = "fck"; 343 clock-names = "fck";
344 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; 344 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
345 dma-names = "tx", "rx"; 345 dma-names = "tx", "rx";
346 power-domains = <&cpg_clocks>; 346 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
347 status = "disabled"; 347 status = "disabled";
348 }; 348 };
349 349
@@ -356,7 +356,7 @@
356 clock-names = "fck"; 356 clock-names = "fck";
357 dmas = <&dmac0 0x1f>, <&dmac0 0x20>; 357 dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
358 dma-names = "tx", "rx"; 358 dma-names = "tx", "rx";
359 power-domains = <&cpg_clocks>; 359 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
360 status = "disabled"; 360 status = "disabled";
361 }; 361 };
362 362
@@ -369,7 +369,7 @@
369 clock-names = "fck"; 369 clock-names = "fck";
370 dmas = <&dmac0 0x23>, <&dmac0 0x24>; 370 dmas = <&dmac0 0x23>, <&dmac0 0x24>;
371 dma-names = "tx", "rx"; 371 dma-names = "tx", "rx";
372 power-domains = <&cpg_clocks>; 372 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
373 status = "disabled"; 373 status = "disabled";
374 }; 374 };
375 375
@@ -382,7 +382,7 @@
382 clock-names = "fck"; 382 clock-names = "fck";
383 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; 383 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
384 dma-names = "tx", "rx"; 384 dma-names = "tx", "rx";
385 power-domains = <&cpg_clocks>; 385 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
386 status = "disabled"; 386 status = "disabled";
387 }; 387 };
388 388
@@ -395,7 +395,7 @@
395 clock-names = "fck"; 395 clock-names = "fck";
396 dmas = <&dmac0 0x19>, <&dmac0 0x1a>; 396 dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
397 dma-names = "tx", "rx"; 397 dma-names = "tx", "rx";
398 power-domains = <&cpg_clocks>; 398 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
399 status = "disabled"; 399 status = "disabled";
400 }; 400 };
401 401
@@ -408,7 +408,7 @@
408 clock-names = "fck"; 408 clock-names = "fck";
409 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; 409 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
410 dma-names = "tx", "rx"; 410 dma-names = "tx", "rx";
411 power-domains = <&cpg_clocks>; 411 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
412 status = "disabled"; 412 status = "disabled";
413 }; 413 };
414 414
@@ -422,7 +422,7 @@
422 clock-names = "fck", "brg_int", "scif_clk"; 422 clock-names = "fck", "brg_int", "scif_clk";
423 dmas = <&dmac0 0x29>, <&dmac0 0x2a>; 423 dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
424 dma-names = "tx", "rx"; 424 dma-names = "tx", "rx";
425 power-domains = <&cpg_clocks>; 425 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
426 status = "disabled"; 426 status = "disabled";
427 }; 427 };
428 428
@@ -436,7 +436,7 @@
436 clock-names = "fck", "brg_int", "scif_clk"; 436 clock-names = "fck", "brg_int", "scif_clk";
437 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; 437 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
438 dma-names = "tx", "rx"; 438 dma-names = "tx", "rx";
439 power-domains = <&cpg_clocks>; 439 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
440 status = "disabled"; 440 status = "disabled";
441 }; 441 };
442 442
@@ -450,7 +450,7 @@
450 clock-names = "fck", "brg_int", "scif_clk"; 450 clock-names = "fck", "brg_int", "scif_clk";
451 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; 451 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
452 dma-names = "tx", "rx"; 452 dma-names = "tx", "rx";
453 power-domains = <&cpg_clocks>; 453 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
454 status = "disabled"; 454 status = "disabled";
455 }; 455 };
456 456
@@ -464,7 +464,7 @@
464 clock-names = "fck", "brg_int", "scif_clk"; 464 clock-names = "fck", "brg_int", "scif_clk";
465 dmas = <&dmac0 0x2f>, <&dmac0 0x30>; 465 dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
466 dma-names = "tx", "rx"; 466 dma-names = "tx", "rx";
467 power-domains = <&cpg_clocks>; 467 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
468 status = "disabled"; 468 status = "disabled";
469 }; 469 };
470 470
@@ -478,7 +478,7 @@
478 clock-names = "fck", "brg_int", "scif_clk"; 478 clock-names = "fck", "brg_int", "scif_clk";
479 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; 479 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
480 dma-names = "tx", "rx"; 480 dma-names = "tx", "rx";
481 power-domains = <&cpg_clocks>; 481 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
482 status = "disabled"; 482 status = "disabled";
483 }; 483 };
484 484
@@ -492,7 +492,7 @@
492 clock-names = "fck", "brg_int", "scif_clk"; 492 clock-names = "fck", "brg_int", "scif_clk";
493 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; 493 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
494 dma-names = "tx", "rx"; 494 dma-names = "tx", "rx";
495 power-domains = <&cpg_clocks>; 495 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
496 status = "disabled"; 496 status = "disabled";
497 }; 497 };
498 498
@@ -506,7 +506,7 @@
506 clock-names = "fck", "brg_int", "scif_clk"; 506 clock-names = "fck", "brg_int", "scif_clk";
507 dmas = <&dmac0 0x39>, <&dmac0 0x3a>; 507 dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
508 dma-names = "tx", "rx"; 508 dma-names = "tx", "rx";
509 power-domains = <&cpg_clocks>; 509 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
510 status = "disabled"; 510 status = "disabled";
511 }; 511 };
512 512
@@ -520,7 +520,7 @@
520 clock-names = "fck", "brg_int", "scif_clk"; 520 clock-names = "fck", "brg_int", "scif_clk";
521 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; 521 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
522 dma-names = "tx", "rx"; 522 dma-names = "tx", "rx";
523 power-domains = <&cpg_clocks>; 523 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
524 status = "disabled"; 524 status = "disabled";
525 }; 525 };
526 526
@@ -534,7 +534,7 @@
534 clock-names = "fck", "brg_int", "scif_clk"; 534 clock-names = "fck", "brg_int", "scif_clk";
535 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; 535 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
536 dma-names = "tx", "rx"; 536 dma-names = "tx", "rx";
537 power-domains = <&cpg_clocks>; 537 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
538 status = "disabled"; 538 status = "disabled";
539 }; 539 };
540 540
@@ -543,7 +543,7 @@
543 reg = <0 0xee700000 0 0x400>; 543 reg = <0 0xee700000 0 0x400>;
544 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 544 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
545 clocks = <&mstp8_clks R8A7794_CLK_ETHER>; 545 clocks = <&mstp8_clks R8A7794_CLK_ETHER>;
546 power-domains = <&cpg_clocks>; 546 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
547 phy-mode = "rmii"; 547 phy-mode = "rmii";
548 #address-cells = <1>; 548 #address-cells = <1>;
549 #size-cells = <0>; 549 #size-cells = <0>;
@@ -556,7 +556,7 @@
556 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 556 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
557 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 557 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&mstp8_clks R8A7794_CLK_ETHERAVB>; 558 clocks = <&mstp8_clks R8A7794_CLK_ETHERAVB>;
559 power-domains = <&cpg_clocks>; 559 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
560 #address-cells = <1>; 560 #address-cells = <1>;
561 #size-cells = <0>; 561 #size-cells = <0>;
562 status = "disabled"; 562 status = "disabled";
@@ -568,7 +568,7 @@
568 reg = <0 0xe6508000 0 0x40>; 568 reg = <0 0xe6508000 0 0x40>;
569 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 569 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
570 clocks = <&mstp9_clks R8A7794_CLK_I2C0>; 570 clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
571 power-domains = <&cpg_clocks>; 571 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
572 #address-cells = <1>; 572 #address-cells = <1>;
573 #size-cells = <0>; 573 #size-cells = <0>;
574 i2c-scl-internal-delay-ns = <6>; 574 i2c-scl-internal-delay-ns = <6>;
@@ -580,7 +580,7 @@
580 reg = <0 0xe6518000 0 0x40>; 580 reg = <0 0xe6518000 0 0x40>;
581 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 581 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
582 clocks = <&mstp9_clks R8A7794_CLK_I2C1>; 582 clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
583 power-domains = <&cpg_clocks>; 583 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
584 #address-cells = <1>; 584 #address-cells = <1>;
585 #size-cells = <0>; 585 #size-cells = <0>;
586 i2c-scl-internal-delay-ns = <6>; 586 i2c-scl-internal-delay-ns = <6>;
@@ -592,7 +592,7 @@
592 reg = <0 0xe6530000 0 0x40>; 592 reg = <0 0xe6530000 0 0x40>;
593 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 593 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
594 clocks = <&mstp9_clks R8A7794_CLK_I2C2>; 594 clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
595 power-domains = <&cpg_clocks>; 595 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
596 #address-cells = <1>; 596 #address-cells = <1>;
597 #size-cells = <0>; 597 #size-cells = <0>;
598 i2c-scl-internal-delay-ns = <6>; 598 i2c-scl-internal-delay-ns = <6>;
@@ -604,7 +604,7 @@
604 reg = <0 0xe6540000 0 0x40>; 604 reg = <0 0xe6540000 0 0x40>;
605 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 605 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&mstp9_clks R8A7794_CLK_I2C3>; 606 clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
607 power-domains = <&cpg_clocks>; 607 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
608 #address-cells = <1>; 608 #address-cells = <1>;
609 #size-cells = <0>; 609 #size-cells = <0>;
610 i2c-scl-internal-delay-ns = <6>; 610 i2c-scl-internal-delay-ns = <6>;
@@ -616,7 +616,7 @@
616 reg = <0 0xe6520000 0 0x40>; 616 reg = <0 0xe6520000 0 0x40>;
617 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 617 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
618 clocks = <&mstp9_clks R8A7794_CLK_I2C4>; 618 clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
619 power-domains = <&cpg_clocks>; 619 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
620 #address-cells = <1>; 620 #address-cells = <1>;
621 #size-cells = <0>; 621 #size-cells = <0>;
622 i2c-scl-internal-delay-ns = <6>; 622 i2c-scl-internal-delay-ns = <6>;
@@ -628,7 +628,7 @@
628 reg = <0 0xe6528000 0 0x40>; 628 reg = <0 0xe6528000 0 0x40>;
629 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 629 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
630 clocks = <&mstp9_clks R8A7794_CLK_I2C5>; 630 clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
631 power-domains = <&cpg_clocks>; 631 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
632 #address-cells = <1>; 632 #address-cells = <1>;
633 #size-cells = <0>; 633 #size-cells = <0>;
634 i2c-scl-internal-delay-ns = <6>; 634 i2c-scl-internal-delay-ns = <6>;
@@ -642,7 +642,7 @@
642 clocks = <&mstp3_clks R8A7794_CLK_IIC0>; 642 clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
643 dmas = <&dmac0 0x61>, <&dmac0 0x62>; 643 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
644 dma-names = "tx", "rx"; 644 dma-names = "tx", "rx";
645 power-domains = <&cpg_clocks>; 645 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
646 #address-cells = <1>; 646 #address-cells = <1>;
647 #size-cells = <0>; 647 #size-cells = <0>;
648 status = "disabled"; 648 status = "disabled";
@@ -655,7 +655,7 @@
655 clocks = <&mstp3_clks R8A7794_CLK_IIC1>; 655 clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
656 dmas = <&dmac0 0x65>, <&dmac0 0x66>; 656 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
657 dma-names = "tx", "rx"; 657 dma-names = "tx", "rx";
658 power-domains = <&cpg_clocks>; 658 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
659 #address-cells = <1>; 659 #address-cells = <1>;
660 #size-cells = <0>; 660 #size-cells = <0>;
661 status = "disabled"; 661 status = "disabled";
@@ -668,7 +668,7 @@
668 clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>; 668 clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>;
669 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; 669 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
670 dma-names = "tx", "rx"; 670 dma-names = "tx", "rx";
671 power-domains = <&cpg_clocks>; 671 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
672 reg-io-width = <4>; 672 reg-io-width = <4>;
673 status = "disabled"; 673 status = "disabled";
674 }; 674 };
@@ -678,7 +678,7 @@
678 reg = <0 0xee100000 0 0x200>; 678 reg = <0 0xee100000 0 0x200>;
679 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 679 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
680 clocks = <&mstp3_clks R8A7794_CLK_SDHI0>; 680 clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
681 power-domains = <&cpg_clocks>; 681 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
682 status = "disabled"; 682 status = "disabled";
683 }; 683 };
684 684
@@ -687,7 +687,7 @@
687 reg = <0 0xee140000 0 0x100>; 687 reg = <0 0xee140000 0 0x100>;
688 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 688 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&mstp3_clks R8A7794_CLK_SDHI1>; 689 clocks = <&mstp3_clks R8A7794_CLK_SDHI1>;
690 power-domains = <&cpg_clocks>; 690 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
691 status = "disabled"; 691 status = "disabled";
692 }; 692 };
693 693
@@ -696,7 +696,7 @@
696 reg = <0 0xee160000 0 0x100>; 696 reg = <0 0xee160000 0 0x100>;
697 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 697 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
698 clocks = <&mstp3_clks R8A7794_CLK_SDHI2>; 698 clocks = <&mstp3_clks R8A7794_CLK_SDHI2>;
699 power-domains = <&cpg_clocks>; 699 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
700 status = "disabled"; 700 status = "disabled";
701 }; 701 };
702 702
@@ -707,7 +707,7 @@
707 clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>; 707 clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>;
708 dmas = <&dmac0 0x17>, <&dmac0 0x18>; 708 dmas = <&dmac0 0x17>, <&dmac0 0x18>;
709 dma-names = "tx", "rx"; 709 dma-names = "tx", "rx";
710 power-domains = <&cpg_clocks>; 710 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
711 num-cs = <1>; 711 num-cs = <1>;
712 #address-cells = <1>; 712 #address-cells = <1>;
713 #size-cells = <0>; 713 #size-cells = <0>;
@@ -719,7 +719,7 @@
719 reg = <0 0xe6ef0000 0 0x1000>; 719 reg = <0 0xe6ef0000 0 0x1000>;
720 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 720 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
721 clocks = <&mstp8_clks R8A7794_CLK_VIN0>; 721 clocks = <&mstp8_clks R8A7794_CLK_VIN0>;
722 power-domains = <&cpg_clocks>; 722 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
723 status = "disabled"; 723 status = "disabled";
724 }; 724 };
725 725
@@ -728,7 +728,7 @@
728 reg = <0 0xe6ef1000 0 0x1000>; 728 reg = <0 0xe6ef1000 0 0x1000>;
729 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 729 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&mstp8_clks R8A7794_CLK_VIN1>; 730 clocks = <&mstp8_clks R8A7794_CLK_VIN1>;
731 power-domains = <&cpg_clocks>; 731 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
732 status = "disabled"; 732 status = "disabled";
733 }; 733 };
734 734
@@ -739,7 +739,7 @@
739 <0 0xee080000 0 0x1100>; 739 <0 0xee080000 0 0x1100>;
740 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 740 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
741 clocks = <&mstp7_clks R8A7794_CLK_EHCI>; 741 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
742 power-domains = <&cpg_clocks>; 742 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
743 status = "disabled"; 743 status = "disabled";
744 744
745 bus-range = <0 0>; 745 bus-range = <0 0>;
@@ -774,7 +774,7 @@
774 <0 0xee0c0000 0 0x1100>; 774 <0 0xee0c0000 0 0x1100>;
775 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 775 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
776 clocks = <&mstp7_clks R8A7794_CLK_EHCI>; 776 clocks = <&mstp7_clks R8A7794_CLK_EHCI>;
777 power-domains = <&cpg_clocks>; 777 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
778 status = "disabled"; 778 status = "disabled";
779 779
780 bus-range = <1 1>; 780 bus-range = <1 1>;
@@ -807,7 +807,7 @@
807 reg = <0 0xe6590000 0 0x100>; 807 reg = <0 0xe6590000 0 0x100>;
808 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 808 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
809 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>; 809 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
810 power-domains = <&cpg_clocks>; 810 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
811 renesas,buswait = <4>; 811 renesas,buswait = <4>;
812 phys = <&usb0 1>; 812 phys = <&usb0 1>;
813 phy-names = "usb"; 813 phy-names = "usb";
@@ -821,7 +821,7 @@
821 #size-cells = <0>; 821 #size-cells = <0>;
822 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>; 822 clocks = <&mstp7_clks R8A7794_CLK_HSUSB>;
823 clock-names = "usbhs"; 823 clock-names = "usbhs";
824 power-domains = <&cpg_clocks>; 824 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
825 status = "disabled"; 825 status = "disabled";
826 826
827 usb0: usb-channel@0 { 827 usb0: usb-channel@0 {
@@ -869,7 +869,7 @@
869 clocks = <&mstp9_clks R8A7794_CLK_RCAN0>, 869 clocks = <&mstp9_clks R8A7794_CLK_RCAN0>,
870 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>; 870 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
871 clock-names = "clkp1", "clkp2", "can_clk"; 871 clock-names = "clkp1", "clkp2", "can_clk";
872 power-domains = <&cpg_clocks>; 872 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
873 status = "disabled"; 873 status = "disabled";
874 }; 874 };
875 875
@@ -880,7 +880,7 @@
880 clocks = <&mstp9_clks R8A7794_CLK_RCAN1>, 880 clocks = <&mstp9_clks R8A7794_CLK_RCAN1>,
881 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>; 881 <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
882 clock-names = "clkp1", "clkp2", "can_clk"; 882 clock-names = "clkp1", "clkp2", "can_clk";
883 power-domains = <&cpg_clocks>; 883 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
884 status = "disabled"; 884 status = "disabled";
885 }; 885 };
886 886