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authorChen Feng <puck.chen@hisilicon.com>2017-06-14 23:04:04 -0400
committerWei Xu <xuwei5@hisilicon.com>2017-06-15 06:50:22 -0400
commit254b07b2a24c17282e9b69bd253bdb8c73914ea4 (patch)
tree86163d9ce4252274d002a9524352ca3a236d83de
parentd94eab860df85289a6ded46e890f70ebbe4f4252 (diff)
arm64: dts: hi3660: Add uarts nodes
Add nodes uart0 to uart4 and uart6 for hi3660 SoC. Enable uart3 and uart6, disable uart5, in hikey960 board dts. On HiKey960: - UART6 is used as default console, and is wired out through low speed expansion connector. - UART3 has RTS/CTS hardware handshake, and is wired out through low speed expansion connector. - UART5 is not used in commercial launched boards. So disable it. - UART4 is connected to Bluetooth, WL1837. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Reviewed-by: Zhangfei Gao <zhangfei.gao@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts20
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3660.dtsi74
2 files changed, 91 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 1a4d6c5bfd38..0a3f2e00eb78 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -15,11 +15,17 @@
15 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; 15 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
16 16
17 aliases { 17 aliases {
18 serial5 = &uart5; /* console UART */ 18 serial0 = &uart0;
19 serial1 = &uart1;
20 serial2 = &uart2;
21 serial3 = &uart3;
22 serial4 = &uart4;
23 serial5 = &uart5;
24 serial6 = &uart6;
19 }; 25 };
20 26
21 chosen { 27 chosen {
22 stdout-path = "serial5:115200n8"; 28 stdout-path = "serial6:115200n8";
23 }; 29 };
24 30
25 memory@0 { 31 memory@0 {
@@ -51,6 +57,14 @@
51 status = "okay"; 57 status = "okay";
52}; 58};
53 59
54&uart5 { 60&uart3 {
61 /* On Low speed expansion */
62 label = "LS-UART0";
63 status = "okay";
64};
65
66&uart6 {
67 /* On Low speed expansion */
68 label = "LS-UART1";
55 status = "okay"; 69 status = "okay";
56}; 70};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index b03be4d0d167..7a90c92d1755 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -242,6 +242,66 @@
242 status = "disabled"; 242 status = "disabled";
243 }; 243 };
244 244
245 uart0: serial@fdf02000 {
246 compatible = "arm,pl011", "arm,primecell";
247 reg = <0x0 0xfdf02000 0x0 0x1000>;
248 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
249 clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
250 <&crg_ctrl HI3660_PCLK>;
251 clock-names = "uartclk", "apb_pclk";
252 pinctrl-names = "default";
253 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
254 status = "disabled";
255 };
256
257 uart1: serial@fdf00000 {
258 compatible = "arm,pl011", "arm,primecell";
259 reg = <0x0 0xfdf00000 0x0 0x1000>;
260 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
261 clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
262 <&crg_ctrl HI3660_CLK_GATE_UART1>;
263 clock-names = "uartclk", "apb_pclk";
264 pinctrl-names = "default";
265 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
266 status = "disabled";
267 };
268
269 uart2: serial@fdf03000 {
270 compatible = "arm,pl011", "arm,primecell";
271 reg = <0x0 0xfdf03000 0x0 0x1000>;
272 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
273 clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
274 <&crg_ctrl HI3660_PCLK>;
275 clock-names = "uartclk", "apb_pclk";
276 pinctrl-names = "default";
277 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
278 status = "disabled";
279 };
280
281 uart3: serial@ffd74000 {
282 compatible = "arm,pl011", "arm,primecell";
283 reg = <0x0 0xffd74000 0x0 0x1000>;
284 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&crg_ctrl HI3660_FACTOR_UART3>,
286 <&crg_ctrl HI3660_PCLK>;
287 clock-names = "uartclk", "apb_pclk";
288 pinctrl-names = "default";
289 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
290 status = "disabled";
291 };
292
293 uart4: serial@fdf01000 {
294 compatible = "arm,pl011", "arm,primecell";
295 reg = <0x0 0xfdf01000 0x0 0x1000>;
296 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>,
298 <&crg_ctrl HI3660_CLK_GATE_UART4>;
299 clock-names = "uartclk", "apb_pclk";
300 pinctrl-names = "default";
301 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
302 status = "disabled";
303 };
304
245 uart5: serial@fdf05000 { 305 uart5: serial@fdf05000 {
246 compatible = "arm,pl011", "arm,primecell"; 306 compatible = "arm,pl011", "arm,primecell";
247 reg = <0x0 0xfdf05000 0x0 0x1000>; 307 reg = <0x0 0xfdf05000 0x0 0x1000>;
@@ -249,6 +309,20 @@
249 clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>, 309 clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
250 <&crg_ctrl HI3660_CLK_GATE_UART5>; 310 <&crg_ctrl HI3660_CLK_GATE_UART5>;
251 clock-names = "uartclk", "apb_pclk"; 311 clock-names = "uartclk", "apb_pclk";
312 pinctrl-names = "default";
313 pinctrl-0 = <&uart5_pmx_func &uart5_cfg_func>;
314 status = "disabled";
315 };
316
317 uart6: serial@fff32000 {
318 compatible = "arm,pl011", "arm,primecell";
319 reg = <0x0 0xfff32000 0x0 0x1000>;
320 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
321 clocks = <&crg_ctrl HI3660_CLK_UART6>,
322 <&crg_ctrl HI3660_PCLK>;
323 clock-names = "uartclk", "apb_pclk";
324 pinctrl-names = "default";
325 pinctrl-0 = <&uart6_pmx_func &uart6_cfg_func>;
252 status = "disabled"; 326 status = "disabled";
253 }; 327 };
254 328