aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGeert Uytterhoeven <geert+renesas@glider.be>2017-04-28 08:58:44 -0400
committerSimon Horman <horms+renesas@verge.net.au>2017-05-22 08:54:39 -0400
commit253ed045a34d16d9f8305e18069a8843925046a5 (patch)
tree92d66b01679944ac6ba5a7f1525944ad347ae12b
parentd25e8ff0d5aaf8b1040829d9eb837a71b2b3ed5e (diff)
arm64: dts: renesas: Extract common ULCB board support
The Renesas ULCB development board can be equipped with either an R-Car H3 or M3-W SiP, which are pin-compatible. Both boards use different DTBs. Reduce duplication by extracting common ULCB board support into its own .dtsi file. References to SoC-specific clocks are handled through cpp definitions. Sort device nodes while at it. For H3ULCB, there are no functional changes. For M3ULCB, the following new devices are now described in DT: - External audio, CAN, and PCIe clocks, - CS2000 clock generator, - AK4613 Audio Codec. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts341
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts201
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb.dtsi353
3 files changed, 359 insertions, 536 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 3574965e0747..a1fbf0ab8ad8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -9,24 +9,16 @@
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 */ 10 */
11 11
12#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
13
12/dts-v1/; 14/dts-v1/;
13#include "r8a7795.dtsi" 15#include "r8a7795.dtsi"
14#include <dt-bindings/gpio/gpio.h> 16#include "ulcb.dtsi"
15#include <dt-bindings/input/input.h>
16 17
17/ { 18/ {
18 model = "Renesas H3ULCB board based on r8a7795"; 19 model = "Renesas H3ULCB board based on r8a7795";
19 compatible = "renesas,h3ulcb", "renesas,r8a7795"; 20 compatible = "renesas,h3ulcb", "renesas,r8a7795";
20 21
21 aliases {
22 serial0 = &scif2;
23 ethernet0 = &avb;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 memory@48000000 { 22 memory@48000000 {
31 device_type = "memory"; 23 device_type = "memory";
32 /* first 128MB is reserved for secure area. */ 24 /* first 128MB is reserved for secure area. */
@@ -47,331 +39,4 @@
47 device_type = "memory"; 39 device_type = "memory";
48 reg = <0x7 0x00000000 0x0 0x40000000>; 40 reg = <0x7 0x00000000 0x0 0x40000000>;
49 }; 41 };
50
51 leds {
52 compatible = "gpio-leds";
53
54 led5 {
55 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
56 };
57 led6 {
58 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
59 };
60 };
61
62 keyboard {
63 compatible = "gpio-keys";
64
65 key-1 {
66 linux,code = <KEY_1>;
67 label = "SW3";
68 wakeup-source;
69 debounce-interval = <20>;
70 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
71 };
72 };
73
74 x12_clk: x12 {
75 compatible = "fixed-clock";
76 #clock-cells = <0>;
77 clock-frequency = <24576000>;
78 };
79
80 reg_1p8v: regulator0 {
81 compatible = "regulator-fixed";
82 regulator-name = "fixed-1.8V";
83 regulator-min-microvolt = <1800000>;
84 regulator-max-microvolt = <1800000>;
85 regulator-boot-on;
86 regulator-always-on;
87 };
88
89 reg_3p3v: regulator1 {
90 compatible = "regulator-fixed";
91 regulator-name = "fixed-3.3V";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 regulator-boot-on;
95 regulator-always-on;
96 };
97
98 vcc_sdhi0: regulator-vcc-sdhi0 {
99 compatible = "regulator-fixed";
100
101 regulator-name = "SDHI0 Vcc";
102 regulator-min-microvolt = <3300000>;
103 regulator-max-microvolt = <3300000>;
104
105 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
106 enable-active-high;
107 };
108
109 vccq_sdhi0: regulator-vccq-sdhi0 {
110 compatible = "regulator-gpio";
111
112 regulator-name = "SDHI0 VccQ";
113 regulator-min-microvolt = <1800000>;
114 regulator-max-microvolt = <3300000>;
115
116 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
117 gpios-states = <1>;
118 states = <3300000 1
119 1800000 0>;
120 };
121
122 audio_clkout: audio-clkout {
123 /*
124 * This is same as <&rcar_sound 0>
125 * but needed to avoid cs2000/rcar_sound probe dead-lock
126 */
127 compatible = "fixed-clock";
128 #clock-cells = <0>;
129 clock-frequency = <11289600>;
130 };
131
132 rsnd_ak4613: sound {
133 compatible = "simple-audio-card";
134
135 simple-audio-card,format = "left_j";
136 simple-audio-card,bitclock-master = <&sndcpu>;
137 simple-audio-card,frame-master = <&sndcpu>;
138
139 sndcpu: simple-audio-card,cpu {
140 sound-dai = <&rcar_sound>;
141 };
142
143 sndcodec: simple-audio-card,codec {
144 sound-dai = <&ak4613>;
145 };
146 };
147};
148
149&extal_clk {
150 clock-frequency = <16666666>;
151};
152
153&extalr_clk {
154 clock-frequency = <32768>;
155};
156
157&pfc {
158 pinctrl-0 = <&scif_clk_pins>;
159 pinctrl-names = "default";
160
161 scif2_pins: scif2 {
162 groups = "scif2_data_a";
163 function = "scif2";
164 };
165
166 scif_clk_pins: scif_clk {
167 groups = "scif_clk_a";
168 function = "scif_clk";
169 };
170
171 i2c2_pins: i2c2 {
172 groups = "i2c2_a";
173 function = "i2c2";
174 };
175
176 avb_pins: avb {
177 groups = "avb_mdc";
178 function = "avb";
179 };
180
181 sdhi0_pins: sd0 {
182 groups = "sdhi0_data4", "sdhi0_ctrl";
183 function = "sdhi0";
184 power-source = <3300>;
185 };
186
187 sdhi0_pins_uhs: sd0_uhs {
188 groups = "sdhi0_data4", "sdhi0_ctrl";
189 function = "sdhi0";
190 power-source = <1800>;
191 };
192
193 sdhi2_pins: sd2 {
194 groups = "sdhi2_data8", "sdhi2_ctrl";
195 function = "sdhi2";
196 power-source = <3300>;
197 };
198
199 sdhi2_pins_uhs: sd2_uhs {
200 groups = "sdhi2_data8", "sdhi2_ctrl";
201 function = "sdhi2";
202 power-source = <1800>;
203 };
204
205 sound_pins: sound {
206 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
207 function = "ssi";
208 };
209
210 sound_clk_pins: sound-clk {
211 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
212 "audio_clkout_a", "audio_clkout3_a";
213 function = "audio_clk";
214 };
215
216 usb1_pins: usb1 {
217 groups = "usb1";
218 function = "usb1";
219 };
220};
221
222&scif2 {
223 pinctrl-0 = <&scif2_pins>;
224 pinctrl-names = "default";
225
226 status = "okay";
227};
228
229&scif_clk {
230 clock-frequency = <14745600>;
231};
232
233&i2c2 {
234 pinctrl-0 = <&i2c2_pins>;
235 pinctrl-names = "default";
236
237 status = "okay";
238
239 clock-frequency = <100000>;
240
241 ak4613: codec@10 {
242 compatible = "asahi-kasei,ak4613";
243 #sound-dai-cells = <0>;
244 reg = <0x10>;
245 clocks = <&rcar_sound 3>;
246
247 asahi-kasei,in1-single-end;
248 asahi-kasei,in2-single-end;
249 asahi-kasei,out1-single-end;
250 asahi-kasei,out2-single-end;
251 asahi-kasei,out3-single-end;
252 asahi-kasei,out4-single-end;
253 asahi-kasei,out5-single-end;
254 asahi-kasei,out6-single-end;
255 };
256
257 cs2000: clk-multiplier@4f {
258 #clock-cells = <0>;
259 compatible = "cirrus,cs2000-cp";
260 reg = <0x4f>;
261 clocks = <&audio_clkout>, <&x12_clk>;
262 clock-names = "clk_in", "ref_clk";
263
264 assigned-clocks = <&cs2000>;
265 assigned-clock-rates = <24576000>; /* 1/1 divide */
266 };
267};
268
269&rcar_sound {
270 pinctrl-0 = <&sound_pins &sound_clk_pins>;
271 pinctrl-names = "default";
272
273 /* Single DAI */
274 #sound-dai-cells = <0>;
275
276 /* audio_clkout0/1/2/3 */
277 #clock-cells = <1>;
278 clock-frequency = <11289600>;
279
280 status = "okay";
281
282 /* update <audio_clk_b> to <cs2000> */
283 clocks = <&cpg CPG_MOD 1005>,
284 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
285 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
286 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
287 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
288 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
289 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
290 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
291 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
292 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
293 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
294 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
295 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
296 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
297 <&audio_clk_a>, <&cs2000>,
298 <&audio_clk_c>,
299 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
300
301 rcar_sound,dai {
302 dai0 {
303 playback = <&ssi0 &src0 &dvc0>;
304 capture = <&ssi1 &src1 &dvc1>;
305 };
306 };
307};
308
309&sdhi0 {
310 pinctrl-0 = <&sdhi0_pins>;
311 pinctrl-1 = <&sdhi0_pins_uhs>;
312 pinctrl-names = "default", "state_uhs";
313
314 vmmc-supply = <&vcc_sdhi0>;
315 vqmmc-supply = <&vccq_sdhi0>;
316 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
317 bus-width = <4>;
318 sd-uhs-sdr50;
319 status = "okay";
320};
321
322&sdhi2 {
323 /* used for on-board 8bit eMMC */
324 pinctrl-0 = <&sdhi2_pins>;
325 pinctrl-1 = <&sdhi2_pins_uhs>;
326 pinctrl-names = "default", "state_uhs";
327
328 vmmc-supply = <&reg_3p3v>;
329 vqmmc-supply = <&reg_1p8v>;
330 bus-width = <8>;
331 mmc-hs200-1_8v;
332 non-removable;
333 status = "okay";
334};
335
336&ssi1 {
337 shared-pin;
338};
339
340&wdt0 {
341 timeout-sec = <60>;
342 status = "okay";
343};
344
345&audio_clk_a {
346 clock-frequency = <22579200>;
347};
348
349&avb {
350 pinctrl-0 = <&avb_pins>;
351 pinctrl-names = "default";
352 renesas,no-ether-link;
353 phy-handle = <&phy0>;
354 status = "okay";
355
356 phy0: ethernet-phy@0 {
357 rxc-skew-ps = <1500>;
358 reg = <0>;
359 interrupt-parent = <&gpio2>;
360 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
361 };
362};
363
364&usb2_phy1 {
365 pinctrl-0 = <&usb1_pins>;
366 pinctrl-names = "default";
367
368 status = "okay";
369};
370
371&ehci1 {
372 status = "okay";
373};
374
375&ohci1 {
376 status = "okay";
377}; 42};
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index 440d93e8388d..38b58b7fca4b 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -9,24 +9,16 @@
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 */ 10 */
11 11
12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4
13
12/dts-v1/; 14/dts-v1/;
13#include "r8a7796.dtsi" 15#include "r8a7796.dtsi"
14#include <dt-bindings/gpio/gpio.h> 16#include "ulcb.dtsi"
15#include <dt-bindings/input/input.h>
16 17
17/ { 18/ {
18 model = "Renesas M3ULCB board based on r8a7796"; 19 model = "Renesas M3ULCB board based on r8a7796";
19 compatible = "renesas,m3ulcb", "renesas,r8a7796"; 20 compatible = "renesas,m3ulcb", "renesas,r8a7796";
20 21
21 aliases {
22 serial0 = &scif2;
23 ethernet0 = &avb;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 memory@48000000 { 22 memory@48000000 {
31 device_type = "memory"; 23 device_type = "memory";
32 /* first 128MB is reserved for secure area. */ 24 /* first 128MB is reserved for secure area. */
@@ -37,191 +29,4 @@
37 device_type = "memory"; 29 device_type = "memory";
38 reg = <0x6 0x00000000 0x0 0x40000000>; 30 reg = <0x6 0x00000000 0x0 0x40000000>;
39 }; 31 };
40
41 leds {
42 compatible = "gpio-leds";
43
44 led5 {
45 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
46 };
47 led6 {
48 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
49 };
50 };
51
52 keyboard {
53 compatible = "gpio-keys";
54
55 key-1 {
56 linux,code = <KEY_1>;
57 label = "SW3";
58 wakeup-source;
59 debounce-interval = <20>;
60 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
61 };
62 };
63
64 reg_1p8v: regulator0 {
65 compatible = "regulator-fixed";
66 regulator-name = "fixed-1.8V";
67 regulator-min-microvolt = <1800000>;
68 regulator-max-microvolt = <1800000>;
69 regulator-boot-on;
70 regulator-always-on;
71 };
72
73 reg_3p3v: regulator1 {
74 compatible = "regulator-fixed";
75 regulator-name = "fixed-3.3V";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
78 regulator-boot-on;
79 regulator-always-on;
80 };
81
82 vcc_sdhi0: regulator-vcc-sdhi0 {
83 compatible = "regulator-fixed";
84
85 regulator-name = "SDHI0 Vcc";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88
89 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
90 enable-active-high;
91 };
92
93 vccq_sdhi0: regulator-vccq-sdhi0 {
94 compatible = "regulator-gpio";
95
96 regulator-name = "SDHI0 VccQ";
97 regulator-min-microvolt = <1800000>;
98 regulator-max-microvolt = <3300000>;
99
100 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
101 gpios-states = <1>;
102 states = <3300000 1
103 1800000 0>;
104 };
105};
106
107&extal_clk {
108 clock-frequency = <16666666>;
109};
110
111&extalr_clk {
112 clock-frequency = <32768>;
113};
114
115&pfc {
116 pinctrl-0 = <&scif_clk_pins>;
117 pinctrl-names = "default";
118
119 avb_pins: avb {
120 groups = "avb_mdc";
121 function = "avb";
122 };
123
124 scif2_pins: scif2 {
125 groups = "scif2_data_a";
126 function = "scif2";
127 };
128
129 scif_clk_pins: scif_clk {
130 groups = "scif_clk_a";
131 function = "scif_clk";
132 };
133
134 i2c2_pins: i2c2 {
135 groups = "i2c2_a";
136 function = "i2c2";
137 };
138
139 sdhi0_pins: sd0 {
140 groups = "sdhi0_data4", "sdhi0_ctrl";
141 function = "sdhi0";
142 power-source = <3300>;
143 };
144
145 sdhi0_pins_uhs: sd0_uhs {
146 groups = "sdhi0_data4", "sdhi0_ctrl";
147 function = "sdhi0";
148 power-source = <1800>;
149 };
150
151 sdhi2_pins: sd2 {
152 groups = "sdhi2_data8", "sdhi2_ctrl";
153 function = "sdhi2";
154 power-source = <3300>;
155 };
156
157 sdhi2_pins_uhs: sd2_uhs {
158 groups = "sdhi2_data8", "sdhi2_ctrl";
159 function = "sdhi2";
160 power-source = <1800>;
161 };
162};
163
164&avb {
165 pinctrl-0 = <&avb_pins>;
166 pinctrl-names = "default";
167 renesas,no-ether-link;
168 phy-handle = <&phy0>;
169 status = "okay";
170
171 phy0: ethernet-phy@0 {
172 rxc-skew-ps = <1500>;
173 reg = <0>;
174 interrupt-parent = <&gpio2>;
175 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
176 };
177};
178
179&sdhi0 {
180 pinctrl-0 = <&sdhi0_pins>;
181 pinctrl-1 = <&sdhi0_pins_uhs>;
182 pinctrl-names = "default", "state_uhs";
183
184 vmmc-supply = <&vcc_sdhi0>;
185 vqmmc-supply = <&vccq_sdhi0>;
186 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
187 bus-width = <4>;
188 sd-uhs-sdr50;
189 status = "okay";
190};
191
192&sdhi2 {
193 /* used for on-board 8bit eMMC */
194 pinctrl-0 = <&sdhi2_pins>;
195 pinctrl-1 = <&sdhi2_pins_uhs>;
196 pinctrl-names = "default", "state_uhs";
197
198 vmmc-supply = <&reg_3p3v>;
199 vqmmc-supply = <&reg_1p8v>;
200 bus-width = <8>;
201 mmc-hs200-1_8v;
202 non-removable;
203 status = "okay";
204};
205
206&scif2 {
207 pinctrl-0 = <&scif2_pins>;
208 pinctrl-names = "default";
209
210 status = "okay";
211};
212
213&scif_clk {
214 clock-frequency = <14745600>;
215};
216
217&i2c2 {
218 pinctrl-0 = <&i2c2_pins>;
219 pinctrl-names = "default";
220
221 status = "okay";
222};
223
224&wdt0 {
225 timeout-sec = <60>;
226 status = "okay";
227}; 32};
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
new file mode 100644
index 000000000000..2bc7ceb2efa4
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -0,0 +1,353 @@
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16 model = "Renesas R-Car Gen3 ULCB board";
17
18 aliases {
19 serial0 = &scif2;
20 ethernet0 = &avb;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 audio_clkout: audio-clkout {
28 /*
29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
31 */
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <11289600>;
35 };
36
37 keyboard {
38 compatible = "gpio-keys";
39
40 key-1 {
41 linux,code = <KEY_1>;
42 label = "SW3";
43 wakeup-source;
44 debounce-interval = <20>;
45 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
46 };
47 };
48
49 leds {
50 compatible = "gpio-leds";
51
52 led5 {
53 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
54 };
55 led6 {
56 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
57 };
58 };
59
60 reg_1p8v: regulator0 {
61 compatible = "regulator-fixed";
62 regulator-name = "fixed-1.8V";
63 regulator-min-microvolt = <1800000>;
64 regulator-max-microvolt = <1800000>;
65 regulator-boot-on;
66 regulator-always-on;
67 };
68
69 reg_3p3v: regulator1 {
70 compatible = "regulator-fixed";
71 regulator-name = "fixed-3.3V";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
74 regulator-boot-on;
75 regulator-always-on;
76 };
77
78 rsnd_ak4613: sound {
79 compatible = "simple-audio-card";
80
81 simple-audio-card,format = "left_j";
82 simple-audio-card,bitclock-master = <&sndcpu>;
83 simple-audio-card,frame-master = <&sndcpu>;
84
85 sndcpu: simple-audio-card,cpu {
86 sound-dai = <&rcar_sound>;
87 };
88
89 sndcodec: simple-audio-card,codec {
90 sound-dai = <&ak4613>;
91 };
92 };
93
94 vcc_sdhi0: regulator-vcc-sdhi0 {
95 compatible = "regulator-fixed";
96
97 regulator-name = "SDHI0 Vcc";
98 regulator-min-microvolt = <3300000>;
99 regulator-max-microvolt = <3300000>;
100
101 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
102 enable-active-high;
103 };
104
105 vccq_sdhi0: regulator-vccq-sdhi0 {
106 compatible = "regulator-gpio";
107
108 regulator-name = "SDHI0 VccQ";
109 regulator-min-microvolt = <1800000>;
110 regulator-max-microvolt = <3300000>;
111
112 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
113 gpios-states = <1>;
114 states = <3300000 1
115 1800000 0>;
116 };
117
118 x12_clk: x12 {
119 compatible = "fixed-clock";
120 #clock-cells = <0>;
121 clock-frequency = <24576000>;
122 };
123};
124
125&audio_clk_a {
126 clock-frequency = <22579200>;
127};
128
129&avb {
130 pinctrl-0 = <&avb_pins>;
131 pinctrl-names = "default";
132 renesas,no-ether-link;
133 phy-handle = <&phy0>;
134 status = "okay";
135
136 phy0: ethernet-phy@0 {
137 rxc-skew-ps = <1500>;
138 reg = <0>;
139 interrupt-parent = <&gpio2>;
140 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
141 };
142};
143
144&ehci1 {
145 status = "okay";
146};
147
148&extal_clk {
149 clock-frequency = <16666666>;
150};
151
152&extalr_clk {
153 clock-frequency = <32768>;
154};
155
156&i2c2 {
157 pinctrl-0 = <&i2c2_pins>;
158 pinctrl-names = "default";
159
160 status = "okay";
161
162 clock-frequency = <100000>;
163
164 ak4613: codec@10 {
165 compatible = "asahi-kasei,ak4613";
166 #sound-dai-cells = <0>;
167 reg = <0x10>;
168 clocks = <&rcar_sound 3>;
169
170 asahi-kasei,in1-single-end;
171 asahi-kasei,in2-single-end;
172 asahi-kasei,out1-single-end;
173 asahi-kasei,out2-single-end;
174 asahi-kasei,out3-single-end;
175 asahi-kasei,out4-single-end;
176 asahi-kasei,out5-single-end;
177 asahi-kasei,out6-single-end;
178 };
179
180 cs2000: clk-multiplier@4f {
181 #clock-cells = <0>;
182 compatible = "cirrus,cs2000-cp";
183 reg = <0x4f>;
184 clocks = <&audio_clkout>, <&x12_clk>;
185 clock-names = "clk_in", "ref_clk";
186
187 assigned-clocks = <&cs2000>;
188 assigned-clock-rates = <24576000>; /* 1/1 divide */
189 };
190};
191
192&ohci1 {
193 status = "okay";
194};
195
196&pfc {
197 pinctrl-0 = <&scif_clk_pins>;
198 pinctrl-names = "default";
199
200 avb_pins: avb {
201 groups = "avb_mdc";
202 function = "avb";
203 };
204
205 i2c2_pins: i2c2 {
206 groups = "i2c2_a";
207 function = "i2c2";
208 };
209
210 scif2_pins: scif2 {
211 groups = "scif2_data_a";
212 function = "scif2";
213 };
214
215 scif_clk_pins: scif_clk {
216 groups = "scif_clk_a";
217 function = "scif_clk";
218 };
219
220 sdhi0_pins: sd0 {
221 groups = "sdhi0_data4", "sdhi0_ctrl";
222 function = "sdhi0";
223 power-source = <3300>;
224 };
225
226 sdhi0_pins_uhs: sd0_uhs {
227 groups = "sdhi0_data4", "sdhi0_ctrl";
228 function = "sdhi0";
229 power-source = <1800>;
230 };
231
232 sdhi2_pins: sd2 {
233 groups = "sdhi2_data8", "sdhi2_ctrl";
234 function = "sdhi2";
235 power-source = <3300>;
236 };
237
238 sdhi2_pins_uhs: sd2_uhs {
239 groups = "sdhi2_data8", "sdhi2_ctrl";
240 function = "sdhi2";
241 power-source = <1800>;
242 };
243
244 sound_pins: sound {
245 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
246 function = "ssi";
247 };
248
249 sound_clk_pins: sound-clk {
250 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
251 "audio_clkout_a", "audio_clkout3_a";
252 function = "audio_clk";
253 };
254
255 usb1_pins: usb1 {
256 groups = "usb1";
257 function = "usb1";
258 };
259};
260
261&rcar_sound {
262 pinctrl-0 = <&sound_pins &sound_clk_pins>;
263 pinctrl-names = "default";
264
265 /* Single DAI */
266 #sound-dai-cells = <0>;
267
268 /* audio_clkout0/1/2/3 */
269 #clock-cells = <1>;
270 clock-frequency = <11289600>;
271
272 status = "okay";
273
274 /* update <audio_clk_b> to <cs2000> */
275 clocks = <&cpg CPG_MOD 1005>,
276 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
277 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
278 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
279 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
280 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
281 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
282 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
283 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
284 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
285 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
286 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
287 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
288 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
289 <&audio_clk_a>, <&cs2000>,
290 <&audio_clk_c>,
291 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
292
293 rcar_sound,dai {
294 dai0 {
295 playback = <&ssi0 &src0 &dvc0>;
296 capture = <&ssi1 &src1 &dvc1>;
297 };
298 };
299};
300
301&scif2 {
302 pinctrl-0 = <&scif2_pins>;
303 pinctrl-names = "default";
304
305 status = "okay";
306};
307
308&scif_clk {
309 clock-frequency = <14745600>;
310};
311
312&sdhi0 {
313 pinctrl-0 = <&sdhi0_pins>;
314 pinctrl-1 = <&sdhi0_pins_uhs>;
315 pinctrl-names = "default", "state_uhs";
316
317 vmmc-supply = <&vcc_sdhi0>;
318 vqmmc-supply = <&vccq_sdhi0>;
319 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
320 bus-width = <4>;
321 sd-uhs-sdr50;
322 status = "okay";
323};
324
325&sdhi2 {
326 /* used for on-board 8bit eMMC */
327 pinctrl-0 = <&sdhi2_pins>;
328 pinctrl-1 = <&sdhi2_pins_uhs>;
329 pinctrl-names = "default", "state_uhs";
330
331 vmmc-supply = <&reg_3p3v>;
332 vqmmc-supply = <&reg_1p8v>;
333 bus-width = <8>;
334 mmc-hs200-1_8v;
335 non-removable;
336 status = "okay";
337};
338
339&ssi1 {
340 shared-pin;
341};
342
343&usb2_phy1 {
344 pinctrl-0 = <&usb1_pins>;
345 pinctrl-names = "default";
346
347 status = "okay";
348};
349
350&wdt0 {
351 timeout-sec = <60>;
352 status = "okay";
353};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 02:38:56 -0400