diff options
author | Arnaldo Carvalho de Melo <acme@redhat.com> | 2018-08-20 09:13:13 -0400 |
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committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2018-08-20 09:13:13 -0400 |
commit | 252df177113575a66fc505169a29221d7232eb1e (patch) | |
tree | dc4c965e661163246a6110d15fe078543006427e | |
parent | 721f0dfc3ce821c6a32820ab63edfb48ed4af075 (diff) |
tools arch x86: Update tools's copy of cpufeatures.h
To get the changes in the following csets:
301d328a6f8b ("x86/cpufeatures: Add EPT_AD feature bit")
706d51681d63 ("x86/speculation: Support Enhanced IBRS on future CPUs")
No tools were affected, copy it to silence this perf tool build warning:
Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h'
diff -u tools/arch/x86/include/asm/cpufeatures.h arch/x86/include/asm/cpufeatures.h
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Feiner <pfeiner@google.com>
Cc: Sai Praneeth <sai.praneeth.prakhya@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wang Nan <wangnan0@huawei.com>
Link: https://lkml.kernel.org/n/tip-bvs8wgd5wp4lz9f0xf1iug5r@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
-rw-r--r-- | tools/arch/x86/include/asm/cpufeatures.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h index 5701f5cecd31..b5c60faf8429 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h | |||
@@ -219,6 +219,7 @@ | |||
219 | #define X86_FEATURE_IBPB ( 7*32+26) /* Indirect Branch Prediction Barrier */ | 219 | #define X86_FEATURE_IBPB ( 7*32+26) /* Indirect Branch Prediction Barrier */ |
220 | #define X86_FEATURE_STIBP ( 7*32+27) /* Single Thread Indirect Branch Predictors */ | 220 | #define X86_FEATURE_STIBP ( 7*32+27) /* Single Thread Indirect Branch Predictors */ |
221 | #define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */ | 221 | #define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */ |
222 | #define X86_FEATURE_IBRS_ENHANCED ( 7*32+29) /* Enhanced IBRS */ | ||
222 | 223 | ||
223 | /* Virtualization flags: Linux defined, word 8 */ | 224 | /* Virtualization flags: Linux defined, word 8 */ |
224 | #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ | 225 | #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ |
@@ -229,7 +230,7 @@ | |||
229 | 230 | ||
230 | #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer VMMCALL to VMCALL */ | 231 | #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer VMMCALL to VMCALL */ |
231 | #define X86_FEATURE_XENPV ( 8*32+16) /* "" Xen paravirtual guest */ | 232 | #define X86_FEATURE_XENPV ( 8*32+16) /* "" Xen paravirtual guest */ |
232 | 233 | #define X86_FEATURE_EPT_AD ( 8*32+17) /* Intel Extended Page Table access-dirty bit */ | |
233 | 234 | ||
234 | /* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */ | 235 | /* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */ |
235 | #define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* RDFSBASE, WRFSBASE, RDGSBASE, WRGSBASE instructions*/ | 236 | #define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* RDFSBASE, WRFSBASE, RDGSBASE, WRGSBASE instructions*/ |