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authorBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>2014-11-13 10:01:07 -0500
committerEduardo Valentin <edubezval@gmail.com>2014-11-20 09:53:04 -0500
commit2516593e4ef0230b184e8ce4dd3de6caed5e6131 (patch)
treebf446355e133928b7eb8324a2480bf9199f1cd55
parent0c78b4d88f1c5e09800ad99d705699cda7411d51 (diff)
thermal: exynos: simplify HW_TRIP level setting
Simplify HW_TRIP level setting in exynos_tmu_initialize() (don't pretend that the current code is hardware and configuration independent and just do SoC type check explicitly). Then remove no longer needed reg->threshold_[th2,th3_l0_shift] abstractions (only assigned for Exynos5440 in exynos5440_tmu_registers) and EXYNOS_MAX_TRIGGER_PER_REG define. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-rw-r--r--drivers/thermal/samsung/exynos_tmu.c10
-rw-r--r--drivers/thermal/samsung/exynos_tmu.h4
-rw-r--r--drivers/thermal/samsung/exynos_tmu_data.c2
-rw-r--r--drivers/thermal/samsung/exynos_tmu_data.h2
4 files changed, 5 insertions, 13 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 411c4650353e..1c15b37821cb 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -252,18 +252,18 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
252 (pdata->trigger_type[i] == HW_TRIP)) { 252 (pdata->trigger_type[i] == HW_TRIP)) {
253 threshold_code = temp_to_code(data, 253 threshold_code = temp_to_code(data,
254 pdata->trigger_levels[i]); 254 pdata->trigger_levels[i]);
255 if (i == EXYNOS_MAX_TRIGGER_PER_REG - 1) { 255 if (data->soc != SOC_ARCH_EXYNOS5440) {
256 /* 1-4 level to be assigned in th0 reg */ 256 /* 1-4 level to be assigned in th0 reg */
257 rising_threshold &= ~(0xff << 8 * i); 257 rising_threshold &= ~(0xff << 8 * i);
258 rising_threshold |= threshold_code << 8 * i; 258 rising_threshold |= threshold_code << 8 * i;
259 writel(rising_threshold, 259 writel(rising_threshold,
260 data->base + reg->threshold_th0); 260 data->base + EXYNOS_THD_TEMP_RISE);
261 } else if (i == EXYNOS_MAX_TRIGGER_PER_REG) { 261 } else {
262 /* 5th level to be assigned in th2 reg */ 262 /* 5th level to be assigned in th2 reg */
263 rising_threshold = 263 rising_threshold =
264 threshold_code << reg->threshold_th3_l0_shift; 264 threshold_code << EXYNOS5440_TMU_TH_RISE4_SHIFT;
265 writel(rising_threshold, 265 writel(rising_threshold,
266 data->base + reg->threshold_th2); 266 data->base + EXYNOS5440_TMU_S0_7_TH2);
267 } 267 }
268 con = readl(data->base + reg->tmu_ctrl); 268 con = readl(data->base + reg->tmu_ctrl);
269 con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); 269 con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index e8510aaceb05..ebe39b433da4 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -80,8 +80,6 @@ enum soc_type {
80 * @tmu_cur_temp: register containing the current temperature of the TMU. 80 * @tmu_cur_temp: register containing the current temperature of the TMU.
81 * @threshold_th0: Register containing first set of rising levels. 81 * @threshold_th0: Register containing first set of rising levels.
82 * @threshold_th1: Register containing second set of rising levels. 82 * @threshold_th1: Register containing second set of rising levels.
83 * @threshold_th2: Register containing third set of rising levels.
84 * @threshold_th3_l0_shift: shift bits of level0 threshold temperature.
85 * @tmu_inten: register containing the different threshold interrupt 83 * @tmu_inten: register containing the different threshold interrupt
86 enable bits. 84 enable bits.
87 * @inten_rise0_shift: shift bits of rising 0 interrupt bits. 85 * @inten_rise0_shift: shift bits of rising 0 interrupt bits.
@@ -100,8 +98,6 @@ struct exynos_tmu_registers {
100 98
101 u32 threshold_th0; 99 u32 threshold_th0;
102 u32 threshold_th1; 100 u32 threshold_th1;
103 u32 threshold_th2;
104 u32 threshold_th3_l0_shift;
105 101
106 u32 tmu_inten; 102 u32 tmu_inten;
107 u32 inten_rise0_shift; 103 u32 inten_rise0_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index fe063d486ea4..f81c940fe884 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -391,8 +391,6 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
391 .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP, 391 .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
392 .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0, 392 .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
393 .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1, 393 .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1,
394 .threshold_th2 = EXYNOS5440_TMU_S0_7_TH2,
395 .threshold_th3_l0_shift = EXYNOS5440_TMU_TH_RISE4_SHIFT,
396 .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN, 394 .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN,
397 .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT, 395 .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT,
398 .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT, 396 .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index e02ef992f71e..2af312d8f7b5 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -72,8 +72,6 @@
72#define EXYNOS_EMUL_DATA_MASK 0xFF 72#define EXYNOS_EMUL_DATA_MASK 0xFF
73#define EXYNOS_EMUL_ENABLE 0x1 73#define EXYNOS_EMUL_ENABLE 0x1
74 74
75#define EXYNOS_MAX_TRIGGER_PER_REG 4
76
77/* Exynos5260 specific */ 75/* Exynos5260 specific */
78#define EXYNOS5260_TMU_REG_INTEN 0xC0 76#define EXYNOS5260_TMU_REG_INTEN 0xC0
79#define EXYNOS5260_TMU_REG_INTSTAT 0xC4 77#define EXYNOS5260_TMU_REG_INTSTAT 0xC4