aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2017-03-30 10:50:39 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2017-03-31 07:07:17 -0400
commit25112b64b3d261c192369acb56727d44840a5d30 (patch)
tree2f68495691ae331d173170d0bb9ecaefe571b885
parent72022a705e1da854653e56b67bef57b72f1392eb (diff)
drm/i915: Wait for all engines to be idle as part of i915_gem_wait_for_idle()
Make i915_gem_wait_for_idle() be a little heavier in order to try and guarantee that the GPU is indeed idle (by checking each engine individually is idle, i.e. all writes are complete and the rings stopped) after waiting for in-flight requests to be completed. v2: And return the final error. v3: Break the wait_for() out from under the WARN -- the macro expansion is hideous and unreadable in the warning message v4: If wait_for_engine() fails the result is catastrophic, mark the device as wedged and wait for the repair team. References: https://bugs.freedesktop.org/show_bug.cgi?id=98836 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/20170330145041.9005-4-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c29
1 files changed, 26 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 70bc72634a91..bbc6f1c9f175 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3271,6 +3271,29 @@ static int wait_for_timeline(struct i915_gem_timeline *tl, unsigned int flags)
3271 return 0; 3271 return 0;
3272} 3272}
3273 3273
3274static int wait_for_engine(struct intel_engine_cs *engine, int timeout_ms)
3275{
3276 return wait_for(intel_engine_is_idle(engine), timeout_ms);
3277}
3278
3279static int wait_for_engines(struct drm_i915_private *i915)
3280{
3281 struct intel_engine_cs *engine;
3282 enum intel_engine_id id;
3283
3284 for_each_engine(engine, i915, id) {
3285 if (GEM_WARN_ON(wait_for_engine(engine, 50))) {
3286 i915_gem_set_wedged(i915);
3287 return -EIO;
3288 }
3289
3290 GEM_BUG_ON(intel_engine_get_seqno(engine) !=
3291 intel_engine_last_submit(engine));
3292 }
3293
3294 return 0;
3295}
3296
3274int i915_gem_wait_for_idle(struct drm_i915_private *i915, unsigned int flags) 3297int i915_gem_wait_for_idle(struct drm_i915_private *i915, unsigned int flags)
3275{ 3298{
3276 int ret; 3299 int ret;
@@ -3288,13 +3311,13 @@ int i915_gem_wait_for_idle(struct drm_i915_private *i915, unsigned int flags)
3288 3311
3289 i915_gem_retire_requests(i915); 3312 i915_gem_retire_requests(i915);
3290 GEM_BUG_ON(i915->gt.active_requests); 3313 GEM_BUG_ON(i915->gt.active_requests);
3314
3315 ret = wait_for_engines(i915);
3291 } else { 3316 } else {
3292 ret = wait_for_timeline(&i915->gt.global_timeline, flags); 3317 ret = wait_for_timeline(&i915->gt.global_timeline, flags);
3293 if (ret)
3294 return ret;
3295 } 3318 }
3296 3319
3297 return 0; 3320 return ret;
3298} 3321}
3299 3322
3300/** Flushes the GTT write domain for the object if it's dirty. */ 3323/** Flushes the GTT write domain for the object if it's dirty. */