diff options
author | Jiri Pirko <jiri@mellanox.com> | 2016-03-10 17:10:21 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2016-03-13 22:30:01 -0400 |
commit | 233fa44bd67ae0c6cbc01f96ab87d66a6c57812e (patch) | |
tree | c83aafab20c9f2954c1625f750d68319d4c1b77c | |
parent | cea8768f333e3f0bc231d8b815aa4a9e63fa990c (diff) |
mlxsw: pci: Implement reset done check
Firmware now tells us that the reset is done by passing a magic value
via register. Use it to shorten the wait in case this is supported.
With old firmware, we still wait until the timeout is reached.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci.c | 15 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci.h | 3 |
2 files changed, 14 insertions, 4 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 7992c553c1f5..7f4173c8eda3 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c | |||
@@ -1681,11 +1681,18 @@ static const struct mlxsw_bus mlxsw_pci_bus = { | |||
1681 | 1681 | ||
1682 | static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci) | 1682 | static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci) |
1683 | { | 1683 | { |
1684 | unsigned long end; | ||
1685 | |||
1684 | mlxsw_pci_write32(mlxsw_pci, SW_RESET, MLXSW_PCI_SW_RESET_RST_BIT); | 1686 | mlxsw_pci_write32(mlxsw_pci, SW_RESET, MLXSW_PCI_SW_RESET_RST_BIT); |
1685 | /* Current firware does not let us know when the reset is done. | 1687 | wmb(); /* reset needs to be written before we read control register */ |
1686 | * So we just wait here for constant time and hope for the best. | 1688 | end = jiffies + msecs_to_jiffies(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS); |
1687 | */ | 1689 | do { |
1688 | msleep(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS); | 1690 | u32 val = mlxsw_pci_read32(mlxsw_pci, FW_READY); |
1691 | |||
1692 | if ((val & MLXSW_PCI_FW_READY_MASK) == MLXSW_PCI_FW_READY_MAGIC) | ||
1693 | break; | ||
1694 | cond_resched(); | ||
1695 | } while (time_before(jiffies, end)); | ||
1689 | return 0; | 1696 | return 0; |
1690 | } | 1697 | } |
1691 | 1698 | ||
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.h b/drivers/net/ethernet/mellanox/mlxsw/pci.h index 912106054ff2..d942a3e6fa41 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.h | |||
@@ -61,6 +61,9 @@ | |||
61 | #define MLXSW_PCI_SW_RESET 0xF0010 | 61 | #define MLXSW_PCI_SW_RESET 0xF0010 |
62 | #define MLXSW_PCI_SW_RESET_RST_BIT BIT(0) | 62 | #define MLXSW_PCI_SW_RESET_RST_BIT BIT(0) |
63 | #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000 | 63 | #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000 |
64 | #define MLXSW_PCI_FW_READY 0xA1844 | ||
65 | #define MLXSW_PCI_FW_READY_MASK 0xFF | ||
66 | #define MLXSW_PCI_FW_READY_MAGIC 0x5E | ||
64 | 67 | ||
65 | #define MLXSW_PCI_DOORBELL_SDQ_OFFSET 0x000 | 68 | #define MLXSW_PCI_DOORBELL_SDQ_OFFSET 0x000 |
66 | #define MLXSW_PCI_DOORBELL_RDQ_OFFSET 0x200 | 69 | #define MLXSW_PCI_DOORBELL_RDQ_OFFSET 0x200 |