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authorArnd Bergmann <arnd@arndb.de>2018-01-19 10:09:49 -0500
committerArnd Bergmann <arnd@arndb.de>2018-01-19 10:09:49 -0500
commit232e9d4c954afc7213df563013643544b09b1555 (patch)
tree18fd0ba7caa66b001f168b019f0116fff0204b29
parent1ebf790bef650b78e115a892facb69d9d404c25b (diff)
parent95220046a62c00b5afb1aa7c1971989d427db977 (diff)
Merge tag 'gemini-dts-update-3' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "DTS changes to enable Ethernet on the Gemini boards" from Linus Walleij: I realize it's late. Like really late. But Dmiller merged the ethernet bindings and the driver for Gemini ethernet, and Gemini is all about networking. So for a late merge consideration here are the two patches giving ethernet on Gemini, on top of what is already merged. * tag 'gemini-dts-update-3' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: Add ethernet to a bunch of platforms ARM: dts: Add ethernet to the Gemini SoC
Diffstat
-rw-r--r--arch/arm/boot/dts/gemini-dlink-dns-313.dts62
-rw-r--r--arch/arm/boot/dts/gemini-nas4220b.dts56
-rw-r--r--arch/arm/boot/dts/gemini-rut1xx.dts12
-rw-r--r--arch/arm/boot/dts/gemini-wbd111.dts12
-rw-r--r--arch/arm/boot/dts/gemini-wbd222.dts20
-rw-r--r--arch/arm/boot/dts/gemini.dtsi44
6 files changed, 205 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
index 076b8d89befb..08568ce24d06 100644
--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -214,6 +214,56 @@
214 groups = "gpio1dgrp"; 214 groups = "gpio1dgrp";
215 }; 215 };
216 }; 216 };
217 pinctrl-gmii {
218 mux {
219 function = "gmii";
220 groups = "gmii_gmac0_grp";
221 };
222 /*
223 * In the vendor Linux tree, these values are set for the C3
224 * version of the SL3512 ASIC with the comment "benson suggest"
225 */
226 conf0 {
227 pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
228 skew-delay = <0>;
229 };
230 conf1 {
231 pins = "T8 GMAC0 RXC";
232 skew-delay = <10>;
233 };
234 conf2 {
235 pins = "T11 GMAC1 RXC";
236 skew-delay = <15>;
237 };
238 conf3 {
239 pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
240 skew-delay = <7>;
241 };
242 conf4 {
243 pins = "V7 GMAC0 TXC", "P10 GMAC1 TXC";
244 skew-delay = <10>;
245 };
246 conf5 {
247 /* The data lines all have default skew */
248 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
249 "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
250 "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
251 "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
252 "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
253 "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
254 skew-delay = <7>;
255 };
256 conf6 {
257 pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
258 "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
259 skew-delay = <5>;
260 };
261 /* Set up drive strength on GMAC0 to 16 mA */
262 conf7 {
263 groups = "gmii_gmac0_grp";
264 drive-strength = <16>;
265 };
266 };
217 }; 267 };
218 }; 268 };
219 269
@@ -234,6 +284,18 @@
234 pinctrl-0 = <&gpio1_default_pins>; 284 pinctrl-0 = <&gpio1_default_pins>;
235 }; 285 };
236 286
287 ethernet@60000000 {
288 status = "okay";
289
290 ethernet-port@0 {
291 phy-mode = "rgmii";
292 phy-handle = <&phy0>;
293 };
294 ethernet-port@1 {
295 /* Not used in this platform */
296 };
297 };
298
237 ata@63000000 { 299 ata@63000000 {
238 status = "okay"; 300 status = "okay";
239 }; 301 };
diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
index 943d2d07fac7..8bbb6f85d161 100644
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -129,6 +129,50 @@
129 groups = "gpio1dgrp"; 129 groups = "gpio1dgrp";
130 }; 130 };
131 }; 131 };
132 pinctrl-gmii {
133 mux {
134 function = "gmii";
135 groups = "gmii_gmac0_grp";
136 };
137 /* Settings come from OpenWRT */
138 conf0 {
139 pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
140 skew-delay = <0>;
141 };
142 conf1 {
143 pins = "T8 GMAC0 RXC", "T11 GMAC1 RXC";
144 skew-delay = <15>;
145 };
146 conf2 {
147 pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
148 skew-delay = <7>;
149 };
150 conf3 {
151 pins = "V7 GMAC0 TXC";
152 skew-delay = <11>;
153 };
154 conf4 {
155 pins = "P10 GMAC1 TXC";
156 skew-delay = <10>;
157 };
158 conf5 {
159 /* The data lines all have default skew */
160 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
161 "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
162 "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
163 "R7 GMAC0 TXD2", "P7 GMAC0 TXD3",
164 "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
165 "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
166 "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
167 "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
168 skew-delay = <7>;
169 };
170 /* Set up drive strength on GMAC0 to 16 mA */
171 conf6 {
172 groups = "gmii_gmac0_grp";
173 drive-strength = <16>;
174 };
175 };
132 }; 176 };
133 }; 177 };
134 178
@@ -143,6 +187,18 @@
143 pinctrl-0 = <&gpio1_default_pins>; 187 pinctrl-0 = <&gpio1_default_pins>;
144 }; 188 };
145 189
190 ethernet@60000000 {
191 status = "okay";
192
193 ethernet-port@0 {
194 phy-mode = "rgmii";
195 phy-handle = <&phy0>;
196 };
197 ethernet-port@1 {
198 /* Not used in this platform */
199 };
200 };
201
146 ata@63000000 { 202 ata@63000000 {
147 status = "okay"; 203 status = "okay";
148 }; 204 };
diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts
index fd55528bba56..15f20178642c 100644
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -114,5 +114,17 @@
114 pinctrl-names = "default"; 114 pinctrl-names = "default";
115 pinctrl-0 = <&gpio1_default_pins>; 115 pinctrl-0 = <&gpio1_default_pins>;
116 }; 116 };
117
118 ethernet@60000000 {
119 status = "okay";
120
121 ethernet-port@0 {
122 phy-mode = "rgmii";
123 phy-handle = <&phy0>;
124 };
125 ethernet-port@1 {
126 /* Not used in this platform */
127 };
128 };
117 }; 129 };
118}; 130};
diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts
index 389cb2b275c7..b4ec9ad85d72 100644
--- a/arch/arm/boot/dts/gemini-wbd111.dts
+++ b/arch/arm/boot/dts/gemini-wbd111.dts
@@ -160,5 +160,17 @@
160 <0x6000 0 0 3 &pci_intc 1>, 160 <0x6000 0 0 3 &pci_intc 1>,
161 <0x6000 0 0 4 &pci_intc 2>; 161 <0x6000 0 0 4 &pci_intc 2>;
162 }; 162 };
163
164 ethernet@60000000 {
165 status = "okay";
166
167 ethernet-port@0 {
168 phy-mode = "rgmii";
169 phy-handle = <&phy0>;
170 };
171 ethernet-port@1 {
172 /* Not used in this platform */
173 };
174 };
163 }; 175 };
164}; 176};
diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts
index 2f00e88292ac..6d25bcc046e7 100644
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -136,6 +136,13 @@
136 "gpio0bgrp"; 136 "gpio0bgrp";
137 }; 137 };
138 }; 138 };
139 pinctrl-gmii {
140 /* This platform use both the ethernet ports */
141 mux {
142 function = "gmii";
143 groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
144 };
145 };
139 }; 146 };
140 }; 147 };
141 148
@@ -165,5 +172,18 @@
165 <0x6000 0 0 3 &pci_intc 1>, 172 <0x6000 0 0 3 &pci_intc 1>,
166 <0x6000 0 0 4 &pci_intc 2>; 173 <0x6000 0 0 4 &pci_intc 2>;
167 }; 174 };
175
176 ethernet@60000000 {
177 status = "okay";
178
179 ethernet-port@0 {
180 phy-mode = "rgmii";
181 phy-handle = <&phy0>;
182 };
183 ethernet-port@1 {
184 phy-mode = "rgmii";
185 phy-handle = <&phy1>;
186 };
187 };
168 }; 188 };
169}; 189};
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
index cb5c925bd597..0568baca500a 100644
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -114,9 +114,16 @@
114 }; 114 };
115 }; 115 };
116 gmii_default_pins: pinctrl-gmii { 116 gmii_default_pins: pinctrl-gmii {
117 /*
118 * Only activate GMAC0 by default since
119 * GMAC1 will overlap with 8 GPIO lines
120 * gpio2a, gpio2b. Overlay groups with
121 * "gmii_gmac0_grp", "gmii_gmac1_grp" for
122 * both ethernet interfaces.
123 */
117 mux { 124 mux {
118 function = "gmii"; 125 function = "gmii";
119 groups = "gmiigrp"; 126 groups = "gmii_gmac0_grp";
120 }; 127 };
121 }; 128 };
122 pci_default_pins: pinctrl-pci { 129 pci_default_pins: pinctrl-pci {
@@ -316,6 +323,41 @@
316 }; 323 };
317 }; 324 };
318 325
326 ethernet@60000000 {
327 compatible = "cortina,gemini-ethernet";
328 reg = <0x60000000 0x4000>, /* Global registers, queue */
329 <0x60004000 0x2000>, /* V-bit */
330 <0x60006000 0x2000>; /* A-bit */
331 pinctrl-names = "default";
332 pinctrl-0 = <&gmii_default_pins>;
333 status = "disabled";
334 #address-cells = <1>;
335 #size-cells = <1>;
336 ranges;
337
338 gmac0: ethernet-port@0 {
339 compatible = "cortina,gemini-ethernet-port";
340 reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
341 <0x6000a000 0x2000>; /* Port 0 GMAC */
342 interrupt-parent = <&intcon>;
343 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
344 resets = <&syscon GEMINI_RESET_GMAC0>;
345 clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
346 clock-names = "PCLK";
347 };
348
349 gmac1: ethernet-port@1 {
350 compatible = "cortina,gemini-ethernet-port";
351 reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
352 <0x6000e000 0x2000>; /* Port 1 GMAC */
353 interrupt-parent = <&intcon>;
354 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
355 resets = <&syscon GEMINI_RESET_GMAC1>;
356 clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
357 clock-names = "PCLK";
358 };
359 };
360
319 ata@63000000 { 361 ata@63000000 {
320 compatible = "cortina,gemini-pata", "faraday,ftide010"; 362 compatible = "cortina,gemini-pata", "faraday,ftide010";
321 reg = <0x63000000 0x1000>; 363 reg = <0x63000000 0x1000>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-21 16:22:33 -0400