diff options
author | Rajendra Nayak <rnayak@codeaurora.org> | 2016-08-17 01:18:46 -0400 |
---|---|---|
committer | Andy Gross <andy.gross@linaro.org> | 2016-09-02 14:48:20 -0400 |
commit | 226366b95a95f85226c6ce77813e2afb940dca41 (patch) | |
tree | e6b4280ad5088b8b96410cb5f04020c0fe0e42a3 | |
parent | c8c876898b2ba09d06151d027485107bb470878f (diff) |
arm: dts: apq8084: Add thermal zones, tsens and qfprom nodes
Add thermal zones, tsens and qfprom nodes
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8084.dtsi | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 7c2df062a025..39eb7a4ed16a 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi | |||
@@ -94,6 +94,88 @@ | |||
94 | }; | 94 | }; |
95 | }; | 95 | }; |
96 | 96 | ||
97 | thermal-zones { | ||
98 | cpu-thermal0 { | ||
99 | polling-delay-passive = <250>; | ||
100 | polling-delay = <1000>; | ||
101 | |||
102 | thermal-sensors = <&tsens 5>; | ||
103 | |||
104 | trips { | ||
105 | cpu_alert0: trip0 { | ||
106 | temperature = <75000>; | ||
107 | hysteresis = <2000>; | ||
108 | type = "passive"; | ||
109 | }; | ||
110 | cpu_crit0: trip1 { | ||
111 | temperature = <110000>; | ||
112 | hysteresis = <2000>; | ||
113 | type = "critical"; | ||
114 | }; | ||
115 | }; | ||
116 | }; | ||
117 | |||
118 | cpu-thermal1 { | ||
119 | polling-delay-passive = <250>; | ||
120 | polling-delay = <1000>; | ||
121 | |||
122 | thermal-sensors = <&tsens 6>; | ||
123 | |||
124 | trips { | ||
125 | cpu_alert1: trip0 { | ||
126 | temperature = <75000>; | ||
127 | hysteresis = <2000>; | ||
128 | type = "passive"; | ||
129 | }; | ||
130 | cpu_crit1: trip1 { | ||
131 | temperature = <110000>; | ||
132 | hysteresis = <2000>; | ||
133 | type = "critical"; | ||
134 | }; | ||
135 | }; | ||
136 | }; | ||
137 | |||
138 | cpu-thermal2 { | ||
139 | polling-delay-passive = <250>; | ||
140 | polling-delay = <1000>; | ||
141 | |||
142 | thermal-sensors = <&tsens 7>; | ||
143 | |||
144 | trips { | ||
145 | cpu_alert2: trip0 { | ||
146 | temperature = <75000>; | ||
147 | hysteresis = <2000>; | ||
148 | type = "passive"; | ||
149 | }; | ||
150 | cpu_crit2: trip1 { | ||
151 | temperature = <110000>; | ||
152 | hysteresis = <2000>; | ||
153 | type = "critical"; | ||
154 | }; | ||
155 | }; | ||
156 | }; | ||
157 | |||
158 | cpu-thermal3 { | ||
159 | polling-delay-passive = <250>; | ||
160 | polling-delay = <1000>; | ||
161 | |||
162 | thermal-sensors = <&tsens 8>; | ||
163 | |||
164 | trips { | ||
165 | cpu_alert3: trip0 { | ||
166 | temperature = <75000>; | ||
167 | hysteresis = <2000>; | ||
168 | type = "passive"; | ||
169 | }; | ||
170 | cpu_crit3: trip1 { | ||
171 | temperature = <110000>; | ||
172 | hysteresis = <2000>; | ||
173 | type = "critical"; | ||
174 | }; | ||
175 | }; | ||
176 | }; | ||
177 | }; | ||
178 | |||
97 | cpu-pmu { | 179 | cpu-pmu { |
98 | compatible = "qcom,krait-pmu"; | 180 | compatible = "qcom,krait-pmu"; |
99 | interrupts = <1 7 0xf04>; | 181 | interrupts = <1 7 0xf04>; |
@@ -150,6 +232,27 @@ | |||
150 | reg = <0xf9011000 0x1000>; | 232 | reg = <0xf9011000 0x1000>; |
151 | }; | 233 | }; |
152 | 234 | ||
235 | qfprom: qfprom@fc4bc000 { | ||
236 | #address-cells = <1>; | ||
237 | #size-cells = <1>; | ||
238 | compatible = "qcom,qfprom"; | ||
239 | reg = <0xfc4bc000 0x1000>; | ||
240 | tsens_calib: calib@d0 { | ||
241 | reg = <0xd0 0x18>; | ||
242 | }; | ||
243 | tsens_backup: backup@440 { | ||
244 | reg = <0x440 0x10>; | ||
245 | }; | ||
246 | }; | ||
247 | |||
248 | tsens: thermal-sensor@fc4a8000 { | ||
249 | compatible = "qcom,msm8974-tsens"; | ||
250 | reg = <0xfc4a8000 0x2000>; | ||
251 | nvmem-cells = <&tsens_calib>, <&tsens_backup>; | ||
252 | nvmem-cell-names = "calib", "calib_backup"; | ||
253 | #thermal-sensor-cells = <1>; | ||
254 | }; | ||
255 | |||
153 | timer@f9020000 { | 256 | timer@f9020000 { |
154 | #address-cells = <1>; | 257 | #address-cells = <1>; |
155 | #size-cells = <1>; | 258 | #size-cells = <1>; |