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authorChris Wilson <chris@chris-wilson.co.uk>2018-07-17 16:29:32 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2018-07-19 05:13:26 -0400
commit209b7955e59e361fe8ba1911fac68f46355ac0cf (patch)
treed9730ff7c61a4e1710b766c06a328d0f0ab65ac8
parentc7d2959f032ddb0cb3528df4cc08b6b78acb9a09 (diff)
drm/i915/guc: Keep guc submission permanently engaged
We make a decision at module load whether to use the GuC backend or not, but lose that setup across set-wedge. Currently, the guc doesn't override the engine->set_default_submission hook letting execlists sneak back in temporarily on unwedging leading to an unbalanced park/unpark. v2: Remove comment about switching back temporarily to execlists on guc_submission_disable(). We currently only call disable on shutdown, and plan to also call disable before suspend and reset, in which case we will either restore guc submission or mark the driver as wedged, making the reset back to execlists pointless. v3: Move reset.prepare across Fixes: 63572937cebf ("drm/i915/execlists: Flush pending preemption events during reset") Testcase: igt/drv_module_reload/basic-reload-inject Testcase: igt/gem_eio Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Michał Winiarski <michal.winiarski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180717202932.1423-1-chris@chris-wilson.co.uk
-rw-r--r--drivers/gpu/drm/i915/intel_guc_submission.c41
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c4
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.h2
3 files changed, 31 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index 0fa1eb0bfff5..4aa5e6463e7b 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -1269,6 +1269,31 @@ static void guc_submission_unpark(struct intel_engine_cs *engine)
1269 intel_engine_pin_breadcrumbs_irq(engine); 1269 intel_engine_pin_breadcrumbs_irq(engine);
1270} 1270}
1271 1271
1272static void guc_set_default_submission(struct intel_engine_cs *engine)
1273{
1274 /*
1275 * We inherit a bunch of functions from execlists that we'd like
1276 * to keep using:
1277 *
1278 * engine->submit_request = execlists_submit_request;
1279 * engine->cancel_requests = execlists_cancel_requests;
1280 * engine->schedule = execlists_schedule;
1281 *
1282 * But we need to override the actual submission backend in order
1283 * to talk to the GuC.
1284 */
1285 intel_execlists_set_default_submission(engine);
1286
1287 engine->execlists.tasklet.func = guc_submission_tasklet;
1288
1289 engine->park = guc_submission_park;
1290 engine->unpark = guc_submission_unpark;
1291
1292 engine->reset.prepare = guc_reset_prepare;
1293
1294 engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
1295}
1296
1272int intel_guc_submission_enable(struct intel_guc *guc) 1297int intel_guc_submission_enable(struct intel_guc *guc)
1273{ 1298{
1274 struct drm_i915_private *dev_priv = guc_to_i915(guc); 1299 struct drm_i915_private *dev_priv = guc_to_i915(guc);
@@ -1307,17 +1332,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
1307 guc_interrupts_capture(dev_priv); 1332 guc_interrupts_capture(dev_priv);
1308 1333
1309 for_each_engine(engine, dev_priv, id) { 1334 for_each_engine(engine, dev_priv, id) {
1310 struct intel_engine_execlists * const execlists = 1335 engine->set_default_submission = guc_set_default_submission;
1311 &engine->execlists; 1336 engine->set_default_submission(engine);
1312
1313 execlists->tasklet.func = guc_submission_tasklet;
1314
1315 engine->reset.prepare = guc_reset_prepare;
1316
1317 engine->park = guc_submission_park;
1318 engine->unpark = guc_submission_unpark;
1319
1320 engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
1321 } 1337 }
1322 1338
1323 return 0; 1339 return 0;
@@ -1331,9 +1347,6 @@ void intel_guc_submission_disable(struct intel_guc *guc)
1331 1347
1332 guc_interrupts_release(dev_priv); 1348 guc_interrupts_release(dev_priv);
1333 guc_clients_doorbell_fini(guc); 1349 guc_clients_doorbell_fini(guc);
1334
1335 /* Revert back to manual ELSP submission */
1336 intel_engines_reset_default_submission(dev_priv);
1337} 1350}
1338 1351
1339#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) 1352#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index db5351e6a3a5..c64ed9090e29 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2295,7 +2295,7 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *engine)
2295 kfree(engine); 2295 kfree(engine);
2296} 2296}
2297 2297
2298static void execlists_set_default_submission(struct intel_engine_cs *engine) 2298void intel_execlists_set_default_submission(struct intel_engine_cs *engine)
2299{ 2299{
2300 engine->submit_request = execlists_submit_request; 2300 engine->submit_request = execlists_submit_request;
2301 engine->cancel_requests = execlists_cancel_requests; 2301 engine->cancel_requests = execlists_cancel_requests;
@@ -2335,7 +2335,7 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)
2335 engine->emit_breadcrumb = gen8_emit_breadcrumb; 2335 engine->emit_breadcrumb = gen8_emit_breadcrumb;
2336 engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz; 2336 engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz;
2337 2337
2338 engine->set_default_submission = execlists_set_default_submission; 2338 engine->set_default_submission = intel_execlists_set_default_submission;
2339 2339
2340 if (INTEL_GEN(engine->i915) < 11) { 2340 if (INTEL_GEN(engine->i915) < 11) {
2341 engine->irq_enable = gen8_logical_ring_enable_irq; 2341 engine->irq_enable = gen8_logical_ring_enable_irq;
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 1593194e930c..4dfb78e3ec7e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -104,4 +104,6 @@ struct i915_gem_context;
104 104
105void intel_lr_context_resume(struct drm_i915_private *dev_priv); 105void intel_lr_context_resume(struct drm_i915_private *dev_priv);
106 106
107void intel_execlists_set_default_submission(struct intel_engine_cs *engine);
108
107#endif /* _INTEL_LRC_H_ */ 109#endif /* _INTEL_LRC_H_ */