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authorAnshuman Khandual <anshuman.khandual@arm.com>2019-05-21 00:06:27 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2019-06-03 11:59:30 -0400
commit201d355c15c170d16741d43b865d5c0ab88a0afc (patch)
tree86295154bc67b70bcc7150ad833dfe84a57cb183
parent441a627806873c1b63d06dea4391e79c88b8e496 (diff)
arm64/mm: Move PTE_VALID from SW defined to HW page table entry definitions
PTE_VALID signifies that the last level page table entry is valid and it is MMU recognized while walking the page table. This is not a software defined PTE bit and should not be listed like one. Just move it to appropriate header file. Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Steve Capper <steve.capper@arm.com> Cc: Suzuki Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r--arch/arm64/include/asm/pgtable-hwdef.h1
-rw-r--r--arch/arm64/include/asm/pgtable-prot.h1
2 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index a69259cc1f16..974f0114ef1b 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -153,6 +153,7 @@
153/* 153/*
154 * Level 3 descriptor (PTE). 154 * Level 3 descriptor (PTE).
155 */ 155 */
156#define PTE_VALID (_AT(pteval_t, 1) << 0)
156#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) 157#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0)
157#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) 158#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0)
158#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0) 159#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0)
diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
index 986e41c4c32b..38c7148e2023 100644
--- a/arch/arm64/include/asm/pgtable-prot.h
+++ b/arch/arm64/include/asm/pgtable-prot.h
@@ -24,7 +24,6 @@
24/* 24/*
25 * Software defined PTE bits definition. 25 * Software defined PTE bits definition.
26 */ 26 */
27#define PTE_VALID (_AT(pteval_t, 1) << 0)
28#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ 27#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
29#define PTE_DIRTY (_AT(pteval_t, 1) << 55) 28#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
30#define PTE_SPECIAL (_AT(pteval_t, 1) << 56) 29#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)