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authorDavid S. Miller <davem@davemloft.net>2018-10-22 23:15:39 -0400
committerDavid S. Miller <davem@davemloft.net>2018-10-22 23:15:39 -0400
commit1fad1fe40e1636f2acd87468b6ee3a3748b4a588 (patch)
treef338e6fe07cedf8972b961b0b5bc3dbbb0918a41
parent604d415e2bd642b7e02c80e719e0396b9d4a77a6 (diff)
parentd6f092ca928f4ed615c11b40f5856ebe1f3d4dd2 (diff)
Merge branch 'octeontx2-af-NPC-parser-and-NIX-blocks-initialization'
Sunil Goutham says: ==================== octeontx2-af: NPC parser and NIX blocks initialization This patchset is a continuation to earlier submitted two patch series to add a new driver for Marvell's OcteonTX2 SOC's Resource virtualization unit (RVU) admin function driver. 1. octeontx2-af: Add RVU Admin Function driver https://www.spinics.net/lists/netdev/msg528272.html 2. octeontx2-af: NPA and NIX blocks initialization https://www.spinics.net/lists/netdev/msg529163.html This patch series adds more NIX block configuration logic and additionally adds NPC block parser profile configuration. In brief below is what this series adds. NIX block: - Support for PF/VF to allocate/free transmit scheduler queues, maintenance and their configuration. - Adds support for packet replication lists, only broadcast packets is covered for now. - Defines few RSS flow algorithms for HW to distribute packets. This is not the hash algorithsm (i.e toeplitz or crc32), here SW defines what fields in packet should HW take and calculate the hash. - Support for PF/VF to configure VTAG strip and capture capabilities. - Reset NIXLF statastics. NPC block: This block has multiple parser engines which support packet parsing at multiple layers and generates a parse result which is further used to generate a key. Based on packet field offsets in the key, SW can install packet forwarding rules. This patch series adds - Initial parser profile to be programmed into parser engines. - Default forwarding rules to forward packets to different logical interfaces having a NIXLF attached. - Support for promiscuous and multicast modes. Changes from v1: 1 Fixed kernel build failure when compiled with BIG_ENDIAN enabled. - Reported by Kbuild test robot 2 Fixed a warning observed when kernel is built with -Wunused-but-set-variable ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/Makefile3
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/cgx.c12
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/cgx.h1
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/common.h50
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/mbox.h110
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/npc.h262
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h5709
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu.c12
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu.h97
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c7
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c1067
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c816
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c71
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h61
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h35
15 files changed, 8306 insertions, 7 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/Makefile b/drivers/net/ethernet/marvell/octeontx2/af/Makefile
index 45b108f8f955..06329acf9c2c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/Makefile
+++ b/drivers/net/ethernet/marvell/octeontx2/af/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_OCTEONTX2_MBOX) += octeontx2_mbox.o
7obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o 7obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o
8 8
9octeontx2_mbox-y := mbox.o 9octeontx2_mbox-y := mbox.o
10octeontx2_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o 10octeontx2_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \
11 rvu_reg.o rvu_npc.o
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 352501b54aee..12db256c8c9f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -186,6 +186,18 @@ u64 cgx_lmac_addr_get(u8 cgx_id, u8 lmac_id)
186} 186}
187EXPORT_SYMBOL(cgx_lmac_addr_get); 187EXPORT_SYMBOL(cgx_lmac_addr_get);
188 188
189int cgx_set_pkind(void *cgxd, u8 lmac_id, int pkind)
190{
191 struct cgx *cgx = cgxd;
192
193 if (!cgx || lmac_id >= cgx->lmac_count)
194 return -ENODEV;
195
196 cgx_write(cgx, lmac_id, CGXX_CMRX_RX_ID_MAP, (pkind & 0x3F));
197 return 0;
198}
199EXPORT_SYMBOL(cgx_set_pkind);
200
189static inline u8 cgx_get_lmac_type(struct cgx *cgx, int lmac_id) 201static inline u8 cgx_get_lmac_type(struct cgx *cgx, int lmac_id)
190{ 202{
191 u64 cfg; 203 u64 cfg;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index ada25ed0765b..0a66d2717442 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -97,6 +97,7 @@ extern struct pci_driver cgx_driver;
97int cgx_get_cgx_cnt(void); 97int cgx_get_cgx_cnt(void);
98int cgx_get_lmac_cnt(void *cgxd); 98int cgx_get_lmac_cnt(void *cgxd);
99void *cgx_get_pdata(int cgx_id); 99void *cgx_get_pdata(int cgx_id);
100int cgx_set_pkind(void *cgxd, u8 lmac_id, int pkind);
100int cgx_lmac_evh_register(struct cgx_event_cb *cb, void *cgxd, int lmac_id); 101int cgx_lmac_evh_register(struct cgx_event_cb *cb, void *cgxd, int lmac_id);
101int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64 *tx_stat); 102int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64 *tx_stat);
102int cgx_get_rx_stats(void *cgxd, int lmac_id, int idx, u64 *rx_stat); 103int cgx_get_rx_stats(void *cgxd, int lmac_id, int idx, u64 *rx_stat);
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/common.h b/drivers/net/ethernet/marvell/octeontx2/af/common.h
index 28eb691185f4..d39ada404c8f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/common.h
@@ -143,6 +143,34 @@ enum nix_scheduler {
143 NIX_TXSCH_LVL_CNT = 0x5, 143 NIX_TXSCH_LVL_CNT = 0x5,
144}; 144};
145 145
146/* NIX RX action operation*/
147#define NIX_RX_ACTIONOP_DROP (0x0ull)
148#define NIX_RX_ACTIONOP_UCAST (0x1ull)
149#define NIX_RX_ACTIONOP_UCAST_IPSEC (0x2ull)
150#define NIX_RX_ACTIONOP_MCAST (0x3ull)
151#define NIX_RX_ACTIONOP_RSS (0x4ull)
152
153/* NIX TX action operation*/
154#define NIX_TX_ACTIONOP_DROP (0x0ull)
155#define NIX_TX_ACTIONOP_UCAST_DEFAULT (0x1ull)
156#define NIX_TX_ACTIONOP_UCAST_CHAN (0x2ull)
157#define NIX_TX_ACTIONOP_MCAST (0x3ull)
158#define NIX_TX_ACTIONOP_DROP_VIOL (0x5ull)
159
160#define NPC_MCAM_KEY_X1 0
161#define NPC_MCAM_KEY_X2 1
162#define NPC_MCAM_KEY_X4 2
163
164#define NIX_INTF_RX 0
165#define NIX_INTF_TX 1
166
167#define NIX_INTF_TYPE_CGX 0
168#define NIX_INTF_TYPE_LBK 1
169
170#define MAX_LMAC_PKIND 12
171#define NIX_LINK_CGX_LMAC(a, b) (0 + 4 * (a) + (b))
172#define NIX_CHAN_CGX_LMAC_CHX(a, b, c) (0x800 + 0x100 * (a) + 0x10 * (b) + (c))
173
146/* NIX LSO format indices. 174/* NIX LSO format indices.
147 * As of now TSO is the only one using, so statically assigning indices. 175 * As of now TSO is the only one using, so statically assigning indices.
148 */ 176 */
@@ -158,4 +186,26 @@ enum nix_scheduler {
158#define DEFAULT_RSS_CONTEXT_GROUP 0 186#define DEFAULT_RSS_CONTEXT_GROUP 0
159#define MAX_RSS_INDIR_TBL_SIZE 256 /* 1 << Max adder bits */ 187#define MAX_RSS_INDIR_TBL_SIZE 256 /* 1 << Max adder bits */
160 188
189/* NIX flow tag, key type flags */
190#define FLOW_KEY_TYPE_PORT BIT(0)
191#define FLOW_KEY_TYPE_IPV4 BIT(1)
192#define FLOW_KEY_TYPE_IPV6 BIT(2)
193#define FLOW_KEY_TYPE_TCP BIT(3)
194#define FLOW_KEY_TYPE_UDP BIT(4)
195#define FLOW_KEY_TYPE_SCTP BIT(5)
196
197/* NIX flow tag algorithm indices, max is 31 */
198enum {
199 FLOW_KEY_ALG_PORT,
200 FLOW_KEY_ALG_IP,
201 FLOW_KEY_ALG_TCP,
202 FLOW_KEY_ALG_UDP,
203 FLOW_KEY_ALG_SCTP,
204 FLOW_KEY_ALG_TCP_UDP,
205 FLOW_KEY_ALG_TCP_SCTP,
206 FLOW_KEY_ALG_UDP_SCTP,
207 FLOW_KEY_ALG_TCP_UDP_SCTP,
208 FLOW_KEY_ALG_MAX,
209};
210
161#endif /* COMMON_H */ 211#endif /* COMMON_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index c339024d04e0..a15a59c9a239 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -15,6 +15,7 @@
15#include <linux/sizes.h> 15#include <linux/sizes.h>
16 16
17#include "rvu_struct.h" 17#include "rvu_struct.h"
18#include "common.h"
18 19
19#define MBOX_SIZE SZ_64K 20#define MBOX_SIZE SZ_64K
20 21
@@ -151,7 +152,15 @@ M(NPA_HWCTX_DISABLE, 0x403, hwctx_disable_req, msg_rsp) \
151M(NIX_LF_ALLOC, 0x8000, nix_lf_alloc_req, nix_lf_alloc_rsp) \ 152M(NIX_LF_ALLOC, 0x8000, nix_lf_alloc_req, nix_lf_alloc_rsp) \
152M(NIX_LF_FREE, 0x8001, msg_req, msg_rsp) \ 153M(NIX_LF_FREE, 0x8001, msg_req, msg_rsp) \
153M(NIX_AQ_ENQ, 0x8002, nix_aq_enq_req, nix_aq_enq_rsp) \ 154M(NIX_AQ_ENQ, 0x8002, nix_aq_enq_req, nix_aq_enq_rsp) \
154M(NIX_HWCTX_DISABLE, 0x8003, hwctx_disable_req, msg_rsp) 155M(NIX_HWCTX_DISABLE, 0x8003, hwctx_disable_req, msg_rsp) \
156M(NIX_TXSCH_ALLOC, 0x8004, nix_txsch_alloc_req, nix_txsch_alloc_rsp) \
157M(NIX_TXSCH_FREE, 0x8005, nix_txsch_free_req, msg_rsp) \
158M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_config, msg_rsp) \
159M(NIX_STATS_RST, 0x8007, msg_req, msg_rsp) \
160M(NIX_VTAG_CFG, 0x8008, nix_vtag_config, msg_rsp) \
161M(NIX_RSS_FLOWKEY_CFG, 0x8009, nix_rss_flowkey_cfg, msg_rsp) \
162M(NIX_SET_MAC_ADDR, 0x800a, nix_set_mac_addr, msg_rsp) \
163M(NIX_SET_RX_MODE, 0x800b, nix_rx_mode, msg_rsp)
155 164
156/* Messages initiated by AF (range 0xC00 - 0xDFF) */ 165/* Messages initiated by AF (range 0xC00 - 0xDFF) */
157#define MBOX_UP_CGX_MESSAGES \ 166#define MBOX_UP_CGX_MESSAGES \
@@ -376,6 +385,10 @@ struct nix_lf_alloc_req {
376struct nix_lf_alloc_rsp { 385struct nix_lf_alloc_rsp {
377 struct mbox_msghdr hdr; 386 struct mbox_msghdr hdr;
378 u16 sqb_size; 387 u16 sqb_size;
388 u16 rx_chan_base;
389 u16 tx_chan_base;
390 u8 rx_chan_cnt; /* total number of RX channels */
391 u8 tx_chan_cnt; /* total number of TX channels */
379 u8 lso_tsov4_idx; 392 u8 lso_tsov4_idx;
380 u8 lso_tsov6_idx; 393 u8 lso_tsov6_idx;
381 u8 mac_addr[ETH_ALEN]; 394 u8 mac_addr[ETH_ALEN];
@@ -414,4 +427,99 @@ struct nix_aq_enq_rsp {
414 }; 427 };
415}; 428};
416 429
430/* Tx scheduler/shaper mailbox messages */
431
432#define MAX_TXSCHQ_PER_FUNC 128
433
434struct nix_txsch_alloc_req {
435 struct mbox_msghdr hdr;
436 /* Scheduler queue count request at each level */
437 u16 schq_contig[NIX_TXSCH_LVL_CNT]; /* No of contiguous queues */
438 u16 schq[NIX_TXSCH_LVL_CNT]; /* No of non-contiguous queues */
439};
440
441struct nix_txsch_alloc_rsp {
442 struct mbox_msghdr hdr;
443 /* Scheduler queue count allocated at each level */
444 u16 schq_contig[NIX_TXSCH_LVL_CNT];
445 u16 schq[NIX_TXSCH_LVL_CNT];
446 /* Scheduler queue list allocated at each level */
447 u16 schq_contig_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
448 u16 schq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
449};
450
451struct nix_txsch_free_req {
452 struct mbox_msghdr hdr;
453#define TXSCHQ_FREE_ALL BIT_ULL(0)
454 u16 flags;
455 /* Scheduler queue level to be freed */
456 u16 schq_lvl;
457 /* List of scheduler queues to be freed */
458 u16 schq;
459};
460
461struct nix_txschq_config {
462 struct mbox_msghdr hdr;
463 u8 lvl; /* SMQ/MDQ/TL4/TL3/TL2/TL1 */
464#define TXSCHQ_IDX_SHIFT 16
465#define TXSCHQ_IDX_MASK (BIT_ULL(10) - 1)
466#define TXSCHQ_IDX(reg, shift) (((reg) >> (shift)) & TXSCHQ_IDX_MASK)
467 u8 num_regs;
468#define MAX_REGS_PER_MBOX_MSG 20
469 u64 reg[MAX_REGS_PER_MBOX_MSG];
470 u64 regval[MAX_REGS_PER_MBOX_MSG];
471};
472
473struct nix_vtag_config {
474 struct mbox_msghdr hdr;
475 u8 vtag_size;
476 /* cfg_type is '0' for tx vlan cfg
477 * cfg_type is '1' for rx vlan cfg
478 */
479 u8 cfg_type;
480 union {
481 /* valid when cfg_type is '0' */
482 struct {
483 /* tx vlan0 tag(C-VLAN) */
484 u64 vlan0;
485 /* tx vlan1 tag(S-VLAN) */
486 u64 vlan1;
487 /* insert tx vlan tag */
488 u8 insert_vlan :1;
489 /* insert tx double vlan tag */
490 u8 double_vlan :1;
491 } tx;
492
493 /* valid when cfg_type is '1' */
494 struct {
495 /* rx vtag type index */
496 u8 vtag_type;
497 /* rx vtag strip */
498 u8 strip_vtag :1;
499 /* rx vtag capture */
500 u8 capture_vtag :1;
501 } rx;
502 };
503};
504
505struct nix_rss_flowkey_cfg {
506 struct mbox_msghdr hdr;
507 int mcam_index; /* MCAM entry index to modify */
508 u32 flowkey_cfg; /* Flowkey types selected */
509 u8 group; /* RSS context or group */
510};
511
512struct nix_set_mac_addr {
513 struct mbox_msghdr hdr;
514 u8 mac_addr[ETH_ALEN]; /* MAC address to be set for this pcifunc */
515};
516
517struct nix_rx_mode {
518 struct mbox_msghdr hdr;
519#define NIX_RX_MODE_UCAST BIT(0)
520#define NIX_RX_MODE_PROMISC BIT(1)
521#define NIX_RX_MODE_ALLMULTI BIT(2)
522 u16 mode;
523};
524
417#endif /* MBOX_H */ 525#endif /* MBOX_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
new file mode 100644
index 000000000000..f98b0113def3
--- /dev/null
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
@@ -0,0 +1,262 @@
1/* SPDX-License-Identifier: GPL-2.0
2 * Marvell OcteonTx2 RVU Admin Function driver
3 *
4 * Copyright (C) 2018 Marvell International Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef NPC_H
12#define NPC_H
13
14enum NPC_LID_E {
15 NPC_LID_LA = 0,
16 NPC_LID_LB,
17 NPC_LID_LC,
18 NPC_LID_LD,
19 NPC_LID_LE,
20 NPC_LID_LF,
21 NPC_LID_LG,
22 NPC_LID_LH,
23};
24
25#define NPC_LT_NA 0
26
27enum npc_kpu_la_ltype {
28 NPC_LT_LA_8023 = 1,
29 NPC_LT_LA_ETHER,
30};
31
32enum npc_kpu_lb_ltype {
33 NPC_LT_LB_ETAG = 1,
34 NPC_LT_LB_CTAG,
35 NPC_LT_LB_STAG,
36 NPC_LT_LB_BTAG,
37 NPC_LT_LB_QINQ,
38 NPC_LT_LB_ITAG,
39};
40
41enum npc_kpu_lc_ltype {
42 NPC_LT_LC_IP = 1,
43 NPC_LT_LC_IP6,
44 NPC_LT_LC_ARP,
45 NPC_LT_LC_RARP,
46 NPC_LT_LC_MPLS,
47 NPC_LT_LC_NSH,
48 NPC_LT_LC_PTP,
49 NPC_LT_LC_FCOE,
50};
51
52/* Don't modify Ltypes upto SCTP, otherwise it will
53 * effect flow tag calculation and thus RSS.
54 */
55enum npc_kpu_ld_ltype {
56 NPC_LT_LD_TCP = 1,
57 NPC_LT_LD_UDP,
58 NPC_LT_LD_ICMP,
59 NPC_LT_LD_SCTP,
60 NPC_LT_LD_IGMP,
61 NPC_LT_LD_ICMP6,
62 NPC_LT_LD_ESP,
63 NPC_LT_LD_AH,
64 NPC_LT_LD_GRE,
65 NPC_LT_LD_GRE_MPLS,
66 NPC_LT_LD_GRE_NSH,
67 NPC_LT_LD_TU_MPLS,
68};
69
70enum npc_kpu_le_ltype {
71 NPC_LT_LE_TU_ETHER = 1,
72 NPC_LT_LE_TU_PPP,
73 NPC_LT_LE_TU_MPLS_IN_NSH,
74 NPC_LT_LE_TU_3RD_NSH,
75};
76
77enum npc_kpu_lf_ltype {
78 NPC_LT_LF_TU_IP = 1,
79 NPC_LT_LF_TU_IP6,
80 NPC_LT_LF_TU_ARP,
81 NPC_LT_LF_TU_MPLS_IP,
82 NPC_LT_LF_TU_MPLS_IP6,
83 NPC_LT_LF_TU_MPLS_ETHER,
84};
85
86enum npc_kpu_lg_ltype {
87 NPC_LT_LG_TU_TCP = 1,
88 NPC_LT_LG_TU_UDP,
89 NPC_LT_LG_TU_SCTP,
90 NPC_LT_LG_TU_ICMP,
91 NPC_LT_LG_TU_IGMP,
92 NPC_LT_LG_TU_ICMP6,
93 NPC_LT_LG_TU_ESP,
94 NPC_LT_LG_TU_AH,
95};
96
97enum npc_kpu_lh_ltype {
98 NPC_LT_LH_TCP_DATA = 1,
99 NPC_LT_LH_HTTP_DATA,
100 NPC_LT_LH_HTTPS_DATA,
101 NPC_LT_LH_PPTP_DATA,
102 NPC_LT_LH_UDP_DATA,
103};
104
105struct npc_kpu_profile_cam {
106 u8 state;
107 u8 state_mask;
108 u16 dp0;
109 u16 dp0_mask;
110 u16 dp1;
111 u16 dp1_mask;
112 u16 dp2;
113 u16 dp2_mask;
114};
115
116struct npc_kpu_profile_action {
117 u8 errlev;
118 u8 errcode;
119 u8 dp0_offset;
120 u8 dp1_offset;
121 u8 dp2_offset;
122 u8 bypass_count;
123 u8 parse_done;
124 u8 next_state;
125 u8 ptr_advance;
126 u8 cap_ena;
127 u8 lid;
128 u8 ltype;
129 u8 flags;
130 u8 offset;
131 u8 mask;
132 u8 right;
133 u8 shift;
134};
135
136struct npc_kpu_profile {
137 int cam_entries;
138 int action_entries;
139 struct npc_kpu_profile_cam *cam;
140 struct npc_kpu_profile_action *action;
141};
142
143/* NPC KPU register formats */
144struct npc_kpu_cam {
145#if defined(__BIG_ENDIAN_BITFIELD)
146 u64 rsvd_63_56 : 8;
147 u64 state : 8;
148 u64 dp2_data : 16;
149 u64 dp1_data : 16;
150 u64 dp0_data : 16;
151#else
152 u64 dp0_data : 16;
153 u64 dp1_data : 16;
154 u64 dp2_data : 16;
155 u64 state : 8;
156 u64 rsvd_63_56 : 8;
157#endif
158};
159
160struct npc_kpu_action0 {
161#if defined(__BIG_ENDIAN_BITFIELD)
162 u64 rsvd_63_57 : 7;
163 u64 byp_count : 3;
164 u64 capture_ena : 1;
165 u64 parse_done : 1;
166 u64 next_state : 8;
167 u64 rsvd_43 : 1;
168 u64 capture_lid : 3;
169 u64 capture_ltype : 4;
170 u64 capture_flags : 8;
171 u64 ptr_advance : 8;
172 u64 var_len_offset : 8;
173 u64 var_len_mask : 8;
174 u64 var_len_right : 1;
175 u64 var_len_shift : 3;
176#else
177 u64 var_len_shift : 3;
178 u64 var_len_right : 1;
179 u64 var_len_mask : 8;
180 u64 var_len_offset : 8;
181 u64 ptr_advance : 8;
182 u64 capture_flags : 8;
183 u64 capture_ltype : 4;
184 u64 capture_lid : 3;
185 u64 rsvd_43 : 1;
186 u64 next_state : 8;
187 u64 parse_done : 1;
188 u64 capture_ena : 1;
189 u64 byp_count : 3;
190 u64 rsvd_63_57 : 7;
191#endif
192};
193
194struct npc_kpu_action1 {
195#if defined(__BIG_ENDIAN_BITFIELD)
196 u64 rsvd_63_36 : 28;
197 u64 errlev : 4;
198 u64 errcode : 8;
199 u64 dp2_offset : 8;
200 u64 dp1_offset : 8;
201 u64 dp0_offset : 8;
202#else
203 u64 dp0_offset : 8;
204 u64 dp1_offset : 8;
205 u64 dp2_offset : 8;
206 u64 errcode : 8;
207 u64 errlev : 4;
208 u64 rsvd_63_36 : 28;
209#endif
210};
211
212struct npc_kpu_pkind_cpi_def {
213#if defined(__BIG_ENDIAN_BITFIELD)
214 u64 ena : 1;
215 u64 rsvd_62_59 : 4;
216 u64 lid : 3;
217 u64 ltype_match : 4;
218 u64 ltype_mask : 4;
219 u64 flags_match : 8;
220 u64 flags_mask : 8;
221 u64 add_offset : 8;
222 u64 add_mask : 8;
223 u64 rsvd_15 : 1;
224 u64 add_shift : 3;
225 u64 rsvd_11_10 : 2;
226 u64 cpi_base : 10;
227#else
228 u64 cpi_base : 10;
229 u64 rsvd_11_10 : 2;
230 u64 add_shift : 3;
231 u64 rsvd_15 : 1;
232 u64 add_mask : 8;
233 u64 add_offset : 8;
234 u64 flags_mask : 8;
235 u64 flags_match : 8;
236 u64 ltype_mask : 4;
237 u64 ltype_match : 4;
238 u64 lid : 3;
239 u64 rsvd_62_59 : 4;
240 u64 ena : 1;
241#endif
242};
243
244struct nix_rx_action {
245#if defined(__BIG_ENDIAN_BITFIELD)
246 u64 rsvd_63_61 :3;
247 u64 flow_key_alg :5;
248 u64 match_id :16;
249 u64 index :20;
250 u64 pf_func :16;
251 u64 op :4;
252#else
253 u64 op :4;
254 u64 pf_func :16;
255 u64 index :20;
256 u64 match_id :16;
257 u64 flow_key_alg :5;
258 u64 rsvd_63_61 :3;
259#endif
260};
261
262#endif /* NPC_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
new file mode 100644
index 000000000000..b2ce957605bb
--- /dev/null
+++ b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h
@@ -0,0 +1,5709 @@
1/* SPDX-License-Identifier: GPL-2.0
2 * Marvell OcteonTx2 RVU Admin Function driver
3 *
4 * Copyright (C) 2018 Marvell International Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef NPC_PROFILE_H
12#define NPC_PROFILE_H
13
14#define NPC_ETYPE_IP 0x0800
15#define NPC_ETYPE_IP6 0x86dd
16#define NPC_ETYPE_ARP 0x0806
17#define NPC_ETYPE_RARP 0x8035
18#define NPC_ETYPE_MPLSU 0x8847
19#define NPC_ETYPE_MPLSM 0x8848
20#define NPC_ETYPE_ETAG 0x893f
21#define NPC_ETYPE_CTAG 0x8100
22#define NPC_ETYPE_SBTAG 0x88a8
23#define NPC_ETYPE_ITAG 0x88e7
24#define NPC_ETYPE_PTP 0x88f7
25#define NPC_ETYPE_FCOE 0x8906
26#define NPC_ETYPE_QINQ 0x9100
27#define NPC_ETYPE_TRANS_ETH_BR 0x6558
28#define NPC_ETYPE_PPP 0x880b
29#define NPC_ETYPE_NSH 0x894f
30
31#define NPC_IPNH_HOP 0
32#define NPC_IPNH_ICMP 1
33#define NPC_IPNH_IGMP 2
34#define NPC_IPNH_IP 4
35#define NPC_IPNH_TCP 6
36#define NPC_IPNH_UDP 17
37#define NPC_IPNH_IP6 41
38#define NPC_IPNH_ROUT 43
39#define NPC_IPNH_FRAG 44
40#define NPC_IPNH_GRE 47
41#define NPC_IPNH_ESP 50
42#define NPC_IPNH_AH 51
43#define NPC_IPNH_ICMP6 58
44#define NPC_IPNH_NONH 59
45#define NPC_IPNH_DEST 60
46#define NPC_IPNH_SCTP 132
47#define NPC_IPNH_MPLS 137
48
49#define NPC_UDP_PORT_GTPC 2123
50#define NPC_UDP_PORT_GTPU 2152
51#define NPC_UDP_PORT_VXLAN 4789
52#define NPC_UDP_PORT_VXLANGPE 4790
53#define NPC_UDP_PORT_GENEVE 6081
54
55#define NPC_VXLANGPE_NP_IP 0x1
56#define NPC_VXLANGPE_NP_IP6 0x2
57#define NPC_VXLANGPE_NP_ETH 0x3
58#define NPC_VXLANGPE_NP_NSH 0x4
59#define NPC_VXLANGPE_NP_MPLS 0x5
60#define NPC_VXLANGPE_NP_GBP 0x6
61#define NPC_VXLANGPE_NP_VBNG 0x7
62
63#define NPC_NSH_NP_IP 0x1
64#define NPC_NSH_NP_IP6 0x2
65#define NPC_NSH_NP_ETH 0x3
66#define NPC_NSH_NP_NSH 0x4
67#define NPC_NSH_NP_MPLS 0x5
68
69#define NPC_TCP_PORT_HTTP 80
70#define NPC_TCP_PORT_HTTPS 443
71#define NPC_TCP_PORT_PPTP 1723
72
73#define NPC_MPLS_S 0x0100
74
75#define NPC_IP_VER_4 0x4000
76#define NPC_IP_VER_6 0x6000
77#define NPC_IP_VER_MASK 0xf000
78#define NPC_IP_HDR_LEN_5 0x0500
79#define NPC_IP_HDR_LEN_MASK 0x0f00
80
81#define NPC_GRE_F_CSUM (0x1 << 15)
82#define NPC_GRE_F_ROUTE (0x1 << 14)
83#define NPC_GRE_F_KEY (0x1 << 13)
84#define NPC_GRE_F_SEQ (0x1 << 12)
85#define NPC_GRE_F_ACK (0x1 << 7)
86#define NPC_GRE_FLAG_MASK (NPC_GRE_F_CSUM | NPC_GRE_F_ROUTE | \
87 NPC_GRE_F_KEY | NPC_GRE_F_SEQ | NPC_GRE_F_ACK)
88#define NPC_GRE_VER_MASK 0x0003
89#define NPC_GRE_VER_1 0x0001
90
91#define NPC_VXLAN_I 0x0800
92
93#define NPC_VXLANGPE_VER (0x3 << 12)
94#define NPC_VXLANGPE_I (0x1 << 11)
95#define NPC_VXLANGPE_P (0x1 << 10)
96#define NPC_VXLANGPE_B (0x1 << 9)
97#define NPC_VXLANGPE_NP_MASK 0x00ff
98
99#define NPC_NSH_NP_MASK 0x00ff
100
101#define NPC_GENEVE_F_OAM (0x1 << 7)
102#define NPC_GENEVE_F_CRI_OPT (0x1 << 6)
103
104#define NPC_GTP_PT_GTP (0x1 << 12)
105#define NPC_GTP_PT_MASK (0x1 << 12)
106#define NPC_GTP_VER1 (0x1 << 13)
107#define NPC_GTP_VER_MASK (0x7 << 13)
108#define NPC_GTP_MT_G_PDU 0xff
109#define NPC_GTP_MT_MASK 0xff
110
111#define NPC_TCP_DATA_OFFSET_5 0x5000
112#define NPC_TCP_DATA_OFFSET_MASK 0xf000
113
114enum npc_kpu_parser_state {
115 NPC_S_NA = 0,
116 NPC_S_KPU1_ETHER,
117 NPC_S_KPU1_PKI,
118 NPC_S_KPU2_CTAG,
119 NPC_S_KPU2_SBTAG,
120 NPC_S_KPU2_QINQ,
121 NPC_S_KPU2_ETAG,
122 NPC_S_KPU2_ITAG,
123 NPC_S_KPU3_CTAG,
124 NPC_S_KPU3_STAG,
125 NPC_S_KPU3_QINQ,
126 NPC_S_KPU3_ITAG,
127 NPC_S_KPU4_MPLS,
128 NPC_S_KPU4_NSH,
129 NPC_S_KPU5_IP,
130 NPC_S_KPU5_IP6,
131 NPC_S_KPU5_ARP,
132 NPC_S_KPU5_RARP,
133 NPC_S_KPU5_PTP,
134 NPC_S_KPU5_FCOE,
135 NPC_S_KPU5_MPLS,
136 NPC_S_KPU5_MPLS_PL,
137 NPC_S_KPU5_NSH,
138 NPC_S_KPU6_IP6_EXT,
139 NPC_S_KPU7_IP6_EXT,
140 NPC_S_KPU8_TCP,
141 NPC_S_KPU8_UDP,
142 NPC_S_KPU8_SCTP,
143 NPC_S_KPU8_ICMP,
144 NPC_S_KPU8_IGMP,
145 NPC_S_KPU8_ICMP6,
146 NPC_S_KPU8_GRE,
147 NPC_S_KPU8_ESP,
148 NPC_S_KPU8_AH,
149 NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN,
150 NPC_S_KPU9_TU_MPLS,
151 NPC_S_KPU9_TU_NSH,
152 NPC_S_KPU10_TU_MPLS_PL,
153 NPC_S_KPU10_TU_MPLS,
154 NPC_S_KPU10_TU_NSH,
155 NPC_S_KPU11_TU_ETHER,
156 NPC_S_KPU11_TU_PPP,
157 NPC_S_KPU11_TU_MPLS_IN_NSH,
158 NPC_S_KPU11_TU_3RD_NSH,
159 NPC_S_KPU12_TU_IP,
160 NPC_S_KPU12_TU_IP6,
161 NPC_S_KPU12_TU_ARP,
162 NPC_S_KPU13_TU_IP6_EXT,
163 NPC_S_KPU14_TU_IP6_EXT,
164 NPC_S_KPU15_TU_TCP,
165 NPC_S_KPU15_TU_UDP,
166 NPC_S_KPU15_TU_SCTP,
167 NPC_S_KPU15_TU_ICMP,
168 NPC_S_KPU15_TU_IGMP,
169 NPC_S_KPU15_TU_ICMP6,
170 NPC_S_KPU15_TU_ESP,
171 NPC_S_KPU15_TU_AH,
172 NPC_S_KPU16_HTTP_DATA,
173 NPC_S_KPU16_HTTPS_DATA,
174 NPC_S_KPU16_PPTP_DATA,
175 NPC_S_KPU16_TCP_DATA,
176 NPC_S_KPU16_UDP_DATA,
177 NPC_S_LAST /* has to be the last item */
178};
179
180enum npc_kpu_parser_flag {
181 NPC_F_NA = 0,
182 NPC_F_PKI,
183 NPC_F_PKI_VLAN,
184 NPC_F_PKI_ETAG,
185 NPC_F_PKI_ITAG,
186 NPC_F_PKI_MPLS,
187 NPC_F_PKI_NSH,
188 NPC_F_ETYPE_UNK,
189 NPC_F_ETHER_VLAN,
190 NPC_F_ETHER_ETAG,
191 NPC_F_ETHER_ITAG,
192 NPC_F_ETHER_MPLS,
193 NPC_F_ETHER_NSH,
194 NPC_F_STAG_CTAG,
195 NPC_F_STAG_CTAG_UNK,
196 NPC_F_STAG_STAG_CTAG,
197 NPC_F_STAG_STAG_STAG,
198 NPC_F_QINQ_CTAG,
199 NPC_F_QINQ_CTAG_UNK,
200 NPC_F_QINQ_QINQ_CTAG,
201 NPC_F_QINQ_QINQ_QINQ,
202 NPC_F_BTAG_ITAG,
203 NPC_F_BTAG_ITAG_STAG,
204 NPC_F_BTAG_ITAG_CTAG,
205 NPC_F_BTAG_ITAG_UNK,
206 NPC_F_ETAG_CTAG,
207 NPC_F_ETAG_BTAG_ITAG,
208 NPC_F_ETAG_STAG,
209 NPC_F_ETAG_QINQ,
210 NPC_F_ETAG_ITAG,
211 NPC_F_ETAG_ITAG_STAG,
212 NPC_F_ETAG_ITAG_CTAG,
213 NPC_F_ETAG_ITAG_UNK,
214 NPC_F_ITAG_STAG_CTAG,
215 NPC_F_ITAG_STAG,
216 NPC_F_ITAG_CTAG,
217 NPC_F_MPLS_4_LABELS,
218 NPC_F_MPLS_3_LABELS,
219 NPC_F_MPLS_2_LABELS,
220 NPC_F_IP_HAS_OPTIONS,
221 NPC_F_IP_IP_IN_IP,
222 NPC_F_IP_6TO4,
223 NPC_F_IP_MPLS_IN_IP,
224 NPC_F_IP_UNK_PROTO,
225 NPC_F_IP_IP_IN_IP_HAS_OPTIONS,
226 NPC_F_IP_6TO4_HAS_OPTIONS,
227 NPC_F_IP_MPLS_IN_IP_HAS_OPTIONS,
228 NPC_F_IP_UNK_PROTO_HAS_OPTIONS,
229 NPC_F_IP6_HAS_EXT,
230 NPC_F_IP6_TUN_IP6,
231 NPC_F_IP6_MPLS_IN_IP,
232 NPC_F_TCP_HAS_OPTIONS,
233 NPC_F_TCP_HTTP,
234 NPC_F_TCP_HTTPS,
235 NPC_F_TCP_PPTP,
236 NPC_F_TCP_UNK_PORT,
237 NPC_F_TCP_HTTP_HAS_OPTIONS,
238 NPC_F_TCP_HTTPS_HAS_OPTIONS,
239 NPC_F_TCP_PPTP_HAS_OPTIONS,
240 NPC_F_TCP_UNK_PORT_HAS_OPTIONS,
241 NPC_F_UDP_VXLAN,
242 NPC_F_UDP_VXLAN_NOVNI,
243 NPC_F_UDP_VXLAN_NOVNI_NSH,
244 NPC_F_UDP_VXLANGPE,
245 NPC_F_UDP_VXLANGPE_NSH,
246 NPC_F_UDP_VXLANGPE_MPLS,
247 NPC_F_UDP_VXLANGPE_NOVNI,
248 NPC_F_UDP_VXLANGPE_NOVNI_NSH,
249 NPC_F_UDP_VXLANGPE_NOVNI_MPLS,
250 NPC_F_UDP_VXLANGPE_UNK,
251 NPC_F_UDP_VXLANGPE_NONP,
252 NPC_F_UDP_GTP_GTPC,
253 NPC_F_UDP_GTP_GTPU_G_PDU,
254 NPC_F_UDP_GTP_GTPU_UNK,
255 NPC_F_UDP_UNK_PORT,
256 NPC_F_UDP_GENEVE,
257 NPC_F_UDP_GENEVE_OAM,
258 NPC_F_UDP_GENEVE_CRI_OPT,
259 NPC_F_UDP_GENEVE_OAM_CRI_OPT,
260 NPC_F_GRE_NVGRE,
261 NPC_F_GRE_HAS_SRE,
262 NPC_F_GRE_HAS_CSUM,
263 NPC_F_GRE_HAS_KEY,
264 NPC_F_GRE_HAS_SEQ,
265 NPC_F_GRE_HAS_CSUM_KEY,
266 NPC_F_GRE_HAS_CSUM_SEQ,
267 NPC_F_GRE_HAS_KEY_SEQ,
268 NPC_F_GRE_HAS_CSUM_KEY_SEQ,
269 NPC_F_GRE_HAS_ROUTE,
270 NPC_F_GRE_UNK_PROTO,
271 NPC_F_GRE_VER1,
272 NPC_F_GRE_VER1_HAS_SEQ,
273 NPC_F_GRE_VER1_HAS_ACK,
274 NPC_F_GRE_VER1_HAS_SEQ_ACK,
275 NPC_F_GRE_VER1_UNK_PROTO,
276 NPC_F_TU_ETHER_UNK,
277 NPC_F_TU_ETHER_CTAG,
278 NPC_F_TU_ETHER_CTAG_UNK,
279 NPC_F_TU_ETHER_STAG_CTAG,
280 NPC_F_TU_ETHER_STAG_CTAG_UNK,
281 NPC_F_TU_ETHER_STAG,
282 NPC_F_TU_ETHER_STAG_UNK,
283 NPC_F_TU_ETHER_QINQ_CTAG,
284 NPC_F_TU_ETHER_QINQ_CTAG_UNK,
285 NPC_F_TU_ETHER_QINQ,
286 NPC_F_TU_ETHER_QINQ_UNK,
287 NPC_F_LAST /* has to be the last item */
288};
289
290enum npc_kpu_err_code {
291 NPC_EC_NOERR = 0, /* has to be zero */
292 NPC_EC_UNK,
293 NPC_EC_L2_K1,
294 NPC_EC_L2_K2,
295 NPC_EC_L2_K3,
296 NPC_EC_L2_K3_ETYPE_UNK,
297 NPC_EC_L2_MPLS_2MANY,
298 NPC_EC_L2_K4,
299 NPC_EC_IP_VER,
300 NPC_EC_IP6_VER,
301 NPC_EC_VXLAN,
302 NPC_EC_NVGRE,
303 NPC_EC_GRE,
304 NPC_EC_GRE_VER1,
305 NPC_EC_L4,
306 NPC_EC_LAST /* has to be the last item */
307};
308
309enum NPC_ERRLEV_E {
310 NPC_ERRLEV_RE = 0,
311 NPC_ERRLEV_LA = 1,
312 NPC_ERRLEV_LB = 2,
313 NPC_ERRLEV_LC = 3,
314 NPC_ERRLEV_LD = 4,
315 NPC_ERRLEV_LE = 5,
316 NPC_ERRLEV_LF = 6,
317 NPC_ERRLEV_LG = 7,
318 NPC_ERRLEV_LH = 8,
319 NPC_ERRLEV_R9 = 9,
320 NPC_ERRLEV_R10 = 10,
321 NPC_ERRLEV_R11 = 11,
322 NPC_ERRLEV_R12 = 12,
323 NPC_ERRLEV_R13 = 13,
324 NPC_ERRLEV_R14 = 14,
325 NPC_ERRLEV_NIX = 15,
326 NPC_ERRLEV_ENUM_LAST = 16,
327};
328
329static struct npc_kpu_profile_action ikpu_action_entries[] = {
330 {
331 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
332 0, 0, NPC_S_KPU1_ETHER, 0, 0,
333 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
334 0, 0,
335 },
336 {
337 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
338 0, 0, NPC_S_KPU1_ETHER, 0, 0,
339 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
340 0, 0,
341 },
342 {
343 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
344 0, 0, NPC_S_KPU1_ETHER, 0, 0,
345 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
346 0, 0,
347 },
348 {
349 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
350 0, 0, NPC_S_KPU1_ETHER, 0, 0,
351 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
352 0, 0,
353 },
354 {
355 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
356 0, 0, NPC_S_KPU1_ETHER, 0, 0,
357 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
358 0, 0,
359 },
360 {
361 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
362 0, 0, NPC_S_KPU1_ETHER, 0, 0,
363 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
364 0, 0,
365 },
366 {
367 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
368 0, 0, NPC_S_KPU1_ETHER, 0, 0,
369 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
370 0, 0,
371 },
372 {
373 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
374 0, 0, NPC_S_KPU1_ETHER, 0, 0,
375 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
376 0, 0,
377 },
378 {
379 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
380 0, 0, NPC_S_KPU1_ETHER, 0, 0,
381 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
382 0, 0,
383 },
384 {
385 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
386 0, 0, NPC_S_KPU1_ETHER, 0, 0,
387 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
388 0, 0,
389 },
390 {
391 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
392 0, 0, NPC_S_KPU1_ETHER, 0, 0,
393 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
394 0, 0,
395 },
396 {
397 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
398 0, 0, NPC_S_KPU1_ETHER, 0, 0,
399 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
400 0, 0,
401 },
402 {
403 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
404 0, 0, NPC_S_KPU1_ETHER, 0, 0,
405 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
406 0, 0,
407 },
408 {
409 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
410 0, 0, NPC_S_KPU1_ETHER, 0, 0,
411 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
412 0, 0,
413 },
414 {
415 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
416 0, 0, NPC_S_KPU1_ETHER, 0, 0,
417 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
418 0, 0,
419 },
420 {
421 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
422 0, 0, NPC_S_KPU1_ETHER, 0, 0,
423 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
424 0, 0,
425 },
426 {
427 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
428 0, 0, NPC_S_KPU1_ETHER, 0, 0,
429 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
430 0, 0,
431 },
432 {
433 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
434 0, 0, NPC_S_KPU1_ETHER, 0, 0,
435 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
436 0, 0,
437 },
438 {
439 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
440 0, 0, NPC_S_KPU1_ETHER, 0, 0,
441 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
442 0, 0,
443 },
444 {
445 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
446 0, 0, NPC_S_KPU1_ETHER, 0, 0,
447 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
448 0, 0,
449 },
450 {
451 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
452 0, 0, NPC_S_KPU1_ETHER, 0, 0,
453 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
454 0, 0,
455 },
456 {
457 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
458 0, 0, NPC_S_KPU1_ETHER, 0, 0,
459 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
460 0, 0,
461 },
462 {
463 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
464 0, 0, NPC_S_KPU1_ETHER, 0, 0,
465 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
466 0, 0,
467 },
468 {
469 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
470 0, 0, NPC_S_KPU1_ETHER, 0, 0,
471 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
472 0, 0,
473 },
474 {
475 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
476 0, 0, NPC_S_KPU1_ETHER, 0, 0,
477 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
478 0, 0,
479 },
480 {
481 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
482 0, 0, NPC_S_KPU1_ETHER, 0, 0,
483 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
484 0, 0,
485 },
486 {
487 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
488 0, 0, NPC_S_KPU1_ETHER, 0, 0,
489 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
490 0, 0,
491 },
492 {
493 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
494 0, 0, NPC_S_KPU1_ETHER, 0, 0,
495 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
496 0, 0,
497 },
498 {
499 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
500 0, 0, NPC_S_KPU1_ETHER, 0, 0,
501 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
502 0, 0,
503 },
504 {
505 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
506 0, 0, NPC_S_KPU1_ETHER, 0, 0,
507 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
508 0, 0,
509 },
510 {
511 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
512 0, 0, NPC_S_KPU1_ETHER, 0, 0,
513 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
514 0, 0,
515 },
516 {
517 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
518 0, 0, NPC_S_KPU1_ETHER, 0, 0,
519 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
520 0, 0,
521 },
522 {
523 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
524 0, 0, NPC_S_KPU1_ETHER, 0, 0,
525 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
526 0, 0,
527 },
528 {
529 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
530 0, 0, NPC_S_KPU1_ETHER, 0, 0,
531 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
532 0, 0,
533 },
534 {
535 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
536 0, 0, NPC_S_KPU1_ETHER, 0, 0,
537 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
538 0, 0,
539 },
540 {
541 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
542 0, 0, NPC_S_KPU1_ETHER, 0, 0,
543 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
544 0, 0,
545 },
546 {
547 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
548 0, 0, NPC_S_KPU1_ETHER, 0, 0,
549 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
550 0, 0,
551 },
552 {
553 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
554 0, 0, NPC_S_KPU1_ETHER, 0, 0,
555 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
556 0, 0,
557 },
558 {
559 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
560 0, 0, NPC_S_KPU1_ETHER, 0, 0,
561 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
562 0, 0,
563 },
564 {
565 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
566 0, 0, NPC_S_KPU1_ETHER, 0, 0,
567 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
568 0, 0,
569 },
570 {
571 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
572 0, 0, NPC_S_KPU1_ETHER, 0, 0,
573 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
574 0, 0,
575 },
576 {
577 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
578 0, 0, NPC_S_KPU1_ETHER, 0, 0,
579 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
580 0, 0,
581 },
582 {
583 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
584 0, 0, NPC_S_KPU1_ETHER, 0, 0,
585 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
586 0, 0,
587 },
588 {
589 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
590 0, 0, NPC_S_KPU1_ETHER, 0, 0,
591 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
592 0, 0,
593 },
594 {
595 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
596 0, 0, NPC_S_KPU1_ETHER, 0, 0,
597 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
598 0, 0,
599 },
600 {
601 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
602 0, 0, NPC_S_KPU1_ETHER, 0, 0,
603 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
604 0, 0,
605 },
606 {
607 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
608 0, 0, NPC_S_KPU1_ETHER, 0, 0,
609 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
610 0, 0,
611 },
612 {
613 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
614 0, 0, NPC_S_KPU1_ETHER, 0, 0,
615 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
616 0, 0,
617 },
618 {
619 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
620 0, 0, NPC_S_KPU1_ETHER, 0, 0,
621 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
622 0, 0,
623 },
624 {
625 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
626 0, 0, NPC_S_KPU1_ETHER, 0, 0,
627 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
628 0, 0,
629 },
630 {
631 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
632 0, 0, NPC_S_KPU1_ETHER, 0, 0,
633 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
634 0, 0,
635 },
636 {
637 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
638 0, 0, NPC_S_KPU1_ETHER, 0, 0,
639 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
640 0, 0,
641 },
642 {
643 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
644 0, 0, NPC_S_KPU1_ETHER, 0, 0,
645 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
646 0, 0,
647 },
648 {
649 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
650 0, 0, NPC_S_KPU1_ETHER, 0, 0,
651 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
652 0, 0,
653 },
654 {
655 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
656 0, 0, NPC_S_KPU1_ETHER, 0, 0,
657 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
658 0, 0,
659 },
660 {
661 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
662 0, 0, NPC_S_KPU1_ETHER, 0, 0,
663 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
664 0, 0,
665 },
666 {
667 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
668 0, 0, NPC_S_KPU1_ETHER, 0, 0,
669 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
670 0, 0,
671 },
672 {
673 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
674 0, 0, NPC_S_KPU1_ETHER, 0, 0,
675 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
676 0, 0,
677 },
678 {
679 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
680 0, 0, NPC_S_KPU1_ETHER, 0, 0,
681 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
682 0, 0,
683 },
684 {
685 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
686 0, 0, NPC_S_KPU1_ETHER, 0, 0,
687 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
688 0, 0,
689 },
690 {
691 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
692 0, 0, NPC_S_KPU1_ETHER, 0, 0,
693 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
694 0, 0,
695 },
696 {
697 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
698 0, 0, NPC_S_KPU1_ETHER, 0, 0,
699 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
700 0, 0,
701 },
702 {
703 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
704 0, 0, NPC_S_KPU1_ETHER, 0, 0,
705 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
706 0, 0,
707 },
708 {
709 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 14, 16,
710 0, 0, NPC_S_KPU1_ETHER, 0, 0,
711 NPC_LID_LA, NPC_LT_NA, 0, 1, 0xff,
712 0, 0,
713 },
714};
715
716static struct npc_kpu_profile_cam kpu1_cam_entries[] = {
717 {
718 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_IP, 0xffff,
719 0x0000, 0x0000, 0x0000, 0x0000,
720 },
721 {
722 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_IP6, 0xffff,
723 0x0000, 0x0000, 0x0000, 0x0000,
724 },
725 {
726 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_ARP, 0xffff,
727 0x0000, 0x0000, 0x0000, 0x0000,
728 },
729 {
730 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_RARP, 0xffff,
731 0x0000, 0x0000, 0x0000, 0x0000,
732 },
733 {
734 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_PTP, 0xffff,
735 0x0000, 0x0000, 0x0000, 0x0000,
736 },
737 {
738 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_FCOE, 0xffff,
739 0x0000, 0x0000, 0x0000, 0x0000,
740 },
741 {
742 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_CTAG, 0xffff,
743 0x0000, 0x0000, 0x0000, 0x0000,
744 },
745 {
746 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
747 0x0000, 0x0000, 0x0000, 0x0000,
748 },
749 {
750 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
751 0x0000, 0x0000, 0x0000, 0x0000,
752 },
753 {
754 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_ETAG, 0xffff,
755 0x0000, 0x0000, 0x0000, 0x0000,
756 },
757 {
758 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_ITAG, 0xffff,
759 0x0000, 0x0000, 0x0000, 0x0000,
760 },
761 {
762 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_MPLSU, 0xffff,
763 0x0000, 0x0000, 0x0000, 0x0000,
764 },
765 {
766 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_MPLSM, 0xffff,
767 0x0000, 0x0000, 0x0000, 0x0000,
768 },
769 {
770 NPC_S_KPU1_ETHER, 0xff, NPC_ETYPE_NSH, 0xffff,
771 0x0000, 0x0000, 0x0000, 0x0000,
772 },
773 {
774 NPC_S_KPU1_ETHER, 0xff, 0x0000, 0xfc00,
775 0x0000, 0x0000, 0x0000, 0x0000,
776 },
777 {
778 NPC_S_KPU1_ETHER, 0xff, 0x0400, 0xfe00,
779 0x0000, 0x0000, 0x0000, 0x0000,
780 },
781 {
782 NPC_S_KPU1_ETHER, 0xff, 0x0000, 0x0000,
783 0x0000, 0x0000, 0x0000, 0x0000,
784 },
785 {
786 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_IP, 0xffff,
787 0x0000, 0x0000, 0x0000, 0x0000,
788 },
789 {
790 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_IP6, 0xffff,
791 0x0000, 0x0000, 0x0000, 0x0000,
792 },
793 {
794 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_ARP, 0xffff,
795 0x0000, 0x0000, 0x0000, 0x0000,
796 },
797 {
798 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_RARP, 0xffff,
799 0x0000, 0x0000, 0x0000, 0x0000,
800 },
801 {
802 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_PTP, 0xffff,
803 0x0000, 0x0000, 0x0000, 0x0000,
804 },
805 {
806 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_FCOE, 0xffff,
807 0x0000, 0x0000, 0x0000, 0x0000,
808 },
809 {
810 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_CTAG, 0xffff,
811 0x0000, 0x0000, 0x0000, 0x0000,
812 },
813 {
814 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_SBTAG, 0xffff,
815 0x0000, 0x0000, 0x0000, 0x0000,
816 },
817 {
818 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_QINQ, 0xffff,
819 0x0000, 0x0000, 0x0000, 0x0000,
820 },
821 {
822 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_ETAG, 0xffff,
823 0x0000, 0x0000, 0x0000, 0x0000,
824 },
825 {
826 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_ITAG, 0xffff,
827 0x0000, 0x0000, 0x0000, 0x0000,
828 },
829 {
830 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_MPLSU, 0xffff,
831 0x0010, 0x0010, 0x0000, 0xffff,
832 },
833 {
834 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_MPLSM, 0xffff,
835 0x0010, 0x0010, 0x0000, 0xffff,
836 },
837 {
838 NPC_S_KPU1_PKI, 0xff, NPC_ETYPE_NSH, 0xffff,
839 0x0000, 0x0000, 0x0000, 0x0000,
840 },
841 {
842 NPC_S_KPU1_PKI, 0xff, 0x0000, 0x0000,
843 0x0000, 0x0000, 0x0000, 0x0000,
844 },
845 {
846 NPC_S_NA, 0X00, 0x0000, 0x0000,
847 0x0000, 0x0000, 0x0000, 0x0000,
848 },
849};
850
851static struct npc_kpu_profile_cam kpu2_cam_entries[] = {
852 {
853 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_IP, 0xffff,
854 0x0000, 0x0000, 0x0000, 0x0000,
855 },
856 {
857 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_IP6, 0xffff,
858 0x0000, 0x0000, 0x0000, 0x0000,
859 },
860 {
861 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_ARP, 0xffff,
862 0x0000, 0x0000, 0x0000, 0x0000,
863 },
864 {
865 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_RARP, 0xffff,
866 0x0000, 0x0000, 0x0000, 0x0000,
867 },
868 {
869 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_PTP, 0xffff,
870 0x0000, 0x0000, 0x0000, 0x0000,
871 },
872 {
873 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_FCOE, 0xffff,
874 0x0000, 0x0000, 0x0000, 0x0000,
875 },
876 {
877 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_MPLSU, 0xffff,
878 0x0000, 0x0000, 0x0000, 0x0000,
879 },
880 {
881 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_MPLSM, 0xffff,
882 0x0000, 0x0000, 0x0000, 0x0000,
883 },
884 {
885 NPC_S_KPU2_CTAG, 0xff, NPC_ETYPE_NSH, 0xffff,
886 0x0000, 0x0000, 0x0000, 0x0000,
887 },
888 {
889 NPC_S_KPU2_CTAG, 0xff, 0x0000, 0x0000,
890 0x0000, 0x0000, 0x0000, 0x0000,
891 },
892 {
893 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
894 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
895 },
896 {
897 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
898 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
899 },
900 {
901 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
902 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
903 },
904 {
905 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
906 NPC_ETYPE_RARP, 0xffff, 0x0000, 0x0000,
907 },
908 {
909 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
910 NPC_ETYPE_PTP, 0xffff, 0x0000, 0x0000,
911 },
912 {
913 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
914 NPC_ETYPE_FCOE, 0xffff, 0x0000, 0x0000,
915 },
916 {
917 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
918 NPC_ETYPE_MPLSU, 0xffff, 0x0000, 0x0000,
919 },
920 {
921 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
922 NPC_ETYPE_MPLSM, 0xffff, 0x0000, 0x0000,
923 },
924 {
925 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
926 NPC_ETYPE_NSH, 0xffff, 0x0000, 0x0000,
927 },
928 {
929 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
930 0x0000, 0x0000, 0x0000, 0x0000,
931 },
932 {
933 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
934 NPC_ETYPE_CTAG, 0xffff, 0x0000, 0x0000,
935 },
936 {
937 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
938 NPC_ETYPE_SBTAG, 0xffff, 0x0000, 0x0000,
939 },
940 {
941 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
942 0x0000, 0x0000, NPC_ETYPE_IP, 0xffff,
943 },
944 {
945 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
946 0x0000, 0x0000, NPC_ETYPE_IP6, 0xffff,
947 },
948 {
949 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
950 0x0000, 0x0000, NPC_ETYPE_ARP, 0xffff,
951 },
952 {
953 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
954 0x0000, 0x0000, NPC_ETYPE_RARP, 0xffff,
955 },
956 {
957 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
958 0x0000, 0x0000, NPC_ETYPE_PTP, 0xffff,
959 },
960 {
961 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
962 0x0000, 0x0000, NPC_ETYPE_FCOE, 0xffff,
963 },
964 {
965 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
966 0x0000, 0x0000, NPC_ETYPE_MPLSU, 0xffff,
967 },
968 {
969 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
970 0x0000, 0x0000, NPC_ETYPE_MPLSM, 0xffff,
971 },
972 {
973 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
974 0x0000, 0x0000, NPC_ETYPE_NSH, 0xffff,
975 },
976 {
977 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
978 0x0000, 0x0000, NPC_ETYPE_SBTAG, 0xffff,
979 },
980 {
981 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
982 0x0000, 0x0000, NPC_ETYPE_CTAG, 0xffff,
983 },
984 {
985 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
986 0x0000, 0x0000, 0x0000, 0x0000,
987 },
988 {
989 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_IP, 0xffff,
990 0x0000, 0x0000, 0x0000, 0x0000,
991 },
992 {
993 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_IP6, 0xffff,
994 0x0000, 0x0000, 0x0000, 0x0000,
995 },
996 {
997 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_ARP, 0xffff,
998 0x0000, 0x0000, 0x0000, 0x0000,
999 },
1000 {
1001 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_RARP, 0xffff,
1002 0x0000, 0x0000, 0x0000, 0x0000,
1003 },
1004 {
1005 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_PTP, 0xffff,
1006 0x0000, 0x0000, 0x0000, 0x0000,
1007 },
1008 {
1009 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_FCOE, 0xffff,
1010 0x0000, 0x0000, 0x0000, 0x0000,
1011 },
1012 {
1013 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_MPLSU, 0xffff,
1014 0x0000, 0x0000, 0x0000, 0x0000,
1015 },
1016 {
1017 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_MPLSM, 0xffff,
1018 0x0000, 0x0000, 0x0000, 0x0000,
1019 },
1020 {
1021 NPC_S_KPU2_SBTAG, 0xff, NPC_ETYPE_NSH, 0xffff,
1022 0x0000, 0x0000, 0x0000, 0x0000,
1023 },
1024 {
1025 NPC_S_KPU2_SBTAG, 0xff, 0x0000, 0x0000,
1026 0x0000, 0x0000, 0x0000, 0x0000,
1027 },
1028 {
1029 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1030 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1031 },
1032 {
1033 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1034 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1035 },
1036 {
1037 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1038 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1039 },
1040 {
1041 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1042 NPC_ETYPE_RARP, 0xffff, 0x0000, 0x0000,
1043 },
1044 {
1045 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1046 NPC_ETYPE_PTP, 0xffff, 0x0000, 0x0000,
1047 },
1048 {
1049 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1050 NPC_ETYPE_FCOE, 0xffff, 0x0000, 0x0000,
1051 },
1052 {
1053 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1054 NPC_ETYPE_MPLSU, 0xffff, 0x0000, 0x0000,
1055 },
1056 {
1057 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1058 NPC_ETYPE_MPLSM, 0xffff, 0x0000, 0x0000,
1059 },
1060 {
1061 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1062 NPC_ETYPE_NSH, 0xffff, 0x0000, 0x0000,
1063 },
1064 {
1065 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1066 0x0000, 0x0000, 0x0000, 0x0000,
1067 },
1068 {
1069 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_QINQ, 0xffff,
1070 NPC_ETYPE_CTAG, 0xffff, 0x0000, 0x0000,
1071 },
1072 {
1073 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_QINQ, 0xffff,
1074 NPC_ETYPE_QINQ, 0xffff, 0x0000, 0x0000,
1075 },
1076 {
1077 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_IP, 0xffff,
1078 0x0000, 0x0000, 0x0000, 0x0000,
1079 },
1080 {
1081 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_IP6, 0xffff,
1082 0x0000, 0x0000, 0x0000, 0x0000,
1083 },
1084 {
1085 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_ARP, 0xffff,
1086 0x0000, 0x0000, 0x0000, 0x0000,
1087 },
1088 {
1089 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_RARP, 0xffff,
1090 0x0000, 0x0000, 0x0000, 0x0000,
1091 },
1092 {
1093 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_PTP, 0xffff,
1094 0x0000, 0x0000, 0x0000, 0x0000,
1095 },
1096 {
1097 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_FCOE, 0xffff,
1098 0x0000, 0x0000, 0x0000, 0x0000,
1099 },
1100 {
1101 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_MPLSU, 0xffff,
1102 0x0000, 0x0000, 0x0000, 0x0000,
1103 },
1104 {
1105 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_MPLSM, 0xffff,
1106 0x0000, 0x0000, 0x0000, 0x0000,
1107 },
1108 {
1109 NPC_S_KPU2_QINQ, 0xff, NPC_ETYPE_NSH, 0xffff,
1110 0x0000, 0x0000, 0x0000, 0x0000,
1111 },
1112 {
1113 NPC_S_KPU2_QINQ, 0xff, 0x0000, 0x0000,
1114 0x0000, 0x0000, 0x0000, 0x0000,
1115 },
1116 {
1117 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_IP, 0xffff,
1118 0x0000, 0x0000, 0x0000, 0x0000,
1119 },
1120 {
1121 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_IP6, 0xffff,
1122 0x0000, 0x0000, 0x0000, 0x0000,
1123 },
1124 {
1125 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ARP, 0xffff,
1126 0x0000, 0x0000, 0x0000, 0x0000,
1127 },
1128 {
1129 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_RARP, 0xffff,
1130 0x0000, 0x0000, 0x0000, 0x0000,
1131 },
1132 {
1133 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_PTP, 0xffff,
1134 0x0000, 0x0000, 0x0000, 0x0000,
1135 },
1136 {
1137 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_FCOE, 0xffff,
1138 0x0000, 0x0000, 0x0000, 0x0000,
1139 },
1140 {
1141 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_MPLSU, 0xffff,
1142 0x0000, 0x0000, 0x0000, 0x0000,
1143 },
1144 {
1145 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_MPLSM, 0xffff,
1146 0x0000, 0x0000, 0x0000, 0x0000,
1147 },
1148 {
1149 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_NSH, 0xffff,
1150 0x0000, 0x0000, 0x0000, 0x0000,
1151 },
1152 {
1153 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1154 0x0000, 0x0000, 0x0000, 0x0000,
1155 },
1156 {
1157 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1158 NPC_ETYPE_ITAG, 0xffff, 0x0000, 0x0000,
1159 },
1160 {
1161 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1162 0x0000, 0x0000, 0x0000, 0x0000,
1163 },
1164 {
1165 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_QINQ, 0xffff,
1166 0x0000, 0x0000, 0x0000, 0x0000,
1167 },
1168 {
1169 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
1170 0x0000, 0x0000, NPC_ETYPE_IP, 0xffff,
1171 },
1172 {
1173 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
1174 0x0000, 0x0000, NPC_ETYPE_IP6, 0xffff,
1175 },
1176 {
1177 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
1178 0x0000, 0x0000, NPC_ETYPE_ARP, 0xffff,
1179 },
1180 {
1181 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
1182 0x0000, 0x0000, NPC_ETYPE_SBTAG, 0xffff,
1183 },
1184 {
1185 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
1186 0x0000, 0x0000, NPC_ETYPE_CTAG, 0xffff,
1187 },
1188 {
1189 NPC_S_KPU2_ETAG, 0xff, NPC_ETYPE_ITAG, 0xffff,
1190 0x0000, 0x0000, 0x0000, 0x0000,
1191 },
1192 {
1193 NPC_S_KPU2_ETAG, 0xff, 0x0000, 0x0000,
1194 0x0000, 0x0000, 0x0000, 0x0000,
1195 },
1196 {
1197 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_IP, 0xffff,
1198 0x0000, 0x0000, 0x0000, 0x0000,
1199 },
1200 {
1201 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_IP6, 0xffff,
1202 0x0000, 0x0000, 0x0000, 0x0000,
1203 },
1204 {
1205 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_ARP, 0xffff,
1206 0x0000, 0x0000, 0x0000, 0x0000,
1207 },
1208 {
1209 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_RARP, 0xffff,
1210 0x0000, 0x0000, 0x0000, 0x0000,
1211 },
1212 {
1213 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1214 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP, 0xffff,
1215 },
1216 {
1217 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1218 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP6, 0xffff,
1219 },
1220 {
1221 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1222 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_ARP, 0xffff,
1223 },
1224 {
1225 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1226 NPC_ETYPE_CTAG, 0xffff, 0x0000, 0x0000,
1227 },
1228 {
1229 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1230 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1231 },
1232 {
1233 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1234 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1235 },
1236 {
1237 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1238 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1239 },
1240 {
1241 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1242 0x0000, 0x0000, 0x0000, 0x0000,
1243 },
1244 {
1245 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1246 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1247 },
1248 {
1249 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1250 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1251 },
1252 {
1253 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1254 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1255 },
1256 {
1257 NPC_S_KPU2_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1258 0x0000, 0x0000, 0x0000, 0x0000,
1259 },
1260 {
1261 NPC_S_KPU2_ITAG, 0xff, 0x0000, 0x0000,
1262 0x0000, 0x0000, 0x0000, 0x0000,
1263 },
1264 {
1265 NPC_S_NA, 0X00, 0x0000, 0x0000,
1266 0x0000, 0x0000, 0x0000, 0x0000,
1267 },
1268};
1269
1270static struct npc_kpu_profile_cam kpu3_cam_entries[] = {
1271 {
1272 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_IP, 0xffff,
1273 0x0000, 0x0000, 0x0000, 0x0000,
1274 },
1275 {
1276 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_IP6, 0xffff,
1277 0x0000, 0x0000, 0x0000, 0x0000,
1278 },
1279 {
1280 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_ARP, 0xffff,
1281 0x0000, 0x0000, 0x0000, 0x0000,
1282 },
1283 {
1284 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_RARP, 0xffff,
1285 0x0000, 0x0000, 0x0000, 0x0000,
1286 },
1287 {
1288 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_PTP, 0xffff,
1289 0x0000, 0x0000, 0x0000, 0x0000,
1290 },
1291 {
1292 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_FCOE, 0xffff,
1293 0x0000, 0x0000, 0x0000, 0x0000,
1294 },
1295 {
1296 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_MPLSU, 0xffff,
1297 0x0000, 0x0000, 0x0000, 0x0000,
1298 },
1299 {
1300 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_MPLSM, 0xffff,
1301 0x0000, 0x0000, 0x0000, 0x0000,
1302 },
1303 {
1304 NPC_S_KPU3_CTAG, 0xff, NPC_ETYPE_NSH, 0xffff,
1305 0x0000, 0x0000, 0x0000, 0x0000,
1306 },
1307 {
1308 NPC_S_KPU3_CTAG, 0xff, 0x0000, 0x0000,
1309 0x0000, 0x0000, 0x0000, 0x0000,
1310 },
1311 {
1312 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1313 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1314 },
1315 {
1316 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1317 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1318 },
1319 {
1320 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1321 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1322 },
1323 {
1324 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1325 NPC_ETYPE_RARP, 0xffff, 0x0000, 0x0000,
1326 },
1327 {
1328 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1329 NPC_ETYPE_PTP, 0xffff, 0x0000, 0x0000,
1330 },
1331 {
1332 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1333 NPC_ETYPE_FCOE, 0xffff, 0x0000, 0x0000,
1334 },
1335 {
1336 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1337 NPC_ETYPE_MPLSU, 0xffff, 0x0000, 0x0000,
1338 },
1339 {
1340 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1341 NPC_ETYPE_MPLSM, 0xffff, 0x0000, 0x0000,
1342 },
1343 {
1344 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1345 NPC_ETYPE_NSH, 0xffff, 0x0000, 0x0000,
1346 },
1347 {
1348 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_IP, 0xffff,
1349 0x0000, 0x0000, 0x0000, 0x0000,
1350 },
1351 {
1352 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_IP6, 0xffff,
1353 0x0000, 0x0000, 0x0000, 0x0000,
1354 },
1355 {
1356 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_ARP, 0xffff,
1357 0x0000, 0x0000, 0x0000, 0x0000,
1358 },
1359 {
1360 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_RARP, 0xffff,
1361 0x0000, 0x0000, 0x0000, 0x0000,
1362 },
1363 {
1364 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_MPLSU, 0xffff,
1365 0x0000, 0x0000, 0x0000, 0x0000,
1366 },
1367 {
1368 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_MPLSM, 0xffff,
1369 0x0000, 0x0000, 0x0000, 0x0000,
1370 },
1371 {
1372 NPC_S_KPU3_STAG, 0xff, NPC_ETYPE_NSH, 0xffff,
1373 0x0000, 0x0000, 0x0000, 0x0000,
1374 },
1375 {
1376 NPC_S_KPU3_STAG, 0xff, 0x0000, 0x0000,
1377 0x0000, 0x0000, 0x0000, 0x0000,
1378 },
1379 {
1380 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1381 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1382 },
1383 {
1384 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1385 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1386 },
1387 {
1388 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1389 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1390 },
1391 {
1392 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1393 NPC_ETYPE_RARP, 0xffff, 0x0000, 0x0000,
1394 },
1395 {
1396 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1397 NPC_ETYPE_PTP, 0xffff, 0x0000, 0x0000,
1398 },
1399 {
1400 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1401 NPC_ETYPE_FCOE, 0xffff, 0x0000, 0x0000,
1402 },
1403 {
1404 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1405 NPC_ETYPE_MPLSU, 0xffff, 0x0000, 0x0000,
1406 },
1407 {
1408 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1409 NPC_ETYPE_MPLSM, 0xffff, 0x0000, 0x0000,
1410 },
1411 {
1412 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_CTAG, 0xffff,
1413 NPC_ETYPE_NSH, 0xffff, 0x0000, 0x0000,
1414 },
1415 {
1416 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_IP, 0xffff,
1417 0x0000, 0x0000, 0x0000, 0x0000,
1418 },
1419 {
1420 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_IP6, 0xffff,
1421 0x0000, 0x0000, 0x0000, 0x0000,
1422 },
1423 {
1424 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_ARP, 0xffff,
1425 0x0000, 0x0000, 0x0000, 0x0000,
1426 },
1427 {
1428 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_RARP, 0xffff,
1429 0x0000, 0x0000, 0x0000, 0x0000,
1430 },
1431 {
1432 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_PTP, 0xffff,
1433 0x0000, 0x0000, 0x0000, 0x0000,
1434 },
1435 {
1436 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_FCOE, 0xffff,
1437 0x0000, 0x0000, 0x0000, 0x0000,
1438 },
1439 {
1440 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_MPLSU, 0xffff,
1441 0x0000, 0x0000, 0x0000, 0x0000,
1442 },
1443 {
1444 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_MPLSM, 0xffff,
1445 0x0000, 0x0000, 0x0000, 0x0000,
1446 },
1447 {
1448 NPC_S_KPU3_QINQ, 0xff, NPC_ETYPE_NSH, 0xffff,
1449 0x0000, 0x0000, 0x0000, 0x0000,
1450 },
1451 {
1452 NPC_S_KPU3_QINQ, 0xff, 0x0000, 0x0000,
1453 0x0000, 0x0000, 0x0000, 0x0000,
1454 },
1455 {
1456 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_IP, 0xffff,
1457 0x0000, 0x0000, 0x0000, 0x0000,
1458 },
1459 {
1460 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_IP6, 0xffff,
1461 0x0000, 0x0000, 0x0000, 0x0000,
1462 },
1463 {
1464 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_ARP, 0xffff,
1465 0x0000, 0x0000, 0x0000, 0x0000,
1466 },
1467 {
1468 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_RARP, 0xffff,
1469 0x0000, 0x0000, 0x0000, 0x0000,
1470 },
1471 {
1472 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1473 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP, 0xffff,
1474 },
1475 {
1476 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1477 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP6, 0xffff,
1478 },
1479 {
1480 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1481 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_ARP, 0xffff,
1482 },
1483 {
1484 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1485 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1486 },
1487 {
1488 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1489 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1490 },
1491 {
1492 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1493 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1494 },
1495 {
1496 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1497 NPC_ETYPE_CTAG, 0xffff, 0x0000, 0x0000,
1498 },
1499 {
1500 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_SBTAG, 0xffff,
1501 0x0000, 0x0000, 0x0000, 0x0000,
1502 },
1503 {
1504 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1505 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
1506 },
1507 {
1508 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1509 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
1510 },
1511 {
1512 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1513 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
1514 },
1515 {
1516 NPC_S_KPU3_ITAG, 0xff, NPC_ETYPE_CTAG, 0xffff,
1517 0x0000, 0x0000, 0x0000, 0x0000,
1518 },
1519 {
1520 NPC_S_KPU3_ITAG, 0xff, 0x0000, 0x0000,
1521 0x0000, 0x0000, 0x0000, 0x0000,
1522 },
1523 {
1524 NPC_S_NA, 0X00, 0x0000, 0x0000,
1525 0x0000, 0x0000, 0x0000, 0x0000,
1526 },
1527};
1528
1529static struct npc_kpu_profile_cam kpu4_cam_entries[] = {
1530 {
1531 NPC_S_KPU4_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
1532 0x0000, 0x0000, 0x0000, 0x0000,
1533 },
1534 {
1535 NPC_S_KPU4_MPLS, 0xff, 0x0000, NPC_MPLS_S,
1536 NPC_MPLS_S, NPC_MPLS_S, 0x0000, 0x0000,
1537 },
1538 {
1539 NPC_S_KPU4_MPLS, 0xff, 0x0000, NPC_MPLS_S,
1540 0x0000, NPC_MPLS_S, NPC_MPLS_S, NPC_MPLS_S,
1541 },
1542 {
1543 NPC_S_KPU4_MPLS, 0xff, 0x0000, NPC_MPLS_S,
1544 0x0000, NPC_MPLS_S, 0x0000, NPC_MPLS_S,
1545 },
1546 {
1547 NPC_S_KPU4_NSH, 0xff, NPC_NSH_NP_IP, NPC_NSH_NP_MASK,
1548 0x0000, 0x0000, 0x0000, 0x0000,
1549 },
1550 {
1551 NPC_S_KPU4_NSH, 0xff, NPC_NSH_NP_IP6, NPC_NSH_NP_MASK,
1552 0x0000, 0x0000, 0x0000, 0x0000,
1553 },
1554 {
1555 NPC_S_KPU4_NSH, 0xff, NPC_NSH_NP_ETH, NPC_NSH_NP_MASK,
1556 0x0000, 0x0000, 0x0000, 0x0000,
1557 },
1558 {
1559 NPC_S_KPU4_NSH, 0xff, NPC_NSH_NP_NSH, NPC_NSH_NP_MASK,
1560 0x0000, 0x0000, 0x0000, 0x0000,
1561 },
1562 {
1563 NPC_S_KPU4_NSH, 0xff, NPC_NSH_NP_MPLS, NPC_NSH_NP_MASK,
1564 0x0000, 0x0000, 0x0000, 0x0000,
1565 },
1566 {
1567 NPC_S_NA, 0X00, 0x0000, 0x0000,
1568 0x0000, 0x0000, 0x0000, 0x0000,
1569 },
1570};
1571
1572static struct npc_kpu_profile_cam kpu5_cam_entries[] = {
1573 {
1574 NPC_S_KPU5_IP, 0xff, NPC_IPNH_TCP, 0x00ff,
1575 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1576 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1577 },
1578 {
1579 NPC_S_KPU5_IP, 0xff, NPC_IPNH_UDP, 0x00ff,
1580 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1581 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1582 },
1583 {
1584 NPC_S_KPU5_IP, 0xff, NPC_IPNH_SCTP, 0x00ff,
1585 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1586 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1587 },
1588 {
1589 NPC_S_KPU5_IP, 0xff, NPC_IPNH_ICMP, 0x00ff,
1590 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1591 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1592 },
1593 {
1594 NPC_S_KPU5_IP, 0xff, NPC_IPNH_IGMP, 0x00ff,
1595 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1596 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1597 },
1598 {
1599 NPC_S_KPU5_IP, 0xff, NPC_IPNH_ESP, 0x00ff,
1600 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1601 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1602 },
1603 {
1604 NPC_S_KPU5_IP, 0xff, NPC_IPNH_AH, 0x00ff,
1605 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1606 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1607 },
1608 {
1609 NPC_S_KPU5_IP, 0xff, NPC_IPNH_GRE, 0x00ff,
1610 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1611 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1612 },
1613 {
1614 NPC_S_KPU5_IP, 0xff, NPC_IPNH_IP, 0x00ff,
1615 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1616 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1617 },
1618 {
1619 NPC_S_KPU5_IP, 0xff, NPC_IPNH_IP6, 0x00ff,
1620 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1621 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1622 },
1623 {
1624 NPC_S_KPU5_IP, 0xff, NPC_IPNH_MPLS, 0x00ff,
1625 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1626 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1627 },
1628 {
1629 NPC_S_KPU5_IP, 0xff, 0x0000, 0x0000,
1630 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
1631 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
1632 },
1633 {
1634 NPC_S_KPU5_IP, 0xff, NPC_IPNH_TCP, 0x00ff,
1635 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1636 },
1637 {
1638 NPC_S_KPU5_IP, 0xff, NPC_IPNH_UDP, 0x00ff,
1639 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1640 },
1641 {
1642 NPC_S_KPU5_IP, 0xff, NPC_IPNH_SCTP, 0x00ff,
1643 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1644 },
1645 {
1646 NPC_S_KPU5_IP, 0xff, NPC_IPNH_ICMP, 0x00ff,
1647 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1648 },
1649 {
1650 NPC_S_KPU5_IP, 0xff, NPC_IPNH_IGMP, 0x00ff,
1651 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1652 },
1653 {
1654 NPC_S_KPU5_IP, 0xff, NPC_IPNH_ESP, 0x00ff,
1655 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1656 },
1657 {
1658 NPC_S_KPU5_IP, 0xff, NPC_IPNH_AH, 0x00ff,
1659 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1660 },
1661 {
1662 NPC_S_KPU5_IP, 0xff, NPC_IPNH_GRE, 0x00ff,
1663 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1664 },
1665 {
1666 NPC_S_KPU5_IP, 0xff, NPC_IPNH_IP, 0x00ff,
1667 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1668 },
1669 {
1670 NPC_S_KPU5_IP, 0xff, NPC_IPNH_IP6, 0x00ff,
1671 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1672 },
1673 {
1674 NPC_S_KPU5_IP, 0xff, NPC_IPNH_MPLS, 0x00ff,
1675 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1676 },
1677 {
1678 NPC_S_KPU5_IP, 0xff, 0x0000, 0x0000,
1679 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1680 },
1681 {
1682 NPC_S_KPU5_IP, 0xff, 0x0000, 0x0000,
1683 0x0000, 0x0000, 0x0000, 0x0000,
1684 },
1685 {
1686 NPC_S_KPU5_ARP, 0xff, 0x0000, 0x0000,
1687 0x0000, 0x0000, 0x0000, 0x0000,
1688 },
1689 {
1690 NPC_S_KPU5_RARP, 0xff, 0x0000, 0x0000,
1691 0x0000, 0x0000, 0x0000, 0x0000,
1692 },
1693 {
1694 NPC_S_KPU5_PTP, 0xff, 0x0000, 0x0000,
1695 0x0000, 0x0000, 0x0000, 0x0000,
1696 },
1697 {
1698 NPC_S_KPU5_FCOE, 0xff, 0x0000, 0x0000,
1699 0x0000, 0x0000, 0x0000, 0x0000,
1700 },
1701 {
1702 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_TCP << 8, 0xff00,
1703 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1704 },
1705 {
1706 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_UDP << 8, 0xff00,
1707 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1708 },
1709 {
1710 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_SCTP << 8, 0xff00,
1711 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1712 },
1713 {
1714 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_ICMP << 8, 0xff00,
1715 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1716 },
1717 {
1718 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_ICMP6 << 8, 0xff00,
1719 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1720 },
1721 {
1722 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_ESP << 8, 0xff00,
1723 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1724 },
1725 {
1726 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_AH << 8, 0xff00,
1727 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1728 },
1729 {
1730 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_GRE << 8, 0xff00,
1731 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1732 },
1733 {
1734 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_IP6 << 8, 0xff00,
1735 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1736 },
1737 {
1738 NPC_S_KPU5_IP6, 0xff, NPC_IPNH_MPLS << 8, 0xff00,
1739 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1740 },
1741 {
1742 NPC_S_KPU5_IP6, 0xff, 0x0000, 0x0000,
1743 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1744 },
1745 {
1746 NPC_S_KPU5_IP6, 0xff, 0x0000, 0x0000,
1747 0x0000, 0x0000, 0x0000, 0x0000,
1748 },
1749 {
1750 NPC_S_KPU5_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
1751 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
1752 },
1753 {
1754 NPC_S_KPU5_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
1755 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
1756 },
1757 {
1758 NPC_S_KPU5_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
1759 0x0000, 0xffff, 0x0000, 0x0000,
1760 },
1761 {
1762 NPC_S_KPU5_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
1763 0x0000, 0x0000, 0x0000, 0x0000,
1764 },
1765 {
1766 NPC_S_KPU5_MPLS, 0xff, 0x0000, NPC_MPLS_S,
1767 0x0000, 0x0000, 0x0000, 0x0000,
1768 },
1769 {
1770 NPC_S_KPU5_MPLS_PL, 0xff, NPC_IP_VER_4, NPC_IP_VER_MASK,
1771 0x0000, 0x0000, 0x0000, 0x0000,
1772 },
1773 {
1774 NPC_S_KPU5_MPLS_PL, 0xff, NPC_IP_VER_6, NPC_IP_VER_MASK,
1775 0x0000, 0x0000, 0x0000, 0x0000,
1776 },
1777 {
1778 NPC_S_KPU5_MPLS_PL, 0xff, 0x0000, 0xffff,
1779 0x0000, 0x0000, 0x0000, 0x0000,
1780 },
1781 {
1782 NPC_S_KPU5_MPLS_PL, 0xff, 0x0000, 0x0000,
1783 0x0000, 0x0000, 0x0000, 0x0000,
1784 },
1785 {
1786 NPC_S_KPU5_NSH, 0xff, NPC_NSH_NP_IP, NPC_NSH_NP_MASK,
1787 0x0000, 0x0000, 0x0000, 0x0000,
1788 },
1789 {
1790 NPC_S_KPU5_NSH, 0xff, NPC_NSH_NP_IP6, NPC_NSH_NP_MASK,
1791 0x0000, 0x0000, 0x0000, 0x0000,
1792 },
1793 {
1794 NPC_S_KPU5_NSH, 0xff, NPC_NSH_NP_ETH, NPC_NSH_NP_MASK,
1795 0x0000, 0x0000, 0x0000, 0x0000,
1796 },
1797 {
1798 NPC_S_KPU5_NSH, 0xff, NPC_NSH_NP_NSH, NPC_NSH_NP_MASK,
1799 0x0000, 0x0000, 0x0000, 0x0000,
1800 },
1801 {
1802 NPC_S_KPU5_NSH, 0xff, NPC_NSH_NP_MPLS, NPC_NSH_NP_MASK,
1803 0x0000, 0x0000, 0x0000, 0x0000,
1804 },
1805 {
1806 NPC_S_NA, 0X00, 0x0000, 0x0000,
1807 0x0000, 0x0000, 0x0000, 0x0000,
1808 },
1809};
1810
1811static struct npc_kpu_profile_cam kpu6_cam_entries[] = {
1812 {
1813 NPC_S_KPU6_IP6_EXT, 0xff, 0x0000, 0x0000, 0x0000,
1814 0x0000, 0x0000, 0x0000,
1815 },
1816};
1817
1818static struct npc_kpu_profile_cam kpu7_cam_entries[] = {
1819 {
1820 NPC_S_KPU7_IP6_EXT, 0xff, 0x0000, 0x0000, 0x0000,
1821 0x0000, 0x0000, 0x0000,
1822 },
1823};
1824
1825static struct npc_kpu_profile_cam kpu8_cam_entries[] = {
1826 {
1827 NPC_S_KPU8_TCP, 0xff, NPC_TCP_PORT_HTTP, 0xffff,
1828 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
1829 },
1830 {
1831 NPC_S_KPU8_TCP, 0xff, NPC_TCP_PORT_HTTPS, 0xffff,
1832 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
1833 },
1834 {
1835 NPC_S_KPU8_TCP, 0xff, NPC_TCP_PORT_PPTP, 0xffff,
1836 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
1837 },
1838 {
1839 NPC_S_KPU8_TCP, 0xff, 0x0000, 0x0000,
1840 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
1841 },
1842 {
1843 NPC_S_KPU8_TCP, 0xff, NPC_TCP_PORT_HTTP, 0xffff,
1844 0x0000, 0x0000, 0x0000, 0x0000,
1845 },
1846 {
1847 NPC_S_KPU8_TCP, 0xff, NPC_TCP_PORT_HTTPS, 0xffff,
1848 0x0000, 0x0000, 0x0000, 0x0000,
1849 },
1850 {
1851 NPC_S_KPU8_TCP, 0xff, NPC_TCP_PORT_PPTP, 0xffff,
1852 0x0000, 0x0000, 0x0000, 0x0000,
1853 },
1854 {
1855 NPC_S_KPU8_TCP, 0xff, 0x0000, 0x0000,
1856 0x0000, 0x0000, 0x0000, 0x0000,
1857 },
1858 {
1859 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLAN, 0xffff,
1860 NPC_VXLAN_I, NPC_VXLAN_I, 0x0000, 0xffff,
1861 },
1862 {
1863 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLAN, 0xffff,
1864 0x0000, 0xffff, 0x0000, 0xffff,
1865 },
1866 {
1867 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLAN, 0xffff,
1868 0x0000, 0x0000, 0x0000, 0x0000,
1869 },
1870 {
1871 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1872 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1873 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1874 NPC_VXLANGPE_NP_IP, NPC_VXLANGPE_NP_MASK,
1875 },
1876 {
1877 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1878 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1879 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1880 NPC_VXLANGPE_NP_IP6, NPC_VXLANGPE_NP_MASK,
1881 },
1882 {
1883 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1884 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1885 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1886 NPC_VXLANGPE_NP_ETH, NPC_VXLANGPE_NP_MASK,
1887 },
1888 {
1889 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1890 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1891 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1892 NPC_VXLANGPE_NP_NSH, NPC_VXLANGPE_NP_MASK,
1893 },
1894 {
1895 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1896 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1897 NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1898 NPC_VXLANGPE_NP_MPLS, NPC_VXLANGPE_NP_MASK,
1899 },
1900 {
1901 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1902 NPC_VXLANGPE_P, NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1903 NPC_VXLANGPE_NP_IP, NPC_VXLANGPE_NP_MASK,
1904 },
1905 {
1906 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1907 NPC_VXLANGPE_P, NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1908 NPC_VXLANGPE_NP_IP6, NPC_VXLANGPE_NP_MASK,
1909 },
1910 {
1911 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1912 NPC_VXLANGPE_P, NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1913 NPC_VXLANGPE_NP_ETH, NPC_VXLANGPE_NP_MASK,
1914 },
1915 {
1916 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1917 NPC_VXLANGPE_P, NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1918 NPC_VXLANGPE_NP_NSH, NPC_VXLANGPE_NP_MASK,
1919 },
1920 {
1921 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1922 NPC_VXLANGPE_P, NPC_VXLANGPE_P | NPC_VXLANGPE_I,
1923 NPC_VXLANGPE_NP_MPLS, NPC_VXLANGPE_NP_MASK,
1924 },
1925 {
1926 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1927 NPC_VXLANGPE_P, NPC_VXLANGPE_P, 0x0000, 0x0000,
1928 },
1929 {
1930 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_VXLANGPE, 0xffff,
1931 0x0000, NPC_VXLANGPE_P, 0x0000, 0x0000,
1932 },
1933 {
1934 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1935 0x0000, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1936 NPC_ETYPE_TRANS_ETH_BR, 0xffff,
1937 },
1938 {
1939 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1940 NPC_GENEVE_F_OAM, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1941 NPC_ETYPE_TRANS_ETH_BR, 0xffff,
1942 },
1943 {
1944 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1945 NPC_GENEVE_F_CRI_OPT, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1946 NPC_ETYPE_TRANS_ETH_BR, 0xffff,
1947 },
1948 {
1949 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1950 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1951 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1952 NPC_ETYPE_TRANS_ETH_BR, 0xffff,
1953 },
1954 {
1955 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1956 0x0000, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1957 NPC_ETYPE_IP, 0xffff,
1958 },
1959 {
1960 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1961 NPC_GENEVE_F_OAM, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1962 NPC_ETYPE_IP, 0xffff,
1963 },
1964 {
1965 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1966 NPC_GENEVE_F_CRI_OPT, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1967 NPC_ETYPE_IP, 0xffff,
1968 },
1969 {
1970 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1971 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1972 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT, NPC_ETYPE_IP, 0xffff,
1973 },
1974 {
1975 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1976 0x0000, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1977 NPC_ETYPE_IP6, 0xffff,
1978 },
1979 {
1980 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1981 NPC_GENEVE_F_OAM, NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1982 NPC_ETYPE_IP6, 0xffff,
1983 },
1984 {
1985 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1986 NPC_GENEVE_F_CRI_OPT,
1987 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT, NPC_ETYPE_IP6, 0xffff,
1988 },
1989 {
1990 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GENEVE, 0xffff,
1991 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT,
1992 NPC_GENEVE_F_OAM | NPC_GENEVE_F_CRI_OPT, NPC_ETYPE_IP6, 0xffff,
1993 },
1994 {
1995 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GTPC, 0xffff,
1996 0x0000, 0x0000, 0x0000, 0x0000,
1997 },
1998 {
1999 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GTPU, 0xffff,
2000 NPC_GTP_PT_GTP | NPC_GTP_VER1 | NPC_GTP_MT_G_PDU,
2001 NPC_GTP_PT_MASK | NPC_GTP_VER_MASK | NPC_GTP_MT_MASK,
2002 0x0000, 0x0000,
2003 },
2004 {
2005 NPC_S_KPU8_UDP, 0xff, NPC_UDP_PORT_GTPU, 0xffff,
2006 0x0000, 0x0000, 0x0000, 0x0000,
2007 },
2008 {
2009 NPC_S_KPU8_UDP, 0xff, 0x0000, 0x0000,
2010 0x0000, 0x0000, 0x0000, 0x0000,
2011 },
2012 {
2013 NPC_S_KPU8_SCTP, 0xff, 0x0000, 0x0000,
2014 0x0000, 0x0000, 0x0000, 0x0000,
2015 },
2016 {
2017 NPC_S_KPU8_ICMP, 0xff, 0x0000, 0x0000,
2018 0x0000, 0x0000, 0x0000, 0x0000,
2019 },
2020 {
2021 NPC_S_KPU8_IGMP, 0xff, 0x0000, 0x0000,
2022 0x0000, 0x0000, 0x0000, 0x0000,
2023 },
2024 {
2025 NPC_S_KPU8_ICMP6, 0xff, 0x0000, 0x0000,
2026 0x0000, 0x0000, 0x0000, 0x0000,
2027 },
2028 {
2029 NPC_S_KPU8_ESP, 0xff, 0x0000, 0x0000,
2030 0x0000, 0x0000, 0x0000, 0x0000,
2031 },
2032 {
2033 NPC_S_KPU8_AH, 0xff, 0x0000, 0x0000,
2034 0x0000, 0x0000, 0x0000, 0x0000,
2035 },
2036 {
2037 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_TRANS_ETH_BR, 0xffff,
2038 NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2039 },
2040 {
2041 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_TRANS_ETH_BR, 0xffff,
2042 0x0000, 0x0000, 0x0000, 0x0000,
2043 },
2044 {
2045 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2046 0x0000, 0xffff, 0x0000, 0x0000,
2047 },
2048 {
2049 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2050 NPC_GRE_F_CSUM, 0xffff, 0x0000, 0x0000,
2051 },
2052 {
2053 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2054 NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2055 },
2056 {
2057 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2058 NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2059 },
2060 {
2061 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2062 NPC_GRE_F_CSUM | NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2063 },
2064 {
2065 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2066 NPC_GRE_F_CSUM | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2067 },
2068 {
2069 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2070 NPC_GRE_F_KEY | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2071 },
2072 {
2073 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSU, 0xffff,
2074 NPC_GRE_F_CSUM | NPC_GRE_F_KEY | NPC_GRE_F_SEQ,
2075 0xffff, 0x0000, 0x0000,
2076 },
2077 {
2078 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2079 0x0000, 0xffff, 0x0000, 0x0000,
2080 },
2081 {
2082 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2083 NPC_GRE_F_CSUM, 0xffff, 0x0000, 0x0000,
2084 },
2085 {
2086 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2087 NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2088 },
2089 {
2090 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2091 NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2092 },
2093 {
2094 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2095 NPC_GRE_F_CSUM | NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2096 },
2097 {
2098 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2099 NPC_GRE_F_CSUM | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2100 },
2101 {
2102 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2103 NPC_GRE_F_KEY | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2104 },
2105 {
2106 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_MPLSM, 0xffff,
2107 NPC_GRE_F_CSUM | NPC_GRE_F_KEY | NPC_GRE_F_SEQ,
2108 0xffff, 0x0000, 0x0000,
2109 },
2110 {
2111 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2112 0x0000, 0xffff, 0x0000, 0x0000,
2113 },
2114 {
2115 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2116 NPC_GRE_F_CSUM, 0xffff, 0x0000, 0x0000,
2117 },
2118 {
2119 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2120 NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2121 },
2122 {
2123 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2124 NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2125 },
2126 {
2127 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2128 NPC_GRE_F_CSUM | NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2129 },
2130 {
2131 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2132 NPC_GRE_F_CSUM | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2133 },
2134 {
2135 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2136 NPC_GRE_F_KEY | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2137 },
2138 {
2139 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_NSH, 0xffff,
2140 NPC_GRE_F_CSUM | NPC_GRE_F_KEY | NPC_GRE_F_SEQ,
2141 0xffff, 0x0000, 0x0000,
2142 },
2143 {
2144 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2145 0x0000, 0xffff, 0x0000, 0x0000,
2146 },
2147 {
2148 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2149 NPC_GRE_F_CSUM, 0xffff, 0x0000, 0x0000,
2150 },
2151 {
2152 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2153 NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2154 },
2155 {
2156 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2157 NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2158 },
2159 {
2160 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2161 NPC_GRE_F_CSUM | NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2162 },
2163 {
2164 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2165 NPC_GRE_F_CSUM | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2166 },
2167 {
2168 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2169 NPC_GRE_F_KEY | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2170 },
2171 {
2172 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP, 0xffff,
2173 NPC_GRE_F_CSUM | NPC_GRE_F_KEY | NPC_GRE_F_SEQ,
2174 0xffff, 0x0000, 0x0000,
2175 },
2176 {
2177 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2178 0x0000, 0xffff, 0x0000, 0x0000,
2179 },
2180 {
2181 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2182 NPC_GRE_F_CSUM, 0xffff, 0x0000, 0x0000,
2183 },
2184 {
2185 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2186 NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2187 },
2188 {
2189 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2190 NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2191 },
2192 {
2193 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2194 NPC_GRE_F_CSUM | NPC_GRE_F_KEY, 0xffff, 0x0000, 0x0000,
2195 },
2196 {
2197 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2198 NPC_GRE_F_CSUM | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2199 },
2200 {
2201 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2202 NPC_GRE_F_KEY | NPC_GRE_F_SEQ, 0xffff, 0x0000, 0x0000,
2203 },
2204 {
2205 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_IP6, 0xffff,
2206 NPC_GRE_F_CSUM | NPC_GRE_F_KEY | NPC_GRE_F_SEQ,
2207 0xffff, 0x0000, 0x0000,
2208 },
2209 {
2210 NPC_S_KPU8_GRE, 0xff, 0x0000, 0xffff,
2211 NPC_GRE_F_ROUTE, 0x4fff, 0x0000, 0x0000,
2212 },
2213 {
2214 NPC_S_KPU8_GRE, 0xff, 0x0000, 0xffff,
2215 0x0000, 0x4fff, 0x0000, 0x0000,
2216 },
2217 {
2218 NPC_S_KPU8_GRE, 0xff, 0x0000, 0xffff,
2219 0x0000, 0x0003, 0x0000, 0x0000,
2220 },
2221 {
2222 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_PPP, 0xffff,
2223 NPC_GRE_F_KEY | NPC_GRE_VER_1, 0xffff, 0x0000, 0x0000,
2224 },
2225 {
2226 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_PPP, 0xffff,
2227 NPC_GRE_F_KEY | NPC_GRE_F_SEQ | NPC_GRE_VER_1,
2228 0xffff, 0x0000, 0x0000,
2229 },
2230 {
2231 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_PPP, 0xffff,
2232 NPC_GRE_F_KEY | NPC_GRE_F_ACK | NPC_GRE_VER_1,
2233 0xffff, 0x0000, 0x0000,
2234 },
2235 {
2236 NPC_S_KPU8_GRE, 0xff, NPC_ETYPE_PPP, 0xffff,
2237 NPC_GRE_F_KEY | NPC_GRE_F_SEQ | NPC_GRE_F_ACK | NPC_GRE_VER_1,
2238 0xffff, 0x0000, 0x0000,
2239 },
2240 {
2241 NPC_S_KPU8_GRE, 0xff, 0x0000, 0xffff,
2242 0x2001, 0xef7f, 0x0000, 0x0000,
2243 },
2244 {
2245 NPC_S_KPU8_GRE, 0xff, 0x0000, 0xffff,
2246 0x0001, 0x0003, 0x0000, 0x0000,
2247 },
2248 {
2249 NPC_S_NA, 0X00, 0x0000, 0x0000,
2250 0x0000, 0x0000, 0x0000, 0x0000,
2251 },
2252};
2253
2254static struct npc_kpu_profile_cam kpu9_cam_entries[] = {
2255 {
2256 NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 0xff, NPC_MPLS_S, NPC_MPLS_S,
2257 0x0000, 0x0000, 0x0000, 0x0000,
2258 },
2259 {
2260 NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 0xff, 0x0000, NPC_MPLS_S,
2261 NPC_MPLS_S, NPC_MPLS_S, 0x0000, 0x0000,
2262 },
2263 {
2264 NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 0xff, 0x0000, NPC_MPLS_S,
2265 0x0000, NPC_MPLS_S, NPC_MPLS_S, NPC_MPLS_S,
2266 },
2267 {
2268 NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 0xff, 0x0000, NPC_MPLS_S,
2269 0x0000, NPC_MPLS_S, 0x0000, NPC_MPLS_S,
2270 },
2271 {
2272 NPC_S_KPU9_TU_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
2273 0x0000, 0x0000, 0x0000, 0x0000,
2274 },
2275 {
2276 NPC_S_KPU9_TU_MPLS, 0xff, 0x0000, NPC_MPLS_S,
2277 NPC_MPLS_S, NPC_MPLS_S, 0x0000, 0x0000,
2278 },
2279 {
2280 NPC_S_KPU9_TU_MPLS, 0xff, 0x0000, NPC_MPLS_S,
2281 0x0000, NPC_MPLS_S, NPC_MPLS_S, NPC_MPLS_S,
2282 },
2283 {
2284 NPC_S_KPU9_TU_MPLS, 0xff, 0x0000, NPC_MPLS_S,
2285 0x0000, NPC_MPLS_S, 0x0000, NPC_MPLS_S,
2286 },
2287 {
2288 NPC_S_KPU9_TU_NSH, 0xff, NPC_NSH_NP_IP, NPC_NSH_NP_MASK,
2289 0x0000, 0x0000, 0x0000, 0x0000,
2290 },
2291 {
2292 NPC_S_KPU9_TU_NSH, 0xff, NPC_NSH_NP_IP6, NPC_NSH_NP_MASK,
2293 0x0000, 0x0000, 0x0000, 0x0000,
2294 },
2295 {
2296 NPC_S_KPU9_TU_NSH, 0xff, NPC_NSH_NP_ETH, NPC_NSH_NP_MASK,
2297 0x0000, 0x0000, 0x0000, 0x0000,
2298 },
2299 {
2300 NPC_S_KPU9_TU_NSH, 0xff, NPC_NSH_NP_NSH, NPC_NSH_NP_MASK,
2301 0x0000, 0x0000, 0x0000, 0x0000,
2302 },
2303 {
2304 NPC_S_KPU9_TU_NSH, 0xff, NPC_NSH_NP_MPLS, NPC_NSH_NP_MASK,
2305 0x0000, 0x0000, 0x0000, 0x0000,
2306 },
2307 {
2308 NPC_S_NA, 0X00, 0x0000, 0x0000,
2309 0x0000, 0x0000, 0x0000, 0x0000,
2310 },
2311};
2312
2313static struct npc_kpu_profile_cam kpu10_cam_entries[] = {
2314 {
2315 NPC_S_KPU10_TU_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
2316 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2317 },
2318 {
2319 NPC_S_KPU10_TU_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
2320 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2321 },
2322 {
2323 NPC_S_KPU10_TU_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
2324 0x0000, 0xffff, 0x0000, 0x0000,
2325 },
2326 {
2327 NPC_S_KPU10_TU_MPLS, 0xff, NPC_MPLS_S, NPC_MPLS_S,
2328 0x0000, 0x0000, 0x0000, 0x0000,
2329 },
2330 {
2331 NPC_S_KPU10_TU_MPLS, 0xff, 0x0000, NPC_MPLS_S,
2332 0x0000, 0x0000, 0x0000, 0x0000,
2333 },
2334 {
2335 NPC_S_KPU10_TU_MPLS_PL, 0xff, NPC_IP_VER_4, NPC_IP_VER_MASK,
2336 0x0000, 0x0000, 0x0000, 0x0000,
2337 },
2338 {
2339 NPC_S_KPU10_TU_MPLS_PL, 0xff, NPC_IP_VER_6, NPC_IP_VER_MASK,
2340 0x0000, 0x0000, 0x0000, 0x0000,
2341 },
2342 {
2343 NPC_S_KPU10_TU_MPLS_PL, 0xff, 0x0000, 0xffff,
2344 0x0000, 0x0000, 0x0000, 0x0000,
2345 },
2346 {
2347 NPC_S_KPU10_TU_MPLS_PL, 0xff, 0x0000, 0x0000,
2348 0x0000, 0x0000, 0x0000, 0x0000,
2349 },
2350 {
2351 NPC_S_KPU10_TU_NSH, 0xff, NPC_NSH_NP_IP, NPC_NSH_NP_MASK,
2352 0x0000, 0x0000, 0x0000, 0x0000,
2353 },
2354 {
2355 NPC_S_KPU10_TU_NSH, 0xff, NPC_NSH_NP_IP6, NPC_NSH_NP_MASK,
2356 0x0000, 0x0000, 0x0000, 0x0000,
2357 },
2358 {
2359 NPC_S_KPU10_TU_NSH, 0xff, NPC_NSH_NP_ETH, NPC_NSH_NP_MASK,
2360 0x0000, 0x0000, 0x0000, 0x0000,
2361 },
2362 {
2363 NPC_S_KPU10_TU_NSH, 0xff, NPC_NSH_NP_NSH, NPC_NSH_NP_MASK,
2364 0x0000, 0x0000, 0x0000, 0x0000,
2365 },
2366 {
2367 NPC_S_KPU10_TU_NSH, 0xff, NPC_NSH_NP_MPLS, NPC_NSH_NP_MASK,
2368 0x0000, 0x0000, 0x0000, 0x0000,
2369 },
2370 {
2371 NPC_S_NA, 0X00, 0x0000, 0x0000,
2372 0x0000, 0x0000, 0x0000, 0x0000,
2373 },
2374};
2375
2376static struct npc_kpu_profile_cam kpu11_cam_entries[] = {
2377 {
2378 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_IP, 0xffff,
2379 0x0000, 0x0000, 0x0000, 0x0000,
2380 },
2381 {
2382 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_IP6, 0xffff,
2383 0x0000, 0x0000, 0x0000, 0x0000,
2384 },
2385 {
2386 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_ARP, 0xffff,
2387 0x0000, 0x0000, 0x0000, 0x0000,
2388 },
2389 {
2390 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_CTAG, 0xffff,
2391 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
2392 },
2393 {
2394 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_CTAG, 0xffff,
2395 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
2396 },
2397 {
2398 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_CTAG, 0xffff,
2399 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
2400 },
2401 {
2402 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_CTAG, 0xffff,
2403 0x0000, 0x0000, 0x0000, 0x0000,
2404 },
2405 {
2406 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2407 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP, 0xffff,
2408 },
2409 {
2410 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2411 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP6, 0xffff,
2412 },
2413 {
2414 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2415 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_ARP, 0xffff,
2416 },
2417 {
2418 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2419 NPC_ETYPE_CTAG, 0xffff, 0x0000, 0x0000,
2420 },
2421 {
2422 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2423 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
2424 },
2425 {
2426 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2427 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
2428 },
2429 {
2430 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2431 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
2432 },
2433 {
2434 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_SBTAG, 0xffff,
2435 0x0000, 0x0000, 0x0000, 0x0000,
2436 },
2437 {
2438 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2439 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP, 0xffff,
2440 },
2441 {
2442 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2443 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_IP6, 0xffff,
2444 },
2445 {
2446 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2447 NPC_ETYPE_CTAG, 0xffff, NPC_ETYPE_ARP, 0xffff,
2448 },
2449 {
2450 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2451 NPC_ETYPE_CTAG, 0xffff, 0x0000, 0x0000,
2452 },
2453 {
2454 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2455 NPC_ETYPE_IP, 0xffff, 0x0000, 0x0000,
2456 },
2457 {
2458 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2459 NPC_ETYPE_IP6, 0xffff, 0x0000, 0x0000,
2460 },
2461 {
2462 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2463 NPC_ETYPE_ARP, 0xffff, 0x0000, 0x0000,
2464 },
2465 {
2466 NPC_S_KPU11_TU_ETHER, 0xff, NPC_ETYPE_QINQ, 0xffff,
2467 0x0000, 0x0000, 0x0000, 0x0000,
2468 },
2469 {
2470 NPC_S_KPU11_TU_ETHER, 0xff, 0x0000, 0x0000,
2471 0x0000, 0x0000, 0x0000, 0x0000,
2472 },
2473 {
2474 NPC_S_KPU11_TU_PPP, 0xff, 0x0000, 0x0000,
2475 0x0000, 0x0000, 0x0000, 0x0000,
2476 },
2477 {
2478 NPC_S_KPU11_TU_MPLS_IN_NSH, 0xff, 0x0000, 0x0000,
2479 0x0000, 0x0000, 0x0000, 0x0000,
2480 },
2481 {
2482 NPC_S_KPU11_TU_3RD_NSH, 0xff, 0x0000, 0x0000,
2483 0x0000, 0x0000, 0x0000, 0x0000,
2484 },
2485 {
2486 NPC_S_NA, 0X00, 0x0000, 0x0000,
2487 0x0000, 0x0000, 0x0000, 0x0000,
2488 },
2489};
2490
2491static struct npc_kpu_profile_cam kpu12_cam_entries[] = {
2492 {
2493 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_TCP, 0x00ff,
2494 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2495 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2496 },
2497 {
2498 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_UDP, 0x00ff,
2499 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2500 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2501 },
2502 {
2503 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_SCTP, 0x00ff,
2504 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2505 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2506 },
2507 {
2508 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_ICMP, 0x00ff,
2509 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2510 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2511 },
2512 {
2513 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_IGMP, 0x00ff,
2514 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2515 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2516 },
2517 {
2518 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_ESP, 0x00ff,
2519 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2520 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2521 },
2522 {
2523 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_AH, 0x00ff,
2524 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2525 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2526 },
2527 {
2528 NPC_S_KPU12_TU_IP, 0xff, 0x0000, 0x0000,
2529 NPC_IP_VER_4 | NPC_IP_HDR_LEN_5,
2530 NPC_IP_VER_MASK | NPC_IP_HDR_LEN_MASK, 0x0000, 0x0000,
2531 },
2532 {
2533 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_TCP, 0x00ff,
2534 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2535 },
2536 {
2537 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_UDP, 0x00ff,
2538 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2539 },
2540 {
2541 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_SCTP, 0x00ff,
2542 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2543 },
2544 {
2545 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_ICMP, 0x00ff,
2546 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2547 },
2548 {
2549 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_IGMP, 0x00ff,
2550 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2551 },
2552 {
2553 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_ESP, 0x00ff,
2554 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2555 },
2556 {
2557 NPC_S_KPU12_TU_IP, 0xff, NPC_IPNH_AH, 0x00ff,
2558 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2559 },
2560 {
2561 NPC_S_KPU12_TU_IP, 0xff, 0x0000, 0x0000,
2562 NPC_IP_VER_4, NPC_IP_VER_MASK, 0x0000, 0x0000,
2563 },
2564 {
2565 NPC_S_KPU12_TU_IP, 0xff, 0x0000, 0x0000,
2566 0x0000, 0x0000, 0x0000, 0x0000,
2567 },
2568 {
2569 NPC_S_KPU12_TU_ARP, 0xff, 0x0000, 0x0000,
2570 0x0000, 0x0000, 0x0000, 0x0000,
2571 },
2572 {
2573 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_TCP << 8, 0xff00,
2574 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2575 },
2576 {
2577 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_UDP << 8, 0xff00,
2578 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2579 },
2580 {
2581 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_SCTP << 8, 0xff00,
2582 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2583 },
2584 {
2585 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_ICMP << 8, 0xff00,
2586 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2587 },
2588 {
2589 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_ICMP6 << 8, 0xff00,
2590 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2591 },
2592 {
2593 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_ESP << 8, 0xff00,
2594 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2595 },
2596 {
2597 NPC_S_KPU12_TU_IP6, 0xff, NPC_IPNH_AH << 8, 0xff00,
2598 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2599 },
2600 {
2601 NPC_S_KPU12_TU_IP6, 0xff, 0x0000, 0x0000,
2602 NPC_IP_VER_6, NPC_IP_VER_MASK, 0x0000, 0x0000,
2603 },
2604 {
2605 NPC_S_KPU12_TU_IP6, 0xff, 0x0000, 0x0000,
2606 0x0000, 0x0000, 0x0000, 0x0000,
2607 },
2608 {
2609 NPC_S_NA, 0X00, 0x0000, 0x0000,
2610 0x0000, 0x0000, 0x0000, 0x0000,
2611 },
2612};
2613
2614static struct npc_kpu_profile_cam kpu13_cam_entries[] = {
2615 {
2616 NPC_S_KPU13_TU_IP6_EXT, 0xff, 0x0000, 0x0000,
2617 0x0000, 0x0000, 0x0000, 0x0000,
2618 },
2619};
2620
2621static struct npc_kpu_profile_cam kpu14_cam_entries[] = {
2622 {
2623 NPC_S_KPU14_TU_IP6_EXT, 0xff, 0x0000, 0x0000,
2624 0x0000, 0x0000, 0x0000, 0x0000,
2625 },
2626};
2627
2628static struct npc_kpu_profile_cam kpu15_cam_entries[] = {
2629 {
2630 NPC_S_KPU15_TU_TCP, 0xff, NPC_TCP_PORT_HTTP, 0xffff,
2631 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
2632 },
2633 {
2634 NPC_S_KPU15_TU_TCP, 0xff, NPC_TCP_PORT_HTTPS, 0xffff,
2635 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
2636 },
2637 {
2638 NPC_S_KPU15_TU_TCP, 0xff, NPC_TCP_PORT_PPTP, 0xffff,
2639 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
2640 },
2641 {
2642 NPC_S_KPU15_TU_TCP, 0xff, 0x0000, 0x0000,
2643 NPC_TCP_DATA_OFFSET_5, NPC_TCP_DATA_OFFSET_MASK, 0x0000, 0x0000,
2644 },
2645 {
2646 NPC_S_KPU15_TU_TCP, 0xff, NPC_TCP_PORT_HTTP, 0xffff,
2647 0x0000, 0x0000, 0x0000, 0x0000,
2648 },
2649 {
2650 NPC_S_KPU15_TU_TCP, 0xff, NPC_TCP_PORT_HTTPS, 0xffff,
2651 0x0000, 0x0000, 0x0000, 0x0000,
2652 },
2653 {
2654 NPC_S_KPU15_TU_TCP, 0xff, NPC_TCP_PORT_PPTP, 0xffff,
2655 0x0000, 0x0000, 0x0000, 0x0000,
2656 },
2657 {
2658 NPC_S_KPU15_TU_TCP, 0xff, 0x0000, 0x0000,
2659 0x0000, 0x0000, 0x0000, 0x0000,
2660 },
2661 {
2662 NPC_S_KPU15_TU_UDP, 0xff, 0x0000, 0x0000,
2663 0x0000, 0x0000, 0x0000, 0x0000,
2664 },
2665 {
2666 NPC_S_KPU15_TU_SCTP, 0xff, 0x0000, 0x0000,
2667 0x0000, 0x0000, 0x0000, 0x0000,
2668 },
2669 {
2670 NPC_S_KPU15_TU_ICMP, 0xff, 0x0000, 0x0000,
2671 0x0000, 0x0000, 0x0000, 0x0000,
2672 },
2673 {
2674 NPC_S_KPU15_TU_IGMP, 0xff, 0x0000, 0x0000,
2675 0x0000, 0x0000, 0x0000, 0x0000,
2676 },
2677 {
2678 NPC_S_KPU15_TU_ICMP6, 0xff, 0x0000, 0x0000,
2679 0x0000, 0x0000, 0x0000, 0x0000,
2680 },
2681 {
2682 NPC_S_KPU15_TU_ESP, 0xff, 0x0000, 0x0000,
2683 0x0000, 0x0000, 0x0000, 0x0000,
2684 },
2685 {
2686 NPC_S_KPU15_TU_AH, 0xff, 0x0000, 0x0000,
2687 0x0000, 0x0000, 0x0000, 0x0000,
2688 },
2689 {
2690 NPC_S_NA, 0X00, 0x0000, 0x0000,
2691 0x0000, 0x0000, 0x0000, 0x0000,
2692 },
2693};
2694
2695static struct npc_kpu_profile_cam kpu16_cam_entries[] = {
2696 {
2697 NPC_S_KPU16_TCP_DATA, 0xff, 0x0000, 0x0000,
2698 0x0000, 0x0000, 0x0000, 0x0000,
2699 },
2700 {
2701 NPC_S_KPU16_HTTP_DATA, 0xff, 0x0000, 0x0000,
2702 0x0000, 0x0000, 0x0000, 0x0000,
2703 },
2704 {
2705 NPC_S_KPU16_HTTPS_DATA, 0xff, 0x0000, 0x0000,
2706 0x0000, 0x0000, 0x0000, 0x0000,
2707 },
2708 {
2709 NPC_S_KPU16_PPTP_DATA, 0xff, 0x0000, 0x0000,
2710 0x0000, 0x0000, 0x0000, 0x0000,
2711 },
2712 {
2713 NPC_S_KPU16_UDP_DATA, 0xff, 0x0000, 0x0000,
2714 0x0000, 0x0000, 0x0000, 0x0000,
2715 },
2716};
2717
2718static struct npc_kpu_profile_action kpu1_action_entries[] = {
2719 {
2720 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
2721 3, 0, NPC_S_KPU5_IP, 14, 1,
2722 NPC_LID_LA, NPC_LT_LA_ETHER, 0, 0, 0,
2723 0, 0,
2724 },
2725 {
2726 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
2727 3, 0, NPC_S_KPU5_IP6, 14, 1,
2728 NPC_LID_LA, NPC_LT_LA_ETHER, 0, 0, 0,
2729 0, 0,
2730 },
2731 {
2732 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2733 3, 0, NPC_S_KPU5_ARP, 14, 1,
2734 NPC_LID_LA, NPC_LT_LA_ETHER, 0, 0, 0,
2735 0, 0,
2736 },
2737 {
2738 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2739 3, 0, NPC_S_KPU5_RARP, 14, 1,
2740 NPC_LID_LA, NPC_LT_LA_ETHER, 0, 0, 0,
2741 0, 0,
2742 },
2743 {
2744 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2745 3, 0, NPC_S_KPU5_PTP, 14, 1,
2746 NPC_LID_LA, NPC_LT_LA_ETHER, 0, 0, 0,
2747 0, 0,
2748 },
2749 {
2750 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2751 3, 0, NPC_S_KPU5_FCOE, 14, 1,
2752 NPC_LID_LA, NPC_LT_LA_ETHER, 0, 0, 0,
2753 0, 0,
2754 },
2755 {
2756 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
2757 0, 0, NPC_S_KPU2_CTAG, 14, 1,
2758 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_VLAN, 0, 0,
2759 0, 0,
2760 },
2761 {
2762 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 20,
2763 0, 0, NPC_S_KPU2_SBTAG, 14, 1,
2764 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_VLAN, 0, 0,
2765 0, 0,
2766 },
2767 {
2768 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
2769 0, 0, NPC_S_KPU2_QINQ, 14, 1,
2770 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_VLAN, 0, 0,
2771 0, 0,
2772 },
2773 {
2774 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 10, 24,
2775 0, 0, NPC_S_KPU2_ETAG, 14, 1,
2776 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_ETAG, 0, 0,
2777 0, 0,
2778 },
2779 {
2780 NPC_ERRLEV_RE, NPC_EC_NOERR, 16, 20, 24,
2781 0, 0, NPC_S_KPU2_ITAG, 14, 1,
2782 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_ITAG, 0, 0,
2783 0, 0,
2784 },
2785 {
2786 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2787 2, 0, NPC_S_KPU4_MPLS, 14, 1,
2788 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_MPLS, 0, 0,
2789 0, 0,
2790 },
2791 {
2792 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2793 2, 0, NPC_S_KPU4_MPLS, 14, 1,
2794 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_MPLS, 0, 0,
2795 0, 0,
2796 },
2797 {
2798 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
2799 2, 0, NPC_S_KPU4_NSH, 14, 1,
2800 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETHER_NSH, 0, 0,
2801 0, 0,
2802 },
2803 {
2804 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2805 0, 1, NPC_S_NA, 0, 1,
2806 NPC_LID_LA, NPC_LT_LA_8023, 0, 0, 0,
2807 0, 0,
2808 },
2809 {
2810 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2811 0, 1, NPC_S_NA, 0, 1,
2812 NPC_LID_LA, NPC_LT_LA_8023, 0, 0, 0,
2813 0, 0,
2814 },
2815 {
2816 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2817 0, 1, NPC_S_NA, 0, 1,
2818 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETYPE_UNK, 0, 0,
2819 0, 0,
2820 },
2821 {
2822 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
2823 3, 0, NPC_S_KPU5_IP, 14, 1,
2824 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI, 0, 0,
2825 0, 0,
2826 },
2827 {
2828 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
2829 3, 0, NPC_S_KPU5_IP6, 14, 1,
2830 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI, 0, 0,
2831 0, 0,
2832 },
2833 {
2834 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2835 3, 0, NPC_S_KPU5_ARP, 14, 1,
2836 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI, 0, 0,
2837 0, 0,
2838 },
2839 {
2840 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2841 3, 0, NPC_S_KPU5_RARP, 14, 1,
2842 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI, 0, 0,
2843 0, 0,
2844 },
2845 {
2846 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2847 3, 0, NPC_S_KPU5_PTP, 14, 1,
2848 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI, 0, 0,
2849 0, 0,
2850 },
2851 {
2852 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2853 3, 0, NPC_S_KPU5_FCOE, 14, 1,
2854 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI, 0, 0,
2855 0, 0,
2856 },
2857 {
2858 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
2859 0, 0, NPC_S_KPU2_CTAG, 14, 1,
2860 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_VLAN, 0, 0,
2861 0, 0,
2862 },
2863 {
2864 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 20,
2865 0, 0, NPC_S_KPU2_SBTAG, 14, 1,
2866 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_VLAN, 0, 0,
2867 0, 0,
2868 },
2869 {
2870 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
2871 0, 0, NPC_S_KPU2_QINQ, 14, 1,
2872 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_VLAN, 0, 0,
2873 0, 0,
2874 },
2875 {
2876 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 10, 24,
2877 0, 0, NPC_S_KPU2_ETAG, 14, 1,
2878 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_ETAG, 0, 0,
2879 0, 0,
2880 },
2881 {
2882 NPC_ERRLEV_RE, NPC_EC_NOERR, 16, 20, 24,
2883 0, 0, NPC_S_KPU2_ITAG, 14, 1,
2884 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_ITAG, 0, 0,
2885 0, 0,
2886 },
2887 {
2888 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2889 2, 0, NPC_S_KPU4_MPLS, 14, 1,
2890 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_MPLS, 0, 0,
2891 0, 0,
2892 },
2893 {
2894 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2895 2, 0, NPC_S_KPU4_MPLS, 14, 1,
2896 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_MPLS, 0, 0,
2897 0, 0,
2898 },
2899 {
2900 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2901 2, 0, NPC_S_KPU4_NSH, 14, 1,
2902 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_PKI_NSH, 0, 0,
2903 0, 0,
2904 },
2905 {
2906 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2907 0, 1, NPC_S_NA, 0, 1,
2908 NPC_LID_LA, NPC_LT_LA_ETHER, NPC_F_ETYPE_UNK, 0, 0,
2909 0, 0,
2910 },
2911 {
2912 NPC_ERRLEV_LA, NPC_EC_L2_K1, 0, 0, 0,
2913 0, 1, NPC_S_NA, 0, 0,
2914 NPC_LID_LA, NPC_LT_NA, 0, 0, 0,
2915 0, 0,
2916 },
2917};
2918
2919static struct npc_kpu_profile_action kpu2_action_entries[] = {
2920 {
2921 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
2922 2, 0, NPC_S_KPU5_IP, 4, 1,
2923 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2924 0, 0,
2925 },
2926 {
2927 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
2928 2, 0, NPC_S_KPU5_IP6, 4, 1,
2929 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2930 0, 0,
2931 },
2932 {
2933 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2934 2, 0, NPC_S_KPU5_ARP, 4, 1,
2935 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2936 0, 0,
2937 },
2938 {
2939 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2940 2, 0, NPC_S_KPU5_RARP, 4, 1,
2941 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2942 0, 0,
2943 },
2944 {
2945 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2946 2, 0, NPC_S_KPU5_PTP, 4, 1,
2947 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2948 0, 0,
2949 },
2950 {
2951 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2952 2, 0, NPC_S_KPU5_FCOE, 4, 1,
2953 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2954 0, 0,
2955 },
2956 {
2957 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2958 1, 0, NPC_S_KPU4_MPLS, 4, 1,
2959 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2960 0, 0,
2961 },
2962 {
2963 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
2964 1, 0, NPC_S_KPU4_MPLS, 4, 1,
2965 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2966 0, 0,
2967 },
2968 {
2969 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
2970 1, 0, NPC_S_KPU4_NSH, 4, 1,
2971 NPC_LID_LB, NPC_LT_LB_CTAG, 0, 0, 0,
2972 0, 0,
2973 },
2974 {
2975 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2976 0, 1, NPC_S_NA, 0, 1,
2977 NPC_LID_LB, NPC_LT_LB_CTAG, NPC_F_ETYPE_UNK, 0, 0,
2978 0, 0,
2979 },
2980 {
2981 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
2982 2, 0, NPC_S_KPU5_IP, 8, 1,
2983 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
2984 0, 0,
2985 },
2986 {
2987 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
2988 2, 0, NPC_S_KPU5_IP6, 8, 1,
2989 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
2990 0, 0,
2991 },
2992 {
2993 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
2994 2, 0, NPC_S_KPU5_ARP, 8, 1,
2995 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
2996 0, 0,
2997 },
2998 {
2999 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3000 2, 0, NPC_S_KPU5_RARP, 8, 1,
3001 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
3002 0, 0,
3003 },
3004 {
3005 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3006 2, 0, NPC_S_KPU5_PTP, 8, 1,
3007 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
3008 0, 0,
3009 },
3010 {
3011 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3012 2, 0, NPC_S_KPU5_FCOE, 8, 1,
3013 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
3014 0, 0,
3015 },
3016 {
3017 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3018 1, 0, NPC_S_KPU4_MPLS, 8, 1,
3019 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
3020 0, 0,
3021 },
3022 {
3023 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3024 1, 0, NPC_S_KPU4_MPLS, 8, 1,
3025 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
3026 0, 0,
3027 },
3028 {
3029 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3030 1, 0, NPC_S_KPU4_NSH, 8, 1,
3031 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG, 0, 0,
3032 0, 0,
3033 },
3034 {
3035 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3036 0, 1, NPC_S_NA, 0, 1,
3037 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_CTAG_UNK, 0, 0,
3038 0, 0,
3039 },
3040 {
3041 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
3042 0, 0, NPC_S_KPU3_CTAG, 8, 1,
3043 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_STAG_CTAG, 0, 0,
3044 0, 0,
3045 },
3046 {
3047 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
3048 0, 0, NPC_S_KPU3_STAG, 8, 1,
3049 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_STAG_STAG_STAG, 0, 0,
3050 0, 0,
3051 },
3052 {
3053 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3054 2, 0, NPC_S_KPU5_IP, 22, 1,
3055 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3056 0, 0,
3057 },
3058 {
3059 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3060 2, 0, NPC_S_KPU5_IP6, 22, 1,
3061 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3062 0, 0,
3063 },
3064 {
3065 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3066 2, 0, NPC_S_KPU5_ARP, 22, 1,
3067 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3068 0, 0,
3069 },
3070 {
3071 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3072 2, 0, NPC_S_KPU5_RARP, 22, 1,
3073 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3074 0, 0,
3075 },
3076 {
3077 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3078 2, 0, NPC_S_KPU5_PTP, 22, 1,
3079 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3080 0, 0,
3081 },
3082 {
3083 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3084 2, 0, NPC_S_KPU5_FCOE, 22, 1,
3085 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3086 0, 0,
3087 },
3088 {
3089 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3090 1, 0, NPC_S_KPU4_MPLS, 22, 1,
3091 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3092 0, 0,
3093 },
3094 {
3095 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3096 1, 0, NPC_S_KPU4_MPLS, 22, 1,
3097 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3098 0, 0,
3099 },
3100 {
3101 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3102 1, 0, NPC_S_KPU4_NSH, 22, 1,
3103 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG, 0, 0,
3104 0, 0,
3105 },
3106 {
3107 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3108 0, 0, NPC_S_KPU3_STAG, 22, 1,
3109 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG_STAG, 0, 0,
3110 0, 0,
3111 },
3112 {
3113 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3114 0, 0, NPC_S_KPU3_CTAG, 22, 1,
3115 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG_CTAG, 0, 0,
3116 0, 0,
3117 },
3118 {
3119 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3120 0, 1, NPC_S_NA, 0, 1,
3121 NPC_LID_LB, NPC_LT_LB_BTAG, NPC_F_BTAG_ITAG_UNK, 0, 0,
3122 0, 0,
3123 },
3124 {
3125 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3126 2, 0, NPC_S_KPU5_IP, 4, 1,
3127 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3128 0, 0,
3129 },
3130 {
3131 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3132 2, 0, NPC_S_KPU5_IP6, 4, 1,
3133 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3134 0, 0,
3135 },
3136 {
3137 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3138 2, 0, NPC_S_KPU5_ARP, 4, 1,
3139 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3140 0, 0,
3141 },
3142 {
3143 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3144 2, 0, NPC_S_KPU5_RARP, 4, 1,
3145 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3146 0, 0,
3147 },
3148 {
3149 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3150 2, 0, NPC_S_KPU5_PTP, 4, 1,
3151 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3152 0, 0,
3153 },
3154 {
3155 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3156 2, 0, NPC_S_KPU5_FCOE, 4, 1,
3157 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3158 0, 0,
3159 },
3160 {
3161 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3162 1, 0, NPC_S_KPU4_MPLS, 4, 1,
3163 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3164 0, 0,
3165 },
3166 {
3167 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3168 1, 0, NPC_S_KPU4_MPLS, 4, 1,
3169 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3170 0, 0,
3171 },
3172 {
3173 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3174 1, 0, NPC_S_KPU4_NSH, 4, 1,
3175 NPC_LID_LB, NPC_LT_LB_STAG, 0, 0, 0,
3176 0, 0,
3177 },
3178 {
3179 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3180 0, 1, NPC_S_NA, 0, 1,
3181 NPC_LID_LB, NPC_LT_LB_STAG, NPC_F_ETYPE_UNK, 0, 0,
3182 0, 0,
3183 },
3184 {
3185 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3186 2, 0, NPC_S_KPU5_IP, 8, 1,
3187 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3188 0, 0,
3189 },
3190 {
3191 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3192 2, 0, NPC_S_KPU5_IP6, 8, 1,
3193 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3194 0, 0,
3195 },
3196 {
3197 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3198 2, 0, NPC_S_KPU5_ARP, 8, 1,
3199 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3200 0, 0,
3201 },
3202 {
3203 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3204 2, 0, NPC_S_KPU5_RARP, 8, 1,
3205 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3206 0, 0,
3207 },
3208 {
3209 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3210 2, 0, NPC_S_KPU5_PTP, 8, 1,
3211 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3212 0, 0,
3213 },
3214 {
3215 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3216 2, 0, NPC_S_KPU5_FCOE, 8, 1,
3217 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3218 0, 0,
3219 },
3220 {
3221 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3222 1, 0, NPC_S_KPU4_MPLS, 8, 1,
3223 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3224 0, 0,
3225 },
3226 {
3227 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3228 1, 0, NPC_S_KPU4_MPLS, 8, 1,
3229 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3230 0, 0,
3231 },
3232 {
3233 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3234 1, 0, NPC_S_KPU4_NSH, 8, 1,
3235 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG, 0, 0,
3236 0, 0,
3237 },
3238 {
3239 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3240 0, 1, NPC_S_NA, 0, 1,
3241 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_CTAG_UNK, 0, 0,
3242 0, 0,
3243 },
3244 {
3245 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
3246 0, 0, NPC_S_KPU3_CTAG, 8, 1,
3247 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_QINQ_CTAG, 0, 0,
3248 0, 0,
3249 },
3250 {
3251 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
3252 0, 0, NPC_S_KPU3_QINQ, 8, 1,
3253 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_QINQ_QINQ_QINQ, 0, 0,
3254 0, 0,
3255 },
3256 {
3257 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3258 2, 0, NPC_S_KPU5_IP, 4, 1,
3259 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3260 0, 0,
3261 },
3262 {
3263 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3264 2, 0, NPC_S_KPU5_IP6, 4, 1,
3265 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3266 0, 0,
3267 },
3268 {
3269 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3270 2, 0, NPC_S_KPU5_ARP, 4, 1,
3271 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3272 0, 0,
3273 },
3274 {
3275 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3276 2, 0, NPC_S_KPU5_RARP, 4, 1,
3277 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3278 0, 0,
3279 },
3280 {
3281 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3282 2, 0, NPC_S_KPU5_PTP, 4, 1,
3283 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3284 0, 0,
3285 },
3286 {
3287 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3288 2, 0, NPC_S_KPU5_FCOE, 4, 1,
3289 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3290 0, 0,
3291 },
3292 {
3293 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3294 1, 0, NPC_S_KPU4_MPLS, 4, 1,
3295 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3296 0, 0,
3297 },
3298 {
3299 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3300 1, 0, NPC_S_KPU4_MPLS, 4, 1,
3301 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3302 0, 0,
3303 },
3304 {
3305 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3306 1, 0, NPC_S_KPU4_NSH, 4, 1,
3307 NPC_LID_LB, NPC_LT_LB_QINQ, 0, 0, 0,
3308 0, 0,
3309 },
3310 {
3311 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3312 0, 1, NPC_S_NA, 0, 1,
3313 NPC_LID_LB, NPC_LT_LB_QINQ, NPC_F_ETYPE_UNK, 0, 0,
3314 0, 0,
3315 },
3316 {
3317 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3318 2, 0, NPC_S_KPU5_IP, 8, 1,
3319 NPC_LID_LB, NPC_LT_LB_ETAG, 0, 0, 0,
3320 0, 0,
3321 },
3322 {
3323 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3324 2, 0, NPC_S_KPU5_IP6, 8, 1,
3325 NPC_LID_LB, NPC_LT_LB_ETAG, 0, 0, 0,
3326 0, 0,
3327 },
3328 {
3329 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3330 2, 0, NPC_S_KPU5_ARP, 8, 1,
3331 NPC_LID_LB, NPC_LT_LB_ETAG, 0, 0, 0,
3332 0, 0,
3333 },
3334 {
3335 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3336 2, 0, NPC_S_KPU5_RARP, 8, 1,
3337 NPC_LID_LB, NPC_LT_LB_ETAG, 0, 0, 0,
3338 0, 0,
3339 },
3340 {
3341 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3342 2, 0, NPC_S_KPU5_PTP, 8, 1,
3343 NPC_LID_LB, NPC_LT_LB_ETAG, 0, 0, 0,
3344 0, 0,
3345 },
3346 {
3347 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3348 2, 0, NPC_S_KPU5_FCOE, 8, 1,
3349 NPC_LID_LB, NPC_LT_LB_ETAG, 0, 0, 0,
3350 0, 0,
3351 },
3352 {
3353 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3354 1, 0, NPC_S_KPU4_MPLS, 8, 1,
3355 NPC_LID_LB, NPC_LT_LB_ETAG, 1, 0, 0,
3356 0, 0,
3357 },
3358 {
3359 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3360 1, 0, NPC_S_KPU4_MPLS, 8, 1,
3361 NPC_LID_LB, NPC_LT_LB_ETAG, 2, 0, 0,
3362 0, 0,
3363 },
3364 {
3365 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3366 1, 0, NPC_S_KPU4_NSH, 8, 1,
3367 NPC_LID_LB, NPC_LT_LB_ETAG, 2, 0, 0,
3368 0, 0,
3369 },
3370 {
3371 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3372 0, 0, NPC_S_KPU3_CTAG, 8, 1,
3373 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_CTAG, 0, 0,
3374 0, 0,
3375 },
3376 {
3377 NPC_ERRLEV_RE, NPC_EC_NOERR, 16, 20, 24,
3378 0, 0, NPC_S_KPU3_ITAG, 12, 1,
3379 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_BTAG_ITAG, 0, 0,
3380 0, 0,
3381 },
3382 {
3383 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
3384 0, 0, NPC_S_KPU3_STAG, 8, 1,
3385 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_STAG, 0, 0,
3386 0, 0,
3387 },
3388 {
3389 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 0,
3390 0, 0, NPC_S_KPU3_QINQ, 8, 1,
3391 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_QINQ, 0, 0,
3392 0, 0,
3393 },
3394 {
3395 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3396 2, 0, NPC_S_KPU5_IP, 26, 1,
3397 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_ITAG, 0, 0,
3398 0, 0,
3399 },
3400 {
3401 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3402 2, 0, NPC_S_KPU5_IP6, 26, 1,
3403 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_ITAG, 0, 0,
3404 0, 0,
3405 },
3406 {
3407 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3408 2, 0, NPC_S_KPU5_ARP, 26, 1,
3409 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_ITAG, 0, 0,
3410 0, 0,
3411 },
3412 {
3413 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3414 0, 0, NPC_S_KPU3_STAG, 26, 1,
3415 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_ITAG_STAG, 0, 0,
3416 0, 0,
3417 },
3418 {
3419 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3420 0, 0, NPC_S_KPU3_CTAG, 26, 1,
3421 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_ITAG_CTAG, 0, 0,
3422 0, 0,
3423 },
3424 {
3425 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3426 0, 1, NPC_S_NA, 0, 1,
3427 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETAG_ITAG_UNK, 0, 0,
3428 0, 0,
3429 },
3430 {
3431 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3432 0, 1, NPC_S_NA, 0, 1,
3433 NPC_LID_LB, NPC_LT_LB_ETAG, NPC_F_ETYPE_UNK, 0, 0,
3434 0, 0,
3435 },
3436 {
3437 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3438 2, 0, NPC_S_KPU5_IP, 18, 1,
3439 NPC_LID_LB, NPC_LT_LB_ITAG, 0, 0, 0,
3440 0, 0,
3441 },
3442 {
3443 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3444 2, 0, NPC_S_KPU5_IP6, 18, 1,
3445 NPC_LID_LB, NPC_LT_LB_ITAG, 0, 0, 0,
3446 0, 0,
3447 },
3448 {
3449 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3450 2, 0, NPC_S_KPU5_ARP, 18, 1,
3451 NPC_LID_LB, NPC_LT_LB_ITAG, 0, 0, 0,
3452 0, 0,
3453 },
3454 {
3455 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3456 2, 0, NPC_S_KPU5_RARP, 18, 1,
3457 NPC_LID_LB, NPC_LT_LB_ITAG, 0, 0, 0,
3458 0, 0,
3459 },
3460 {
3461 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3462 2, 0, NPC_S_KPU5_IP, 26, 1,
3463 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_STAG_CTAG, 0, 0,
3464 0, 0,
3465 },
3466 {
3467 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3468 2, 0, NPC_S_KPU5_IP6, 26, 1,
3469 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_STAG_CTAG, 0, 0,
3470 0, 0,
3471 },
3472 {
3473 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3474 2, 0, NPC_S_KPU5_ARP, 26, 1,
3475 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_STAG_CTAG, 0, 0,
3476 0, 0,
3477 },
3478 {
3479 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3480 0, 1, NPC_S_NA, 0, 0,
3481 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3482 0, 0,
3483 },
3484 {
3485 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3486 2, 0, NPC_S_KPU5_IP, 22, 1,
3487 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_STAG, 0, 0,
3488 0, 0,
3489 },
3490 {
3491 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3492 2, 0, NPC_S_KPU5_IP6, 22, 1,
3493 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_STAG, 0, 0,
3494 0, 0,
3495 },
3496 {
3497 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3498 2, 0, NPC_S_KPU5_ARP, 22, 1,
3499 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_STAG, 0, 0,
3500 0, 0,
3501 },
3502 {
3503 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3504 0, 1, NPC_S_NA, 0, 0,
3505 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3506 0, 0,
3507 },
3508 {
3509 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3510 2, 0, NPC_S_KPU5_IP, 22, 1,
3511 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_CTAG, 0, 0,
3512 0, 0,
3513 },
3514 {
3515 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3516 2, 0, NPC_S_KPU5_IP6, 22, 1,
3517 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_CTAG, 0, 0,
3518 0, 0,
3519 },
3520 {
3521 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3522 2, 0, NPC_S_KPU5_ARP, 22, 1,
3523 NPC_LID_LB, NPC_LT_LB_ITAG, NPC_F_ITAG_CTAG, 0, 0,
3524 0, 0,
3525 },
3526 {
3527 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3528 0, 1, NPC_S_NA, 0, 0,
3529 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3530 0, 0,
3531 },
3532 {
3533 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3534 0, 1, NPC_S_NA, 0, 0,
3535 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3536 0, 0,
3537 },
3538 {
3539 NPC_ERRLEV_LB, NPC_EC_L2_K3, 0, 0, 0,
3540 0, 1, NPC_S_NA, 0, 0,
3541 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3542 0, 0,
3543 },
3544};
3545
3546static struct npc_kpu_profile_action kpu3_action_entries[] = {
3547 {
3548 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3549 1, 0, NPC_S_KPU5_IP, 4, 0,
3550 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3551 0, 0,
3552 },
3553 {
3554 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3555 1, 0, NPC_S_KPU5_IP6, 4, 0,
3556 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3557 0, 0,
3558 },
3559 {
3560 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3561 1, 0, NPC_S_KPU5_ARP, 4, 0,
3562 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3563 0, 0,
3564 },
3565 {
3566 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3567 1, 0, NPC_S_KPU5_RARP, 4, 0,
3568 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3569 0, 0,
3570 },
3571 {
3572 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3573 1, 0, NPC_S_KPU5_PTP, 4, 0,
3574 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3575 0, 0,
3576 },
3577 {
3578 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3579 1, 0, NPC_S_KPU5_FCOE, 4, 0,
3580 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3581 0, 0,
3582 },
3583 {
3584 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3585 0, 0, NPC_S_KPU4_MPLS, 4, 0,
3586 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3587 0, 0,
3588 },
3589 {
3590 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3591 0, 0, NPC_S_KPU4_MPLS, 4, 0,
3592 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3593 0, 0,
3594 },
3595 {
3596 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3597 0, 0, NPC_S_KPU4_NSH, 4, 0,
3598 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3599 0, 0,
3600 },
3601 {
3602 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3603 0, 1, NPC_S_NA, 0, 0,
3604 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3605 0, 0,
3606 },
3607 {
3608 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3609 1, 0, NPC_S_KPU5_IP, 8, 0,
3610 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3611 0, 0,
3612 },
3613 {
3614 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3615 1, 0, NPC_S_KPU5_IP6, 8, 0,
3616 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3617 0, 0,
3618 },
3619 {
3620 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3621 1, 0, NPC_S_KPU5_ARP, 8, 0,
3622 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3623 0, 0,
3624 },
3625 {
3626 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3627 1, 0, NPC_S_KPU5_RARP, 8, 0,
3628 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3629 0, 0,
3630 },
3631 {
3632 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3633 1, 0, NPC_S_KPU5_PTP, 8, 0,
3634 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3635 0, 0,
3636 },
3637 {
3638 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3639 1, 0, NPC_S_KPU5_FCOE, 8, 0,
3640 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3641 0, 0,
3642 },
3643 {
3644 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3645 0, 0, NPC_S_KPU4_MPLS, 8, 0,
3646 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3647 0, 0,
3648 },
3649 {
3650 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3651 0, 0, NPC_S_KPU4_MPLS, 8, 0,
3652 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3653 0, 0,
3654 },
3655 {
3656 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3657 0, 0, NPC_S_KPU4_NSH, 8, 0,
3658 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3659 0, 0,
3660 },
3661 {
3662 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3663 1, 0, NPC_S_KPU5_IP, 4, 0,
3664 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3665 0, 0,
3666 },
3667 {
3668 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3669 1, 0, NPC_S_KPU5_IP6, 4, 0,
3670 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3671 0, 0,
3672 },
3673 {
3674 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3675 1, 0, NPC_S_KPU5_ARP, 4, 0,
3676 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3677 0, 0,
3678 },
3679 {
3680 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3681 1, 0, NPC_S_KPU5_RARP, 4, 0,
3682 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3683 0, 0,
3684 },
3685 {
3686 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3687 0, 0, NPC_S_KPU4_MPLS, 4, 0,
3688 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3689 0, 0,
3690 },
3691 {
3692 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3693 0, 0, NPC_S_KPU4_MPLS, 4, 0,
3694 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3695 0, 0,
3696 },
3697 {
3698 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3699 0, 0, NPC_S_KPU4_NSH, 4, 0,
3700 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3701 0, 0,
3702 },
3703 {
3704 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3705 0, 1, NPC_S_NA, 0, 0,
3706 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3707 0, 0,
3708 },
3709 {
3710 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3711 1, 0, NPC_S_KPU5_IP, 8, 0,
3712 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3713 0, 0,
3714 },
3715 {
3716 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3717 1, 0, NPC_S_KPU5_IP6, 8, 0,
3718 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3719 0, 0,
3720 },
3721 {
3722 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3723 1, 0, NPC_S_KPU5_ARP, 8, 0,
3724 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3725 0, 0,
3726 },
3727 {
3728 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3729 1, 0, NPC_S_KPU5_RARP, 8, 0,
3730 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3731 0, 0,
3732 },
3733 {
3734 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3735 1, 0, NPC_S_KPU5_PTP, 8, 0,
3736 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3737 0, 0,
3738 },
3739 {
3740 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3741 1, 0, NPC_S_KPU5_FCOE, 8, 0,
3742 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3743 0, 0,
3744 },
3745 {
3746 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3747 0, 0, NPC_S_KPU4_MPLS, 8, 0,
3748 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3749 0, 0,
3750 },
3751 {
3752 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3753 0, 0, NPC_S_KPU4_MPLS, 8, 0,
3754 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3755 0, 0,
3756 },
3757 {
3758 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3759 0, 0, NPC_S_KPU4_NSH, 8, 0,
3760 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3761 0, 0,
3762 },
3763 {
3764 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3765 1, 0, NPC_S_KPU5_IP, 4, 0,
3766 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3767 0, 0,
3768 },
3769 {
3770 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3771 1, 0, NPC_S_KPU5_IP6, 4, 0,
3772 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3773 0, 0,
3774 },
3775 {
3776 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3777 1, 0, NPC_S_KPU5_ARP, 4, 0,
3778 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3779 0, 0,
3780 },
3781 {
3782 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3783 1, 0, NPC_S_KPU5_RARP, 4, 0,
3784 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3785 0, 0,
3786 },
3787 {
3788 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3789 1, 0, NPC_S_KPU5_PTP, 4, 0,
3790 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3791 0, 0,
3792 },
3793 {
3794 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3795 1, 0, NPC_S_KPU5_FCOE, 4, 0,
3796 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3797 0, 0,
3798 },
3799 {
3800 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3801 0, 0, NPC_S_KPU4_MPLS, 4, 0,
3802 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3803 0, 0,
3804 },
3805 {
3806 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
3807 0, 0, NPC_S_KPU4_MPLS, 4, 0,
3808 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3809 0, 0,
3810 },
3811 {
3812 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3813 0, 0, NPC_S_KPU4_NSH, 4, 0,
3814 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3815 0, 0,
3816 },
3817 {
3818 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3819 0, 1, NPC_S_NA, 0, 0,
3820 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3821 0, 0,
3822 },
3823 {
3824 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3825 2, 0, NPC_S_KPU5_IP, 18, 0,
3826 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3827 0, 0,
3828 },
3829 {
3830 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3831 2, 0, NPC_S_KPU5_IP6, 18, 0,
3832 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3833 0, 0,
3834 },
3835 {
3836 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3837 2, 0, NPC_S_KPU5_ARP, 18, 0,
3838 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3839 0, 0,
3840 },
3841 {
3842 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3843 2, 0, NPC_S_KPU5_RARP, 18, 0,
3844 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3845 0, 0,
3846 },
3847 {
3848 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3849 1, 0, NPC_S_KPU5_IP, 26, 0,
3850 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3851 0, 0,
3852 },
3853 {
3854 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3855 1, 0, NPC_S_KPU5_IP6, 26, 0,
3856 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3857 0, 0,
3858 },
3859 {
3860 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3861 1, 0, NPC_S_KPU5_ARP, 26, 0,
3862 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3863 0, 0,
3864 },
3865 {
3866 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3867 1, 0, NPC_S_KPU5_IP, 22, 0,
3868 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3869 0, 0,
3870 },
3871 {
3872 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3873 1, 0, NPC_S_KPU5_IP6, 22, 0,
3874 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3875 0, 0,
3876 },
3877 {
3878 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3879 1, 0, NPC_S_KPU5_ARP, 22, 0,
3880 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3881 0, 0,
3882 },
3883 {
3884 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3885 0, 1, NPC_S_NA, 0, 0,
3886 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3887 0, 0,
3888 },
3889 {
3890 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3891 0, 1, NPC_S_NA, 0, 0,
3892 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3893 0, 0,
3894 },
3895 {
3896 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3897 1, 0, NPC_S_KPU5_IP, 22, 0,
3898 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3899 0, 0,
3900 },
3901 {
3902 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3903 1, 0, NPC_S_KPU5_IP6, 22, 0,
3904 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3905 0, 0,
3906 },
3907 {
3908 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3909 1, 0, NPC_S_KPU5_ARP, 22, 0,
3910 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3911 0, 0,
3912 },
3913 {
3914 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3915 0, 1, NPC_S_NA, 0, 0,
3916 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3917 0, 0,
3918 },
3919 {
3920 NPC_ERRLEV_LB, NPC_EC_L2_K3_ETYPE_UNK, 0, 0, 0,
3921 0, 1, NPC_S_NA, 0, 0,
3922 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3923 0, 0,
3924 },
3925 {
3926 NPC_ERRLEV_LB, NPC_EC_L2_K3, 0, 0, 0,
3927 0, 1, NPC_S_NA, 0, 0,
3928 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
3929 0, 0,
3930 },
3931};
3932
3933static struct npc_kpu_profile_action kpu4_action_entries[] = {
3934 {
3935 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3936 0, 0, NPC_S_KPU5_MPLS_PL, 4, 1,
3937 NPC_LID_LC, NPC_LT_LC_MPLS, 0, 0, 0,
3938 0, 0,
3939 },
3940 {
3941 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3942 0, 0, NPC_S_KPU5_MPLS_PL, 8, 1,
3943 NPC_LID_LC, NPC_LT_LC_MPLS, NPC_F_MPLS_2_LABELS, 0, 0,
3944 0, 0,
3945 },
3946 {
3947 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3948 0, 0, NPC_S_KPU5_MPLS_PL, 12, 1,
3949 NPC_LID_LC, NPC_LT_LC_MPLS, NPC_F_MPLS_3_LABELS, 0, 0,
3950 0, 0,
3951 },
3952 {
3953 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 4, 0,
3954 0, 0, NPC_S_KPU5_MPLS, 12, 1,
3955 NPC_LID_LC, NPC_LT_LC_MPLS, NPC_F_MPLS_4_LABELS, 0, 0,
3956 0, 0,
3957 },
3958 {
3959 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
3960 7, 0, NPC_S_KPU12_TU_IP, 0, 1,
3961 NPC_LID_LC, NPC_LT_LC_NSH, 0, 1, 0x3f,
3962 0, 2,
3963 },
3964 {
3965 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
3966 7, 0, NPC_S_KPU12_TU_IP6, 0, 1,
3967 NPC_LID_LC, NPC_LT_LC_NSH, 0, 1, 0x3f,
3968 0, 2,
3969 },
3970 {
3971 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
3972 6, 0, NPC_S_KPU11_TU_ETHER, 0, 1,
3973 NPC_LID_LC, NPC_LT_LC_NSH, 0, 1, 0x3f,
3974 0, 2,
3975 },
3976 {
3977 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
3978 0, 0, NPC_S_KPU5_NSH, 0, 1,
3979 NPC_LID_LC, NPC_LT_LC_NSH, 0, 1, 0x3f,
3980 0, 2,
3981 },
3982 {
3983 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
3984 4, 0, NPC_S_KPU9_TU_MPLS, 0, 1,
3985 NPC_LID_LC, NPC_LT_LC_NSH, 0, 1, 0x3f,
3986 0, 2,
3987 },
3988 {
3989 NPC_ERRLEV_LB, NPC_EC_L2_K4, 0, 0, 0,
3990 0, 1, NPC_S_NA, 0, 0,
3991 NPC_LID_LC, NPC_LT_NA, 0, 0, 0,
3992 0, 0,
3993 },
3994};
3995
3996static struct npc_kpu_profile_action kpu5_action_entries[] = {
3997 {
3998 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 12, 0,
3999 2, 0, NPC_S_KPU8_TCP, 20, 1,
4000 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4001 0, 0,
4002 },
4003 {
4004 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 8, 10,
4005 2, 0, NPC_S_KPU8_UDP, 20, 1,
4006 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4007 0, 0,
4008 },
4009 {
4010 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4011 2, 0, NPC_S_KPU8_SCTP, 20, 1,
4012 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4013 0, 0,
4014 },
4015 {
4016 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4017 2, 0, NPC_S_KPU8_ICMP, 20, 1,
4018 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4019 0, 0,
4020 },
4021 {
4022 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4023 2, 0, NPC_S_KPU8_IGMP, 20, 1,
4024 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4025 0, 0,
4026 },
4027 {
4028 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4029 0, 0, NPC_S_KPU8_ESP, 20, 1,
4030 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4031 0, 0,
4032 },
4033 {
4034 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4035 0, 0, NPC_S_KPU8_AH, 20, 1,
4036 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4037 0, 0,
4038 },
4039 {
4040 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4041 2, 0, NPC_S_KPU8_GRE, 20, 1,
4042 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4043 0, 0,
4044 },
4045 {
4046 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4047 6, 0, NPC_S_KPU12_TU_IP, 20, 1,
4048 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_IP_IN_IP, 0, 0,
4049 0, 0,
4050 },
4051 {
4052 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4053 6, 0, NPC_S_KPU12_TU_IP6, 20, 1,
4054 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_6TO4, 0, 0,
4055 0, 0,
4056 },
4057 {
4058 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4059 3, 0, NPC_S_KPU9_TU_MPLS, 20, 1,
4060 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_MPLS_IN_IP, 0, 0,
4061 0, 0,
4062 },
4063 {
4064 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4065 0, 1, NPC_S_NA, 0, 1,
4066 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_UNK_PROTO, 0, 0,
4067 0, 0,
4068 },
4069 {
4070 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 12, 0,
4071 2, 0, NPC_S_KPU8_TCP, 0, 1,
4072 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4073 0, 2,
4074 },
4075 {
4076 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 8, 10,
4077 2, 0, NPC_S_KPU8_UDP, 0, 1,
4078 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4079 0, 2,
4080 },
4081 {
4082 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4083 2, 0, NPC_S_KPU8_SCTP, 0, 1,
4084 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4085 0, 2,
4086 },
4087 {
4088 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4089 2, 0, NPC_S_KPU8_ICMP, 0, 1,
4090 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4091 0, 2,
4092 },
4093 {
4094 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4095 2, 0, NPC_S_KPU8_IGMP, 0, 1,
4096 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4097 0, 2,
4098 },
4099 {
4100 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4101 0, 0, NPC_S_KPU8_ESP, 0, 1,
4102 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4103 0, 2,
4104 },
4105 {
4106 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4107 0, 0, NPC_S_KPU8_AH, 0, 1,
4108 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4109 0, 2,
4110 },
4111 {
4112 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4113 2, 0, NPC_S_KPU8_GRE, 0, 1,
4114 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
4115 0, 2,
4116 },
4117 {
4118 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4119 6, 0, NPC_S_KPU12_TU_IP, 0, 1,
4120 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_IP_IN_IP_HAS_OPTIONS, 0, 0xf,
4121 0, 2,
4122 },
4123 {
4124 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4125 6, 0, NPC_S_KPU12_TU_IP6, 0, 1,
4126 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_6TO4_HAS_OPTIONS, 0, 0xf,
4127 0, 2,
4128 },
4129 {
4130 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4131 3, 0, NPC_S_KPU9_TU_MPLS, 20, 1,
4132 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_MPLS_IN_IP_HAS_OPTIONS,
4133 0, 0xf, 0, 2,
4134 },
4135 {
4136 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4137 0, 1, NPC_S_NA, 0, 1,
4138 NPC_LID_LC, NPC_LT_LC_IP, NPC_F_IP_UNK_PROTO_HAS_OPTIONS, 0, 0,
4139 0, 0,
4140 },
4141 {
4142 NPC_ERRLEV_LC, NPC_EC_IP_VER, 0, 0, 0,
4143 0, 1, NPC_S_NA, 0, 1,
4144 NPC_LID_LC, NPC_LT_LC_IP, 0, 0, 0,
4145 0, 0,
4146 },
4147 {
4148 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4149 0, 1, NPC_S_NA, 0, 1,
4150 NPC_LID_LC, NPC_LT_LC_ARP, 0, 0, 0,
4151 0, 0,
4152 },
4153 {
4154 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4155 0, 1, NPC_S_NA, 0, 1,
4156 NPC_LID_LC, NPC_LT_LC_RARP, 0, 0, 0,
4157 0, 0,
4158 },
4159 {
4160 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4161 0, 1, NPC_S_NA, 0, 1,
4162 NPC_LID_LC, NPC_LT_LC_PTP, 0, 0, 0,
4163 0, 0,
4164 },
4165 {
4166 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4167 0, 1, NPC_S_NA, 0, 1,
4168 NPC_LID_LC, NPC_LT_LC_FCOE, 0, 0, 0,
4169 0, 0,
4170 },
4171 {
4172 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 12, 0,
4173 2, 0, NPC_S_KPU8_TCP, 40, 1,
4174 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4175 0, 0,
4176 },
4177 {
4178 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 8, 10,
4179 2, 0, NPC_S_KPU8_UDP, 40, 1,
4180 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4181 0, 0,
4182 },
4183 {
4184 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4185 2, 0, NPC_S_KPU8_SCTP, 40, 1,
4186 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4187 0, 0,
4188 },
4189 {
4190 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4191 2, 0, NPC_S_KPU8_ICMP, 40, 1,
4192 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4193 0, 0,
4194 },
4195 {
4196 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4197 2, 0, NPC_S_KPU8_ICMP6, 40, 1,
4198 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4199 0, 0,
4200 },
4201 {
4202 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4203 2, 0, NPC_S_KPU8_ESP, 40, 1,
4204 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4205 0, 0,
4206 },
4207 {
4208 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4209 2, 0, NPC_S_KPU8_AH, 40, 1,
4210 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4211 0, 0,
4212 },
4213 {
4214 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4215 2, 0, NPC_S_KPU8_GRE, 40, 1,
4216 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4217 0, 0,
4218 },
4219 {
4220 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4221 6, 0, NPC_S_KPU12_TU_IP6, 40, 1,
4222 NPC_LID_LC, NPC_LT_LC_IP6, NPC_F_IP6_TUN_IP6, 0, 0,
4223 0, 0,
4224 },
4225 {
4226 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4227 3, 0, NPC_S_KPU9_TU_MPLS, 40, 1,
4228 NPC_LID_LC, NPC_LT_LC_IP6, NPC_F_IP6_MPLS_IN_IP, 0, 0,
4229 0, 0,
4230 },
4231 {
4232 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4233 0, 0, NPC_S_KPU6_IP6_EXT, 0, 1,
4234 NPC_LID_LC, NPC_LT_LC_IP6, NPC_F_IP6_HAS_EXT, 0, 0,
4235 0, 0,
4236 },
4237 {
4238 NPC_ERRLEV_LC, NPC_EC_IP6_VER, 0, 0, 0,
4239 0, 1, NPC_S_NA, 0, 1,
4240 NPC_LID_LC, NPC_LT_LC_IP6, 0, 0, 0,
4241 0, 0,
4242 },
4243 {
4244 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4245 6, 0, NPC_S_KPU12_TU_IP, 4, 0,
4246 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4247 0, 0,
4248 },
4249 {
4250 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4251 6, 0, NPC_S_KPU12_TU_IP6, 4, 0,
4252 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4253 0, 0,
4254 },
4255 {
4256 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4257 5, 0, NPC_S_KPU11_TU_ETHER, 8, 0,
4258 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4259 0, 0,
4260 },
4261 {
4262 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4263 5, 0, NPC_S_KPU11_TU_ETHER, 4, 0,
4264 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4265 0, 0,
4266 },
4267 {
4268 NPC_ERRLEV_LB, NPC_EC_L2_MPLS_2MANY, 0, 0, 0,
4269 0, 1, NPC_S_NA, 0, 0,
4270 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4271 0, 0,
4272 },
4273 {
4274 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4275 6, 0, NPC_S_KPU12_TU_IP, 0, 0,
4276 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4277 0, 0,
4278 },
4279 {
4280 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4281 6, 0, NPC_S_KPU12_TU_IP6, 0, 0,
4282 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4283 0, 0,
4284 },
4285 {
4286 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4287 5, 0, NPC_S_KPU11_TU_ETHER, 4, 0,
4288 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4289 0, 0,
4290 },
4291 {
4292 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4293 5, 0, NPC_S_KPU11_TU_ETHER, 0, 0,
4294 NPC_LID_LB, NPC_LT_NA, 0, 0, 0,
4295 0, 0,
4296 },
4297 {
4298 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4299 6, 0, NPC_S_KPU12_TU_IP, 0, 0,
4300 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4301 0, 2,
4302 },
4303 {
4304 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4305 6, 0, NPC_S_KPU12_TU_IP6, 0, 0,
4306 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4307 0, 2,
4308 },
4309 {
4310 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4311 5, 0, NPC_S_KPU11_TU_ETHER, 0, 0,
4312 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4313 0, 2,
4314 },
4315 {
4316 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4317 5, 0, NPC_S_KPU11_TU_3RD_NSH, 0, 0,
4318 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4319 0, 2,
4320 },
4321 {
4322 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4323 3, 0, NPC_S_KPU9_TU_MPLS, 0, 0,
4324 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4325 0, 2,
4326 },
4327 {
4328 NPC_ERRLEV_LC, NPC_EC_UNK, 0, 0, 0,
4329 0, 1, NPC_S_NA, 0, 0,
4330 NPC_LID_LC, NPC_LT_NA, 0, 0, 0,
4331 0, 0,
4332 },
4333};
4334
4335static struct npc_kpu_profile_action kpu6_action_entries[] = {
4336 {
4337 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4338 0, 1, NPC_S_NA, 0, 0,
4339 NPC_LID_LC, NPC_LT_NA, 0, 0, 0,
4340 0, 0,
4341 },
4342};
4343
4344static struct npc_kpu_profile_action kpu7_action_entries[] = {
4345 {
4346 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4347 0, 1, NPC_S_NA, 0, 0,
4348 NPC_LID_LC, NPC_LT_NA, 0, 0, 0,
4349 0, 0,
4350 },
4351};
4352
4353static struct npc_kpu_profile_action kpu8_action_entries[] = {
4354 {
4355 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4356 7, 0, NPC_S_KPU16_HTTP_DATA, 20, 1,
4357 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_HTTP, 0, 0,
4358 0, 0,
4359 },
4360 {
4361 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4362 7, 0, NPC_S_KPU16_HTTPS_DATA, 20, 1,
4363 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_HTTPS, 0, 0,
4364 0, 0,
4365 },
4366 {
4367 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4368 7, 0, NPC_S_KPU16_PPTP_DATA, 20, 1,
4369 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_PPTP, 0, 0,
4370 0, 0,
4371 },
4372 {
4373 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4374 7, 0, NPC_S_KPU16_TCP_DATA, 20, 1,
4375 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_UNK_PORT, 0, 0,
4376 0, 0,
4377 },
4378 {
4379 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4380 7, 0, NPC_S_KPU16_HTTP_DATA, 0, 1,
4381 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_HTTP_HAS_OPTIONS,
4382 12, 0xf0, 1, 2,
4383 },
4384 {
4385 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4386 7, 0, NPC_S_KPU16_HTTPS_DATA, 0, 1,
4387 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_HTTPS_HAS_OPTIONS,
4388 12, 0xf0, 1, 2,
4389 },
4390 {
4391 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4392 7, 0, NPC_S_KPU16_PPTP_DATA, 0, 1,
4393 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_PPTP_HAS_OPTIONS,
4394 12, 0xf0, 1, 2,
4395 },
4396 {
4397 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4398 7, 0, NPC_S_KPU16_TCP_DATA, 0, 1,
4399 NPC_LID_LD, NPC_LT_LD_TCP, NPC_F_TCP_UNK_PORT_HAS_OPTIONS,
4400 12, 0xf0, 1, 2,
4401 },
4402 {
4403 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4404 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4405 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLAN, 0, 0,
4406 0, 0,
4407 },
4408 {
4409 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4410 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4411 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLAN_NOVNI, 0, 0,
4412 0, 0,
4413 },
4414 {
4415 NPC_ERRLEV_LD, NPC_EC_VXLAN, 0, 0, 0,
4416 0, 1, NPC_S_NA, 0, 0,
4417 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
4418 0, 0,
4419 },
4420 {
4421 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4422 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4423 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE, 0, 0,
4424 0, 0,
4425 },
4426 {
4427 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4428 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4429 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE, 0, 0,
4430 0, 0,
4431 },
4432 {
4433 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4434 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4435 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE, 0, 0,
4436 0, 0,
4437 },
4438 {
4439 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4440 0, 0, NPC_S_KPU9_TU_NSH, 16, 1,
4441 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NSH, 0, 0,
4442 0, 0,
4443 },
4444 {
4445 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4446 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 16, 1,
4447 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_MPLS, 0, 0,
4448 0, 0,
4449 },
4450 {
4451 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4452 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4453 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NOVNI, 0, 0,
4454 0, 0,
4455 },
4456 {
4457 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4458 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4459 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NOVNI, 0, 0,
4460 0, 0,
4461 },
4462 {
4463 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4464 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4465 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NOVNI, 0, 0,
4466 0, 0,
4467 },
4468 {
4469 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4470 0, 0, NPC_S_KPU9_TU_NSH, 16, 1,
4471 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NOVNI_NSH, 0, 0,
4472 0, 0,
4473 },
4474 {
4475 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4476 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 16, 1,
4477 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NOVNI_MPLS, 0, 0,
4478 0, 0,
4479 },
4480 {
4481 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4482 0, 1, NPC_S_NA, 0, 1,
4483 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_UNK, 0, 0,
4484 0, 0,
4485 },
4486 {
4487 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4488 0, 1, NPC_S_NA, 0, 1,
4489 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_VXLANGPE_NONP, 0, 0,
4490 0, 0,
4491 },
4492 {
4493 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4494 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4495 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE, 8, 0x3f,
4496 0, 2,
4497 },
4498 {
4499 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4500 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4501 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_OAM, 8, 0x3f,
4502 0, 2,
4503 },
4504 {
4505 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4506 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4507 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_CRI_OPT, 8, 0x3f,
4508 0, 2,
4509 },
4510 {
4511 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4512 2, 0, NPC_S_KPU11_TU_ETHER, 16, 1,
4513 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_OAM_CRI_OPT,
4514 8, 0x3f, 0, 2,
4515 },
4516 {
4517 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4518 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4519 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE, 8, 0x3f,
4520 0, 2,
4521 },
4522 {
4523 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4524 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4525 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_OAM,
4526 8, 0x3f, 0, 2,
4527 },
4528 {
4529 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4530 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4531 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_CRI_OPT,
4532 8, 0x3f, 0, 2,
4533 },
4534 {
4535 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4536 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4537 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_OAM_CRI_OPT,
4538 8, 0x3f, 0, 2,
4539 },
4540 {
4541 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4542 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4543 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE, 8, 0x3f,
4544 0, 2,
4545 },
4546 {
4547 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4548 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4549 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_OAM, 8, 0x3f,
4550 0, 2,
4551 },
4552 {
4553 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4554 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4555 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_CRI_OPT,
4556 8, 0x3f, 0, 2,
4557 },
4558 {
4559 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4560 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4561 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GENEVE_OAM_CRI_OPT,
4562 8, 0x3f, 0, 2,
4563 },
4564 {
4565 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4566 0, 1, NPC_S_NA, 0, 1,
4567 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GTP_GTPC, 0, 0,
4568 0, 0,
4569 },
4570 {
4571 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4572 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4573 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GTP_GTPU_G_PDU, 0, 0,
4574 0, 0,
4575 },
4576 {
4577 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4578 0, 1, NPC_S_NA, 0, 1,
4579 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_GTP_GTPU_UNK, 0, 0,
4580 0, 0,
4581 },
4582 {
4583 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4584 7, 0, NPC_S_KPU16_UDP_DATA, 8, 1,
4585 NPC_LID_LD, NPC_LT_LD_UDP, NPC_F_UDP_UNK_PORT, 0, 0,
4586 0, 0,
4587 },
4588 {
4589 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4590 0, 1, NPC_S_NA, 0, 1,
4591 NPC_LID_LD, NPC_LT_LD_SCTP, 0, 0, 0,
4592 0, 0,
4593 },
4594 {
4595 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4596 0, 1, NPC_S_NA, 0, 1,
4597 NPC_LID_LD, NPC_LT_LD_ICMP, 0, 0, 0,
4598 0, 0,
4599 },
4600 {
4601 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4602 0, 1, NPC_S_NA, 0, 1,
4603 NPC_LID_LD, NPC_LT_LD_IGMP, 0, 0, 0,
4604 0, 0,
4605 },
4606 {
4607 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4608 0, 1, NPC_S_NA, 0, 1,
4609 NPC_LID_LD, NPC_LT_LD_ICMP6, 0, 0, 0,
4610 0, 0,
4611 },
4612 {
4613 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4614 0, 1, NPC_S_NA, 0, 1,
4615 NPC_LID_LD, NPC_LT_LD_ESP, 0, 0, 0,
4616 0, 0,
4617 },
4618 {
4619 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4620 0, 1, NPC_S_NA, 0, 1,
4621 NPC_LID_LD, NPC_LT_LD_AH, 0, 0, 0,
4622 0, 0,
4623 },
4624 {
4625 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
4626 2, 0, NPC_S_KPU11_TU_ETHER, 8, 1,
4627 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_NVGRE, 0, 0,
4628 0, 0,
4629 },
4630 {
4631 NPC_ERRLEV_LD, NPC_EC_NVGRE, 0, 0, 0,
4632 0, 1, NPC_S_NA, 0, 0,
4633 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
4634 0, 0,
4635 },
4636 {
4637 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4638 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 4, 1,
4639 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, 0, 0, 0,
4640 0, 0,
4641 },
4642 {
4643 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4644 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 8, 1,
4645 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM, 0, 0,
4646 0, 0,
4647 },
4648 {
4649 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4650 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 8, 1,
4651 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_KEY, 0, 0,
4652 0, 0,
4653 },
4654 {
4655 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4656 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 8, 1,
4657 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_SEQ, 0, 0,
4658 0, 0,
4659 },
4660 {
4661 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4662 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 12, 1,
4663 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM_KEY, 0, 0,
4664 0, 0,
4665 },
4666 {
4667 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4668 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 12, 1,
4669 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM_SEQ, 0, 0,
4670 0, 0,
4671 },
4672 {
4673 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4674 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 12, 1,
4675 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_KEY_SEQ, 0, 0,
4676 0, 0,
4677 },
4678 {
4679 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4680 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 16, 1,
4681 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM_KEY_SEQ,
4682 0, 0, 0, 0,
4683 },
4684 {
4685 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4686 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 4, 1,
4687 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, 0, 0, 0,
4688 0, 0,
4689 },
4690 {
4691 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4692 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 8, 1,
4693 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM, 0, 0,
4694 0, 0,
4695 },
4696 {
4697 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4698 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 8, 1,
4699 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_KEY, 0, 0,
4700 0, 0,
4701 },
4702 {
4703 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4704 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 8, 1,
4705 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_SEQ, 0, 0,
4706 0, 0,
4707 },
4708 {
4709 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4710 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 12, 1,
4711 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM_KEY, 0, 0,
4712 0, 0,
4713 },
4714 {
4715 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4716 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 12, 1,
4717 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM_SEQ, 0, 0,
4718 0, 0,
4719 },
4720 {
4721 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4722 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 12, 1,
4723 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_KEY_SEQ, 0, 0,
4724 0, 0,
4725 },
4726 {
4727 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 6, 10,
4728 0, 0, NPC_S_KPU9_TU_MPLS_IN_GRE_VXLAN, 16, 1,
4729 NPC_LID_LD, NPC_LT_LD_GRE_MPLS, NPC_F_GRE_HAS_CSUM_KEY_SEQ,
4730 0, 0, 0, 0,
4731 },
4732 {
4733 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4734 0, 0, NPC_S_KPU9_TU_NSH, 4, 1,
4735 NPC_LID_LD, NPC_LT_LD_GRE_NSH, 0, 0, 0,
4736 0, 0,
4737 },
4738 {
4739 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4740 0, 0, NPC_S_KPU9_TU_NSH, 8, 1,
4741 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_CSUM, 0, 0,
4742 0, 0,
4743 },
4744 {
4745 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4746 0, 0, NPC_S_KPU9_TU_NSH, 8, 1,
4747 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_KEY, 0, 0,
4748 0, 0,
4749 },
4750 {
4751 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4752 0, 0, NPC_S_KPU9_TU_NSH, 8, 1,
4753 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_SEQ, 0, 0,
4754 0, 0,
4755 },
4756 {
4757 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4758 0, 0, NPC_S_KPU9_TU_NSH, 12, 1,
4759 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_CSUM_KEY, 0, 0,
4760 0, 0,
4761 },
4762 {
4763 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4764 0, 0, NPC_S_KPU9_TU_NSH, 12, 1,
4765 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_CSUM_SEQ, 0, 0,
4766 0, 0,
4767 },
4768 {
4769 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4770 0, 0, NPC_S_KPU9_TU_NSH, 12, 1,
4771 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_KEY_SEQ, 0, 0,
4772 0, 0,
4773 },
4774 {
4775 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
4776 0, 0, NPC_S_KPU9_TU_NSH, 16, 1,
4777 NPC_LID_LD, NPC_LT_LD_GRE_NSH, NPC_F_GRE_HAS_CSUM_KEY_SEQ, 0, 0,
4778 0, 0,
4779 },
4780 {
4781 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4782 3, 0, NPC_S_KPU12_TU_IP, 4, 1,
4783 NPC_LID_LD, NPC_LT_LD_GRE, 0, 0, 0,
4784 0, 0,
4785 },
4786 {
4787 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4788 3, 0, NPC_S_KPU12_TU_IP, 8, 1,
4789 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM, 0, 0,
4790 0, 0,
4791 },
4792 {
4793 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4794 3, 0, NPC_S_KPU12_TU_IP, 8, 1,
4795 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_KEY, 0, 0,
4796 0, 0,
4797 },
4798 {
4799 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4800 3, 0, NPC_S_KPU12_TU_IP, 8, 1,
4801 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_SEQ, 0, 0,
4802 0, 0,
4803 },
4804 {
4805 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4806 3, 0, NPC_S_KPU12_TU_IP, 12, 1,
4807 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM_KEY, 0, 0,
4808 0, 0,
4809 },
4810 {
4811 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4812 3, 0, NPC_S_KPU12_TU_IP, 12, 1,
4813 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM_SEQ, 0, 0,
4814 0, 0,
4815 },
4816 {
4817 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4818 3, 0, NPC_S_KPU12_TU_IP, 12, 1,
4819 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_KEY_SEQ, 0, 0,
4820 0, 0,
4821 },
4822 {
4823 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4824 3, 0, NPC_S_KPU12_TU_IP, 16, 1,
4825 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM_KEY_SEQ, 0, 0,
4826 0, 0,
4827 },
4828 {
4829 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4830 3, 0, NPC_S_KPU12_TU_IP6, 4, 1,
4831 NPC_LID_LD, NPC_LT_LD_GRE, 0, 0, 0,
4832 0, 0,
4833 },
4834 {
4835 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4836 3, 0, NPC_S_KPU12_TU_IP6, 8, 1,
4837 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM, 0, 0,
4838 0, 0,
4839 },
4840 {
4841 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4842 3, 0, NPC_S_KPU12_TU_IP6, 8, 1,
4843 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_KEY, 0, 0,
4844 0, 0,
4845 },
4846 {
4847 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4848 3, 0, NPC_S_KPU12_TU_IP6, 8, 1,
4849 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_SEQ, 0, 0,
4850 0, 0,
4851 },
4852 {
4853 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4854 3, 0, NPC_S_KPU12_TU_IP6, 12, 1,
4855 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM_KEY, 0, 0,
4856 0, 0,
4857 },
4858 {
4859 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4860 3, 0, NPC_S_KPU12_TU_IP6, 12, 1,
4861 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM_SEQ, 0, 0,
4862 0, 0,
4863 },
4864 {
4865 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4866 3, 0, NPC_S_KPU12_TU_IP6, 12, 1,
4867 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_KEY_SEQ, 0, 0,
4868 0, 0,
4869 },
4870 {
4871 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4872 3, 0, NPC_S_KPU12_TU_IP6, 16, 1,
4873 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_CSUM_KEY_SEQ, 0, 0,
4874 0, 0,
4875 },
4876 {
4877 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4878 0, 1, NPC_S_NA, 0, 1,
4879 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_HAS_ROUTE, 0, 0,
4880 0, 0,
4881 },
4882 {
4883 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4884 0, 1, NPC_S_NA, 0, 1,
4885 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_UNK_PROTO, 0, 0,
4886 0, 0,
4887 },
4888 {
4889 NPC_ERRLEV_LD, NPC_EC_GRE, 0, 0, 0,
4890 0, 1, NPC_S_NA, 0, 0,
4891 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
4892 0, 0,
4893 },
4894 {
4895 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4896 2, 0, NPC_S_KPU11_TU_PPP, 8, 1,
4897 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_VER1, 0, 0,
4898 0, 0,
4899 },
4900 {
4901 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4902 2, 0, NPC_S_KPU11_TU_PPP, 12, 1,
4903 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_VER1_HAS_SEQ, 0, 0,
4904 0, 0,
4905 },
4906 {
4907 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4908 2, 0, NPC_S_KPU11_TU_PPP, 12, 1,
4909 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_VER1_HAS_ACK, 0, 0,
4910 0, 0,
4911 },
4912 {
4913 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4914 2, 0, NPC_S_KPU11_TU_PPP, 16, 1,
4915 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_VER1_HAS_SEQ_ACK, 0, 0,
4916 0, 0,
4917 },
4918 {
4919 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4920 0, 1, NPC_S_NA, 0, 1,
4921 NPC_LID_LD, NPC_LT_LD_GRE, NPC_F_GRE_VER1_UNK_PROTO, 0, 0,
4922 0, 0,
4923 },
4924 {
4925 NPC_ERRLEV_LD, NPC_EC_GRE_VER1, 0, 0, 0,
4926 0, 1, NPC_S_NA, 0, 0,
4927 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
4928 0, 0,
4929 },
4930 {
4931 NPC_ERRLEV_LD, NPC_EC_UNK, 0, 0, 0,
4932 0, 1, NPC_S_NA, 0, 0,
4933 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
4934 0, 0,
4935 },
4936};
4937
4938static struct npc_kpu_profile_action kpu9_action_entries[] = {
4939 {
4940 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4941 0, 0, NPC_S_KPU10_TU_MPLS_PL, 4, 0,
4942 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
4943 0, 0,
4944 },
4945 {
4946 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4947 0, 0, NPC_S_KPU10_TU_MPLS_PL, 8, 0,
4948 NPC_LID_LD, NPC_LT_NA, NPC_F_MPLS_2_LABELS, 0, 0,
4949 0, 0,
4950 },
4951 {
4952 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4953 0, 0, NPC_S_KPU10_TU_MPLS_PL, 12, 0,
4954 NPC_LID_LD, NPC_LT_NA, NPC_F_MPLS_3_LABELS, 0, 0,
4955 0, 0,
4956 },
4957 {
4958 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 4, 0,
4959 0, 0, NPC_S_KPU10_TU_MPLS, 12, 0,
4960 NPC_LID_LD, NPC_LT_NA, NPC_F_MPLS_4_LABELS, 0, 0,
4961 0, 0,
4962 },
4963 {
4964 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4965 0, 0, NPC_S_KPU10_TU_MPLS_PL, 4, 1,
4966 NPC_LID_LD, NPC_LT_LD_TU_MPLS, 0, 0, 0,
4967 0, 0,
4968 },
4969 {
4970 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4971 0, 0, NPC_S_KPU10_TU_MPLS_PL, 8, 1,
4972 NPC_LID_LD, NPC_LT_LD_TU_MPLS, NPC_F_MPLS_2_LABELS, 0, 0,
4973 0, 0,
4974 },
4975 {
4976 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
4977 0, 0, NPC_S_KPU10_TU_MPLS_PL, 12, 1,
4978 NPC_LID_LD, NPC_LT_LD_TU_MPLS, NPC_F_MPLS_3_LABELS, 0, 0,
4979 0, 0,
4980 },
4981 {
4982 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 4, 0,
4983 0, 0, NPC_S_KPU10_TU_MPLS, 12, 1,
4984 NPC_LID_LD, NPC_LT_LD_TU_MPLS, NPC_F_MPLS_4_LABELS, 0, 0,
4985 0, 0,
4986 },
4987 {
4988 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
4989 2, 0, NPC_S_KPU12_TU_IP, 0, 0,
4990 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4991 0, 2,
4992 },
4993 {
4994 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
4995 2, 0, NPC_S_KPU12_TU_IP6, 0, 0,
4996 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
4997 0, 2,
4998 },
4999 {
5000 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
5001 1, 0, NPC_S_KPU11_TU_ETHER, 0, 0,
5002 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5003 0, 2,
5004 },
5005 {
5006 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
5007 0, 0, NPC_S_KPU10_TU_NSH, 0, 0,
5008 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5009 0, 2,
5010 },
5011 {
5012 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5013 1, 0, NPC_S_KPU11_TU_MPLS_IN_NSH, 0, 0,
5014 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5015 0, 2,
5016 },
5017 {
5018 NPC_ERRLEV_LE, NPC_EC_UNK, 0, 0, 0,
5019 0, 1, NPC_S_NA, 0, 0,
5020 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5021 0, 0,
5022 },
5023};
5024
5025static struct npc_kpu_profile_action kpu10_action_entries[] = {
5026 {
5027 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5028 1, 0, NPC_S_KPU12_TU_IP, 4, 0,
5029 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5030 0, 0,
5031 },
5032 {
5033 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5034 1, 0, NPC_S_KPU12_TU_IP6, 4, 0,
5035 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5036 0, 0,
5037 },
5038 {
5039 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
5040 0, 0, NPC_S_KPU11_TU_ETHER, 8, 0,
5041 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5042 0, 0,
5043 },
5044 {
5045 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
5046 0, 0, NPC_S_KPU11_TU_ETHER, 4, 0,
5047 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5048 0, 0,
5049 },
5050 {
5051 NPC_ERRLEV_LB, NPC_EC_L2_MPLS_2MANY, 0, 0, 0,
5052 0, 1, NPC_S_NA, 0, 0,
5053 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5054 0, 0,
5055 },
5056 {
5057 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5058 1, 0, NPC_S_KPU12_TU_IP, 0, 0,
5059 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5060 0, 0,
5061 },
5062 {
5063 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5064 1, 0, NPC_S_KPU12_TU_IP6, 0, 0,
5065 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5066 0, 0,
5067 },
5068 {
5069 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
5070 0, 0, NPC_S_KPU11_TU_ETHER, 4, 0,
5071 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5072 0, 0,
5073 },
5074 {
5075 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
5076 0, 0, NPC_S_KPU11_TU_ETHER, 0, 0,
5077 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5078 0, 0,
5079 },
5080 {
5081 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5082 1, 0, NPC_S_KPU12_TU_IP, 0, 0,
5083 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5084 0, 2,
5085 },
5086 {
5087 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5088 1, 0, NPC_S_KPU12_TU_IP6, 0, 0,
5089 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5090 0, 2,
5091 },
5092 {
5093 NPC_ERRLEV_RE, NPC_EC_NOERR, 12, 16, 20,
5094 0, 0, NPC_S_KPU11_TU_ETHER, 0, 0,
5095 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5096 0, 2,
5097 },
5098 {
5099 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
5100 0, 0, NPC_S_KPU11_TU_3RD_NSH, 0, 0,
5101 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5102 0, 2,
5103 },
5104 {
5105 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5106 0, 0, NPC_S_KPU11_TU_MPLS_IN_NSH, 0, 0,
5107 NPC_LID_LD, NPC_LT_NA, 0, 1, 0x3f,
5108 0, 2,
5109 },
5110 {
5111 NPC_ERRLEV_LE, NPC_EC_UNK, 0, 0, 0,
5112 0, 1, NPC_S_NA, 0, 0,
5113 NPC_LID_LD, NPC_LT_NA, 0, 0, 0,
5114 0, 0,
5115 },
5116};
5117
5118static struct npc_kpu_profile_action kpu11_action_entries[] = {
5119 {
5120 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5121 0, 0, NPC_S_KPU12_TU_IP, 14, 1,
5122 NPC_LID_LE, NPC_LT_LE_TU_ETHER, 0, 0, 0,
5123 0, 0,
5124 },
5125 {
5126 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5127 0, 0, NPC_S_KPU12_TU_IP6, 14, 1,
5128 NPC_LID_LE, NPC_LT_LE_TU_ETHER, 0, 0, 0,
5129 0, 0,
5130 },
5131 {
5132 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5133 0, 0, NPC_S_KPU12_TU_ARP, 14, 1,
5134 NPC_LID_LE, NPC_LT_LE_TU_ETHER, 0, 0, 0,
5135 0, 0,
5136 },
5137 {
5138 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5139 0, 0, NPC_S_KPU12_TU_IP, 18, 1,
5140 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_CTAG, 0, 0,
5141 0, 0,
5142 },
5143 {
5144 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5145 0, 0, NPC_S_KPU12_TU_IP6, 18, 1,
5146 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_CTAG, 0, 0,
5147 0, 0,
5148 },
5149 {
5150 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5151 0, 0, NPC_S_KPU12_TU_ARP, 18, 1,
5152 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_CTAG, 0, 0,
5153 0, 0,
5154 },
5155 {
5156 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5157 0, 1, NPC_S_NA, 0, 1,
5158 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_CTAG_UNK, 0, 0,
5159 0, 0,
5160 },
5161 {
5162 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5163 0, 0, NPC_S_KPU12_TU_IP, 22, 1,
5164 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG_CTAG, 0, 0,
5165 0, 0,
5166 },
5167 {
5168 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5169 0, 0, NPC_S_KPU12_TU_IP6, 22, 1,
5170 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG_CTAG, 0, 0,
5171 0, 0,
5172 },
5173 {
5174 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5175 0, 0, NPC_S_KPU12_TU_ARP, 22, 1,
5176 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG_CTAG, 0, 0,
5177 0, 0,
5178 },
5179 {
5180 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5181 0, 1, NPC_S_NA, 0, 1,
5182 NPC_LID_LE, NPC_LT_LE_TU_ETHER,
5183 NPC_F_TU_ETHER_STAG_CTAG_UNK, 0, 0, 0, 0,
5184 },
5185 {
5186 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5187 0, 0, NPC_S_KPU12_TU_IP, 18, 1,
5188 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG, 0, 0,
5189 0, 0,
5190 },
5191 {
5192 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5193 0, 0, NPC_S_KPU12_TU_IP6, 18, 1,
5194 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG, 0, 0,
5195 0, 0,
5196 },
5197 {
5198 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5199 0, 0, NPC_S_KPU12_TU_ARP, 18, 1,
5200 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG, 0, 0,
5201 0, 0,
5202 },
5203 {
5204 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5205 0, 1, NPC_S_NA, 0, 1,
5206 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_STAG_UNK, 0, 0,
5207 0, 0,
5208 },
5209 {
5210 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5211 0, 0, NPC_S_KPU12_TU_IP, 22, 1,
5212 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ_CTAG, 0, 0,
5213 0, 0,
5214 },
5215 {
5216 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5217 0, 0, NPC_S_KPU12_TU_IP6, 22, 1,
5218 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ_CTAG, 0, 0,
5219 0, 0,
5220 },
5221 {
5222 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5223 0, 0, NPC_S_KPU12_TU_ARP, 22, 1,
5224 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ_CTAG, 0, 0,
5225 0, 0,
5226 },
5227 {
5228 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5229 0, 1, NPC_S_NA, 0, 1,
5230 NPC_LID_LE, NPC_LT_LE_TU_ETHER,
5231 NPC_F_TU_ETHER_QINQ_CTAG_UNK, 0, 0, 0, 0,
5232 },
5233 {
5234 NPC_ERRLEV_RE, NPC_EC_NOERR, 8, 0, 0,
5235 0, 0, NPC_S_KPU12_TU_IP, 18, 1,
5236 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ, 0, 0,
5237 0, 0,
5238 },
5239 {
5240 NPC_ERRLEV_RE, NPC_EC_NOERR, 6, 0, 0,
5241 0, 0, NPC_S_KPU12_TU_IP6, 18, 1,
5242 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ, 0, 0,
5243 0, 0,
5244 },
5245 {
5246 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5247 0, 0, NPC_S_KPU12_TU_ARP, 18, 1,
5248 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ, 0, 0,
5249 0, 0,
5250 },
5251 {
5252 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5253 0, 1, NPC_S_NA, 0, 1,
5254 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_QINQ_UNK, 0, 0,
5255 0, 0,
5256 },
5257 {
5258 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5259 0, 1, NPC_S_NA, 0, 1,
5260 NPC_LID_LE, NPC_LT_LE_TU_ETHER, NPC_F_TU_ETHER_UNK, 0, 0,
5261 0, 0,
5262 },
5263 {
5264 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5265 0, 1, NPC_S_NA, 0, 1,
5266 NPC_LID_LE, NPC_LT_LE_TU_PPP, 0, 0, 0,
5267 0, 0,
5268 },
5269 {
5270 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5271 0, 1, NPC_S_NA, 0, 1,
5272 NPC_LID_LE, NPC_LT_LE_TU_MPLS_IN_NSH, 0, 0, 0,
5273 0, 0,
5274 },
5275 {
5276 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5277 0, 1, NPC_S_NA, 0, 1,
5278 NPC_LID_LE, NPC_LT_LE_TU_3RD_NSH, 0, 0, 0,
5279 0, 0,
5280 },
5281 {
5282 NPC_ERRLEV_LE, NPC_EC_UNK, 0, 0, 0,
5283 0, 1, NPC_S_NA, 0, 0,
5284 NPC_LID_LE, NPC_LT_NA, 0, 0, 0,
5285 0, 0,
5286 },
5287};
5288
5289static struct npc_kpu_profile_action kpu12_action_entries[] = {
5290 {
5291 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 12, 0,
5292 2, 0, NPC_S_KPU15_TU_TCP, 20, 1,
5293 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5294 0, 0,
5295 },
5296 {
5297 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
5298 2, 0, NPC_S_KPU15_TU_UDP, 20, 1,
5299 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5300 0, 0,
5301 },
5302 {
5303 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5304 2, 0, NPC_S_KPU15_TU_SCTP, 20, 1,
5305 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5306 0, 0,
5307 },
5308 {
5309 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5310 2, 0, NPC_S_KPU15_TU_ICMP, 20, 1,
5311 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5312 0, 0,
5313 },
5314 {
5315 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5316 2, 0, NPC_S_KPU15_TU_IGMP, 20, 1,
5317 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5318 0, 0,
5319 },
5320 {
5321 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5322 2, 0, NPC_S_KPU15_TU_ESP, 20, 1,
5323 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5324 0, 0,
5325 },
5326 {
5327 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5328 2, 0, NPC_S_KPU15_TU_AH, 20, 1,
5329 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5330 0, 0,
5331 },
5332 {
5333 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5334 0, 1, NPC_S_NA, 0, 1,
5335 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_UNK_PROTO, 0, 0,
5336 0, 0,
5337 },
5338 {
5339 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 12, 0,
5340 2, 0, NPC_S_KPU15_TU_TCP, 0, 1,
5341 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5342 0, 2,
5343 },
5344 {
5345 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
5346 2, 0, NPC_S_KPU15_TU_UDP, 0, 1,
5347 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5348 0, 2,
5349 },
5350 {
5351 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5352 2, 0, NPC_S_KPU15_TU_SCTP, 0, 1,
5353 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5354 0, 2,
5355 },
5356 {
5357 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5358 2, 0, NPC_S_KPU15_TU_ICMP, 0, 1,
5359 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5360 0, 2,
5361 },
5362 {
5363 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5364 2, 0, NPC_S_KPU15_TU_IGMP, 0, 1,
5365 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5366 0, 2,
5367 },
5368 {
5369 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5370 2, 0, NPC_S_KPU15_TU_ESP, 0, 1,
5371 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5372 0, 2,
5373 },
5374 {
5375 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5376 2, 0, NPC_S_KPU15_TU_AH, 0, 1,
5377 NPC_LID_LF, NPC_LT_LF_TU_IP, NPC_F_IP_HAS_OPTIONS, 0, 0xf,
5378 0, 2,
5379 },
5380 {
5381 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5382 0, 1, NPC_S_NA, 0, 1,
5383 NPC_LID_LF, NPC_LT_LF_TU_IP,
5384 NPC_F_IP_UNK_PROTO_HAS_OPTIONS, 0, 0, 0, 0,
5385 },
5386 {
5387 NPC_ERRLEV_LF, NPC_EC_IP_VER, 0, 0, 0,
5388 0, 1, NPC_S_NA, 0, 1,
5389 NPC_LID_LF, NPC_LT_LF_TU_IP, 0, 0, 0,
5390 0, 0,
5391 },
5392 {
5393 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5394 0, 1, NPC_S_NA, 0, 1,
5395 NPC_LID_LF, NPC_LT_LF_TU_ARP, 0, 0, 0,
5396 0, 0,
5397 },
5398 {
5399 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 12, 0,
5400 2, 0, NPC_S_KPU15_TU_TCP, 40, 1,
5401 NPC_LID_LF, NPC_LT_LF_TU_IP6, 0, 0, 0,
5402 0, 0,
5403 },
5404 {
5405 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
5406 2, 0, NPC_S_KPU15_TU_UDP, 40, 1,
5407 NPC_LID_LF, NPC_LT_LF_TU_IP6, 0, 0, 0,
5408 0, 0,
5409 },
5410 {
5411 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5412 2, 0, NPC_S_KPU15_TU_SCTP, 40, 1,
5413 NPC_LID_LF, NPC_LT_LF_TU_IP6, 0, 0, 0,
5414 0, 0,
5415 },
5416 {
5417 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5418 2, 0, NPC_S_KPU15_TU_ICMP, 40, 1,
5419 NPC_LID_LF, NPC_LT_LF_TU_IP6, 0, 0, 0,
5420 0, 0,
5421 },
5422 {
5423 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5424 2, 0, NPC_S_KPU15_TU_ICMP6, 40, 1,
5425 NPC_LID_LF, NPC_LT_LF_TU_IP6, 0, 0, 0,
5426 0, 0,
5427 },
5428 {
5429 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5430 2, 0, NPC_S_KPU15_TU_ESP, 40, 1,
5431 NPC_LID_LC, NPC_LT_LF_TU_IP6, 0, 0, 0,
5432 0, 0,
5433 },
5434 {
5435 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5436 2, 0, NPC_S_KPU15_TU_AH, 40, 1,
5437 NPC_LID_LC, NPC_LT_LF_TU_IP6, 0, 0, 0,
5438 0, 0,
5439 },
5440 {
5441 NPC_ERRLEV_RE, NPC_EC_NOERR, 2, 0, 0,
5442 0, 0, NPC_S_KPU13_TU_IP6_EXT, 0, 1,
5443 NPC_LID_LF, NPC_LT_LF_TU_IP6, NPC_F_IP6_HAS_EXT, 0, 0,
5444 0, 0,
5445 },
5446 {
5447 NPC_ERRLEV_LF, NPC_EC_IP6_VER, 0, 0, 0,
5448 0, 1, NPC_S_NA, 0, 1,
5449 NPC_LID_LF, NPC_LT_LF_TU_IP6, 0, 0, 0,
5450 0, 0,
5451 },
5452 {
5453 NPC_ERRLEV_LF, NPC_EC_UNK, 0, 0, 0,
5454 0, 1, NPC_S_NA, 0, 0,
5455 NPC_LID_LF, NPC_LT_NA, 0, 0, 0,
5456 0, 0,
5457 },
5458};
5459
5460static struct npc_kpu_profile_action kpu13_action_entries[] = {
5461 {
5462 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5463 0, 1, NPC_S_NA, 0, 0,
5464 NPC_LID_LC, NPC_LT_NA, 0, 0, 0,
5465 0, 0,
5466 },
5467};
5468
5469static struct npc_kpu_profile_action kpu14_action_entries[] = {
5470 {
5471 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5472 0, 1, NPC_S_NA, 0, 0,
5473 NPC_LID_LC, NPC_LT_NA, 0, 0, 0,
5474 0, 0,
5475 },
5476};
5477
5478static struct npc_kpu_profile_action kpu15_action_entries[] = {
5479 {
5480 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5481 0, 0, NPC_S_KPU16_HTTP_DATA, 20, 1,
5482 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_HTTP, 0, 0,
5483 0, 0,
5484 },
5485 {
5486 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5487 0, 0, NPC_S_KPU16_HTTPS_DATA, 20, 1,
5488 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_HTTPS, 0, 0,
5489 0, 0,
5490 },
5491 {
5492 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5493 0, 0, NPC_S_KPU16_PPTP_DATA, 20, 1,
5494 NPC_LID_LD, NPC_LT_LG_TU_TCP, NPC_F_TCP_PPTP, 0, 0,
5495 0, 0,
5496 },
5497 {
5498 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5499 0, 0, NPC_S_KPU16_TCP_DATA, 20, 1,
5500 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_UNK_PORT, 0, 0,
5501 0, 0,
5502 },
5503 {
5504 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5505 0, 0, NPC_S_KPU16_HTTP_DATA, 0, 1,
5506 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_HTTP_HAS_OPTIONS,
5507 12, 0xf0, 1, 2,
5508 },
5509 {
5510 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5511 0, 0, NPC_S_KPU16_HTTPS_DATA, 0, 1,
5512 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_HTTPS_HAS_OPTIONS,
5513 12, 0xf0, 1, 2,
5514 },
5515 {
5516 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5517 0, 0, NPC_S_KPU16_PPTP_DATA, 0, 1,
5518 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_PPTP_HAS_OPTIONS,
5519 12, 0xf0, 1, 2,
5520 },
5521 {
5522 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5523 0, 0, NPC_S_KPU16_TCP_DATA, 0, 1,
5524 NPC_LID_LG, NPC_LT_LG_TU_TCP, NPC_F_TCP_UNK_PORT_HAS_OPTIONS,
5525 12, 0xf0, 1, 2,
5526 },
5527 {
5528 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5529 0, 0, NPC_S_KPU16_UDP_DATA, 8, 1,
5530 NPC_LID_LG, NPC_LT_LG_TU_UDP, NPC_F_UDP_UNK_PORT, 0, 0,
5531 0, 0,
5532 },
5533 {
5534 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5535 0, 1, NPC_S_NA, 0, 1,
5536 NPC_LID_LG, NPC_LT_LG_TU_SCTP, 0, 0, 0,
5537 0, 0,
5538 },
5539 {
5540 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5541 0, 1, NPC_S_NA, 0, 1,
5542 NPC_LID_LG, NPC_LT_LG_TU_ICMP, 0, 0, 0,
5543 0, 0,
5544 },
5545 {
5546 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5547 0, 1, NPC_S_NA, 0, 1,
5548 NPC_LID_LG, NPC_LT_LG_TU_IGMP, 0, 0, 0,
5549 0, 0,
5550 },
5551 {
5552 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5553 0, 1, NPC_S_NA, 0, 1,
5554 NPC_LID_LG, NPC_LT_LG_TU_ICMP6, 0, 0, 0,
5555 0, 0,
5556 },
5557 {
5558 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5559 0, 1, NPC_S_NA, 0, 1,
5560 NPC_LID_LG, NPC_LT_LG_TU_ESP, 0, 0, 0,
5561 0, 0,
5562 },
5563 {
5564 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5565 0, 1, NPC_S_NA, 0, 1,
5566 NPC_LID_LG, NPC_LT_LG_TU_AH, 0, 0, 0,
5567 0, 0,
5568 },
5569 {
5570 NPC_ERRLEV_LG, NPC_EC_L4, 0, 0, 0,
5571 0, 1, NPC_S_NA, 0, 0,
5572 NPC_LID_LG, NPC_LT_NA, 0, 0, 0,
5573 0, 0,
5574 },
5575};
5576
5577static struct npc_kpu_profile_action kpu16_action_entries[] = {
5578 {
5579 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5580 0, 1, NPC_S_NA, 0, 1,
5581 NPC_LID_LH, NPC_LT_LH_TCP_DATA, 0, 0, 0,
5582 0, 0,
5583 },
5584 {
5585 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5586 0, 1, NPC_S_NA, 0, 1,
5587 NPC_LID_LH, NPC_LT_LH_HTTP_DATA, 0, 0, 0,
5588 0, 0,
5589 },
5590 {
5591 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5592 0, 1, NPC_S_NA, 0, 1,
5593 NPC_LID_LH, NPC_LT_LH_HTTPS_DATA, 0, 0, 0,
5594 0, 0,
5595 },
5596 {
5597 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5598 0, 1, NPC_S_NA, 0, 1,
5599 NPC_LID_LH, NPC_LT_LH_PPTP_DATA, 0, 0, 0,
5600 0, 0,
5601 },
5602 {
5603 NPC_ERRLEV_RE, NPC_EC_NOERR, 0, 0, 0,
5604 0, 1, NPC_S_NA, 0, 1,
5605 NPC_LID_LH, NPC_LT_LH_UDP_DATA, 0, 0, 0,
5606 0, 0,
5607 },
5608};
5609
5610static struct npc_kpu_profile npc_kpu_profiles[] = {
5611 {
5612 ARRAY_SIZE(kpu1_cam_entries),
5613 ARRAY_SIZE(kpu1_action_entries),
5614 &kpu1_cam_entries[0],
5615 &kpu1_action_entries[0],
5616 },
5617 {
5618 ARRAY_SIZE(kpu2_cam_entries),
5619 ARRAY_SIZE(kpu2_action_entries),
5620 &kpu2_cam_entries[0],
5621 &kpu2_action_entries[0],
5622 },
5623 {
5624 ARRAY_SIZE(kpu3_cam_entries),
5625 ARRAY_SIZE(kpu3_action_entries),
5626 &kpu3_cam_entries[0],
5627 &kpu3_action_entries[0],
5628 },
5629 {
5630 ARRAY_SIZE(kpu4_cam_entries),
5631 ARRAY_SIZE(kpu4_action_entries),
5632 &kpu4_cam_entries[0],
5633 &kpu4_action_entries[0],
5634 },
5635 {
5636 ARRAY_SIZE(kpu5_cam_entries),
5637 ARRAY_SIZE(kpu5_action_entries),
5638 &kpu5_cam_entries[0],
5639 &kpu5_action_entries[0],
5640 },
5641 {
5642 ARRAY_SIZE(kpu6_cam_entries),
5643 ARRAY_SIZE(kpu6_action_entries),
5644 &kpu6_cam_entries[0],
5645 &kpu6_action_entries[0],
5646 },
5647 {
5648 ARRAY_SIZE(kpu7_cam_entries),
5649 ARRAY_SIZE(kpu7_action_entries),
5650 &kpu7_cam_entries[0],
5651 &kpu7_action_entries[0],
5652 },
5653 {
5654 ARRAY_SIZE(kpu8_cam_entries),
5655 ARRAY_SIZE(kpu8_action_entries),
5656 &kpu8_cam_entries[0],
5657 &kpu8_action_entries[0],
5658 },
5659 {
5660 ARRAY_SIZE(kpu9_cam_entries),
5661 ARRAY_SIZE(kpu9_action_entries),
5662 &kpu9_cam_entries[0],
5663 &kpu9_action_entries[0],
5664 },
5665 {
5666 ARRAY_SIZE(kpu10_cam_entries),
5667 ARRAY_SIZE(kpu10_action_entries),
5668 &kpu10_cam_entries[0],
5669 &kpu10_action_entries[0],
5670 },
5671 {
5672 ARRAY_SIZE(kpu11_cam_entries),
5673 ARRAY_SIZE(kpu11_action_entries),
5674 &kpu11_cam_entries[0],
5675 &kpu11_action_entries[0],
5676 },
5677 {
5678 ARRAY_SIZE(kpu12_cam_entries),
5679 ARRAY_SIZE(kpu12_action_entries),
5680 &kpu12_cam_entries[0],
5681 &kpu12_action_entries[0],
5682 },
5683 {
5684 ARRAY_SIZE(kpu13_cam_entries),
5685 ARRAY_SIZE(kpu13_action_entries),
5686 &kpu13_cam_entries[0],
5687 &kpu13_action_entries[0],
5688 },
5689 {
5690 ARRAY_SIZE(kpu14_cam_entries),
5691 ARRAY_SIZE(kpu14_action_entries),
5692 &kpu14_cam_entries[0],
5693 &kpu14_action_entries[0],
5694 },
5695 {
5696 ARRAY_SIZE(kpu15_cam_entries),
5697 ARRAY_SIZE(kpu15_action_entries),
5698 &kpu15_cam_entries[0],
5699 &kpu15_action_entries[0],
5700 },
5701 {
5702 ARRAY_SIZE(kpu16_cam_entries),
5703 ARRAY_SIZE(kpu16_action_entries),
5704 &kpu16_cam_entries[0],
5705 &kpu16_action_entries[0],
5706 },
5707};
5708
5709#endif /* NPC_PROFILE_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index 60b3623eaef0..dc28fa2b9481 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -80,7 +80,7 @@ int rvu_alloc_rsrc(struct rsrc_bmap *rsrc)
80 return id; 80 return id;
81} 81}
82 82
83static int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc) 83int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc)
84{ 84{
85 int start; 85 int start;
86 86
@@ -105,7 +105,7 @@ static void rvu_free_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc, int start)
105 bitmap_clear(rsrc->bmap, start, nrsrc); 105 bitmap_clear(rsrc->bmap, start, nrsrc);
106} 106}
107 107
108static bool rvu_rsrc_check_contig(struct rsrc_bmap *rsrc, int nrsrc) 108bool rvu_rsrc_check_contig(struct rsrc_bmap *rsrc, int nrsrc)
109{ 109{
110 int start; 110 int start;
111 111
@@ -180,6 +180,9 @@ int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc)
180 bool is_pf; 180 bool is_pf;
181 181
182 switch (blktype) { 182 switch (blktype) {
183 case BLKTYPE_NPC:
184 blkaddr = BLKADDR_NPC;
185 goto exit;
183 case BLKTYPE_NPA: 186 case BLKTYPE_NPA:
184 blkaddr = BLKADDR_NPA; 187 blkaddr = BLKADDR_NPA;
185 goto exit; 188 goto exit;
@@ -566,6 +569,7 @@ static void rvu_free_hw_resources(struct rvu *rvu)
566 u64 cfg; 569 u64 cfg;
567 570
568 rvu_npa_freemem(rvu); 571 rvu_npa_freemem(rvu);
572 rvu_npc_freemem(rvu);
569 rvu_nix_freemem(rvu); 573 rvu_nix_freemem(rvu);
570 574
571 /* Free block LF bitmaps */ 575 /* Free block LF bitmaps */
@@ -771,6 +775,10 @@ init:
771 rvu_scan_block(rvu, block); 775 rvu_scan_block(rvu, block);
772 } 776 }
773 777
778 err = rvu_npc_init(rvu);
779 if (err)
780 return err;
781
774 err = rvu_npa_init(rvu); 782 err = rvu_npa_init(rvu);
775 if (err) 783 if (err)
776 return err; 784 return err;
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index b48b5af83f1d..2c0580cd2807 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -59,6 +59,32 @@ struct rvu_block {
59 unsigned char name[NAME_SIZE]; 59 unsigned char name[NAME_SIZE];
60}; 60};
61 61
62struct nix_mcast {
63 struct qmem *mce_ctx;
64 struct qmem *mcast_buf;
65 int replay_pkind;
66 int next_free_mce;
67 spinlock_t mce_lock; /* Serialize MCE updates */
68};
69
70struct nix_mce_list {
71 struct hlist_head head;
72 int count;
73 int max;
74};
75
76struct npc_mcam {
77 spinlock_t lock; /* MCAM entries and counters update lock */
78 u8 keysize; /* MCAM keysize 112/224/448 bits */
79 u8 banks; /* Number of MCAM banks */
80 u8 banks_per_entry;/* Number of keywords in key */
81 u16 banksize; /* Number of MCAM entries in each bank */
82 u16 total_entries; /* Total number of MCAM entries */
83 u16 entries; /* Total minus reserved for NIX LFs */
84 u16 nixlf_offset; /* Offset of nixlf rsvd uncast entries */
85 u16 pf_offset; /* Offset of PF's rsvd bcast, promisc entries */
86};
87
62/* Structure for per RVU func info ie PF/VF */ 88/* Structure for per RVU func info ie PF/VF */
63struct rvu_pfvf { 89struct rvu_pfvf {
64 bool npalf; /* Only one NPALF per RVU_FUNC */ 90 bool npalf; /* Only one NPALF per RVU_FUNC */
@@ -67,6 +93,7 @@ struct rvu_pfvf {
67 u16 ssow; 93 u16 ssow;
68 u16 cptlfs; 94 u16 cptlfs;
69 u16 timlfs; 95 u16 timlfs;
96 u8 cgx_lmac;
70 97
71 /* Block LF's MSIX vector info */ 98 /* Block LF's MSIX vector info */
72 struct rsrc_bmap msix; /* Bitmap for MSIX vector alloc */ 99 struct rsrc_bmap msix; /* Bitmap for MSIX vector alloc */
@@ -91,7 +118,16 @@ struct rvu_pfvf {
91 unsigned long *rq_bmap; 118 unsigned long *rq_bmap;
92 unsigned long *cq_bmap; 119 unsigned long *cq_bmap;
93 120
121 u16 rx_chan_base;
122 u16 tx_chan_base;
123 u8 rx_chan_cnt; /* total number of RX channels */
124 u8 tx_chan_cnt; /* total number of TX channels */
125
94 u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */ 126 u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
127
128 /* Broadcast pkt replication info */
129 u16 bcast_mce_idx;
130 struct nix_mce_list bcast_mce_list;
95}; 131};
96 132
97struct nix_txsch { 133struct nix_txsch {
@@ -100,8 +136,14 @@ struct nix_txsch {
100 u16 *pfvf_map; 136 u16 *pfvf_map;
101}; 137};
102 138
139struct npc_pkind {
140 struct rsrc_bmap rsrc;
141 u32 *pfchan_map;
142};
143
103struct nix_hw { 144struct nix_hw {
104 struct nix_txsch txsch[NIX_TXSCH_LVL_CNT]; /* Tx schedulers */ 145 struct nix_txsch txsch[NIX_TXSCH_LVL_CNT]; /* Tx schedulers */
146 struct nix_mcast mcast;
105}; 147};
106 148
107struct rvu_hwinfo { 149struct rvu_hwinfo {
@@ -113,9 +155,13 @@ struct rvu_hwinfo {
113 u8 cgx_links; 155 u8 cgx_links;
114 u8 lbk_links; 156 u8 lbk_links;
115 u8 sdp_links; 157 u8 sdp_links;
158 u8 npc_kpus; /* No of parser units */
159
116 160
117 struct rvu_block block[BLK_COUNT]; /* Block info */ 161 struct rvu_block block[BLK_COUNT]; /* Block info */
118 struct nix_hw *nix0; 162 struct nix_hw *nix0;
163 struct npc_pkind pkind;
164 struct npc_mcam mcam;
119}; 165};
120 166
121struct rvu { 167struct rvu {
@@ -180,11 +226,12 @@ static inline u64 rvupf_read64(struct rvu *rvu, u64 offset)
180/* Function Prototypes 226/* Function Prototypes
181 * RVU 227 * RVU
182 */ 228 */
183
184int rvu_alloc_bitmap(struct rsrc_bmap *rsrc); 229int rvu_alloc_bitmap(struct rsrc_bmap *rsrc);
185int rvu_alloc_rsrc(struct rsrc_bmap *rsrc); 230int rvu_alloc_rsrc(struct rsrc_bmap *rsrc);
186void rvu_free_rsrc(struct rsrc_bmap *rsrc, int id); 231void rvu_free_rsrc(struct rsrc_bmap *rsrc, int id);
187int rvu_rsrc_free_count(struct rsrc_bmap *rsrc); 232int rvu_rsrc_free_count(struct rsrc_bmap *rsrc);
233int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc);
234bool rvu_rsrc_check_contig(struct rsrc_bmap *rsrc, int nrsrc);
188int rvu_get_pf(u16 pcifunc); 235int rvu_get_pf(u16 pcifunc);
189struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc); 236struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc);
190void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf); 237void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf);
@@ -194,6 +241,14 @@ int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf);
194int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc); 241int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);
195int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero); 242int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);
196 243
244/* RVU HW reg validation */
245enum regmap_block {
246 TXSCHQ_HWREGMAP = 0,
247 MAX_HWREGMAP,
248};
249
250bool rvu_check_valid_reg(int regmap, int regblk, u64 reg);
251
197/* NPA/NIX AQ APIs */ 252/* NPA/NIX AQ APIs */
198int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue, 253int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue,
199 int qsize, int inst_size, int res_size); 254 int qsize, int inst_size, int res_size);
@@ -213,6 +268,7 @@ static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id)
213 268
214int rvu_cgx_probe(struct rvu *rvu); 269int rvu_cgx_probe(struct rvu *rvu);
215void rvu_cgx_wq_destroy(struct rvu *rvu); 270void rvu_cgx_wq_destroy(struct rvu *rvu);
271void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);
216int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start); 272int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);
217int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req, 273int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req,
218 struct msg_rsp *rsp); 274 struct msg_rsp *rsp);
@@ -259,6 +315,7 @@ int rvu_mbox_handler_NPA_LF_FREE(struct rvu *rvu, struct msg_req *req,
259/* NIX APIs */ 315/* NIX APIs */
260int rvu_nix_init(struct rvu *rvu); 316int rvu_nix_init(struct rvu *rvu);
261void rvu_nix_freemem(struct rvu *rvu); 317void rvu_nix_freemem(struct rvu *rvu);
318int rvu_get_nixlf_count(struct rvu *rvu);
262int rvu_mbox_handler_NIX_LF_ALLOC(struct rvu *rvu, 319int rvu_mbox_handler_NIX_LF_ALLOC(struct rvu *rvu,
263 struct nix_lf_alloc_req *req, 320 struct nix_lf_alloc_req *req,
264 struct nix_lf_alloc_rsp *rsp); 321 struct nix_lf_alloc_rsp *rsp);
@@ -270,4 +327,42 @@ int rvu_mbox_handler_NIX_AQ_ENQ(struct rvu *rvu,
270int rvu_mbox_handler_NIX_HWCTX_DISABLE(struct rvu *rvu, 327int rvu_mbox_handler_NIX_HWCTX_DISABLE(struct rvu *rvu,
271 struct hwctx_disable_req *req, 328 struct hwctx_disable_req *req,
272 struct msg_rsp *rsp); 329 struct msg_rsp *rsp);
330int rvu_mbox_handler_NIX_TXSCH_ALLOC(struct rvu *rvu,
331 struct nix_txsch_alloc_req *req,
332 struct nix_txsch_alloc_rsp *rsp);
333int rvu_mbox_handler_NIX_TXSCH_FREE(struct rvu *rvu,
334 struct nix_txsch_free_req *req,
335 struct msg_rsp *rsp);
336int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu,
337 struct nix_txschq_config *req,
338 struct msg_rsp *rsp);
339int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,
340 struct msg_rsp *rsp);
341int rvu_mbox_handler_NIX_VTAG_CFG(struct rvu *rvu,
342 struct nix_vtag_config *req,
343 struct msg_rsp *rsp);
344int rvu_mbox_handler_NIX_RSS_FLOWKEY_CFG(struct rvu *rvu,
345 struct nix_rss_flowkey_cfg *req,
346 struct msg_rsp *rsp);
347int rvu_mbox_handler_NIX_SET_MAC_ADDR(struct rvu *rvu,
348 struct nix_set_mac_addr *req,
349 struct msg_rsp *rsp);
350int rvu_mbox_handler_NIX_SET_RX_MODE(struct rvu *rvu, struct nix_rx_mode *req,
351 struct msg_rsp *rsp);
352
353/* NPC APIs */
354int rvu_npc_init(struct rvu *rvu);
355void rvu_npc_freemem(struct rvu *rvu);
356int rvu_npc_get_pkind(struct rvu *rvu, u16 pf);
357void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf);
358void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
359 int nixlf, u64 chan, u8 *mac_addr);
360void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,
361 int nixlf, u64 chan, bool allmulti);
362void rvu_npc_disable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf);
363void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
364 int nixlf, u64 chan);
365void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
366void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,
367 int group, int alg_idx, int mcam_index);
273#endif /* RVU_H */ 368#endif /* RVU_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index e0aee2176637..188185c15b4a 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -50,7 +50,7 @@ static inline u8 cgxlmac_id_to_bmap(u8 cgx_id, u8 lmac_id)
50 return ((cgx_id & 0xF) << 4) | (lmac_id & 0xF); 50 return ((cgx_id & 0xF) << 4) | (lmac_id & 0xF);
51} 51}
52 52
53static void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu) 53void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
54{ 54{
55 if (cgx_id >= rvu->cgx_cnt) 55 if (cgx_id >= rvu->cgx_cnt)
56 return NULL; 56 return NULL;
@@ -60,10 +60,11 @@ static void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
60 60
61static int rvu_map_cgx_lmac_pf(struct rvu *rvu) 61static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
62{ 62{
63 struct npc_pkind *pkind = &rvu->hw->pkind;
63 int cgx_cnt = rvu->cgx_cnt; 64 int cgx_cnt = rvu->cgx_cnt;
64 int cgx, lmac_cnt, lmac; 65 int cgx, lmac_cnt, lmac;
65 int pf = PF_CGXMAP_BASE; 66 int pf = PF_CGXMAP_BASE;
66 int size; 67 int size, free_pkind;
67 68
68 if (!cgx_cnt) 69 if (!cgx_cnt)
69 return 0; 70 return 0;
@@ -96,6 +97,8 @@ static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
96 for (lmac = 0; lmac < lmac_cnt; lmac++, pf++) { 97 for (lmac = 0; lmac < lmac_cnt; lmac++, pf++) {
97 rvu->pf2cgxlmac_map[pf] = cgxlmac_id_to_bmap(cgx, lmac); 98 rvu->pf2cgxlmac_map[pf] = cgxlmac_id_to_bmap(cgx, lmac);
98 rvu->cgxlmac2pf_map[CGX_OFFSET(cgx) + lmac] = 1 << pf; 99 rvu->cgxlmac2pf_map[CGX_OFFSET(cgx) + lmac] = 1 << pf;
100 free_pkind = rvu_alloc_rsrc(&pkind->rsrc);
101 pkind->pfchan_map[free_pkind] = ((pf) & 0x3F) << 16;
99 rvu->cgx_mapped_pfs++; 102 rvu->cgx_mapped_pfs++;
100 } 103 }
101 } 104 }
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 214ca2c26ab4..8890c95831ca 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -14,8 +14,78 @@
14#include "rvu_struct.h" 14#include "rvu_struct.h"
15#include "rvu_reg.h" 15#include "rvu_reg.h"
16#include "rvu.h" 16#include "rvu.h"
17#include "npc.h"
17#include "cgx.h" 18#include "cgx.h"
18 19
20static int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add);
21
22enum mc_tbl_sz {
23 MC_TBL_SZ_256,
24 MC_TBL_SZ_512,
25 MC_TBL_SZ_1K,
26 MC_TBL_SZ_2K,
27 MC_TBL_SZ_4K,
28 MC_TBL_SZ_8K,
29 MC_TBL_SZ_16K,
30 MC_TBL_SZ_32K,
31 MC_TBL_SZ_64K,
32};
33
34enum mc_buf_cnt {
35 MC_BUF_CNT_8,
36 MC_BUF_CNT_16,
37 MC_BUF_CNT_32,
38 MC_BUF_CNT_64,
39 MC_BUF_CNT_128,
40 MC_BUF_CNT_256,
41 MC_BUF_CNT_512,
42 MC_BUF_CNT_1024,
43 MC_BUF_CNT_2048,
44};
45
46/* For now considering MC resources needed for broadcast
47 * pkt replication only. i.e 256 HWVFs + 12 PFs.
48 */
49#define MC_TBL_SIZE MC_TBL_SZ_512
50#define MC_BUF_CNT MC_BUF_CNT_128
51
52struct mce {
53 struct hlist_node node;
54 u16 idx;
55 u16 pcifunc;
56};
57
58int rvu_get_nixlf_count(struct rvu *rvu)
59{
60 struct rvu_block *block;
61 int blkaddr;
62
63 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);
64 if (blkaddr < 0)
65 return 0;
66 block = &rvu->hw->block[blkaddr];
67 return block->lf.max;
68}
69
70static void nix_mce_list_init(struct nix_mce_list *list, int max)
71{
72 INIT_HLIST_HEAD(&list->head);
73 list->count = 0;
74 list->max = max;
75}
76
77static u16 nix_alloc_mce_list(struct nix_mcast *mcast, int count)
78{
79 int idx;
80
81 if (!mcast)
82 return 0;
83
84 idx = mcast->next_free_mce;
85 mcast->next_free_mce += count;
86 return idx;
87}
88
19static inline struct nix_hw *get_nix_hw(struct rvu_hwinfo *hw, int blkaddr) 89static inline struct nix_hw *get_nix_hw(struct rvu_hwinfo *hw, int blkaddr)
20{ 90{
21 if (blkaddr == BLKADDR_NIX0 && hw->nix0) 91 if (blkaddr == BLKADDR_NIX0 && hw->nix0)
@@ -48,6 +118,76 @@ static bool is_valid_txschq(struct rvu *rvu, int blkaddr,
48 return true; 118 return true;
49} 119}
50 120
121static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
122{
123 struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
124 u8 cgx_id, lmac_id;
125 int pkind, pf;
126 int err;
127
128 pf = rvu_get_pf(pcifunc);
129 if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK)
130 return 0;
131
132 switch (type) {
133 case NIX_INTF_TYPE_CGX:
134 pfvf->cgx_lmac = rvu->pf2cgxlmac_map[pf];
135 rvu_get_cgx_lmac_id(pfvf->cgx_lmac, &cgx_id, &lmac_id);
136
137 pkind = rvu_npc_get_pkind(rvu, pf);
138 if (pkind < 0) {
139 dev_err(rvu->dev,
140 "PF_Func 0x%x: Invalid pkind\n", pcifunc);
141 return -EINVAL;
142 }
143 pfvf->rx_chan_base = NIX_CHAN_CGX_LMAC_CHX(cgx_id, lmac_id, 0);
144 pfvf->tx_chan_base = pfvf->rx_chan_base;
145 pfvf->rx_chan_cnt = 1;
146 pfvf->tx_chan_cnt = 1;
147 cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);
148 rvu_npc_set_pkind(rvu, pkind, pfvf);
149 break;
150 case NIX_INTF_TYPE_LBK:
151 break;
152 }
153
154 /* Add a UCAST forwarding rule in MCAM with this NIXLF attached
155 * RVU PF/VF's MAC address.
156 */
157 rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,
158 pfvf->rx_chan_base, pfvf->mac_addr);
159
160 /* Add this PF_FUNC to bcast pkt replication list */
161 err = nix_update_bcast_mce_list(rvu, pcifunc, true);
162 if (err) {
163 dev_err(rvu->dev,
164 "Bcast list, failed to enable PF_FUNC 0x%x\n",
165 pcifunc);
166 return err;
167 }
168
169 rvu_npc_install_bcast_match_entry(rvu, pcifunc,
170 nixlf, pfvf->rx_chan_base);
171
172 return 0;
173}
174
175static void nix_interface_deinit(struct rvu *rvu, u16 pcifunc, u8 nixlf)
176{
177 int err;
178
179 /* Remove this PF_FUNC from bcast pkt replication list */
180 err = nix_update_bcast_mce_list(rvu, pcifunc, false);
181 if (err) {
182 dev_err(rvu->dev,
183 "Bcast list, failed to disable PF_FUNC 0x%x\n",
184 pcifunc);
185 }
186
187 /* Free and disable any MCAM entries used by this NIX LF */
188 rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);
189}
190
51static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr, 191static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr,
52 u64 format, bool v4, u64 *fidx) 192 u64 format, bool v4, u64 *fidx)
53{ 193{
@@ -285,6 +425,19 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
285 (req->qidx >= (256UL << (cfg & 0xF)))) 425 (req->qidx >= (256UL << (cfg & 0xF))))
286 rc = NIX_AF_ERR_AQ_ENQUEUE; 426 rc = NIX_AF_ERR_AQ_ENQUEUE;
287 break; 427 break;
428 case NIX_AQ_CTYPE_MCE:
429 cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_MCAST_CFG);
430 /* Check if index exceeds MCE list length */
431 if (!hw->nix0->mcast.mce_ctx ||
432 (req->qidx >= (256UL << (cfg & 0xF))))
433 rc = NIX_AF_ERR_AQ_ENQUEUE;
434
435 /* Adding multicast lists for requests from PF/VFs is not
436 * yet supported, so ignore this.
437 */
438 if (rsp)
439 rc = NIX_AF_ERR_AQ_ENQUEUE;
440 break;
288 default: 441 default:
289 rc = NIX_AF_ERR_AQ_ENQUEUE; 442 rc = NIX_AF_ERR_AQ_ENQUEUE;
290 } 443 }
@@ -331,6 +484,9 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
331 else if (req->ctype == NIX_AQ_CTYPE_RSS) 484 else if (req->ctype == NIX_AQ_CTYPE_RSS)
332 memcpy(mask, &req->rss_mask, 485 memcpy(mask, &req->rss_mask,
333 sizeof(struct nix_rsse_s)); 486 sizeof(struct nix_rsse_s));
487 else if (req->ctype == NIX_AQ_CTYPE_MCE)
488 memcpy(mask, &req->mce_mask,
489 sizeof(struct nix_rx_mce_s));
334 /* Fall through */ 490 /* Fall through */
335 case NIX_AQ_INSTOP_INIT: 491 case NIX_AQ_INSTOP_INIT:
336 if (req->ctype == NIX_AQ_CTYPE_RQ) 492 if (req->ctype == NIX_AQ_CTYPE_RQ)
@@ -341,6 +497,8 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
341 memcpy(ctx, &req->cq, sizeof(struct nix_cq_ctx_s)); 497 memcpy(ctx, &req->cq, sizeof(struct nix_cq_ctx_s));
342 else if (req->ctype == NIX_AQ_CTYPE_RSS) 498 else if (req->ctype == NIX_AQ_CTYPE_RSS)
343 memcpy(ctx, &req->rss, sizeof(struct nix_rsse_s)); 499 memcpy(ctx, &req->rss, sizeof(struct nix_rsse_s));
500 else if (req->ctype == NIX_AQ_CTYPE_MCE)
501 memcpy(ctx, &req->mce, sizeof(struct nix_rx_mce_s));
344 break; 502 break;
345 case NIX_AQ_INSTOP_NOP: 503 case NIX_AQ_INSTOP_NOP:
346 case NIX_AQ_INSTOP_READ: 504 case NIX_AQ_INSTOP_READ:
@@ -416,6 +574,9 @@ static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,
416 else if (req->ctype == NIX_AQ_CTYPE_RSS) 574 else if (req->ctype == NIX_AQ_CTYPE_RSS)
417 memcpy(&rsp->rss, ctx, 575 memcpy(&rsp->rss, ctx,
418 sizeof(struct nix_cq_ctx_s)); 576 sizeof(struct nix_cq_ctx_s));
577 else if (req->ctype == NIX_AQ_CTYPE_MCE)
578 memcpy(&rsp->mce, ctx,
579 sizeof(struct nix_rx_mce_s));
419 } 580 }
420 } 581 }
421 582
@@ -639,6 +800,10 @@ int rvu_mbox_handler_NIX_LF_ALLOC(struct rvu *rvu,
639 /* Config Rx pkt length, csum checks and apad enable / disable */ 800 /* Config Rx pkt length, csum checks and apad enable / disable */
640 rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), req->rx_cfg); 801 rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), req->rx_cfg);
641 802
803 err = nix_interface_init(rvu, pcifunc, NIX_INTF_TYPE_CGX, nixlf);
804 if (err)
805 goto free_mem;
806
642 goto exit; 807 goto exit;
643 808
644free_mem: 809free_mem:
@@ -652,6 +817,10 @@ exit:
652 /* set SQB size info */ 817 /* set SQB size info */
653 cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQ_CONST); 818 cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQ_CONST);
654 rsp->sqb_size = (cfg >> 34) & 0xFFFF; 819 rsp->sqb_size = (cfg >> 34) & 0xFFFF;
820 rsp->rx_chan_base = pfvf->rx_chan_base;
821 rsp->tx_chan_base = pfvf->tx_chan_base;
822 rsp->rx_chan_cnt = pfvf->rx_chan_cnt;
823 rsp->tx_chan_cnt = pfvf->tx_chan_cnt;
655 rsp->lso_tsov4_idx = NIX_LSO_FORMAT_IDX_TSOV4; 824 rsp->lso_tsov4_idx = NIX_LSO_FORMAT_IDX_TSOV4;
656 rsp->lso_tsov6_idx = NIX_LSO_FORMAT_IDX_TSOV6; 825 rsp->lso_tsov6_idx = NIX_LSO_FORMAT_IDX_TSOV6;
657 return rc; 826 return rc;
@@ -676,6 +845,8 @@ int rvu_mbox_handler_NIX_LF_FREE(struct rvu *rvu, struct msg_req *req,
676 if (nixlf < 0) 845 if (nixlf < 0)
677 return NIX_AF_ERR_AF_LF_INVALID; 846 return NIX_AF_ERR_AF_LF_INVALID;
678 847
848 nix_interface_deinit(rvu, pcifunc, nixlf);
849
679 /* Reset this NIX LF */ 850 /* Reset this NIX LF */
680 err = rvu_lf_reset(rvu, block, nixlf); 851 err = rvu_lf_reset(rvu, block, nixlf);
681 if (err) { 852 if (err) {
@@ -689,6 +860,606 @@ int rvu_mbox_handler_NIX_LF_FREE(struct rvu *rvu, struct msg_req *req,
689 return 0; 860 return 0;
690} 861}
691 862
863/* Disable shaping of pkts by a scheduler queue
864 * at a given scheduler level.
865 */
866static void nix_reset_tx_shaping(struct rvu *rvu, int blkaddr,
867 int lvl, int schq)
868{
869 u64 cir_reg = 0, pir_reg = 0;
870 u64 cfg;
871
872 switch (lvl) {
873 case NIX_TXSCH_LVL_TL1:
874 cir_reg = NIX_AF_TL1X_CIR(schq);
875 pir_reg = 0; /* PIR not available at TL1 */
876 break;
877 case NIX_TXSCH_LVL_TL2:
878 cir_reg = NIX_AF_TL2X_CIR(schq);
879 pir_reg = NIX_AF_TL2X_PIR(schq);
880 break;
881 case NIX_TXSCH_LVL_TL3:
882 cir_reg = NIX_AF_TL3X_CIR(schq);
883 pir_reg = NIX_AF_TL3X_PIR(schq);
884 break;
885 case NIX_TXSCH_LVL_TL4:
886 cir_reg = NIX_AF_TL4X_CIR(schq);
887 pir_reg = NIX_AF_TL4X_PIR(schq);
888 break;
889 }
890
891 if (!cir_reg)
892 return;
893 cfg = rvu_read64(rvu, blkaddr, cir_reg);
894 rvu_write64(rvu, blkaddr, cir_reg, cfg & ~BIT_ULL(0));
895
896 if (!pir_reg)
897 return;
898 cfg = rvu_read64(rvu, blkaddr, pir_reg);
899 rvu_write64(rvu, blkaddr, pir_reg, cfg & ~BIT_ULL(0));
900}
901
902static void nix_reset_tx_linkcfg(struct rvu *rvu, int blkaddr,
903 int lvl, int schq)
904{
905 struct rvu_hwinfo *hw = rvu->hw;
906 int link;
907
908 /* Reset TL4's SDP link config */
909 if (lvl == NIX_TXSCH_LVL_TL4)
910 rvu_write64(rvu, blkaddr, NIX_AF_TL4X_SDP_LINK_CFG(schq), 0x00);
911
912 if (lvl != NIX_TXSCH_LVL_TL2)
913 return;
914
915 /* Reset TL2's CGX or LBK link config */
916 for (link = 0; link < (hw->cgx_links + hw->lbk_links); link++)
917 rvu_write64(rvu, blkaddr,
918 NIX_AF_TL3_TL2X_LINKX_CFG(schq, link), 0x00);
919}
920
921int rvu_mbox_handler_NIX_TXSCH_ALLOC(struct rvu *rvu,
922 struct nix_txsch_alloc_req *req,
923 struct nix_txsch_alloc_rsp *rsp)
924{
925 u16 pcifunc = req->hdr.pcifunc;
926 struct nix_txsch *txsch;
927 int lvl, idx, req_schq;
928 struct rvu_pfvf *pfvf;
929 struct nix_hw *nix_hw;
930 int blkaddr, rc = 0;
931 u16 schq;
932
933 pfvf = rvu_get_pfvf(rvu, pcifunc);
934 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
935 if (!pfvf->nixlf || blkaddr < 0)
936 return NIX_AF_ERR_AF_LF_INVALID;
937
938 nix_hw = get_nix_hw(rvu->hw, blkaddr);
939 if (!nix_hw)
940 return -EINVAL;
941
942 spin_lock(&rvu->rsrc_lock);
943 for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
944 txsch = &nix_hw->txsch[lvl];
945 req_schq = req->schq_contig[lvl] + req->schq[lvl];
946
947 /* There are only 28 TL1s */
948 if (lvl == NIX_TXSCH_LVL_TL1 && req_schq > txsch->schq.max)
949 goto err;
950
951 /* Check if request is valid */
952 if (!req_schq || req_schq > MAX_TXSCHQ_PER_FUNC)
953 goto err;
954
955 /* If contiguous queues are needed, check for availability */
956 if (req->schq_contig[lvl] &&
957 !rvu_rsrc_check_contig(&txsch->schq, req->schq_contig[lvl]))
958 goto err;
959
960 /* Check if full request can be accommodated */
961 if (req_schq >= rvu_rsrc_free_count(&txsch->schq))
962 goto err;
963 }
964
965 for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
966 txsch = &nix_hw->txsch[lvl];
967 rsp->schq_contig[lvl] = req->schq_contig[lvl];
968 rsp->schq[lvl] = req->schq[lvl];
969
970 schq = 0;
971 /* Alloc contiguous queues first */
972 if (req->schq_contig[lvl]) {
973 schq = rvu_alloc_rsrc_contig(&txsch->schq,
974 req->schq_contig[lvl]);
975
976 for (idx = 0; idx < req->schq_contig[lvl]; idx++) {
977 txsch->pfvf_map[schq] = pcifunc;
978 nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
979 nix_reset_tx_shaping(rvu, blkaddr, lvl, schq);
980 rsp->schq_contig_list[lvl][idx] = schq;
981 schq++;
982 }
983 }
984
985 /* Alloc non-contiguous queues */
986 for (idx = 0; idx < req->schq[lvl]; idx++) {
987 schq = rvu_alloc_rsrc(&txsch->schq);
988 txsch->pfvf_map[schq] = pcifunc;
989 nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
990 nix_reset_tx_shaping(rvu, blkaddr, lvl, schq);
991 rsp->schq_list[lvl][idx] = schq;
992 }
993 }
994 goto exit;
995err:
996 rc = NIX_AF_ERR_TLX_ALLOC_FAIL;
997exit:
998 spin_unlock(&rvu->rsrc_lock);
999 return rc;
1000}
1001
1002static int nix_txschq_free(struct rvu *rvu, u16 pcifunc)
1003{
1004 int blkaddr, nixlf, lvl, schq, err;
1005 struct rvu_hwinfo *hw = rvu->hw;
1006 struct nix_txsch *txsch;
1007 struct nix_hw *nix_hw;
1008 u64 cfg;
1009
1010 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1011 if (blkaddr < 0)
1012 return NIX_AF_ERR_AF_LF_INVALID;
1013
1014 nix_hw = get_nix_hw(rvu->hw, blkaddr);
1015 if (!nix_hw)
1016 return -EINVAL;
1017
1018 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1019 if (nixlf < 0)
1020 return NIX_AF_ERR_AF_LF_INVALID;
1021
1022 /* Disable TL2/3 queue links before SMQ flush*/
1023 spin_lock(&rvu->rsrc_lock);
1024 for (lvl = NIX_TXSCH_LVL_TL4; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
1025 if (lvl != NIX_TXSCH_LVL_TL2 && lvl != NIX_TXSCH_LVL_TL4)
1026 continue;
1027
1028 txsch = &nix_hw->txsch[lvl];
1029 for (schq = 0; schq < txsch->schq.max; schq++) {
1030 if (txsch->pfvf_map[schq] != pcifunc)
1031 continue;
1032 nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);
1033 }
1034 }
1035
1036 /* Flush SMQs */
1037 txsch = &nix_hw->txsch[NIX_TXSCH_LVL_SMQ];
1038 for (schq = 0; schq < txsch->schq.max; schq++) {
1039 if (txsch->pfvf_map[schq] != pcifunc)
1040 continue;
1041 cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(schq));
1042 /* Do SMQ flush and set enqueue xoff */
1043 cfg |= BIT_ULL(50) | BIT_ULL(49);
1044 rvu_write64(rvu, blkaddr, NIX_AF_SMQX_CFG(schq), cfg);
1045
1046 /* Wait for flush to complete */
1047 err = rvu_poll_reg(rvu, blkaddr,
1048 NIX_AF_SMQX_CFG(schq), BIT_ULL(49), true);
1049 if (err) {
1050 dev_err(rvu->dev,
1051 "NIXLF%d: SMQ%d flush failed\n", nixlf, schq);
1052 }
1053 }
1054
1055 /* Now free scheduler queues to free pool */
1056 for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
1057 txsch = &nix_hw->txsch[lvl];
1058 for (schq = 0; schq < txsch->schq.max; schq++) {
1059 if (txsch->pfvf_map[schq] != pcifunc)
1060 continue;
1061 rvu_free_rsrc(&txsch->schq, schq);
1062 txsch->pfvf_map[schq] = 0;
1063 }
1064 }
1065 spin_unlock(&rvu->rsrc_lock);
1066
1067 /* Sync cached info for this LF in NDC-TX to LLC/DRAM */
1068 rvu_write64(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12) | nixlf);
1069 err = rvu_poll_reg(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12), true);
1070 if (err)
1071 dev_err(rvu->dev, "NDC-TX sync failed for NIXLF %d\n", nixlf);
1072
1073 return 0;
1074}
1075
1076int rvu_mbox_handler_NIX_TXSCH_FREE(struct rvu *rvu,
1077 struct nix_txsch_free_req *req,
1078 struct msg_rsp *rsp)
1079{
1080 return nix_txschq_free(rvu, req->hdr.pcifunc);
1081}
1082
1083static bool is_txschq_config_valid(struct rvu *rvu, u16 pcifunc, int blkaddr,
1084 int lvl, u64 reg, u64 regval)
1085{
1086 u64 regbase = reg & 0xFFFF;
1087 u16 schq, parent;
1088
1089 if (!rvu_check_valid_reg(TXSCHQ_HWREGMAP, lvl, reg))
1090 return false;
1091
1092 schq = TXSCHQ_IDX(reg, TXSCHQ_IDX_SHIFT);
1093 /* Check if this schq belongs to this PF/VF or not */
1094 if (!is_valid_txschq(rvu, blkaddr, lvl, pcifunc, schq))
1095 return false;
1096
1097 parent = (regval >> 16) & 0x1FF;
1098 /* Validate MDQ's TL4 parent */
1099 if (regbase == NIX_AF_MDQX_PARENT(0) &&
1100 !is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL4, pcifunc, parent))
1101 return false;
1102
1103 /* Validate TL4's TL3 parent */
1104 if (regbase == NIX_AF_TL4X_PARENT(0) &&
1105 !is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL3, pcifunc, parent))
1106 return false;
1107
1108 /* Validate TL3's TL2 parent */
1109 if (regbase == NIX_AF_TL3X_PARENT(0) &&
1110 !is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL2, pcifunc, parent))
1111 return false;
1112
1113 /* Validate TL2's TL1 parent */
1114 if (regbase == NIX_AF_TL2X_PARENT(0) &&
1115 !is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL1, pcifunc, parent))
1116 return false;
1117
1118 return true;
1119}
1120
1121int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu,
1122 struct nix_txschq_config *req,
1123 struct msg_rsp *rsp)
1124{
1125 struct rvu_hwinfo *hw = rvu->hw;
1126 u16 pcifunc = req->hdr.pcifunc;
1127 u64 reg, regval, schq_regbase;
1128 struct nix_txsch *txsch;
1129 struct nix_hw *nix_hw;
1130 int blkaddr, idx, err;
1131 int nixlf;
1132
1133 if (req->lvl >= NIX_TXSCH_LVL_CNT ||
1134 req->num_regs > MAX_REGS_PER_MBOX_MSG)
1135 return NIX_AF_INVAL_TXSCHQ_CFG;
1136
1137 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1138 if (blkaddr < 0)
1139 return NIX_AF_ERR_AF_LF_INVALID;
1140
1141 nix_hw = get_nix_hw(rvu->hw, blkaddr);
1142 if (!nix_hw)
1143 return -EINVAL;
1144
1145 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1146 if (nixlf < 0)
1147 return NIX_AF_ERR_AF_LF_INVALID;
1148
1149 txsch = &nix_hw->txsch[req->lvl];
1150 for (idx = 0; idx < req->num_regs; idx++) {
1151 reg = req->reg[idx];
1152 regval = req->regval[idx];
1153 schq_regbase = reg & 0xFFFF;
1154
1155 if (!is_txschq_config_valid(rvu, pcifunc, blkaddr,
1156 txsch->lvl, reg, regval))
1157 return NIX_AF_INVAL_TXSCHQ_CFG;
1158
1159 /* Replace PF/VF visible NIXLF slot with HW NIXLF id */
1160 if (schq_regbase == NIX_AF_SMQX_CFG(0)) {
1161 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],
1162 pcifunc, 0);
1163 regval &= ~(0x7FULL << 24);
1164 regval |= ((u64)nixlf << 24);
1165 }
1166
1167 rvu_write64(rvu, blkaddr, reg, regval);
1168
1169 /* Check for SMQ flush, if so, poll for its completion */
1170 if (schq_regbase == NIX_AF_SMQX_CFG(0) &&
1171 (regval & BIT_ULL(49))) {
1172 err = rvu_poll_reg(rvu, blkaddr,
1173 reg, BIT_ULL(49), true);
1174 if (err)
1175 return NIX_AF_SMQ_FLUSH_FAILED;
1176 }
1177 }
1178 return 0;
1179}
1180
1181static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf, int blkaddr,
1182 struct nix_vtag_config *req)
1183{
1184 u64 regval = 0;
1185
1186#define NIX_VTAGTYPE_MAX 0x8ull
1187#define NIX_VTAGSIZE_MASK 0x7ull
1188#define NIX_VTAGSTRIP_CAP_MASK 0x30ull
1189
1190 if (req->rx.vtag_type >= NIX_VTAGTYPE_MAX ||
1191 req->vtag_size > VTAGSIZE_T8)
1192 return -EINVAL;
1193
1194 regval = rvu_read64(rvu, blkaddr,
1195 NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, req->rx.vtag_type));
1196
1197 if (req->rx.strip_vtag && req->rx.capture_vtag)
1198 regval |= BIT_ULL(4) | BIT_ULL(5);
1199 else if (req->rx.strip_vtag)
1200 regval |= BIT_ULL(4);
1201 else
1202 regval &= ~(BIT_ULL(4) | BIT_ULL(5));
1203
1204 regval &= ~NIX_VTAGSIZE_MASK;
1205 regval |= req->vtag_size & NIX_VTAGSIZE_MASK;
1206
1207 rvu_write64(rvu, blkaddr,
1208 NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, req->rx.vtag_type), regval);
1209 return 0;
1210}
1211
1212int rvu_mbox_handler_NIX_VTAG_CFG(struct rvu *rvu,
1213 struct nix_vtag_config *req,
1214 struct msg_rsp *rsp)
1215{
1216 struct rvu_hwinfo *hw = rvu->hw;
1217 u16 pcifunc = req->hdr.pcifunc;
1218 int blkaddr, nixlf, err;
1219
1220 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1221 if (blkaddr < 0)
1222 return NIX_AF_ERR_AF_LF_INVALID;
1223
1224 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1225 if (nixlf < 0)
1226 return NIX_AF_ERR_AF_LF_INVALID;
1227
1228 if (req->cfg_type) {
1229 err = nix_rx_vtag_cfg(rvu, nixlf, blkaddr, req);
1230 if (err)
1231 return NIX_AF_ERR_PARAM;
1232 } else {
1233 /* TODO: handle tx vtag configuration */
1234 return 0;
1235 }
1236
1237 return 0;
1238}
1239
1240static int nix_setup_mce(struct rvu *rvu, int mce, u8 op,
1241 u16 pcifunc, int next, bool eol)
1242{
1243 struct nix_aq_enq_req aq_req;
1244 int err;
1245
1246 aq_req.hdr.pcifunc = pcifunc;
1247 aq_req.ctype = NIX_AQ_CTYPE_MCE;
1248 aq_req.op = op;
1249 aq_req.qidx = mce;
1250
1251 /* Forward bcast pkts to RQ0, RSS not needed */
1252 aq_req.mce.op = 0;
1253 aq_req.mce.index = 0;
1254 aq_req.mce.eol = eol;
1255 aq_req.mce.pf_func = pcifunc;
1256 aq_req.mce.next = next;
1257
1258 /* All fields valid */
1259 *(u64 *)(&aq_req.mce_mask) = ~0ULL;
1260
1261 err = rvu_nix_aq_enq_inst(rvu, &aq_req, NULL);
1262 if (err) {
1263 dev_err(rvu->dev, "Failed to setup Bcast MCE for PF%d:VF%d\n",
1264 rvu_get_pf(pcifunc), pcifunc & RVU_PFVF_FUNC_MASK);
1265 return err;
1266 }
1267 return 0;
1268}
1269
1270static int nix_update_mce_list(struct nix_mce_list *mce_list,
1271 u16 pcifunc, int idx, bool add)
1272{
1273 struct mce *mce, *tail = NULL;
1274 bool delete = false;
1275
1276 /* Scan through the current list */
1277 hlist_for_each_entry(mce, &mce_list->head, node) {
1278 /* If already exists, then delete */
1279 if (mce->pcifunc == pcifunc && !add) {
1280 delete = true;
1281 break;
1282 }
1283 tail = mce;
1284 }
1285
1286 if (delete) {
1287 hlist_del(&mce->node);
1288 kfree(mce);
1289 mce_list->count--;
1290 return 0;
1291 }
1292
1293 if (!add)
1294 return 0;
1295
1296 /* Add a new one to the list, at the tail */
1297 mce = kzalloc(sizeof(*mce), GFP_KERNEL);
1298 if (!mce)
1299 return -ENOMEM;
1300 mce->idx = idx;
1301 mce->pcifunc = pcifunc;
1302 if (!tail)
1303 hlist_add_head(&mce->node, &mce_list->head);
1304 else
1305 hlist_add_behind(&mce->node, &tail->node);
1306 mce_list->count++;
1307 return 0;
1308}
1309
1310static int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add)
1311{
1312 int err = 0, idx, next_idx, count;
1313 struct nix_mce_list *mce_list;
1314 struct mce *mce, *next_mce;
1315 struct nix_mcast *mcast;
1316 struct nix_hw *nix_hw;
1317 struct rvu_pfvf *pfvf;
1318 int blkaddr;
1319
1320 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1321 if (blkaddr < 0)
1322 return 0;
1323
1324 nix_hw = get_nix_hw(rvu->hw, blkaddr);
1325 if (!nix_hw)
1326 return 0;
1327
1328 mcast = &nix_hw->mcast;
1329
1330 /* Get this PF/VF func's MCE index */
1331 pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);
1332 idx = pfvf->bcast_mce_idx + (pcifunc & RVU_PFVF_FUNC_MASK);
1333
1334 mce_list = &pfvf->bcast_mce_list;
1335 if (idx > (pfvf->bcast_mce_idx + mce_list->max)) {
1336 dev_err(rvu->dev,
1337 "%s: Idx %d > max MCE idx %d, for PF%d bcast list\n",
1338 __func__, idx, mce_list->max,
1339 pcifunc >> RVU_PFVF_PF_SHIFT);
1340 return -EINVAL;
1341 }
1342
1343 spin_lock(&mcast->mce_lock);
1344
1345 err = nix_update_mce_list(mce_list, pcifunc, idx, add);
1346 if (err)
1347 goto end;
1348
1349 /* Disable MCAM entry in NPC */
1350
1351 if (!mce_list->count)
1352 goto end;
1353 count = mce_list->count;
1354
1355 /* Dump the updated list to HW */
1356 hlist_for_each_entry(mce, &mce_list->head, node) {
1357 next_idx = 0;
1358 count--;
1359 if (count) {
1360 next_mce = hlist_entry(mce->node.next,
1361 struct mce, node);
1362 next_idx = next_mce->idx;
1363 }
1364 /* EOL should be set in last MCE */
1365 err = nix_setup_mce(rvu, mce->idx,
1366 NIX_AQ_INSTOP_WRITE, mce->pcifunc,
1367 next_idx, count ? false : true);
1368 if (err)
1369 goto end;
1370 }
1371
1372end:
1373 spin_unlock(&mcast->mce_lock);
1374 return err;
1375}
1376
1377static int nix_setup_bcast_tables(struct rvu *rvu, struct nix_hw *nix_hw)
1378{
1379 struct nix_mcast *mcast = &nix_hw->mcast;
1380 int err, pf, numvfs, idx;
1381 struct rvu_pfvf *pfvf;
1382 u16 pcifunc;
1383 u64 cfg;
1384
1385 /* Skip PF0 (i.e AF) */
1386 for (pf = 1; pf < (rvu->cgx_mapped_pfs + 1); pf++) {
1387 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));
1388 /* If PF is not enabled, nothing to do */
1389 if (!((cfg >> 20) & 0x01))
1390 continue;
1391 /* Get numVFs attached to this PF */
1392 numvfs = (cfg >> 12) & 0xFF;
1393
1394 pfvf = &rvu->pf[pf];
1395 /* Save the start MCE */
1396 pfvf->bcast_mce_idx = nix_alloc_mce_list(mcast, numvfs + 1);
1397
1398 nix_mce_list_init(&pfvf->bcast_mce_list, numvfs + 1);
1399
1400 for (idx = 0; idx < (numvfs + 1); idx++) {
1401 /* idx-0 is for PF, followed by VFs */
1402 pcifunc = (pf << RVU_PFVF_PF_SHIFT);
1403 pcifunc |= idx;
1404 /* Add dummy entries now, so that we don't have to check
1405 * for whether AQ_OP should be INIT/WRITE later on.
1406 * Will be updated when a NIXLF is attached/detached to
1407 * these PF/VFs.
1408 */
1409 err = nix_setup_mce(rvu, pfvf->bcast_mce_idx + idx,
1410 NIX_AQ_INSTOP_INIT,
1411 pcifunc, 0, true);
1412 if (err)
1413 return err;
1414 }
1415 }
1416 return 0;
1417}
1418
1419static int nix_setup_mcast(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
1420{
1421 struct nix_mcast *mcast = &nix_hw->mcast;
1422 struct rvu_hwinfo *hw = rvu->hw;
1423 int err, size;
1424
1425 size = (rvu_read64(rvu, blkaddr, NIX_AF_CONST3) >> 16) & 0x0F;
1426 size = (1ULL << size);
1427
1428 /* Alloc memory for multicast/mirror replication entries */
1429 err = qmem_alloc(rvu->dev, &mcast->mce_ctx,
1430 (256UL << MC_TBL_SIZE), size);
1431 if (err)
1432 return -ENOMEM;
1433
1434 rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BASE,
1435 (u64)mcast->mce_ctx->iova);
1436
1437 /* Set max list length equal to max no of VFs per PF + PF itself */
1438 rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_CFG,
1439 BIT_ULL(36) | (hw->max_vfs_per_pf << 4) | MC_TBL_SIZE);
1440
1441 /* Alloc memory for multicast replication buffers */
1442 size = rvu_read64(rvu, blkaddr, NIX_AF_MC_MIRROR_CONST) & 0xFFFF;
1443 err = qmem_alloc(rvu->dev, &mcast->mcast_buf,
1444 (8UL << MC_BUF_CNT), size);
1445 if (err)
1446 return -ENOMEM;
1447
1448 rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BUF_BASE,
1449 (u64)mcast->mcast_buf->iova);
1450
1451 /* Alloc pkind for NIX internal RX multicast/mirror replay */
1452 mcast->replay_pkind = rvu_alloc_rsrc(&hw->pkind.rsrc);
1453
1454 rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BUF_CFG,
1455 BIT_ULL(63) | (mcast->replay_pkind << 24) |
1456 BIT_ULL(20) | MC_BUF_CNT);
1457
1458 spin_lock_init(&mcast->mce_lock);
1459
1460 return nix_setup_bcast_tables(rvu, nix_hw);
1461}
1462
692static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr) 1463static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
693{ 1464{
694 struct nix_txsch *txsch; 1465 struct nix_txsch *txsch;
@@ -735,6 +1506,278 @@ static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
735 return 0; 1506 return 0;
736} 1507}
737 1508
1509int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,
1510 struct msg_rsp *rsp)
1511{
1512 struct rvu_hwinfo *hw = rvu->hw;
1513 u16 pcifunc = req->hdr.pcifunc;
1514 int i, nixlf, blkaddr;
1515 u64 stats;
1516
1517 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1518 if (blkaddr < 0)
1519 return NIX_AF_ERR_AF_LF_INVALID;
1520
1521 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1522 if (nixlf < 0)
1523 return NIX_AF_ERR_AF_LF_INVALID;
1524
1525 /* Get stats count supported by HW */
1526 stats = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
1527
1528 /* Reset tx stats */
1529 for (i = 0; i < ((stats >> 24) & 0xFF); i++)
1530 rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, i), 0);
1531
1532 /* Reset rx stats */
1533 for (i = 0; i < ((stats >> 32) & 0xFF); i++)
1534 rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, i), 0);
1535
1536 return 0;
1537}
1538
1539/* Returns the ALG index to be set into NPC_RX_ACTION */
1540static int get_flowkey_alg_idx(u32 flow_cfg)
1541{
1542 u32 ip_cfg;
1543
1544 flow_cfg &= ~FLOW_KEY_TYPE_PORT;
1545 ip_cfg = FLOW_KEY_TYPE_IPV4 | FLOW_KEY_TYPE_IPV6;
1546 if (flow_cfg == ip_cfg)
1547 return FLOW_KEY_ALG_IP;
1548 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_TCP))
1549 return FLOW_KEY_ALG_TCP;
1550 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_UDP))
1551 return FLOW_KEY_ALG_UDP;
1552 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_SCTP))
1553 return FLOW_KEY_ALG_SCTP;
1554 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_TCP | FLOW_KEY_TYPE_UDP))
1555 return FLOW_KEY_ALG_TCP_UDP;
1556 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_TCP | FLOW_KEY_TYPE_SCTP))
1557 return FLOW_KEY_ALG_TCP_SCTP;
1558 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_UDP | FLOW_KEY_TYPE_SCTP))
1559 return FLOW_KEY_ALG_UDP_SCTP;
1560 else if (flow_cfg == (ip_cfg | FLOW_KEY_TYPE_TCP |
1561 FLOW_KEY_TYPE_UDP | FLOW_KEY_TYPE_SCTP))
1562 return FLOW_KEY_ALG_TCP_UDP_SCTP;
1563
1564 return FLOW_KEY_ALG_PORT;
1565}
1566
1567int rvu_mbox_handler_NIX_RSS_FLOWKEY_CFG(struct rvu *rvu,
1568 struct nix_rss_flowkey_cfg *req,
1569 struct msg_rsp *rsp)
1570{
1571 struct rvu_hwinfo *hw = rvu->hw;
1572 u16 pcifunc = req->hdr.pcifunc;
1573 int alg_idx, nixlf, blkaddr;
1574
1575 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1576 if (blkaddr < 0)
1577 return NIX_AF_ERR_AF_LF_INVALID;
1578
1579 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1580 if (nixlf < 0)
1581 return NIX_AF_ERR_AF_LF_INVALID;
1582
1583 alg_idx = get_flowkey_alg_idx(req->flowkey_cfg);
1584
1585 rvu_npc_update_flowkey_alg_idx(rvu, pcifunc, nixlf, req->group,
1586 alg_idx, req->mcam_index);
1587 return 0;
1588}
1589
1590static void set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg)
1591{
1592 struct nix_rx_flowkey_alg *field = NULL;
1593 int idx, key_type;
1594
1595 if (!alg)
1596 return;
1597
1598 /* FIELD0: IPv4
1599 * FIELD1: IPv6
1600 * FIELD2: TCP/UDP/SCTP/ALL
1601 * FIELD3: Unused
1602 * FIELD4: Unused
1603 *
1604 * Each of the 32 possible flow key algorithm definitions should
1605 * fall into above incremental config (except ALG0). Otherwise a
1606 * single NPC MCAM entry is not sufficient for supporting RSS.
1607 *
1608 * If a different definition or combination needed then NPC MCAM
1609 * has to be programmed to filter such pkts and it's action should
1610 * point to this definition to calculate flowtag or hash.
1611 */
1612 for (idx = 0; idx < 32; idx++) {
1613 key_type = flow_cfg & BIT_ULL(idx);
1614 if (!key_type)
1615 continue;
1616 switch (key_type) {
1617 case FLOW_KEY_TYPE_PORT:
1618 field = &alg[0];
1619 field->sel_chan = true;
1620 /* This should be set to 1, when SEL_CHAN is set */
1621 field->bytesm1 = 1;
1622 break;
1623 case FLOW_KEY_TYPE_IPV4:
1624 field = &alg[0];
1625 field->lid = NPC_LID_LC;
1626 field->ltype_match = NPC_LT_LC_IP;
1627 field->hdr_offset = 12; /* SIP offset */
1628 field->bytesm1 = 7; /* SIP + DIP, 8 bytes */
1629 field->ltype_mask = 0xF; /* Match only IPv4 */
1630 break;
1631 case FLOW_KEY_TYPE_IPV6:
1632 field = &alg[1];
1633 field->lid = NPC_LID_LC;
1634 field->ltype_match = NPC_LT_LC_IP6;
1635 field->hdr_offset = 8; /* SIP offset */
1636 field->bytesm1 = 31; /* SIP + DIP, 32 bytes */
1637 field->ltype_mask = 0xF; /* Match only IPv6 */
1638 break;
1639 case FLOW_KEY_TYPE_TCP:
1640 case FLOW_KEY_TYPE_UDP:
1641 case FLOW_KEY_TYPE_SCTP:
1642 field = &alg[2];
1643 field->lid = NPC_LID_LD;
1644 field->bytesm1 = 3; /* Sport + Dport, 4 bytes */
1645 if (key_type == FLOW_KEY_TYPE_TCP)
1646 field->ltype_match |= NPC_LT_LD_TCP;
1647 else if (key_type == FLOW_KEY_TYPE_UDP)
1648 field->ltype_match |= NPC_LT_LD_UDP;
1649 else if (key_type == FLOW_KEY_TYPE_SCTP)
1650 field->ltype_match |= NPC_LT_LD_SCTP;
1651 field->key_offset = 32; /* After IPv4/v6 SIP, DIP */
1652 field->ltype_mask = ~field->ltype_match;
1653 break;
1654 }
1655 if (field)
1656 field->ena = 1;
1657 field = NULL;
1658 }
1659}
1660
1661static void nix_rx_flowkey_alg_cfg(struct rvu *rvu, int blkaddr)
1662{
1663#define FIELDS_PER_ALG 5
1664 u64 field[FLOW_KEY_ALG_MAX][FIELDS_PER_ALG];
1665 u32 flowkey_cfg, minkey_cfg;
1666 int alg, fid;
1667
1668 memset(&field, 0, sizeof(u64) * FLOW_KEY_ALG_MAX * FIELDS_PER_ALG);
1669
1670 /* Only incoming channel number */
1671 flowkey_cfg = FLOW_KEY_TYPE_PORT;
1672 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_PORT], flowkey_cfg);
1673
1674 /* For a incoming pkt if none of the fields match then flowkey
1675 * will be zero, hence tag generated will also be zero.
1676 * RSS entry at rsse_index = NIX_AF_LF()_RSS_GRP()[OFFSET] will
1677 * be used to queue the packet.
1678 */
1679
1680 /* IPv4/IPv6 SIP/DIPs */
1681 flowkey_cfg = FLOW_KEY_TYPE_IPV4 | FLOW_KEY_TYPE_IPV6;
1682 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_IP], flowkey_cfg);
1683
1684 /* TCPv4/v6 4-tuple, SIP, DIP, Sport, Dport */
1685 minkey_cfg = flowkey_cfg;
1686 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_TCP;
1687 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_TCP], flowkey_cfg);
1688
1689 /* UDPv4/v6 4-tuple, SIP, DIP, Sport, Dport */
1690 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_UDP;
1691 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_UDP], flowkey_cfg);
1692
1693 /* SCTPv4/v6 4-tuple, SIP, DIP, Sport, Dport */
1694 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_SCTP;
1695 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_SCTP], flowkey_cfg);
1696
1697 /* TCP/UDP v4/v6 4-tuple, rest IP pkts 2-tuple */
1698 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_TCP | FLOW_KEY_TYPE_UDP;
1699 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_TCP_UDP], flowkey_cfg);
1700
1701 /* TCP/SCTP v4/v6 4-tuple, rest IP pkts 2-tuple */
1702 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_TCP | FLOW_KEY_TYPE_SCTP;
1703 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_TCP_SCTP], flowkey_cfg);
1704
1705 /* UDP/SCTP v4/v6 4-tuple, rest IP pkts 2-tuple */
1706 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_UDP | FLOW_KEY_TYPE_SCTP;
1707 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_UDP_SCTP], flowkey_cfg);
1708
1709 /* TCP/UDP/SCTP v4/v6 4-tuple, rest IP pkts 2-tuple */
1710 flowkey_cfg = minkey_cfg | FLOW_KEY_TYPE_TCP |
1711 FLOW_KEY_TYPE_UDP | FLOW_KEY_TYPE_SCTP;
1712 set_flowkey_fields((void *)&field[FLOW_KEY_ALG_TCP_UDP_SCTP],
1713 flowkey_cfg);
1714
1715 for (alg = 0; alg < FLOW_KEY_ALG_MAX; alg++) {
1716 for (fid = 0; fid < FIELDS_PER_ALG; fid++)
1717 rvu_write64(rvu, blkaddr,
1718 NIX_AF_RX_FLOW_KEY_ALGX_FIELDX(alg, fid),
1719 field[alg][fid]);
1720 }
1721}
1722
1723int rvu_mbox_handler_NIX_SET_MAC_ADDR(struct rvu *rvu,
1724 struct nix_set_mac_addr *req,
1725 struct msg_rsp *rsp)
1726{
1727 struct rvu_hwinfo *hw = rvu->hw;
1728 u16 pcifunc = req->hdr.pcifunc;
1729 struct rvu_pfvf *pfvf;
1730 int blkaddr, nixlf;
1731
1732 pfvf = rvu_get_pfvf(rvu, pcifunc);
1733 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1734 if (!pfvf->nixlf || blkaddr < 0)
1735 return NIX_AF_ERR_AF_LF_INVALID;
1736
1737 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1738 if (nixlf < 0)
1739 return NIX_AF_ERR_AF_LF_INVALID;
1740
1741 ether_addr_copy(pfvf->mac_addr, req->mac_addr);
1742
1743 rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,
1744 pfvf->rx_chan_base, req->mac_addr);
1745 return 0;
1746}
1747
1748int rvu_mbox_handler_NIX_SET_RX_MODE(struct rvu *rvu, struct nix_rx_mode *req,
1749 struct msg_rsp *rsp)
1750{
1751 bool allmulti = false, disable_promisc = false;
1752 struct rvu_hwinfo *hw = rvu->hw;
1753 u16 pcifunc = req->hdr.pcifunc;
1754 struct rvu_pfvf *pfvf;
1755 int blkaddr, nixlf;
1756
1757 pfvf = rvu_get_pfvf(rvu, pcifunc);
1758 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
1759 if (!pfvf->nixlf || blkaddr < 0)
1760 return NIX_AF_ERR_AF_LF_INVALID;
1761
1762 nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
1763 if (nixlf < 0)
1764 return NIX_AF_ERR_AF_LF_INVALID;
1765
1766 if (req->mode & NIX_RX_MODE_PROMISC)
1767 allmulti = false;
1768 else if (req->mode & NIX_RX_MODE_ALLMULTI)
1769 allmulti = true;
1770 else
1771 disable_promisc = true;
1772
1773 if (disable_promisc)
1774 rvu_npc_disable_promisc_entry(rvu, pcifunc, nixlf);
1775 else
1776 rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,
1777 pfvf->rx_chan_base, allmulti);
1778 return 0;
1779}
1780
738static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr) 1781static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr)
739{ 1782{
740 int idx, err; 1783 int idx, err;
@@ -860,6 +1903,25 @@ int rvu_nix_init(struct rvu *rvu)
860 err = nix_setup_txschq(rvu, hw->nix0, blkaddr); 1903 err = nix_setup_txschq(rvu, hw->nix0, blkaddr);
861 if (err) 1904 if (err)
862 return err; 1905 return err;
1906
1907 err = nix_setup_mcast(rvu, hw->nix0, blkaddr);
1908 if (err)
1909 return err;
1910
1911 /* Config Outer L2, IP, TCP and UDP's NPC layer info.
1912 * This helps HW protocol checker to identify headers
1913 * and validate length and checksums.
1914 */
1915 rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OL2,
1916 (NPC_LID_LA << 8) | (NPC_LT_LA_ETHER << 4) | 0x0F);
1917 rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OUDP,
1918 (NPC_LID_LD << 8) | (NPC_LT_LD_UDP << 4) | 0x0F);
1919 rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OTCP,
1920 (NPC_LID_LD << 8) | (NPC_LT_LD_TCP << 4) | 0x0F);
1921 rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4,
1922 (NPC_LID_LC << 8) | (NPC_LT_LC_IP << 4) | 0x0F);
1923
1924 nix_rx_flowkey_alg_cfg(rvu, blkaddr);
863 } 1925 }
864 return 0; 1926 return 0;
865} 1927}
@@ -869,6 +1931,7 @@ void rvu_nix_freemem(struct rvu *rvu)
869 struct rvu_hwinfo *hw = rvu->hw; 1931 struct rvu_hwinfo *hw = rvu->hw;
870 struct rvu_block *block; 1932 struct rvu_block *block;
871 struct nix_txsch *txsch; 1933 struct nix_txsch *txsch;
1934 struct nix_mcast *mcast;
872 struct nix_hw *nix_hw; 1935 struct nix_hw *nix_hw;
873 int blkaddr, lvl; 1936 int blkaddr, lvl;
874 1937
@@ -888,5 +1951,9 @@ void rvu_nix_freemem(struct rvu *rvu)
888 txsch = &nix_hw->txsch[lvl]; 1951 txsch = &nix_hw->txsch[lvl];
889 kfree(txsch->schq.bmap); 1952 kfree(txsch->schq.bmap);
890 } 1953 }
1954
1955 mcast = &nix_hw->mcast;
1956 qmem_free(rvu->dev, mcast->mce_ctx);
1957 qmem_free(rvu->dev, mcast->mcast_buf);
891 } 1958 }
892} 1959}
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
new file mode 100644
index 000000000000..23ff47f7efc5
--- /dev/null
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -0,0 +1,816 @@
1// SPDX-License-Identifier: GPL-2.0
2/* Marvell OcteonTx2 RVU Admin Function driver
3 *
4 * Copyright (C) 2018 Marvell International Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/pci.h>
13
14#include "rvu_struct.h"
15#include "rvu_reg.h"
16#include "rvu.h"
17#include "npc.h"
18#include "npc_profile.h"
19
20#define RSVD_MCAM_ENTRIES_PER_PF 2 /* Bcast & Promisc */
21#define RSVD_MCAM_ENTRIES_PER_NIXLF 1 /* Ucast for LFs */
22
23#define NIXLF_UCAST_ENTRY 0
24#define NIXLF_BCAST_ENTRY 1
25#define NIXLF_PROMISC_ENTRY 2
26
27#define NPC_PARSE_RESULT_DMAC_OFFSET 8
28
29struct mcam_entry {
30#define NPC_MAX_KWS_IN_KEY 7 /* Number of keywords in max keywidth */
31 u64 kw[NPC_MAX_KWS_IN_KEY];
32 u64 kw_mask[NPC_MAX_KWS_IN_KEY];
33 u64 action;
34 u64 vtag_action;
35};
36
37void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf)
38{
39 int blkaddr;
40 u64 val = 0;
41
42 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
43 if (blkaddr < 0)
44 return;
45
46 /* Config CPI base for the PKIND */
47 val = pkind | 1ULL << 62;
48 rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_CPI_DEFX(pkind, 0), val);
49}
50
51int rvu_npc_get_pkind(struct rvu *rvu, u16 pf)
52{
53 struct npc_pkind *pkind = &rvu->hw->pkind;
54 u32 map;
55 int i;
56
57 for (i = 0; i < pkind->rsrc.max; i++) {
58 map = pkind->pfchan_map[i];
59 if (((map >> 16) & 0x3F) == pf)
60 return i;
61 }
62 return -1;
63}
64
65static int npc_get_nixlf_mcam_index(struct npc_mcam *mcam,
66 u16 pcifunc, int nixlf, int type)
67{
68 int pf = rvu_get_pf(pcifunc);
69 int index;
70
71 /* Check if this is for a PF */
72 if (pf && !(pcifunc & RVU_PFVF_FUNC_MASK)) {
73 /* Reserved entries exclude PF0 */
74 pf--;
75 index = mcam->pf_offset + (pf * RSVD_MCAM_ENTRIES_PER_PF);
76 /* Broadcast address matching entry should be first so
77 * that the packet can be replicated to all VFs.
78 */
79 if (type == NIXLF_BCAST_ENTRY)
80 return index;
81 else if (type == NIXLF_PROMISC_ENTRY)
82 return index + 1;
83 }
84
85 return (mcam->nixlf_offset + (nixlf * RSVD_MCAM_ENTRIES_PER_NIXLF));
86}
87
88static int npc_get_bank(struct npc_mcam *mcam, int index)
89{
90 int bank = index / mcam->banksize;
91
92 /* 0,1 & 2,3 banks are combined for this keysize */
93 if (mcam->keysize == NPC_MCAM_KEY_X2)
94 return bank ? 2 : 0;
95
96 return bank;
97}
98
99static bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam,
100 int blkaddr, int index)
101{
102 int bank = npc_get_bank(mcam, index);
103 u64 cfg;
104
105 index &= (mcam->banksize - 1);
106 cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(index, bank));
107 return (cfg & 1);
108}
109
110static void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
111 int blkaddr, int index, bool enable)
112{
113 int bank = npc_get_bank(mcam, index);
114 int actbank = bank;
115
116 index &= (mcam->banksize - 1);
117 for (; bank < (actbank + mcam->banks_per_entry); bank++) {
118 rvu_write64(rvu, blkaddr,
119 NPC_AF_MCAMEX_BANKX_CFG(index, bank),
120 enable ? 1 : 0);
121 }
122}
123
124static void npc_get_keyword(struct mcam_entry *entry, int idx,
125 u64 *cam0, u64 *cam1)
126{
127 u64 kw_mask = 0x00;
128
129#define CAM_MASK(n) (BIT_ULL(n) - 1)
130
131 /* 0, 2, 4, 6 indices refer to BANKX_CAMX_W0 and
132 * 1, 3, 5, 7 indices refer to BANKX_CAMX_W1.
133 *
134 * Also, only 48 bits of BANKX_CAMX_W1 are valid.
135 */
136 switch (idx) {
137 case 0:
138 /* BANK(X)_CAM_W0<63:0> = MCAM_KEY[KW0]<63:0> */
139 *cam1 = entry->kw[0];
140 kw_mask = entry->kw_mask[0];
141 break;
142 case 1:
143 /* BANK(X)_CAM_W1<47:0> = MCAM_KEY[KW1]<47:0> */
144 *cam1 = entry->kw[1] & CAM_MASK(48);
145 kw_mask = entry->kw_mask[1] & CAM_MASK(48);
146 break;
147 case 2:
148 /* BANK(X + 1)_CAM_W0<15:0> = MCAM_KEY[KW1]<63:48>
149 * BANK(X + 1)_CAM_W0<63:16> = MCAM_KEY[KW2]<47:0>
150 */
151 *cam1 = (entry->kw[1] >> 48) & CAM_MASK(16);
152 *cam1 |= ((entry->kw[2] & CAM_MASK(48)) << 16);
153 kw_mask = (entry->kw_mask[1] >> 48) & CAM_MASK(16);
154 kw_mask |= ((entry->kw_mask[2] & CAM_MASK(48)) << 16);
155 break;
156 case 3:
157 /* BANK(X + 1)_CAM_W1<15:0> = MCAM_KEY[KW2]<63:48>
158 * BANK(X + 1)_CAM_W1<47:16> = MCAM_KEY[KW3]<31:0>
159 */
160 *cam1 = (entry->kw[2] >> 48) & CAM_MASK(16);
161 *cam1 |= ((entry->kw[3] & CAM_MASK(32)) << 16);
162 kw_mask = (entry->kw_mask[2] >> 48) & CAM_MASK(16);
163 kw_mask |= ((entry->kw_mask[3] & CAM_MASK(32)) << 16);
164 break;
165 case 4:
166 /* BANK(X + 2)_CAM_W0<31:0> = MCAM_KEY[KW3]<63:32>
167 * BANK(X + 2)_CAM_W0<63:32> = MCAM_KEY[KW4]<31:0>
168 */
169 *cam1 = (entry->kw[3] >> 32) & CAM_MASK(32);
170 *cam1 |= ((entry->kw[4] & CAM_MASK(32)) << 32);
171 kw_mask = (entry->kw_mask[3] >> 32) & CAM_MASK(32);
172 kw_mask |= ((entry->kw_mask[4] & CAM_MASK(32)) << 32);
173 break;
174 case 5:
175 /* BANK(X + 2)_CAM_W1<31:0> = MCAM_KEY[KW4]<63:32>
176 * BANK(X + 2)_CAM_W1<47:32> = MCAM_KEY[KW5]<15:0>
177 */
178 *cam1 = (entry->kw[4] >> 32) & CAM_MASK(32);
179 *cam1 |= ((entry->kw[5] & CAM_MASK(16)) << 32);
180 kw_mask = (entry->kw_mask[4] >> 32) & CAM_MASK(32);
181 kw_mask |= ((entry->kw_mask[5] & CAM_MASK(16)) << 32);
182 break;
183 case 6:
184 /* BANK(X + 3)_CAM_W0<47:0> = MCAM_KEY[KW5]<63:16>
185 * BANK(X + 3)_CAM_W0<63:48> = MCAM_KEY[KW6]<15:0>
186 */
187 *cam1 = (entry->kw[5] >> 16) & CAM_MASK(48);
188 *cam1 |= ((entry->kw[6] & CAM_MASK(16)) << 48);
189 kw_mask = (entry->kw_mask[5] >> 16) & CAM_MASK(48);
190 kw_mask |= ((entry->kw_mask[6] & CAM_MASK(16)) << 48);
191 break;
192 case 7:
193 /* BANK(X + 3)_CAM_W1<47:0> = MCAM_KEY[KW6]<63:16> */
194 *cam1 = (entry->kw[6] >> 16) & CAM_MASK(48);
195 kw_mask = (entry->kw_mask[6] >> 16) & CAM_MASK(48);
196 break;
197 }
198
199 *cam1 &= kw_mask;
200 *cam0 = ~*cam1 & kw_mask;
201}
202
203static void npc_config_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
204 int blkaddr, int index, u8 intf,
205 struct mcam_entry *entry, bool enable)
206{
207 int bank = npc_get_bank(mcam, index);
208 int kw = 0, actbank, actindex;
209 u64 cam0, cam1;
210
211 actbank = bank; /* Save bank id, to set action later on */
212 actindex = index;
213 index &= (mcam->banksize - 1);
214
215 /* CAM1 takes the comparison value and
216 * CAM0 specifies match for a bit in key being '0' or '1' or 'dontcare'.
217 * CAM1<n> = 0 & CAM0<n> = 1 => match if key<n> = 0
218 * CAM1<n> = 1 & CAM0<n> = 0 => match if key<n> = 1
219 * CAM1<n> = 0 & CAM0<n> = 0 => always match i.e dontcare.
220 */
221 for (; bank < (actbank + mcam->banks_per_entry); bank++, kw = kw + 2) {
222 /* Interface should be set in all banks */
223 rvu_write64(rvu, blkaddr,
224 NPC_AF_MCAMEX_BANKX_CAMX_INTF(index, bank, 1),
225 intf);
226 rvu_write64(rvu, blkaddr,
227 NPC_AF_MCAMEX_BANKX_CAMX_INTF(index, bank, 0),
228 ~intf & 0x3);
229
230 /* Set the match key */
231 npc_get_keyword(entry, kw, &cam0, &cam1);
232 rvu_write64(rvu, blkaddr,
233 NPC_AF_MCAMEX_BANKX_CAMX_W0(index, bank, 1), cam1);
234 rvu_write64(rvu, blkaddr,
235 NPC_AF_MCAMEX_BANKX_CAMX_W0(index, bank, 0), cam0);
236
237 npc_get_keyword(entry, kw + 1, &cam0, &cam1);
238 rvu_write64(rvu, blkaddr,
239 NPC_AF_MCAMEX_BANKX_CAMX_W1(index, bank, 1), cam1);
240 rvu_write64(rvu, blkaddr,
241 NPC_AF_MCAMEX_BANKX_CAMX_W1(index, bank, 0), cam0);
242 }
243
244 /* Set 'action' */
245 rvu_write64(rvu, blkaddr,
246 NPC_AF_MCAMEX_BANKX_ACTION(index, actbank), entry->action);
247
248 /* Set TAG 'action' */
249 rvu_write64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_TAG_ACT(index, actbank),
250 entry->vtag_action);
251
252 /* Enable the entry */
253 if (enable)
254 npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex, true);
255 else
256 npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex, false);
257}
258
259static u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
260 int blkaddr, int index)
261{
262 int bank = npc_get_bank(mcam, index);
263
264 index &= (mcam->banksize - 1);
265 return rvu_read64(rvu, blkaddr,
266 NPC_AF_MCAMEX_BANKX_ACTION(index, bank));
267}
268
269void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
270 int nixlf, u64 chan, u8 *mac_addr)
271{
272 struct npc_mcam *mcam = &rvu->hw->mcam;
273 struct mcam_entry entry = { {0} };
274 struct nix_rx_action action;
275 int blkaddr, index, kwi;
276 u64 mac = 0;
277
278 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
279 if (blkaddr < 0)
280 return;
281
282 for (index = ETH_ALEN - 1; index >= 0; index--)
283 mac |= ((u64)*mac_addr++) << (8 * index);
284
285 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
286 nixlf, NIXLF_UCAST_ENTRY);
287
288 /* Match ingress channel and DMAC */
289 entry.kw[0] = chan;
290 entry.kw_mask[0] = 0xFFFULL;
291
292 kwi = NPC_PARSE_RESULT_DMAC_OFFSET / sizeof(u64);
293 entry.kw[kwi] = mac;
294 entry.kw_mask[kwi] = BIT_ULL(48) - 1;
295
296 /* Don't change the action if entry is already enabled
297 * Otherwise RSS action may get overwritten.
298 */
299 if (is_mcam_entry_enabled(rvu, mcam, blkaddr, index)) {
300 *(u64 *)&action = npc_get_mcam_action(rvu, mcam,
301 blkaddr, index);
302 } else {
303 *(u64 *)&action = 0x00;
304 action.op = NIX_RX_ACTIONOP_UCAST;
305 action.pf_func = pcifunc;
306 }
307
308 entry.action = *(u64 *)&action;
309 npc_config_mcam_entry(rvu, mcam, blkaddr, index,
310 NIX_INTF_RX, &entry, true);
311}
312
313void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,
314 int nixlf, u64 chan, bool allmulti)
315{
316 struct npc_mcam *mcam = &rvu->hw->mcam;
317 struct mcam_entry entry = { {0} };
318 struct nix_rx_action action;
319 int blkaddr, index, kwi;
320
321 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
322 if (blkaddr < 0)
323 return;
324
325 /* Only PF or AF VF can add a promiscuous entry */
326 if (pcifunc & RVU_PFVF_FUNC_MASK)
327 return;
328
329 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
330 nixlf, NIXLF_PROMISC_ENTRY);
331
332 entry.kw[0] = chan;
333 entry.kw_mask[0] = 0xFFFULL;
334
335 if (allmulti) {
336 kwi = NPC_PARSE_RESULT_DMAC_OFFSET / sizeof(u64);
337 entry.kw[kwi] = BIT_ULL(40); /* LSB bit of 1st byte in DMAC */
338 entry.kw_mask[kwi] = BIT_ULL(40);
339 }
340
341 *(u64 *)&action = 0x00;
342 action.op = NIX_RX_ACTIONOP_UCAST;
343 action.pf_func = pcifunc;
344
345 entry.action = *(u64 *)&action;
346 npc_config_mcam_entry(rvu, mcam, blkaddr, index,
347 NIX_INTF_RX, &entry, true);
348}
349
350void rvu_npc_disable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf)
351{
352 struct npc_mcam *mcam = &rvu->hw->mcam;
353 int blkaddr, index;
354
355 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
356 if (blkaddr < 0)
357 return;
358
359 /* Only PF's have a promiscuous entry */
360 if (pcifunc & RVU_PFVF_FUNC_MASK)
361 return;
362
363 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
364 nixlf, NIXLF_PROMISC_ENTRY);
365 npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false);
366}
367
368void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
369 int nixlf, u64 chan)
370{
371 struct npc_mcam *mcam = &rvu->hw->mcam;
372 struct mcam_entry entry = { {0} };
373 struct nix_rx_action action;
374#ifdef MCAST_MCE
375 struct rvu_pfvf *pfvf;
376#endif
377 int blkaddr, index;
378
379 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
380 if (blkaddr < 0)
381 return;
382
383 /* Only PF can add a bcast match entry */
384 if (pcifunc & RVU_PFVF_FUNC_MASK)
385 return;
386#ifdef MCAST_MCE
387 pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);
388#endif
389
390 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
391 nixlf, NIXLF_BCAST_ENTRY);
392
393 /* Check for L2B bit and LMAC channel */
394 entry.kw[0] = BIT_ULL(25) | chan;
395 entry.kw_mask[0] = BIT_ULL(25) | 0xFFFULL;
396
397 *(u64 *)&action = 0x00;
398#ifdef MCAST_MCE
399 /* Early silicon doesn't support pkt replication,
400 * so install entry with UCAST action, so that PF
401 * receives all broadcast packets.
402 */
403 action.op = NIX_RX_ACTIONOP_MCAST;
404 action.pf_func = pcifunc;
405 action.index = pfvf->bcast_mce_idx;
406#else
407 action.op = NIX_RX_ACTIONOP_UCAST;
408 action.pf_func = pcifunc;
409#endif
410
411 entry.action = *(u64 *)&action;
412 npc_config_mcam_entry(rvu, mcam, blkaddr, index,
413 NIX_INTF_RX, &entry, true);
414}
415
416void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,
417 int group, int alg_idx, int mcam_index)
418{
419 struct npc_mcam *mcam = &rvu->hw->mcam;
420 struct nix_rx_action action;
421 int blkaddr, index, bank;
422
423 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
424 if (blkaddr < 0)
425 return;
426
427 /* Check if this is for reserved default entry */
428 if (mcam_index < 0) {
429 if (group != DEFAULT_RSS_CONTEXT_GROUP)
430 return;
431 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
432 nixlf, NIXLF_UCAST_ENTRY);
433 } else {
434 /* TODO: validate this mcam index */
435 index = mcam_index;
436 }
437
438 if (index >= mcam->total_entries)
439 return;
440
441 bank = npc_get_bank(mcam, index);
442 index &= (mcam->banksize - 1);
443
444 *(u64 *)&action = rvu_read64(rvu, blkaddr,
445 NPC_AF_MCAMEX_BANKX_ACTION(index, bank));
446 /* Ignore if no action was set earlier */
447 if (!*(u64 *)&action)
448 return;
449
450 action.op = NIX_RX_ACTIONOP_RSS;
451 action.pf_func = pcifunc;
452 action.index = group;
453 action.flow_key_alg = alg_idx;
454
455 rvu_write64(rvu, blkaddr,
456 NPC_AF_MCAMEX_BANKX_ACTION(index, bank), *(u64 *)&action);
457}
458
459void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
460{
461 struct npc_mcam *mcam = &rvu->hw->mcam;
462 struct nix_rx_action action;
463 int blkaddr, index, bank;
464
465 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
466 if (blkaddr < 0)
467 return;
468
469 /* Disable ucast MCAM match entry of this PF/VF */
470 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
471 nixlf, NIXLF_UCAST_ENTRY);
472 npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false);
473
474 /* For PF, disable promisc and bcast MCAM match entries */
475 if (!(pcifunc & RVU_PFVF_FUNC_MASK)) {
476 index = npc_get_nixlf_mcam_index(mcam, pcifunc,
477 nixlf, NIXLF_BCAST_ENTRY);
478 /* For bcast, disable only if it's action is not
479 * packet replication, incase if action is replication
480 * then this PF's nixlf is removed from bcast replication
481 * list.
482 */
483 bank = npc_get_bank(mcam, index);
484 index &= (mcam->banksize - 1);
485 *(u64 *)&action = rvu_read64(rvu, blkaddr,
486 NPC_AF_MCAMEX_BANKX_ACTION(index, bank));
487 if (action.op != NIX_RX_ACTIONOP_MCAST)
488 npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false);
489
490 rvu_npc_disable_promisc_entry(rvu, pcifunc, nixlf);
491 }
492}
493
494#define LDATA_EXTRACT_CONFIG(intf, lid, ltype, ld, cfg) \
495 rvu_write64(rvu, blkaddr, \
496 NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, ltype, ld), cfg)
497
498#define LDATA_FLAGS_CONFIG(intf, ld, flags, cfg) \
499 rvu_write64(rvu, blkaddr, \
500 NPC_AF_INTFX_LDATAX_FLAGSX_CFG(intf, ld, flags), cfg)
501
502static void npc_config_ldata_extract(struct rvu *rvu, int blkaddr)
503{
504 struct npc_mcam *mcam = &rvu->hw->mcam;
505 int lid, ltype;
506 int lid_count;
507 u64 cfg;
508
509 cfg = rvu_read64(rvu, blkaddr, NPC_AF_CONST);
510 lid_count = (cfg >> 4) & 0xF;
511
512 /* First clear any existing config i.e
513 * disable LDATA and FLAGS extraction.
514 */
515 for (lid = 0; lid < lid_count; lid++) {
516 for (ltype = 0; ltype < 16; ltype++) {
517 LDATA_EXTRACT_CONFIG(NIX_INTF_RX, lid, ltype, 0, 0ULL);
518 LDATA_EXTRACT_CONFIG(NIX_INTF_RX, lid, ltype, 1, 0ULL);
519 LDATA_EXTRACT_CONFIG(NIX_INTF_TX, lid, ltype, 0, 0ULL);
520 LDATA_EXTRACT_CONFIG(NIX_INTF_TX, lid, ltype, 1, 0ULL);
521
522 LDATA_FLAGS_CONFIG(NIX_INTF_RX, 0, ltype, 0ULL);
523 LDATA_FLAGS_CONFIG(NIX_INTF_RX, 1, ltype, 0ULL);
524 LDATA_FLAGS_CONFIG(NIX_INTF_TX, 0, ltype, 0ULL);
525 LDATA_FLAGS_CONFIG(NIX_INTF_TX, 1, ltype, 0ULL);
526 }
527 }
528
529 /* If we plan to extract Outer IPv4 tuple for TCP/UDP pkts
530 * then 112bit key is not sufficient
531 */
532 if (mcam->keysize != NPC_MCAM_KEY_X2)
533 return;
534
535 /* Start placing extracted data/flags from 64bit onwards, for now */
536 /* Extract DMAC from the packet */
537 cfg = (0x05 << 16) | BIT_ULL(7) | NPC_PARSE_RESULT_DMAC_OFFSET;
538 LDATA_EXTRACT_CONFIG(NIX_INTF_RX, NPC_LID_LA, NPC_LT_LA_ETHER, 0, cfg);
539}
540
541static void npc_config_kpuaction(struct rvu *rvu, int blkaddr,
542 struct npc_kpu_profile_action *kpuaction,
543 int kpu, int entry, bool pkind)
544{
545 struct npc_kpu_action0 action0 = {0};
546 struct npc_kpu_action1 action1 = {0};
547 u64 reg;
548
549 action1.errlev = kpuaction->errlev;
550 action1.errcode = kpuaction->errcode;
551 action1.dp0_offset = kpuaction->dp0_offset;
552 action1.dp1_offset = kpuaction->dp1_offset;
553 action1.dp2_offset = kpuaction->dp2_offset;
554
555 if (pkind)
556 reg = NPC_AF_PKINDX_ACTION1(entry);
557 else
558 reg = NPC_AF_KPUX_ENTRYX_ACTION1(kpu, entry);
559
560 rvu_write64(rvu, blkaddr, reg, *(u64 *)&action1);
561
562 action0.byp_count = kpuaction->bypass_count;
563 action0.capture_ena = kpuaction->cap_ena;
564 action0.parse_done = kpuaction->parse_done;
565 action0.next_state = kpuaction->next_state;
566 action0.capture_lid = kpuaction->lid;
567 action0.capture_ltype = kpuaction->ltype;
568 action0.capture_flags = kpuaction->flags;
569 action0.ptr_advance = kpuaction->ptr_advance;
570 action0.var_len_offset = kpuaction->offset;
571 action0.var_len_mask = kpuaction->mask;
572 action0.var_len_right = kpuaction->right;
573 action0.var_len_shift = kpuaction->shift;
574
575 if (pkind)
576 reg = NPC_AF_PKINDX_ACTION0(entry);
577 else
578 reg = NPC_AF_KPUX_ENTRYX_ACTION0(kpu, entry);
579
580 rvu_write64(rvu, blkaddr, reg, *(u64 *)&action0);
581}
582
583static void npc_config_kpucam(struct rvu *rvu, int blkaddr,
584 struct npc_kpu_profile_cam *kpucam,
585 int kpu, int entry)
586{
587 struct npc_kpu_cam cam0 = {0};
588 struct npc_kpu_cam cam1 = {0};
589
590 cam1.state = kpucam->state & kpucam->state_mask;
591 cam1.dp0_data = kpucam->dp0 & kpucam->dp0_mask;
592 cam1.dp1_data = kpucam->dp1 & kpucam->dp1_mask;
593 cam1.dp2_data = kpucam->dp2 & kpucam->dp2_mask;
594
595 cam0.state = ~kpucam->state & kpucam->state_mask;
596 cam0.dp0_data = ~kpucam->dp0 & kpucam->dp0_mask;
597 cam0.dp1_data = ~kpucam->dp1 & kpucam->dp1_mask;
598 cam0.dp2_data = ~kpucam->dp2 & kpucam->dp2_mask;
599
600 rvu_write64(rvu, blkaddr,
601 NPC_AF_KPUX_ENTRYX_CAMX(kpu, entry, 0), *(u64 *)&cam0);
602 rvu_write64(rvu, blkaddr,
603 NPC_AF_KPUX_ENTRYX_CAMX(kpu, entry, 1), *(u64 *)&cam1);
604}
605
606static inline u64 enable_mask(int count)
607{
608 return (((count) < 64) ? ~(BIT_ULL(count) - 1) : (0x00ULL));
609}
610
611static void npc_program_kpu_profile(struct rvu *rvu, int blkaddr, int kpu,
612 struct npc_kpu_profile *profile)
613{
614 int entry, num_entries, max_entries;
615
616 if (profile->cam_entries != profile->action_entries) {
617 dev_err(rvu->dev,
618 "KPU%d: CAM and action entries [%d != %d] not equal\n",
619 kpu, profile->cam_entries, profile->action_entries);
620 }
621
622 max_entries = rvu_read64(rvu, blkaddr, NPC_AF_CONST1) & 0xFFF;
623
624 /* Program CAM match entries for previous KPU extracted data */
625 num_entries = min_t(int, profile->cam_entries, max_entries);
626 for (entry = 0; entry < num_entries; entry++)
627 npc_config_kpucam(rvu, blkaddr,
628 &profile->cam[entry], kpu, entry);
629
630 /* Program this KPU's actions */
631 num_entries = min_t(int, profile->action_entries, max_entries);
632 for (entry = 0; entry < num_entries; entry++)
633 npc_config_kpuaction(rvu, blkaddr, &profile->action[entry],
634 kpu, entry, false);
635
636 /* Enable all programmed entries */
637 num_entries = min_t(int, profile->action_entries, profile->cam_entries);
638 rvu_write64(rvu, blkaddr,
639 NPC_AF_KPUX_ENTRY_DISX(kpu, 0), enable_mask(num_entries));
640 if (num_entries > 64) {
641 rvu_write64(rvu, blkaddr,
642 NPC_AF_KPUX_ENTRY_DISX(kpu, 1),
643 enable_mask(num_entries - 64));
644 }
645
646 /* Enable this KPU */
647 rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(kpu), 0x01);
648}
649
650static void npc_parser_profile_init(struct rvu *rvu, int blkaddr)
651{
652 struct rvu_hwinfo *hw = rvu->hw;
653 int num_pkinds, num_kpus, idx;
654 struct npc_pkind *pkind;
655
656 /* Get HW limits */
657 hw->npc_kpus = (rvu_read64(rvu, blkaddr, NPC_AF_CONST) >> 8) & 0x1F;
658
659 /* Disable all KPUs and their entries */
660 for (idx = 0; idx < hw->npc_kpus; idx++) {
661 rvu_write64(rvu, blkaddr,
662 NPC_AF_KPUX_ENTRY_DISX(idx, 0), ~0ULL);
663 rvu_write64(rvu, blkaddr,
664 NPC_AF_KPUX_ENTRY_DISX(idx, 1), ~0ULL);
665 rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(idx), 0x00);
666 }
667
668 /* First program IKPU profile i.e PKIND configs.
669 * Check HW max count to avoid configuring junk or
670 * writing to unsupported CSR addresses.
671 */
672 pkind = &hw->pkind;
673 num_pkinds = ARRAY_SIZE(ikpu_action_entries);
674 num_pkinds = min_t(int, pkind->rsrc.max, num_pkinds);
675
676 for (idx = 0; idx < num_pkinds; idx++)
677 npc_config_kpuaction(rvu, blkaddr,
678 &ikpu_action_entries[idx], 0, idx, true);
679
680 /* Program KPU CAM and Action profiles */
681 num_kpus = ARRAY_SIZE(npc_kpu_profiles);
682 num_kpus = min_t(int, hw->npc_kpus, num_kpus);
683
684 for (idx = 0; idx < num_kpus; idx++)
685 npc_program_kpu_profile(rvu, blkaddr,
686 idx, &npc_kpu_profiles[idx]);
687}
688
689static int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr)
690{
691 int nixlf_count = rvu_get_nixlf_count(rvu);
692 struct npc_mcam *mcam = &rvu->hw->mcam;
693 int rsvd;
694 u64 cfg;
695
696 /* Get HW limits */
697 cfg = rvu_read64(rvu, blkaddr, NPC_AF_CONST);
698 mcam->banks = (cfg >> 44) & 0xF;
699 mcam->banksize = (cfg >> 28) & 0xFFFF;
700
701 /* Actual number of MCAM entries vary by entry size */
702 cfg = (rvu_read64(rvu, blkaddr,
703 NPC_AF_INTFX_KEX_CFG(0)) >> 32) & 0x07;
704 mcam->total_entries = (mcam->banks / BIT_ULL(cfg)) * mcam->banksize;
705 mcam->keysize = cfg;
706
707 /* Number of banks combined per MCAM entry */
708 if (cfg == NPC_MCAM_KEY_X4)
709 mcam->banks_per_entry = 4;
710 else if (cfg == NPC_MCAM_KEY_X2)
711 mcam->banks_per_entry = 2;
712 else
713 mcam->banks_per_entry = 1;
714
715 /* Reserve one MCAM entry for each of the NIX LF to
716 * guarantee space to install default matching DMAC rule.
717 * Also reserve 2 MCAM entries for each PF for default
718 * channel based matching or 'bcast & promisc' matching to
719 * support BCAST and PROMISC modes of operation for PFs.
720 * PF0 is excluded.
721 */
722 rsvd = (nixlf_count * RSVD_MCAM_ENTRIES_PER_NIXLF) +
723 ((rvu->hw->total_pfs - 1) * RSVD_MCAM_ENTRIES_PER_PF);
724 if (mcam->total_entries <= rsvd) {
725 dev_warn(rvu->dev,
726 "Insufficient NPC MCAM size %d for pkt I/O, exiting\n",
727 mcam->total_entries);
728 return -ENOMEM;
729 }
730
731 mcam->entries = mcam->total_entries - rsvd;
732 mcam->nixlf_offset = mcam->entries;
733 mcam->pf_offset = mcam->nixlf_offset + nixlf_count;
734
735 spin_lock_init(&mcam->lock);
736
737 return 0;
738}
739
740int rvu_npc_init(struct rvu *rvu)
741{
742 struct npc_pkind *pkind = &rvu->hw->pkind;
743 u64 keyz = NPC_MCAM_KEY_X2;
744 int blkaddr, err;
745
746 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
747 if (blkaddr < 0) {
748 dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);
749 return -ENODEV;
750 }
751
752 /* Allocate resource bimap for pkind*/
753 pkind->rsrc.max = (rvu_read64(rvu, blkaddr,
754 NPC_AF_CONST1) >> 12) & 0xFF;
755 err = rvu_alloc_bitmap(&pkind->rsrc);
756 if (err)
757 return err;
758
759 /* Allocate mem for pkind to PF and channel mapping info */
760 pkind->pfchan_map = devm_kcalloc(rvu->dev, pkind->rsrc.max,
761 sizeof(u32), GFP_KERNEL);
762 if (!pkind->pfchan_map)
763 return -ENOMEM;
764
765 /* Configure KPU profile */
766 npc_parser_profile_init(rvu, blkaddr);
767
768 /* Config Outer L2, IPv4's NPC layer info */
769 rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_OL2,
770 (NPC_LID_LA << 8) | (NPC_LT_LA_ETHER << 4) | 0x0F);
771 rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_OIP4,
772 (NPC_LID_LC << 8) | (NPC_LT_LC_IP << 4) | 0x0F);
773
774 /* Enable below for Rx pkts.
775 * - Outer IPv4 header checksum validation.
776 * - Detect outer L2 broadcast address and set NPC_RESULT_S[L2M].
777 */
778 rvu_write64(rvu, blkaddr, NPC_AF_PCK_CFG,
779 rvu_read64(rvu, blkaddr, NPC_AF_PCK_CFG) |
780 BIT_ULL(6) | BIT_ULL(2));
781
782 /* Set RX and TX side MCAM search key size.
783 * Also enable parse key extract nibbles suchthat except
784 * layer E to H, rest of the key is included for MCAM search.
785 */
786 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX),
787 ((keyz & 0x3) << 32) | ((1ULL << 20) - 1));
788 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_TX),
789 ((keyz & 0x3) << 32) | ((1ULL << 20) - 1));
790
791 err = npc_mcam_rsrcs_init(rvu, blkaddr);
792 if (err)
793 return err;
794
795 /* Config packet data and flags extraction into PARSE result */
796 npc_config_ldata_extract(rvu, blkaddr);
797
798 /* Set TX miss action to UCAST_DEFAULT i.e
799 * transmit the packet on NIX LF SQ's default channel.
800 */
801 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_MISS_ACT(NIX_INTF_TX),
802 NIX_TX_ACTIONOP_UCAST_DEFAULT);
803
804 /* If MCAM lookup doesn't result in a match, drop the received packet */
805 rvu_write64(rvu, blkaddr, NPC_AF_INTFX_MISS_ACT(NIX_INTF_RX),
806 NIX_RX_ACTIONOP_DROP);
807
808 return 0;
809}
810
811void rvu_npc_freemem(struct rvu *rvu)
812{
813 struct npc_pkind *pkind = &rvu->hw->pkind;
814
815 kfree(pkind->rsrc.bmap);
816}
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c
new file mode 100644
index 000000000000..9d7c135c7965
--- /dev/null
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c
@@ -0,0 +1,71 @@
1// SPDX-License-Identifier: GPL-2.0
2/* Marvell OcteonTx2 RVU Admin Function driver
3 *
4 * Copyright (C) 2018 Marvell International Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/pci.h>
13
14#include "rvu_struct.h"
15#include "common.h"
16#include "mbox.h"
17#include "rvu.h"
18
19struct reg_range {
20 u64 start;
21 u64 end;
22};
23
24struct hw_reg_map {
25 u8 regblk;
26 u8 num_ranges;
27 u64 mask;
28#define MAX_REG_RANGES 8
29 struct reg_range range[MAX_REG_RANGES];
30};
31
32static struct hw_reg_map txsch_reg_map[NIX_TXSCH_LVL_CNT] = {
33 {NIX_TXSCH_LVL_SMQ, 2, 0xFFFF, {{0x0700, 0x0708}, {0x1400, 0x14C8} } },
34 {NIX_TXSCH_LVL_TL4, 3, 0xFFFF, {{0x0B00, 0x0B08}, {0x0B10, 0x0B18},
35 {0x1200, 0x12E0} } },
36 {NIX_TXSCH_LVL_TL3, 3, 0xFFFF, {{0x1000, 0x10E0}, {0x1600, 0x1608},
37 {0x1610, 0x1618} } },
38 {NIX_TXSCH_LVL_TL2, 2, 0xFFFF, {{0x0E00, 0x0EE0}, {0x1700, 0x1768} } },
39 {NIX_TXSCH_LVL_TL1, 1, 0xFFFF, {{0x0C00, 0x0D98} } },
40};
41
42bool rvu_check_valid_reg(int regmap, int regblk, u64 reg)
43{
44 int idx;
45 struct hw_reg_map *map;
46
47 /* Only 64bit offsets */
48 if (reg & 0x07)
49 return false;
50
51 if (regmap == TXSCHQ_HWREGMAP) {
52 if (regblk >= NIX_TXSCH_LVL_CNT)
53 return false;
54 map = &txsch_reg_map[regblk];
55 } else {
56 return false;
57 }
58
59 /* Should never happen */
60 if (map->regblk != regblk)
61 return false;
62
63 reg &= map->mask;
64
65 for (idx = 0; idx < map->num_ranges; idx++) {
66 if (reg >= map->range[idx].start &&
67 reg < map->range[idx].end)
68 return true;
69 }
70 return false;
71}
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
index d871a394e72b..09a8d61f3144 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
@@ -438,4 +438,65 @@
438#define NDC_AF_BLK_RST (0x002F0) 438#define NDC_AF_BLK_RST (0x002F0)
439#define NPC_AF_BLK_RST (0x00040) 439#define NPC_AF_BLK_RST (0x00040)
440 440
441/* NPC */
442#define NPC_AF_CFG (0x00000)
443#define NPC_AF_ACTIVE_PC (0x00010)
444#define NPC_AF_CONST (0x00020)
445#define NPC_AF_CONST1 (0x00030)
446#define NPC_AF_BLK_RST (0x00040)
447#define NPC_AF_MCAM_SCRUB_CTL (0x000a0)
448#define NPC_AF_KCAM_SCRUB_CTL (0x000b0)
449#define NPC_AF_KPUX_CFG(a) (0x00500 | (a) << 3)
450#define NPC_AF_PCK_CFG (0x00600)
451#define NPC_AF_PCK_DEF_OL2 (0x00610)
452#define NPC_AF_PCK_DEF_OIP4 (0x00620)
453#define NPC_AF_PCK_DEF_OIP6 (0x00630)
454#define NPC_AF_PCK_DEF_IIP4 (0x00640)
455#define NPC_AF_KEX_LDATAX_FLAGS_CFG(a) (0x00800 | (a) << 3)
456#define NPC_AF_INTFX_KEX_CFG(a) (0x01010 | (a) << 8)
457#define NPC_AF_PKINDX_ACTION0(a) (0x80000ull | (a) << 6)
458#define NPC_AF_PKINDX_ACTION1(a) (0x80008ull | (a) << 6)
459#define NPC_AF_PKINDX_CPI_DEFX(a, b) (0x80020ull | (a) << 6 | (b) << 3)
460#define NPC_AF_KPUX_ENTRYX_CAMX(a, b, c) \
461 (0x100000 | (a) << 14 | (b) << 6 | (c) << 3)
462#define NPC_AF_KPUX_ENTRYX_ACTION0(a, b) \
463 (0x100020 | (a) << 14 | (b) << 6)
464#define NPC_AF_KPUX_ENTRYX_ACTION1(a, b) \
465 (0x100028 | (a) << 14 | (b) << 6)
466#define NPC_AF_KPUX_ENTRY_DISX(a, b) (0x180000 | (a) << 6 | (b) << 3)
467#define NPC_AF_CPIX_CFG(a) (0x200000 | (a) << 3)
468#define NPC_AF_INTFX_LIDX_LTX_LDX_CFG(a, b, c, d) \
469 (0x900000 | (a) << 16 | (b) << 12 | (c) << 5 | (d) << 3)
470#define NPC_AF_INTFX_LDATAX_FLAGSX_CFG(a, b, c) \
471 (0x980000 | (a) << 16 | (b) << 12 | (c) << 3)
472#define NPC_AF_MCAMEX_BANKX_CAMX_INTF(a, b, c) \
473 (0x1000000ull | (a) << 10 | (b) << 6 | (c) << 3)
474#define NPC_AF_MCAMEX_BANKX_CAMX_W0(a, b, c) \
475 (0x1000010ull | (a) << 10 | (b) << 6 | (c) << 3)
476#define NPC_AF_MCAMEX_BANKX_CAMX_W1(a, b, c) \
477 (0x1000020ull | (a) << 10 | (b) << 6 | (c) << 3)
478#define NPC_AF_MCAMEX_BANKX_CFG(a, b) (0x1800000ull | (a) << 8 | (b) << 4)
479#define NPC_AF_MCAMEX_BANKX_STAT_ACT(a, b) \
480 (0x1880000 | (a) << 8 | (b) << 4)
481#define NPC_AF_MATCH_STATX(a) (0x1880008 | (a) << 8)
482#define NPC_AF_INTFX_MISS_STAT_ACT(a) (0x1880040 + (a) * 0x8)
483#define NPC_AF_MCAMEX_BANKX_ACTION(a, b) (0x1900000ull | (a) << 8 | (b) << 4)
484#define NPC_AF_MCAMEX_BANKX_TAG_ACT(a, b) \
485 (0x1900008 | (a) << 8 | (b) << 4)
486#define NPC_AF_INTFX_MISS_ACT(a) (0x1a00000 | (a) << 4)
487#define NPC_AF_INTFX_MISS_TAG_ACT(a) (0x1b00008 | (a) << 4)
488#define NPC_AF_MCAM_BANKX_HITX(a, b) (0x1c80000 | (a) << 8 | (b) << 4)
489#define NPC_AF_LKUP_CTL (0x2000000)
490#define NPC_AF_LKUP_DATAX(a) (0x2000200 | (a) << 4)
491#define NPC_AF_LKUP_RESULTX(a) (0x2000400 | (a) << 4)
492#define NPC_AF_INTFX_STAT(a) (0x2000800 | (a) << 4)
493#define NPC_AF_DBG_CTL (0x3000000)
494#define NPC_AF_DBG_STATUS (0x3000010)
495#define NPC_AF_KPUX_DBG(a) (0x3000020 | (a) << 8)
496#define NPC_AF_IKPU_ERR_CTL (0x3000080)
497#define NPC_AF_KPUX_ERR_CTL(a) (0x30000a0 | (a) << 8)
498#define NPC_AF_MCAM_DBG (0x3001000)
499#define NPC_AF_DBG_DATAX(a) (0x3001400 | (a) << 4)
500#define NPC_AF_DBG_RESULTX(a) (0x3001800 | (a) << 4)
501
441#endif /* RVU_REG_H */ 502#endif /* RVU_REG_H */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
index c331b237a26f..f920dac74e6c 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
@@ -879,4 +879,39 @@ struct nix_lso_format {
879#endif 879#endif
880}; 880};
881 881
882struct nix_rx_flowkey_alg {
883#if defined(__BIG_ENDIAN_BITFIELD)
884 u64 reserved_35_63 :29;
885 u64 ltype_match :4;
886 u64 ltype_mask :4;
887 u64 sel_chan :1;
888 u64 ena :1;
889 u64 reserved_24_24 :1;
890 u64 lid :3;
891 u64 bytesm1 :5;
892 u64 hdr_offset :8;
893 u64 fn_mask :1;
894 u64 ln_mask :1;
895 u64 key_offset :6;
896#else
897 u64 key_offset :6;
898 u64 ln_mask :1;
899 u64 fn_mask :1;
900 u64 hdr_offset :8;
901 u64 bytesm1 :5;
902 u64 lid :3;
903 u64 reserved_24_24 :1;
904 u64 ena :1;
905 u64 sel_chan :1;
906 u64 ltype_mask :4;
907 u64 ltype_match :4;
908 u64 reserved_35_63 :29;
909#endif
910};
911
912/* NIX VTAG size */
913enum nix_vtag_size {
914 VTAGSIZE_T4 = 0x0,
915 VTAGSIZE_T8 = 0x1,
916};
882#endif /* RVU_STRUCT_H */ 917#endif /* RVU_STRUCT_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 07:30:07 -0400