diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2018-09-20 23:34:42 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-09-26 22:09:10 -0400 |
commit | 1f6c52ed09f28da249c00ebc55d112cf7c7f4dc7 (patch) | |
tree | c3156168cf975d5980e0c4d0d72f273a89fb9b96 | |
parent | e0c3d04747ee162f7eff5c14b5c4526ca6b9dc74 (diff) |
drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega10
So we can query what features are enabled for debugging.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h | 2 |
3 files changed, 11 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index f32951f8c688..419a1d77d661 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | |||
@@ -3714,6 +3714,11 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx, | |||
3714 | SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID__SHIFT; | 3714 | SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID__SHIFT; |
3715 | *((uint32_t *)value) = (uint32_t)convert_to_vddc((uint8_t)val_vid); | 3715 | *((uint32_t *)value) = (uint32_t)convert_to_vddc((uint8_t)val_vid); |
3716 | return 0; | 3716 | return 0; |
3717 | case AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK: | ||
3718 | ret = vega10_get_enabled_smc_features(hwmgr, (uint64_t *)value); | ||
3719 | if (!ret) | ||
3720 | *size = 8; | ||
3721 | break; | ||
3717 | default: | 3722 | default: |
3718 | ret = -EINVAL; | 3723 | ret = -EINVAL; |
3719 | break; | 3724 | break; |
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c index 8176d3371e70..c81acc3192ad 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | |||
@@ -98,8 +98,8 @@ int vega10_enable_smc_features(struct pp_hwmgr *hwmgr, | |||
98 | msg, feature_mask); | 98 | msg, feature_mask); |
99 | } | 99 | } |
100 | 100 | ||
101 | static int vega10_get_smc_features(struct pp_hwmgr *hwmgr, | 101 | int vega10_get_enabled_smc_features(struct pp_hwmgr *hwmgr, |
102 | uint32_t *features_enabled) | 102 | uint64_t *features_enabled) |
103 | { | 103 | { |
104 | if (features_enabled == NULL) | 104 | if (features_enabled == NULL) |
105 | return -EINVAL; | 105 | return -EINVAL; |
@@ -112,9 +112,9 @@ static int vega10_get_smc_features(struct pp_hwmgr *hwmgr, | |||
112 | 112 | ||
113 | static bool vega10_is_dpm_running(struct pp_hwmgr *hwmgr) | 113 | static bool vega10_is_dpm_running(struct pp_hwmgr *hwmgr) |
114 | { | 114 | { |
115 | uint32_t features_enabled = 0; | 115 | uint64_t features_enabled = 0; |
116 | 116 | ||
117 | vega10_get_smc_features(hwmgr, &features_enabled); | 117 | vega10_get_enabled_smc_features(hwmgr, &features_enabled); |
118 | 118 | ||
119 | if (features_enabled & SMC_DPM_FEATURES) | 119 | if (features_enabled & SMC_DPM_FEATURES) |
120 | return true; | 120 | return true; |
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h index 630c0ae4c03d..bad760f22624 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h | |||
@@ -44,6 +44,8 @@ struct vega10_smumgr { | |||
44 | 44 | ||
45 | int vega10_enable_smc_features(struct pp_hwmgr *hwmgr, | 45 | int vega10_enable_smc_features(struct pp_hwmgr *hwmgr, |
46 | bool enable, uint32_t feature_mask); | 46 | bool enable, uint32_t feature_mask); |
47 | int vega10_get_enabled_smc_features(struct pp_hwmgr *hwmgr, | ||
48 | uint64_t *features_enabled); | ||
47 | 49 | ||
48 | #endif | 50 | #endif |
49 | 51 | ||