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authorArnd Bergmann <arnd@arndb.de>2016-09-13 11:38:34 -0400
committerArnd Bergmann <arnd@arndb.de>2016-09-13 11:38:34 -0400
commit1f480960e0aa2a681ba03ab85db13a70788e202a (patch)
tree56c496aee1b2341c55bde9f36955ec1d6e190ea0
parentd9d37f70feab141515e87128af7e1fc8c2352d4e (diff)
parent4314f4b6720d96b0504da30112b6d42d13c3e50f (diff)
Merge tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.9" from Heiko Stübner: 32bit Rockchip devicetree changes containing two new rk3288 boards (Fennec and Firefly-reload), display support for the rk3288-evb, support for the recently added firmware reboot-flag support and some housekeeping cleanups. * tag 'v4.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Add sensor-supplies on PopMetal-RK3288 board ARM: dts: rockchip: fix L3G4200D i2c address on PopMetal-RK3288 board ARM: dts: rockchip: enable usbotg for Popemtal-rk3288 board ARM: dts: rockchip: add missing regulators for firefly reload board ARM: dts: rockchip: remove excess sd properties from firefly reload ARM: dts: rockchip: add syscon-reboot-mode DT node soc: rockchip: add reboot-mode header ARM: dts: rockchip: move rk3288 usbphy under the GRF node ARM: dts: rockchip: add rk3288-firefly-reload ARM: dts: rockchip: add dts for RK3288-Fennec boards ARM: dts: rockchip: add the panel power supply for rk3288-evb board with rk808 pmu ARM: dts: rockchip: add the panel power supply for rk3288-evb board with act8846 pmu ARM: dts: rockchip: add eDP/panel display device nodes for rk3288-evb
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.txt8
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/rk3036.dtsi12
-rw-r--r--arch/arm/boot/dts/rk3288-evb-act8846.dts4
-rw-r--r--arch/arm/boot/dts/rk3288-evb-rk808.dts4
-rw-r--r--arch/arm/boot/dts/rk3288-evb.dtsi45
-rw-r--r--arch/arm/boot/dts/rk3288-fennec.dts382
-rw-r--r--arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi310
-rw-r--r--arch/arm/boot/dts/rk3288-firefly-reload.dts403
-rw-r--r--arch/arm/boot/dts/rk3288-popmetal.dts12
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi73
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi12
-rw-r--r--include/dt-bindings/soc/rockchip,boot-mode.h15
13 files changed, 1245 insertions, 37 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 666864517069..a4f59b579685 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -31,6 +31,10 @@ Rockchip platforms device tree bindings
31 or 31 or
32 - compatible = "firefly,firefly-rk3288-beta", "rockchip,rk3288"; 32 - compatible = "firefly,firefly-rk3288-beta", "rockchip,rk3288";
33 33
34- Firefly Firefly-RK3288 Reload board:
35 Required root node properties:
36 - compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
37
34- ChipSPARK PopMetal-RK3288 board: 38- ChipSPARK PopMetal-RK3288 board:
35 Required root node properties: 39 Required root node properties:
36 - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 40 - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
@@ -110,6 +114,10 @@ Rockchip platforms device tree bindings
110- Rockchip RK3229 Evaluation board: 114- Rockchip RK3229 Evaluation board:
111 - compatible = "rockchip,rk3229-evb", "rockchip,rk3229"; 115 - compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
112 116
117- Rockchip RK3288 Fennec board:
118 Required root node properties:
119 - compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
120
113- Rockchip RK3399 evb: 121- Rockchip RK3399 evb:
114 Required root node properties: 122 Required root node properties:
115 - compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; 123 - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f228163b02f7..7edcf006b739 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -625,8 +625,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
625 rk3229-evb.dtb \ 625 rk3229-evb.dtb \
626 rk3288-evb-act8846.dtb \ 626 rk3288-evb-act8846.dtb \
627 rk3288-evb-rk808.dtb \ 627 rk3288-evb-rk808.dtb \
628 rk3288-fennec.dtb \
628 rk3288-firefly-beta.dtb \ 629 rk3288-firefly-beta.dtb \
629 rk3288-firefly.dtb \ 630 rk3288-firefly.dtb \
631 rk3288-firefly-reload.dtb \
630 rk3288-miqi.dtb \ 632 rk3288-miqi.dtb \
631 rk3288-popmetal.dtb \ 633 rk3288-popmetal.dtb \
632 rk3288-r89.dtb \ 634 rk3288-r89.dtb \
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 843d2be2e4e9..a935523a1eb8 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -43,6 +43,7 @@
43#include <dt-bindings/interrupt-controller/arm-gic.h> 43#include <dt-bindings/interrupt-controller/arm-gic.h>
44#include <dt-bindings/pinctrl/rockchip.h> 44#include <dt-bindings/pinctrl/rockchip.h>
45#include <dt-bindings/clock/rk3036-cru.h> 45#include <dt-bindings/clock/rk3036-cru.h>
46#include <dt-bindings/soc/rockchip,boot-mode.h>
46#include "skeleton.dtsi" 47#include "skeleton.dtsi"
47 48
48/ { 49/ {
@@ -313,8 +314,17 @@
313 }; 314 };
314 315
315 grf: syscon@20008000 { 316 grf: syscon@20008000 {
316 compatible = "rockchip,rk3036-grf", "syscon"; 317 compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd";
317 reg = <0x20008000 0x1000>; 318 reg = <0x20008000 0x1000>;
319
320 reboot-mode {
321 compatible = "syscon-reboot-mode";
322 offset = <0x1d8>;
323 mode-normal = <BOOT_NORMAL>;
324 mode-recovery = <BOOT_RECOVERY>;
325 mode-bootloader = <BOOT_FASTBOOT>;
326 mode-loader = <BOOT_BL_DOWNLOAD>;
327 };
318 }; 328 };
319 329
320 acodec: acodec-ana@20030000 { 330 acodec: acodec-ana@20030000 {
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index 452ca2441e84..041dd5d2d18c 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -206,6 +206,10 @@
206 }; 206 };
207}; 207};
208 208
209&panel {
210 power-supply = <&vcc_lcd>;
211};
212
209&pinctrl { 213&pinctrl {
210 lcd { 214 lcd {
211 lcd_en: lcd-en { 215 lcd_en: lcd-en {
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts
index 736b08b0bfdd..44ebc6e59b3a 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts
@@ -233,3 +233,7 @@
233 }; 233 };
234 }; 234 };
235}; 235};
236
237&panel {
238 power-supply = <&vcc_lcd>;
239};
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 963365d12208..d59208b5eb6c 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -48,7 +48,7 @@
48 reg = <0x0 0x80000000>; 48 reg = <0x0 0x80000000>;
49 }; 49 };
50 50
51 backlight { 51 backlight: backlight {
52 compatible = "pwm-backlight"; 52 compatible = "pwm-backlight";
53 brightness-levels = < 53 brightness-levels = <
54 0 1 2 3 4 5 6 7 54 0 1 2 3 4 5 6 7
@@ -97,6 +97,21 @@
97 #clock-cells = <0>; 97 #clock-cells = <0>;
98 }; 98 };
99 99
100 panel: panel {
101 compatible ="lg,lp079qx1-sp0v", "simple-panel";
102 backlight = <&backlight>;
103 enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
104 pinctrl-0 = <&lcd_cs>;
105
106 ports {
107 panel_in: port {
108 panel_in_edp: endpoint {
109 remote-endpoint = <&edp_out_panel>;
110 };
111 };
112 };
113 };
114
100 gpio-keys { 115 gpio-keys {
101 compatible = "gpio-keys"; 116 compatible = "gpio-keys";
102 autorepeat; 117 autorepeat;
@@ -170,6 +185,28 @@
170 cpu0-supply = <&vdd_cpu>; 185 cpu0-supply = <&vdd_cpu>;
171}; 186};
172 187
188&edp {
189 force-hpd;
190 status = "okay";
191
192 ports {
193 edp_out: port@1 {
194 reg = <1>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197
198 edp_out_panel: endpoint {
199 reg = <0>;
200 remote-endpoint = <&panel_in_edp>;
201 };
202 };
203 };
204};
205
206&edp_phy {
207 status = "okay";
208};
209
173&emmc { 210&emmc {
174 bus-width = <8>; 211 bus-width = <8>;
175 cap-mmc-highspeed; 212 cap-mmc-highspeed;
@@ -280,6 +317,12 @@
280 }; 317 };
281 }; 318 };
282 319
320 lcd {
321 lcd_cs: lcd-cs {
322 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
323 };
324 };
325
283 pmic { 326 pmic {
284 pmic_int: pmic-int { 327 pmic_int: pmic-int {
285 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; 328 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b/arch/arm/boot/dts/rk3288-fennec.dts
new file mode 100644
index 000000000000..2e3c34135ed8
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-fennec.dts
@@ -0,0 +1,382 @@
1/*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41/dts-v1/;
42
43#include "rk3288.dtsi"
44
45/ {
46 model = "Rockchip RK3288 Fennec Board";
47 compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
48
49 memory {
50 reg = <0x0 0x80000000>;
51 device_type = "memory";
52 };
53
54 ext_gmac: external-gmac-clock {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <125000000>;
58 clock-output-names = "ext_gmac";
59 };
60
61 vcc_sys: vsys-regulator {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc_sys";
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
66 regulator-always-on;
67 regulator-boot-on;
68 };
69};
70
71&cpu0 {
72 cpu0-supply = <&vdd_cpu>;
73};
74
75&emmc {
76 bus-width = <8>;
77 cap-mmc-highspeed;
78 disable-wp;
79 non-removable;
80 num-slots = <1>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
83 status = "okay";
84};
85
86&gmac {
87 assigned-clocks = <&cru SCLK_MAC>;
88 assigned-clock-parents = <&ext_gmac>;
89 clock_in_out = "input";
90 pinctrl-names = "default";
91 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
92 phy-supply = <&vcc_lan>;
93 phy-mode = "rgmii";
94 snps,reset-active-low;
95 snps,reset-delays-us = <0 10000 1000000>;
96 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
97 tx_delay = <0x30>;
98 rx_delay = <0x10>;
99 status = "okay";
100};
101
102&hdmi {
103 status = "okay";
104};
105
106&i2c0 {
107 status = "okay";
108 clock-frequency = <400000>;
109
110 rk808: pmic@1b {
111 compatible = "rockchip,rk808";
112 reg = <0x1b>;
113 interrupt-parent = <&gpio0>;
114 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
115 #clock-cells = <1>;
116 clock-output-names = "xin32k", "rk808-clkout2";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pmic_int &global_pwroff>;
119 rockchip,system-power-controller;
120 wakeup-source;
121
122 vcc1-supply = <&vcc_sys>;
123 vcc2-supply = <&vcc_sys>;
124 vcc3-supply = <&vcc_sys>;
125 vcc4-supply = <&vcc_sys>;
126 vcc6-supply = <&vcc_sys>;
127 vcc7-supply = <&vcc_sys>;
128 vcc8-supply = <&vcc_io>;
129 vcc9-supply = <&vcc_io>;
130 vcc10-supply = <&vcc_io>;
131 vcc11-supply = <&vcc_io>;
132 vcc12-supply = <&vcc_io>;
133 vddio-supply = <&vcc_io>;
134
135 regulators {
136 vdd_cpu: DCDC_REG1 {
137 regulator-always-on;
138 regulator-boot-on;
139 regulator-min-microvolt = <750000>;
140 regulator-max-microvolt = <1350000>;
141 regulator-name = "vdd_arm";
142 regulator-state-mem {
143 regulator-off-in-suspend;
144 };
145 };
146
147 vdd_gpu: DCDC_REG2 {
148 regulator-always-on;
149 regulator-boot-on;
150 regulator-min-microvolt = <850000>;
151 regulator-max-microvolt = <1250000>;
152 regulator-name = "vdd_gpu";
153 regulator-state-mem {
154 regulator-on-in-suspend;
155 regulator-suspend-microvolt = <1000000>;
156 };
157 };
158
159 vcc_ddr: DCDC_REG3 {
160 regulator-always-on;
161 regulator-boot-on;
162 regulator-name = "vcc_ddr";
163 regulator-state-mem {
164 regulator-on-in-suspend;
165 };
166 };
167
168 vcc_io: DCDC_REG4 {
169 regulator-always-on;
170 regulator-boot-on;
171 regulator-min-microvolt = <3300000>;
172 regulator-max-microvolt = <3300000>;
173 regulator-name = "vcc_io";
174 regulator-state-mem {
175 regulator-on-in-suspend;
176 regulator-suspend-microvolt = <3300000>;
177 };
178 };
179
180 vccio_pmu: LDO_REG1 {
181 regulator-always-on;
182 regulator-boot-on;
183 regulator-min-microvolt = <3300000>;
184 regulator-max-microvolt = <3300000>;
185 regulator-name = "vccio_pmu";
186 regulator-state-mem {
187 regulator-on-in-suspend;
188 regulator-suspend-microvolt = <3300000>;
189 };
190 };
191
192 vcca_33: LDO_REG2 {
193 regulator-always-on;
194 regulator-boot-on;
195 regulator-min-microvolt = <3300000>;
196 regulator-max-microvolt = <3300000>;
197 regulator-name = "vcca_33";
198 regulator-state-mem {
199 regulator-off-in-suspend;
200 };
201 };
202
203 vdd_10: LDO_REG3 {
204 regulator-always-on;
205 regulator-boot-on;
206 regulator-min-microvolt = <1000000>;
207 regulator-max-microvolt = <1000000>;
208 regulator-name = "vdd_10";
209 regulator-state-mem {
210 regulator-on-in-suspend;
211 regulator-suspend-microvolt = <1000000>;
212 };
213 };
214
215 vcc_wl: LDO_REG4 {
216 regulator-always-on;
217 regulator-boot-on;
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <1800000>;
220 regulator-name = "vcc_wl";
221 regulator-state-mem {
222 regulator-on-in-suspend;
223 regulator-suspend-microvolt = <1800000>;
224 };
225 };
226
227 vccio_sd: LDO_REG5 {
228 regulator-always-on;
229 regulator-boot-on;
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-name = "vccio_sd";
233 regulator-state-mem {
234 regulator-on-in-suspend;
235 regulator-suspend-microvolt = <3300000>;
236 };
237 };
238
239 vdd10_lcd: LDO_REG6 {
240 regulator-always-on;
241 regulator-boot-on;
242 regulator-min-microvolt = <1000000>;
243 regulator-max-microvolt = <1000000>;
244 regulator-name = "vdd10_lcd";
245 regulator-state-mem {
246 regulator-on-in-suspend;
247 regulator-suspend-microvolt = <1000000>;
248 };
249 };
250
251 vcc_18: LDO_REG7 {
252 regulator-always-on;
253 regulator-boot-on;
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
256 regulator-name = "vcc_18";
257 regulator-state-mem {
258 regulator-on-in-suspend;
259 regulator-suspend-microvolt = <1800000>;
260 };
261 };
262
263 vcc18_lcd: LDO_REG8 {
264 regulator-always-on;
265 regulator-boot-on;
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
268 regulator-name = "vcc18_lcd";
269 regulator-state-mem {
270 regulator-on-in-suspend;
271 regulator-suspend-microvolt = <1800000>;
272 };
273 };
274
275 vcc_sd: SWITCH_REG1 {
276 regulator-always-on;
277 regulator-boot-on;
278 regulator-name = "vcc_sd";
279 regulator-state-mem {
280 regulator-on-in-suspend;
281 };
282 };
283
284 vcc_lan: SWITCH_REG2 {
285 regulator-always-on;
286 regulator-boot-on;
287 regulator-name = "vcc_lan";
288 regulator-state-mem {
289 regulator-on-in-suspend;
290 };
291 };
292 };
293 };
294};
295
296&pinctrl {
297 pcfg_output_high: pcfg-output-high {
298 output-high;
299 };
300
301 pcfg_output_low: pcfg-output-low {
302 output-low;
303 };
304
305 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
306 drive-strength = <8>;
307 };
308
309 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
310 bias-pull-up;
311 drive-strength = <8>;
312 };
313
314 gmac {
315 phy_int: phy-int {
316 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
317 };
318
319 phy_pmeb: phy-pmeb {
320 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
321 };
322
323 phy_rst: phy-rst {
324 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
325 };
326 };
327
328 pmic {
329 pmic_int: pmic-int {
330 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
331 };
332 };
333
334 usbphy {
335 host_drv: host-drv {
336 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
337 };
338 };
339};
340
341&uart2 {
342 status = "okay";
343};
344
345&usbphy {
346 pinctrl-names = "default";
347 pinctrl-0 = <&host_drv>;
348 vbus_drv-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
349 status = "okay";
350};
351
352&usb_host0_ehci {
353 status = "okay";
354};
355
356&usb_host1 {
357 status = "okay";
358};
359
360&usb_otg {
361 status = "okay";
362};
363
364&usb_hsic {
365 status = "okay";
366};
367
368&vopb {
369 status = "okay";
370};
371
372&vopb_mmu {
373 status = "okay";
374};
375
376&vopl {
377 status = "okay";
378};
379
380&vopl_mmu {
381 status = "okay";
382};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
new file mode 100644
index 000000000000..ec418c99de95
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
@@ -0,0 +1,310 @@
1/*
2 * Device tree file for Firefly Rockchip RK3288 Core board
3 * Copyright (c) 2016 Randy Li <ayaka@soulik.info>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44#include <dt-bindings/input/input.h>
45#include "rk3288.dtsi"
46
47/ {
48 memory {
49 device_type = "memory";
50 reg = <0 0x80000000>;
51 };
52
53 ext_gmac: external-gmac-clock {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <125000000>;
57 clock-output-names = "ext_gmac";
58 };
59
60
61 vcc_flash: flash-regulator {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc_flash";
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <1800000>;
66 vin-supply = <&vcc_io>;
67 };
68};
69
70&cpu0 {
71 cpu0-supply = <&vdd_cpu>;
72};
73
74&emmc {
75 bus-width = <8>;
76 cap-mmc-highspeed;
77 disable-wp;
78 mmc-ddr-1_8v;
79 mmc-hs200-1_8v;
80 non-removable;
81 num-slots = <1>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
84 vmmc-supply = <&vcc_io>;
85 vqmmc-supply = <&vcc_flash>;
86 status = "okay";
87};
88
89&gmac {
90 assigned-clocks = <&cru SCLK_MAC>;
91 assigned-clock-parents = <&ext_gmac>;
92 clock_in_out = "input";
93 pinctrl-names = "default";
94 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
95 phy-supply = <&vcc_lan>;
96 phy-mode = "rgmii";
97 snps,reset-active-low;
98 snps,reset-delays-us = <0 10000 1000000>;
99 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
100 tx_delay = <0x30>;
101 rx_delay = <0x10>;
102 status = "ok";
103};
104
105&i2c0 {
106 clock-frequency = <400000>;
107 status = "okay";
108
109 vdd_cpu: syr827@40 {
110 compatible = "silergy,syr827";
111 fcs,suspend-voltage-selector = <1>;
112 reg = <0x40>;
113 regulator-name = "vdd_cpu";
114 regulator-min-microvolt = <850000>;
115 regulator-max-microvolt = <1350000>;
116 regulator-always-on;
117 regulator-boot-on;
118 regulator-enable-ramp-delay = <300>;
119 regulator-ramp-delay = <8000>;
120 vin-supply = <&vcc_sys>;
121 };
122
123 vdd_gpu: syr828@41 {
124 compatible = "silergy,syr828";
125 fcs,suspend-voltage-selector = <1>;
126 reg = <0x41>;
127 regulator-name = "vdd_gpu";
128 regulator-min-microvolt = <850000>;
129 regulator-max-microvolt = <1350000>;
130 regulator-always-on;
131 vin-supply = <&vcc_sys>;
132 };
133
134 act8846: act8846@5a {
135 compatible = "active-semi,act8846";
136 reg = <0x5a>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
139 system-power-controller;
140
141 vp1-supply = <&vcc_sys>;
142 vp2-supply = <&vcc_sys>;
143 vp3-supply = <&vcc_sys>;
144 vp4-supply = <&vcc_sys>;
145 inl1-supply = <&vcc_sys>;
146 inl2-supply = <&vcc_sys>;
147 inl3-supply = <&vcc_20>;
148
149 regulators {
150 vcc_ddr: REG1 {
151 regulator-name = "vcc_ddr";
152 regulator-min-microvolt = <1200000>;
153 regulator-max-microvolt = <1200000>;
154 regulator-always-on;
155 };
156
157 vcc_io: REG2 {
158 regulator-name = "vcc_io";
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
161 regulator-always-on;
162 };
163
164 vdd_log: REG3 {
165 regulator-name = "vdd_log";
166 regulator-min-microvolt = <1100000>;
167 regulator-max-microvolt = <1100000>;
168 regulator-always-on;
169 };
170
171 vcc_20: REG4 {
172 regulator-name = "vcc_20";
173 regulator-min-microvolt = <2000000>;
174 regulator-max-microvolt = <2000000>;
175 regulator-always-on;
176 };
177
178 vccio_sd: REG5 {
179 regulator-name = "vccio_sd";
180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 };
183
184 vdd10_lcd: REG6 {
185 regulator-name = "vdd10_lcd";
186 regulator-min-microvolt = <1000000>;
187 regulator-max-microvolt = <1000000>;
188 };
189
190 vcca_18: REG7 {
191 regulator-name = "vcca_18";
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <1800000>;
194 regulator-always-on;
195 };
196
197 vcca_33: REG8 {
198 regulator-name = "vcca_33";
199 regulator-min-microvolt = <3300000>;
200 regulator-max-microvolt = <3300000>;
201 regulator-always-on;
202 };
203
204 vcc_lan: REG9 {
205 regulator-name = "vcca_lan";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 };
209
210 vdd_10: REG10 {
211 regulator-name = "vdd_10";
212 regulator-min-microvolt = <1000000>;
213 regulator-max-microvolt = <1000000>;
214 regulator-always-on;
215 };
216
217 vccio_wl: vcc_18: REG11 {
218 regulator-name = "vcc_18";
219 regulator-min-microvolt = <1800000>;
220 regulator-max-microvolt = <1800000>;
221 };
222
223 vcc18_lcd: REG12 {
224 regulator-name = "vcc18_lcd";
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <1800000>;
227 };
228 };
229 };
230};
231
232&io_domains {
233 status = "okay";
234
235 audio-supply = <&vccio_wl>;
236 bb-supply = <&vcc_io>;
237 dvp-supply = <&dovdd_1v8>;
238 flash0-supply = <&vcc_flash>;
239 flash1-supply = <&vcc_lan>;
240 gpio30-supply = <&vcc_io>;
241 gpio1830-supply = <&vcc_io>;
242 lcdc-supply = <&vcc_io>;
243 sdcard-supply = <&vccio_sd>;
244 wifi-supply = <&vccio_wl>;
245};
246
247&pinctrl {
248 pcfg_output_high: pcfg-output-high {
249 output-high;
250 };
251
252 pcfg_output_low: pcfg-output-low {
253 output-low;
254 };
255
256 pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
257 bias-pull-up;
258 drive-strength = <12>;
259 };
260
261 act8846 {
262 pwr_hold: pwr-hold {
263 rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
264 };
265
266 pmic_vsel: pmic-vsel {
267 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
268 };
269 };
270
271 gmac {
272 phy_int: phy-int {
273 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
274 };
275
276 phy_pmeb: phy-pmeb {
277 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
278 };
279
280 phy_rst: phy-rst {
281 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
282 };
283 };
284};
285
286&tsadc {
287 rockchip,hw-tshut-mode = <0>;
288 rockchip,hw-tshut-polarity = <0>;
289 status = "okay";
290};
291
292&vopb {
293 status = "okay";
294};
295
296&vopb_mmu {
297 status = "okay";
298};
299
300&vopl {
301 status = "okay";
302};
303
304&vopl_mmu {
305 status = "okay";
306};
307
308&wdt {
309 status = "okay";
310};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
new file mode 100644
index 000000000000..751bee81128e
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
@@ -0,0 +1,403 @@
1/*
2 * Device tree file for Firefly Rockchip RK3288 Core board
3 * Copyright (c) 2016 Randy Li <ayaka@soulik.info>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include "rk3288-firefly-reload-core.dtsi"
46
47/ {
48 model = "Firefly-RK3288-reload";
49 compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
50
51 gpio-keys {
52 compatible = "gpio-keys";
53
54 power {
55 wakeup-source;
56 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
57 label = "GPIO Power";
58 linux,code = <KEY_POWER>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&pwr_key>;
61 };
62 };
63
64 ir-receiver {
65 compatible = "gpio-ir-receiver";
66 gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
67 };
68
69 leds {
70 compatible = "gpio-leds";
71
72 power {
73 gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
74 label = "firefly:blue:power";
75 pinctrl-names = "default";
76 pinctrl-0 = <&power_led>;
77 panic-indicator;
78 };
79
80 work {
81 gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
82 label = "firefly:blue:user";
83 linux,default-trigger = "rc-feedback";
84 pinctrl-names = "default";
85 pinctrl-0 = <&work_led>;
86 };
87 };
88
89 sdio_pwrseq: sdio-pwrseq {
90 compatible = "mmc-pwrseq-simple";
91 clocks = <&hym8563>;
92 clock-names = "ext_clock";
93 pinctrl-names = "default";
94 pinctrl-0 = <&wifi_enable>;
95 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
96 };
97
98 sound {
99 compatible = "simple-audio-card";
100 simple-audio-card,name = "SPDIF";
101 simple-audio-card,dai-link@1 { /* S/PDIF - S/PDIF */
102 cpu { sound-dai = <&spdif>; };
103 codec { sound-dai = <&spdif_out>; };
104 };
105 };
106
107 spdif_out: spdif-out {
108 compatible = "linux,spdif-dit";
109 #sound-dai-cells = <0>;
110 };
111
112 vcc_host_5v: usb-host-regulator {
113 compatible = "regulator-fixed";
114 enable-active-high;
115 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&host_vbus_drv>;
118 regulator-name = "vcc_host_5v";
119 regulator-min-microvolt = <5000000>;
120 regulator-max-microvolt = <5000000>;
121 regulator-always-on;
122 vin-supply = <&vcc_5v>;
123 };
124
125 vcc_5v: vcc_sys: vsys-regulator {
126 compatible = "regulator-fixed";
127 regulator-name = "vcc_5v";
128 regulator-min-microvolt = <5000000>;
129 regulator-max-microvolt = <5000000>;
130 regulator-always-on;
131 regulator-boot-on;
132 };
133
134 vcc_sd: sdmmc-regulator {
135 compatible = "regulator-fixed";
136 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&sdmmc_pwr>;
139 regulator-name = "vcc_sd";
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
142 startup-delay-us = <100000>;
143 vin-supply = <&vcc_io>;
144 };
145
146 vcc_otg_5v: usb-otg-regulator {
147 compatible = "regulator-fixed";
148 enable-active-high;
149 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&otg_vbus_drv>;
152 regulator-name = "vcc_otg_5v";
153 regulator-min-microvolt = <5000000>;
154 regulator-max-microvolt = <5000000>;
155 regulator-always-on;
156 vin-supply = <&vcc_5v>;
157 };
158
159 dovdd_1v8: dovdd-1v8-regulator {
160 compatible = "regulator-fixed";
161 enable-active-high;
162 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
163 pinctrl-names = "default";
164 pinctrl-0 = <&dvp_pwr>;
165 regulator-name = "dovdd_1v8";
166 regulator-min-microvolt = <1800000>;
167 regulator-max-microvolt = <1800000>;
168 vin-supply = <&vcc_io>;
169 };
170
171 vcc28_dvp: vcc28-dvp-regulator {
172 compatible = "regulator-fixed";
173 enable-active-high;
174 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&dvp_pwr>;
177 regulator-name = "vcc28_dvp";
178 regulator-min-microvolt = <2800000>;
179 regulator-max-microvolt = <2800000>;
180 vin-supply = <&vcc_io>;
181 };
182
183 af_28: af_28-regulator {
184 compatible = "regulator-fixed";
185 enable-active-high;
186 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&dvp_pwr>;
189 regulator-name = "af_28";
190 regulator-min-microvolt = <2800000>;
191 regulator-max-microvolt = <2800000>;
192 vin-supply = <&vcc_io>;
193 };
194
195 dvdd_1v2: af_28-regulator {
196 compatible = "regulator-fixed";
197 enable-active-high;
198 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&cif_pwr>;
201 regulator-name = "dvdd_1v2";
202 regulator-min-microvolt = <1200000>;
203 regulator-max-microvolt = <1200000>;
204 vin-supply = <&vcc_io>;
205 };
206
207 vbat_wl: wifi-regulator {
208 compatible = "regulator-fixed";
209 regulator-name = "vbat_wl";
210 regulator-min-microvolt = <3300000>;
211 regulator-max-microvolt = <3300000>;
212 vin-supply = <&vcc_io>;
213 };
214};
215
216&i2c0 {
217 hym8563: hym8563@51 {
218 compatible = "haoyu,hym8563";
219 reg = <0x51>;
220 #clock-cells = <0>;
221 clock-frequency = <32768>;
222 clock-output-names = "xin32k";
223 interrupt-parent = <&gpio7>;
224 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&rtc_int>;
227 };
228};
229
230&i2c2 {
231 status = "okay";
232
233 codec: es8328@10 {
234 compatible = "everest,es8328";
235 DVDD-supply = <&vcca_33>;
236 AVDD-supply = <&vcca_33>;
237 PVDD-supply = <&vcca_33>;
238 HPVDD-supply = <&vcca_33>;
239 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
240 clock-names = "i2s_hclk", "i2s_clk";
241 reg = <0x10>;
242 };
243};
244
245&i2s {
246 status = "okay";
247};
248
249&sdmmc {
250 bus-width = <4>;
251 cap-mmc-highspeed;
252 cap-sd-highspeed;
253 card-detect-delay = <200>;
254 disable-wp;
255 num-slots = <1>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
258 vmmc-supply = <&vcc_sd>;
259 vqmmc-supply = <&vccio_sd>;
260 status = "okay";
261};
262
263&sdio0 {
264 bus-width = <4>;
265 cap-sd-highspeed;
266 cap-sdio-irq;
267 disable-wp;
268 mmc-pwrseq = <&sdio_pwrseq>;
269 non-removable;
270 num-slots = <1>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
273 sd-uhs-sdr12;
274 sd-uhs-sdr25;
275 sd-uhs-sdr50;
276 sd-uhs-ddr50;
277 vmmc-supply = <&vbat_wl>;
278 vqmmc-supply = <&vccio_wl>;
279 status = "okay";
280};
281
282&spdif {
283 status = "okay";
284};
285
286&uart0 {
287 pinctrl-names = "default";
288 pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
289 status = "okay";
290};
291
292&uart1 {
293 status = "okay";
294};
295
296&uart2 {
297 status = "okay";
298};
299
300&uart3 {
301 status = "okay";
302};
303
304&usbphy {
305 status = "okay";
306};
307
308&usb_host1 {
309 pinctrl-names = "default";
310 pinctrl-0 = <&usbhub_rst>;
311 status = "okay";
312};
313
314&usb_otg {
315 status = "okay";
316};
317
318&pinctrl {
319 ir {
320 ir_int: ir-int {
321 rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
322 };
323 };
324
325 dvp {
326 dvp_pwr: dvp-pwr {
327 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
328 };
329
330 cif_pwr: cif-pwr {
331 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_none>;
332 };
333 };
334
335 hym8563 {
336 rtc_int: rtc-int {
337 rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
338 };
339 };
340
341 keys {
342 pwr_key: pwr-key {
343 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
344 };
345 };
346
347 leds {
348 power_led: power-led {
349 rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
350 };
351
352 work_led: work-led {
353 rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
354 };
355 };
356
357 sdmmc {
358 /*
359 * Default drive strength isn't enough to achieve even
360 * high-speed mode on firefly board so bump up to 12ma.
361 */
362 sdmmc_bus4: sdmmc-bus4 {
363 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
364 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
365 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
366 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
367 };
368
369 sdmmc_clk: sdmmc-clk {
370 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
371 };
372
373 sdmmc_cmd: sdmmc-cmd {
374 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
375 };
376
377 sdmmc_pwr: sdmmc-pwr {
378 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
379 };
380 };
381
382 sdio {
383 wifi_enable: wifi-enable {
384 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
385 };
386 };
387
388 usb_host {
389 host_vbus_drv: host-vbus-drv {
390 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
391 };
392
393 usbhub_rst: usbhub-rst {
394 rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
395 };
396 };
397
398 usb_otg {
399 otg_vbus_drv: otg-vbus-drv {
400 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
401 };
402 };
403};
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts
index dda8d259bb6d..56dd377d5658 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -387,12 +387,16 @@
387 interrupts = <1 IRQ_TYPE_EDGE_RISING>; 387 interrupts = <1 IRQ_TYPE_EDGE_RISING>;
388 pinctrl-names = "default"; 388 pinctrl-names = "default";
389 pinctrl-0 = <&comp_int>; 389 pinctrl-0 = <&comp_int>;
390 vdd-supply = <&vcc_io>;
391 vid-supply = <&vcc_io>;
390 }; 392 };
391 393
392 l3g4200d: l3g4200d@68 { 394 l3g4200d: l3g4200d@69 {
393 compatible = "st,l3g4200d-gyro"; 395 compatible = "st,l3g4200d-gyro";
394 st,drdy-int-pin = <2>; 396 st,drdy-int-pin = <2>;
395 reg = <0x6b>; 397 reg = <0x69>;
398 vdd-supply = <&vcc_io>;
399 vddio-supply = <&vcc_io>;
396 }; 400 };
397 401
398 mma8452: mma8452@1d { 402 mma8452: mma8452@1d {
@@ -525,3 +529,7 @@
525&usbphy { 529&usbphy {
526 status = "okay"; 530 status = "okay";
527}; 531};
532
533&usb_otg {
534 status = "okay";
535};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cd33f0170890..48ca4e452564 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -45,6 +45,7 @@
45#include <dt-bindings/clock/rk3288-cru.h> 45#include <dt-bindings/clock/rk3288-cru.h>
46#include <dt-bindings/thermal/thermal.h> 46#include <dt-bindings/thermal/thermal.h>
47#include <dt-bindings/power/rk3288-power.h> 47#include <dt-bindings/power/rk3288-power.h>
48#include <dt-bindings/soc/rockchip,boot-mode.h>
48#include "skeleton.dtsi" 49#include "skeleton.dtsi"
49 50
50/ { 51/ {
@@ -791,6 +792,15 @@
791 clocks = <&cru ACLK_GPU>; 792 clocks = <&cru ACLK_GPU>;
792 }; 793 };
793 }; 794 };
795
796 reboot-mode {
797 compatible = "syscon-reboot-mode";
798 offset = <0x94>;
799 mode-normal = <BOOT_NORMAL>;
800 mode-recovery = <BOOT_RECOVERY>;
801 mode-bootloader = <BOOT_FASTBOOT>;
802 mode-loader = <BOOT_BL_DOWNLOAD>;
803 };
794 }; 804 };
795 805
796 sgrf: syscon@ff740000 { 806 sgrf: syscon@ff740000 {
@@ -832,6 +842,37 @@
832 compatible = "rockchip,rk3288-io-voltage-domain"; 842 compatible = "rockchip,rk3288-io-voltage-domain";
833 status = "disabled"; 843 status = "disabled";
834 }; 844 };
845
846 usbphy: usbphy {
847 compatible = "rockchip,rk3288-usb-phy";
848 #address-cells = <1>;
849 #size-cells = <0>;
850 status = "disabled";
851
852 usbphy0: usb-phy@320 {
853 #phy-cells = <0>;
854 reg = <0x320>;
855 clocks = <&cru SCLK_OTGPHY0>;
856 clock-names = "phyclk";
857 #clock-cells = <0>;
858 };
859
860 usbphy1: usb-phy@334 {
861 #phy-cells = <0>;
862 reg = <0x334>;
863 clocks = <&cru SCLK_OTGPHY1>;
864 clock-names = "phyclk";
865 #clock-cells = <0>;
866 };
867
868 usbphy2: usb-phy@348 {
869 #phy-cells = <0>;
870 reg = <0x348>;
871 clocks = <&cru SCLK_OTGPHY2>;
872 clock-names = "phyclk";
873 #clock-cells = <0>;
874 };
875 };
835 }; 876 };
836 877
837 wdt: watchdog@ff800000 { 878 wdt: watchdog@ff800000 {
@@ -1085,38 +1126,6 @@
1085 }; 1126 };
1086 }; 1127 };
1087 1128
1088 usbphy: phy {
1089 compatible = "rockchip,rk3288-usb-phy";
1090 rockchip,grf = <&grf>;
1091 #address-cells = <1>;
1092 #size-cells = <0>;
1093 status = "disabled";
1094
1095 usbphy0: usb-phy@320 {
1096 #phy-cells = <0>;
1097 reg = <0x320>;
1098 clocks = <&cru SCLK_OTGPHY0>;
1099 clock-names = "phyclk";
1100 #clock-cells = <0>;
1101 };
1102
1103 usbphy1: usb-phy@334 {
1104 #phy-cells = <0>;
1105 reg = <0x334>;
1106 clocks = <&cru SCLK_OTGPHY1>;
1107 clock-names = "phyclk";
1108 #clock-cells = <0>;
1109 };
1110
1111 usbphy2: usb-phy@348 {
1112 #phy-cells = <0>;
1113 reg = <0x348>;
1114 clocks = <&cru SCLK_OTGPHY2>;
1115 clock-names = "phyclk";
1116 #clock-cells = <0>;
1117 };
1118 };
1119
1120 pinctrl: pinctrl { 1129 pinctrl: pinctrl {
1121 compatible = "rockchip,rk3288-pinctrl"; 1130 compatible = "rockchip,rk3288-pinctrl";
1122 rockchip,grf = <&grf>; 1131 rockchip,grf = <&grf>;
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 99bbcc2c9b89..405d61258f10 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -43,6 +43,7 @@
43 43
44#include <dt-bindings/interrupt-controller/irq.h> 44#include <dt-bindings/interrupt-controller/irq.h>
45#include <dt-bindings/interrupt-controller/arm-gic.h> 45#include <dt-bindings/interrupt-controller/arm-gic.h>
46#include <dt-bindings/soc/rockchip,boot-mode.h>
46#include "skeleton.dtsi" 47#include "skeleton.dtsi"
47 48
48/ { 49/ {
@@ -246,8 +247,17 @@
246 }; 247 };
247 248
248 pmu: pmu@20004000 { 249 pmu: pmu@20004000 {
249 compatible = "rockchip,rk3066-pmu", "syscon"; 250 compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
250 reg = <0x20004000 0x100>; 251 reg = <0x20004000 0x100>;
252
253 reboot-mode {
254 compatible = "syscon-reboot-mode";
255 offset = <0x40>;
256 mode-normal = <BOOT_NORMAL>;
257 mode-recovery = <BOOT_RECOVERY>;
258 mode-bootloader = <BOOT_FASTBOOT>;
259 mode-loader = <BOOT_BL_DOWNLOAD>;
260 };
251 }; 261 };
252 262
253 grf: grf@20008000 { 263 grf: grf@20008000 {
diff --git a/include/dt-bindings/soc/rockchip,boot-mode.h b/include/dt-bindings/soc/rockchip,boot-mode.h
new file mode 100644
index 000000000000..ae7c867e736a
--- /dev/null
+++ b/include/dt-bindings/soc/rockchip,boot-mode.h
@@ -0,0 +1,15 @@
1#ifndef __ROCKCHIP_BOOT_MODE_H
2#define __ROCKCHIP_BOOT_MODE_H
3
4/*high 24 bits is tag, low 8 bits is type*/
5#define REBOOT_FLAG 0x5242C300
6/* normal boot */
7#define BOOT_NORMAL (REBOOT_FLAG + 0)
8/* enter bootloader rockusb mode */
9#define BOOT_BL_DOWNLOAD (REBOOT_FLAG + 1)
10/* enter recovery */
11#define BOOT_RECOVERY (REBOOT_FLAG + 3)
12 /* enter fastboot mode */
13#define BOOT_FASTBOOT (REBOOT_FLAG + 9)
14
15#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 02:01:28 -0400