diff options
author | Murali Karicheri <m-karicheri2@ti.com> | 2017-10-09 12:42:01 -0400 |
---|---|---|
committer | Santosh Shilimkar <ssantosh@kernel.org> | 2017-10-10 12:42:56 -0400 |
commit | 1efed4072c5992ede080987e6d83dfead6af126a (patch) | |
tree | efb8ea8c2ddc1c72cbf86732bde2c22e6218c07e | |
parent | 729ce96967f6f4983e103feddd6b87b33738aa0b (diff) |
ARM: dts: keystone-k2g-evm: add bindings for SPI NOR flash
K2G EVM has n25q128a13 SPI NOR flash on SPI1. Enable SPI1 in the DT
node as well as add a subnode for the SPI NOR.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
-rw-r--r-- | arch/arm/boot/dts/keystone-k2g-evm.dts | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts index f88833ab4410..656af194a518 100644 --- a/arch/arm/boot/dts/keystone-k2g-evm.dts +++ b/arch/arm/boot/dts/keystone-k2g-evm.dts | |||
@@ -51,6 +51,16 @@ | |||
51 | K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */ | 51 | K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */ |
52 | >; | 52 | >; |
53 | }; | 53 | }; |
54 | |||
55 | spi1_pins: pinmux_spi1_pins { | ||
56 | pinctrl-single,pins = < | ||
57 | K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_scs0.spi1_scs0 */ | ||
58 | K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_clk.spi1_clk */ | ||
59 | K2G_CORE_IOPAD(0x11b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_miso.spi1_miso */ | ||
60 | K2G_CORE_IOPAD(0x11b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_mosi.spi1_mosi */ | ||
61 | >; | ||
62 | }; | ||
63 | |||
54 | }; | 64 | }; |
55 | 65 | ||
56 | &k2g_pinctrl { | 66 | &k2g_pinctrl { |
@@ -169,3 +179,29 @@ | |||
169 | pinctrl-names = "default"; | 179 | pinctrl-names = "default"; |
170 | pinctrl-0 = <&ecap0_pins>; | 180 | pinctrl-0 = <&ecap0_pins>; |
171 | }; | 181 | }; |
182 | |||
183 | &spi1 { | ||
184 | pinctrl-names = "default"; | ||
185 | pinctrl-0 = <&spi1_pins>; | ||
186 | status = "okay"; | ||
187 | |||
188 | spi_nor: flash@0 { | ||
189 | #address-cells = <1>; | ||
190 | #size-cells = <1>; | ||
191 | compatible = "jedec,spi-nor"; | ||
192 | spi-max-frequency = <5000000>; | ||
193 | m25p,fast-read; | ||
194 | reg = <0>; | ||
195 | |||
196 | partition@0 { | ||
197 | label = "u-boot-spl"; | ||
198 | reg = <0x0 0x100000>; | ||
199 | read-only; | ||
200 | }; | ||
201 | |||
202 | partition@1 { | ||
203 | label = "misc"; | ||
204 | reg = <0x100000 0xf00000>; | ||
205 | }; | ||
206 | }; | ||
207 | }; | ||