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authorLinus Torvalds <torvalds@linux-foundation.org>2016-05-17 20:39:42 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-05-17 20:39:42 -0400
commit1eccc6e1529ec7ad1cebbd2c97ceb2a1a39f7d76 (patch)
tree725aff1150489e706b2b8b854b195a7a50dc6501
parentdcc4c2f61cdc7e0ab61b25b8d28205302497a8c4 (diff)
parentd30a2b47d4c2b75573d93f60655d48ba8e3ed2b3 (diff)
Merge tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for kernel cycle v4.7: Core infrastructural changes: - Support for natively single-ended GPIO driver stages. This means that if the hardware has registers to configure open drain or open source configuration, we use that rather than (as we did before) try to emulate it by switching the line to an input to get high impedance. This is also documented throughly in Documentation/gpio/driver.txt for those of you who did not understand one word of what I just wrote. - Start to do away with the unnecessarily complex and unitelligible ARCH_REQUIRE_GPIOLIB and ARCH_WANT_OPTIONAL_GPIOLIB, another evolutional artifact from the time when the GPIO subsystem was unmaintained. Archs can now just select GPIOLIB and be done with it, cleanups to arches will trickle in for the next kernel. Some minor archs ACKed the changes immediately so these are included in this pull request. - Advancing the use of the data pointer inside the GPIO device for storing driver data by switching the PowerPC, Super-H Unicore and a few other subarches or subsystem drivers in ALSA SoC, Input, serial, SSB, staging etc to use it. - The initialization now reads the input/output state of the GPIO lines, so that each GPIO descriptor knows - if this callback is implemented - whether the line is input or output. This also reflects nicely in userspace "lsgpio". - It is now possible to name GPIO producer names, line names, from the device tree. (Platform data has been supported for a while). I bet we will get a similar mechanism for ACPI one of those days. This makes is possible to get sensible producer names for e.g. GPIO rails in "lsgpio" in userspace. New drivers: - New driver for the Loongson1. - The XLP driver now supports Broadcom Vulcan ARM64. - The IT87 driver now supports IT8620 and IT8628. - The PCA953X driver now supports Galileo Gen2. Driver improvements: - MCP23S08 was switched to use the gpiolib irqchip helpers and now also suppors level-triggered interrupts. - 74x164 and RCAR now supports the .set_multiple() callback - AMDPT was converted to use generic GPIO. - TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994 support the new single ended callback for open drain and in some cases open source. - Implement the .get_direction() callback for a few more drivers like PL061, Xgene. Cleanups: - Paul Gortmaker combed through the drivers and de-modularized those who are not really modules. - Move the GPIO poweroff DT bindings to the power subdir where they belong. - Rename gpio-generic.c to gpio-mmio.c, which is much more to the point. That's what it is handling, nothing more, nothing less" * tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (126 commits) MIPS: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB gpio: zevio: make it explicitly non-modular gpio: timberdale: make it explicitly non-modular gpio: stmpe: make it explicitly non-modular gpio: sodaville: make it explicitly non-modular pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on error gpio: dwapb: Add ACPI device ID for DWAPB GPIO controller on X-Gene platforms gpio: dt-bindings: add wd,mbl-gpio bindings gpio: of: make it possible to name GPIO lines gpio: make gpiod_to_irq() return negative for NO_IRQ gpio: xgene: implement .get_direction() gpio: xgene: Enable ACPI support for X-Gene GFC GPIO driver gpio: tegra: Implement gpio_get_direction callback gpio: set up initial state from .get_direction() gpio: rename gpio-generic.c into gpio-mmio.c gpio: generic: fix GPIO_GENERIC_PLATFORM is set to module case gpio: dwapb: add gpio-signaled acpi event support gpio: dwapb: convert device node to fwnode gpio: dwapb: remove name from dwapb_port_property gpio/qoriq: select IRQ_DOMAIN ...
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-74x164.txt4
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt20
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-xlp.txt3
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio.txt26
-rw-r--r--Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt38
-rw-r--r--Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt (renamed from Documentation/devicetree/bindings/gpio/gpio-poweroff.txt)0
-rw-r--r--Documentation/devicetree/bindings/power/reset/gpio-restart.txt (renamed from Documentation/devicetree/bindings/gpio/gpio-restart.txt)0
-rw-r--r--Documentation/gpio/driver.txt97
-rw-r--r--MAINTAINERS1
-rw-r--r--arch/alpha/Kconfig1
-rw-r--r--arch/arc/plat-axs10x/Kconfig2
-rw-r--r--arch/arc/plat-tb10x/Kconfig2
-rw-r--r--arch/avr32/Kconfig2
-rw-r--r--arch/cris/Kconfig2
-rw-r--r--arch/m68k/Kconfig.cpu2
-rw-r--r--arch/metag/Kconfig.soc1
-rw-r--r--arch/mips/Kconfig32
-rw-r--r--arch/mips/alchemy/Kconfig2
-rw-r--r--arch/mips/pic32/Kconfig2
-rw-r--r--arch/nios2/Kconfig1
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_gpt.c15
-rw-r--r--arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c6
-rw-r--r--arch/powerpc/sysdev/cpm1.c36
-rw-r--r--arch/powerpc/sysdev/cpm_common.c18
-rw-r--r--arch/powerpc/sysdev/ppc4xx_gpio.c17
-rw-r--r--arch/powerpc/sysdev/simple_gpio.c13
-rw-r--r--arch/sh/boards/mach-sdk7786/gpio.c4
-rw-r--r--arch/sh/boards/mach-x3proto/gpio.c4
-rw-r--r--arch/sparc/Kconfig1
-rw-r--r--arch/unicore32/kernel/gpio.c4
-rw-r--r--arch/xtensa/Kconfig1
-rw-r--r--drivers/gpio/Kconfig22
-rw-r--r--drivers/gpio/Makefile6
-rw-r--r--drivers/gpio/gpio-74x164.c25
-rw-r--r--drivers/gpio/gpio-amdpt.c123
-rw-r--r--drivers/gpio/gpio-bcm-kona.c14
-rw-r--r--drivers/gpio/gpio-brcmstb.c1
-rw-r--r--drivers/gpio/gpio-dwapb.c78
-rw-r--r--drivers/gpio/gpio-f7188x.c52
-rw-r--r--drivers/gpio/gpio-it87.c10
-rw-r--r--drivers/gpio/gpio-loongson1.c102
-rw-r--r--drivers/gpio/gpio-mb86s7x.c10
-rw-r--r--drivers/gpio/gpio-mc9s08dz60.c12
-rw-r--r--drivers/gpio/gpio-mcp23s08.c111
-rw-r--r--drivers/gpio/gpio-menz127.c22
-rw-r--r--drivers/gpio/gpio-mmio.c (renamed from drivers/gpio/gpio-generic.c)2
-rw-r--r--drivers/gpio/gpio-moxart.c7
-rw-r--r--drivers/gpio/gpio-mvebu.c5
-rw-r--r--drivers/gpio/gpio-octeon.c26
-rw-r--r--drivers/gpio/gpio-omap.c42
-rw-r--r--drivers/gpio/gpio-palmas.c13
-rw-r--r--drivers/gpio/gpio-pca953x.c42
-rw-r--r--drivers/gpio/gpio-pl061.c26
-rw-r--r--drivers/gpio/gpio-rc5t583.c12
-rw-r--r--drivers/gpio/gpio-rcar.c20
-rw-r--r--drivers/gpio/gpio-sodaville.c28
-rw-r--r--drivers/gpio/gpio-sta2x11.c8
-rw-r--r--drivers/gpio/gpio-stmpe.c31
-rw-r--r--drivers/gpio/gpio-sx150x.c100
-rw-r--r--drivers/gpio/gpio-tc3589x.c69
-rw-r--r--drivers/gpio/gpio-tegra.c485
-rw-r--r--drivers/gpio/gpio-timberdale.c35
-rw-r--r--drivers/gpio/gpio-tpic2810.c35
-rw-r--r--drivers/gpio/gpio-tps65218.c45
-rw-r--r--drivers/gpio/gpio-tps6586x.c13
-rw-r--r--drivers/gpio/gpio-tps65910.c16
-rw-r--r--drivers/gpio/gpio-vx855.c23
-rw-r--r--drivers/gpio/gpio-wm831x.c25
-rw-r--r--drivers/gpio/gpio-wm8994.c25
-rw-r--r--drivers/gpio/gpio-xgene-sb.c15
-rw-r--r--drivers/gpio/gpio-xgene.c30
-rw-r--r--drivers/gpio/gpio-xlp.c25
-rw-r--r--drivers/gpio/gpio-zevio.c21
-rw-r--r--drivers/gpio/gpio-zx.c14
-rw-r--r--drivers/gpio/gpio-zynq.c4
-rw-r--r--drivers/gpio/gpiolib-of.c66
-rw-r--r--drivers/gpio/gpiolib.c133
-rw-r--r--drivers/gpio/gpiolib.h4
-rw-r--r--drivers/input/keyboard/adp5588-keys.c10
-rw-r--r--drivers/input/keyboard/adp5589-keys.c12
-rw-r--r--drivers/input/touchscreen/ad7879.c10
-rw-r--r--drivers/mfd/intel_quark_i2c_gpio.c3
-rw-r--r--drivers/pinctrl/sh-pfc/gpio.c2
-rw-r--r--drivers/platform/x86/intel_pmic_gpio.c6
-rw-r--r--drivers/soc/fsl/qe/gpio.c20
-rw-r--r--drivers/ssb/driver_gpio.c33
-rw-r--r--drivers/staging/vme/devices/vme_pio2_gpio.c17
-rw-r--r--drivers/tty/serial/max310x.c12
-rw-r--r--drivers/tty/serial/sc16is7xx.c16
-rw-r--r--include/linux/gpio/driver.h25
-rw-r--r--include/linux/i2c/sx150x.h82
-rw-r--r--include/linux/platform_data/gpio-dwapb.h3
-rw-r--r--kernel/irq/irqdomain.c1
-rw-r--r--sound/soc/codecs/rt5677.c17
-rw-r--r--sound/soc/codecs/wm5100.c16
-rw-r--r--sound/soc/codecs/wm8903.c17
-rw-r--r--sound/soc/codecs/wm8962.c15
-rw-r--r--sound/soc/codecs/wm8996.c16
-rw-r--r--sound/soc/soc-ac97.c8
-rw-r--r--tools/gpio/Makefile2
-rw-r--r--tools/gpio/lsgpio.c2
101 files changed, 1566 insertions, 1169 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-74x164.txt b/Documentation/devicetree/bindings/gpio/gpio-74x164.txt
index cc2608021f26..ce1b2231bf5d 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-74x164.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-74x164.txt
@@ -1,7 +1,9 @@
1* Generic 8-bits shift register GPIO driver 1* Generic 8-bits shift register GPIO driver
2 2
3Required properties: 3Required properties:
4- compatible : Should be "fairchild,74hc595" 4- compatible: Should contain one of the following:
5 "fairchild,74hc595"
6 "nxp,74lvc594"
5- reg : chip select number 7- reg : chip select number
6- gpio-controller : Marks the device node as a gpio controller. 8- gpio-controller : Marks the device node as a gpio controller.
7- #gpio-cells : Should be two. The first cell is the pin number and 9- #gpio-cells : Should be two. The first cell is the pin number and
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 120bc4971cf3..4b6cc632ca5c 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -1,9 +1,10 @@
1* Freescale MPC512x/MPC8xxx/Layerscape GPIO controller 1* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
2 2
3Required properties: 3Required properties:
4- compatible : Should be "fsl,<soc>-gpio" 4- compatible : Should be "fsl,<soc>-gpio"
5 The following <soc>s are known to be supported: 5 The following <soc>s are known to be supported:
6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq. 6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
7 ls1021a, ls1043a, ls2080a.
7- reg : Address and length of the register set for the device 8- reg : Address and length of the register set for the device
8- interrupts : Should be the port interrupt shared by all 32 pins. 9- interrupts : Should be the port interrupt shared by all 32 pins.
9- #gpio-cells : Should be two. The first cell is the pin number and 10- #gpio-cells : Should be two. The first cell is the pin number and
@@ -15,7 +16,7 @@ Optional properties:
15- little-endian : GPIO registers are used as little endian. If not 16- little-endian : GPIO registers are used as little endian. If not
16 present registers are used as big endian by default. 17 present registers are used as big endian by default.
17 18
18Example: 19Example of gpio-controller node for a mpc5125 SoC:
19 20
20gpio0: gpio@1100 { 21gpio0: gpio@1100 {
21 compatible = "fsl,mpc5125-gpio"; 22 compatible = "fsl,mpc5125-gpio";
@@ -24,3 +25,16 @@ gpio0: gpio@1100 {
24 interrupts = <78 0x8>; 25 interrupts = <78 0x8>;
25 status = "okay"; 26 status = "okay";
26}; 27};
28
29Example of gpio-controller node for a ls2080a SoC:
30
31gpio0: gpio@2300000 {
32 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
33 reg = <0x0 0x2300000 0x0 0x10000>;
34 interrupts = <0 36 0x4>; /* Level high type */
35 gpio-controller;
36 little-endian;
37 #gpio-cells = <2>;
38 interrupt-controller;
39 #interrupt-cells = <2>;
40};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-xlp.txt b/Documentation/devicetree/bindings/gpio/gpio-xlp.txt
index 262ee4ddf2cb..28662d83a43e 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-xlp.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-xlp.txt
@@ -3,6 +3,8 @@ Netlogic XLP Family GPIO
3 3
4This GPIO driver is used for following Netlogic XLP SoCs: 4This GPIO driver is used for following Netlogic XLP SoCs:
5 XLP832, XLP316, XLP208, XLP980, XLP532 5 XLP832, XLP316, XLP208, XLP980, XLP532
6This GPIO driver is also compatible with GPIO controller found on
7Broadcom Vulcan ARM64.
6 8
7Required properties: 9Required properties:
8------------------- 10-------------------
@@ -13,6 +15,7 @@ Required properties:
13 - "netlogic,xlp208-gpio": For Netlogic XLP208 15 - "netlogic,xlp208-gpio": For Netlogic XLP208
14 - "netlogic,xlp980-gpio": For Netlogic XLP980 16 - "netlogic,xlp980-gpio": For Netlogic XLP980
15 - "netlogic,xlp532-gpio": For Netlogic XLP532 17 - "netlogic,xlp532-gpio": For Netlogic XLP532
18 - "brcm,vulcan-gpio": For Broadcom Vulcan ARM64
16- reg: Physical base address and length of the controller's registers. 19- reg: Physical base address and length of the controller's registers.
17- #gpio-cells: Should be two. The first cell is the pin number and the second 20- #gpio-cells: Should be two. The first cell is the pin number and the second
18 cell is used to specify optional parameters (currently unused). 21 cell is used to specify optional parameters (currently unused).
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index 069cdf6f9dac..68d28f62a6f4 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -131,6 +131,13 @@ Every GPIO controller node must contain both an empty "gpio-controller"
131property, and a #gpio-cells integer property, which indicates the number of 131property, and a #gpio-cells integer property, which indicates the number of
132cells in a gpio-specifier. 132cells in a gpio-specifier.
133 133
134Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
135instance of a hardware IP core on a silicon die, usually exposed to the
136programmer as a coherent range of I/O addresses. Usually each such bank is
137exposed in the device tree as an individual gpio-controller node, reflecting
138the fact that the hardware was synthesized by reusing the same IP block a
139few times over.
140
134Optionally, a GPIO controller may have a "ngpios" property. This property 141Optionally, a GPIO controller may have a "ngpios" property. This property
135indicates the number of in-use slots of available slots for GPIOs. The 142indicates the number of in-use slots of available slots for GPIOs. The
136typical example is something like this: the hardware register is 32 bits 143typical example is something like this: the hardware register is 32 bits
@@ -145,6 +152,21 @@ additional bitmask is needed to specify which GPIOs are actually in use,
145and which are dummies. The bindings for this case has not yet been 152and which are dummies. The bindings for this case has not yet been
146specified, but should be specified if/when such hardware appears. 153specified, but should be specified if/when such hardware appears.
147 154
155Optionally, a GPIO controller may have a "gpio-line-names" property. This is
156an array of strings defining the names of the GPIO lines going out of the
157GPIO controller. This name should be the most meaningful producer name
158for the system, such as a rail name indicating the usage. Package names
159such as pin name are discouraged: such lines have opaque names (since they
160are by definition generic purpose) and such names are usually not very
161helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
162reasonable line names as they describe what the line is used for. "GPIO0"
163is not a good name to give to a GPIO line. Placeholders are discouraged:
164rather use the "" (blank string) if the use of the GPIO line is undefined
165in your design. The names are assigned starting from line offset 0 from
166left to right from the passed array. An incomplete array (where the number
167of passed named are less than ngpios) will still be used up until the last
168provided valid line index.
169
148Example: 170Example:
149 171
150gpio-controller@00000000 { 172gpio-controller@00000000 {
@@ -153,6 +175,10 @@ gpio-controller@00000000 {
153 gpio-controller; 175 gpio-controller;
154 #gpio-cells = <2>; 176 #gpio-cells = <2>;
155 ngpios = <18>; 177 ngpios = <18>;
178 gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",
179 "LED G", "LED B", "Col A", "Col B", "Col C", "Col D",
180 "Row A", "Row B", "Row C", "Row D", "NMI button",
181 "poweroff", "reset";
156} 182}
157 183
158The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism 184The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
diff --git a/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
new file mode 100644
index 000000000000..038c3a6a1f4d
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
@@ -0,0 +1,38 @@
1Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
2
3The Western Digital MyBook Live has two memory-mapped GPIO controllers.
4Both GPIO controller only have a single 8-bit data register, where GPIO
5state can be read and/or written.
6
7Required properties:
8 - compatible: should be "wd,mbl-gpio"
9 - reg-names: must contain
10 "dat" - data register
11 - reg: address + size pairs describing the GPIO register sets;
12 order must correspond with the order of entries in reg-names
13 - #gpio-cells: must be set to 2. The first cell is the pin number and
14 the second cell is used to specify the gpio polarity:
15 0 = active high
16 1 = active low
17 - gpio-controller: Marks the device node as a gpio controller.
18
19Optional properties:
20 - no-output: GPIOs are read-only.
21
22Examples:
23 gpio0: gpio0@e0000000 {
24 compatible = "wd,mbl-gpio";
25 reg-names = "dat";
26 reg = <0xe0000000 0x1>;
27 #gpio-cells = <2>;
28 gpio-controller;
29 };
30
31 gpio1: gpio1@e0100000 {
32 compatible = "wd,mbl-gpio";
33 reg-names = "dat";
34 reg = <0xe0100000 0x1>;
35 #gpio-cells = <2>;
36 gpio-controller;
37 no-output;
38 };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt
index d4eab9227ea4..d4eab9227ea4 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
+++ b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt
diff --git a/Documentation/devicetree/bindings/gpio/gpio-restart.txt b/Documentation/devicetree/bindings/power/reset/gpio-restart.txt
index af3701bc15c4..af3701bc15c4 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-restart.txt
+++ b/Documentation/devicetree/bindings/power/reset/gpio-restart.txt
diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt
index bbeec415f406..6cb35a78eff4 100644
--- a/Documentation/gpio/driver.txt
+++ b/Documentation/gpio/driver.txt
@@ -68,6 +68,103 @@ control callbacks) if it is expected to call GPIO APIs from atomic context
68on -RT (inside hard IRQ handlers and similar contexts). Normally this should 68on -RT (inside hard IRQ handlers and similar contexts). Normally this should
69not be required. 69not be required.
70 70
71
72GPIOs with open drain/source support
73------------------------------------
74
75Open drain (CMOS) or open collector (TTL) means the line is not actively driven
76high: instead you provide the drain/collector as output, so when the transistor
77is not open, it will present a high-impedance (tristate) to the external rail.
78
79
80 CMOS CONFIGURATION TTL CONFIGURATION
81
82 ||--- out +--- out
83 in ----|| |/
84 ||--+ in ----|
85 | |\
86 GND GND
87
88This configuration is normally used as a way to achieve one of two things:
89
90- Level-shifting: to reach a logical level higher than that of the silicon
91 where the output resides.
92
93- inverse wire-OR on an I/O line, for example a GPIO line, making it possible
94 for any driving stage on the line to drive it low even if any other output
95 to the same line is simultaneously driving it high. A special case of this
96 is driving the SCL and SCA lines of an I2C bus, which is by definition a
97 wire-OR bus.
98
99Both usecases require that the line be equipped with a pull-up resistor. This
100resistor will make the line tend to high level unless one of the transistors on
101the rail actively pulls it down.
102
103The level on the line will go as high as the VDD on the pull-up resistor, which
104may be higher than the level supported by the transistor, achieveing a
105level-shift to the higher VDD.
106
107Integrated electronics often have an output driver stage in the form of a CMOS
108"totem-pole" with one N-MOS and one P-MOS transistor where one of them drives
109the line high and one of them drives the line low. This is called a push-pull
110output. The "totem-pole" looks like so:
111
112 VDD
113 |
114 OD ||--+
115 +--/ ---o|| P-MOS-FET
116 | ||--+
117IN --+ +----- out
118 | ||--+
119 +--/ ----|| N-MOS-FET
120 OS ||--+
121 |
122 GND
123
124The desired output signal (e.g. coming directly from some GPIO output register)
125arrives at IN. The switches named "OD" and "OS" are normally closed, creating
126a push-pull circuit.
127
128Consider the little "switches" named "OD" and "OS" that enable/disable the
129P-MOS or N-MOS transistor right after the split of the input. As you can see,
130either transistor will go totally numb if this switch is open. The totem-pole
131is then halved and give high impedance instead of actively driving the line
132high or low respectively. That is usually how software-controlled open
133drain/source works.
134
135Some GPIO hardware come in open drain / open source configuration. Some are
136hard-wired lines that will only support open drain or open source no matter
137what: there is only one transistor there. Some are software-configurable:
138by flipping a bit in a register the output can be configured as open drain
139or open source, in practice by flicking open the switches labeled "OD" and "OS"
140in the drawing above.
141
142By disabling the P-MOS transistor, the output can be driven between GND and
143high impedance (open drain), and by disabling the N-MOS transistor, the output
144can be driven between VDD and high impedance (open source). In the first case,
145a pull-up resistor is needed on the outgoing rail to complete the circuit, and
146in the second case, a pull-down resistor is needed on the rail.
147
148Hardware that supports open drain or open source or both, can implement a
149special callback in the gpio_chip: .set_single_ended() that takes an enum flag
150telling whether to configure the line as open drain, open source or push-pull.
151This will happen in response to the GPIO_OPEN_DRAIN or GPIO_OPEN_SOURCE flag
152set in the machine file, or coming from other hardware descriptions.
153
154If this state can not be configured in hardware, i.e. if the GPIO hardware does
155not support open drain/open source in hardware, the GPIO library will instead
156use a trick: when a line is set as output, if the line is flagged as open
157drain, and the IN output value is low, it will be driven low as usual. But
158if the IN output value is set to high, it will instead *NOT* be driven high,
159instead it will be switched to input, as input mode is high impedance, thus
160achieveing an "open drain emulation" of sorts: electrically the behaviour will
161be identical, with the exception of possible hardware glitches when switching
162the mode of the line.
163
164For open source configuration the same principle is used, just that instead
165of actively driving the line low, it is set to input.
166
167
71GPIO drivers providing IRQs 168GPIO drivers providing IRQs
72--------------------------- 169---------------------------
73It is custom that GPIO drivers (GPIO chips) are also providing interrupts, 170It is custom that GPIO drivers (GPIO chips) are also providing interrupts,
diff --git a/MAINTAINERS b/MAINTAINERS
index 1dd9335de071..8267754b9427 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4902,6 +4902,7 @@ M: Alexandre Courbot <gnurou@gmail.com>
4902L: linux-gpio@vger.kernel.org 4902L: linux-gpio@vger.kernel.org
4903T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git 4903T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
4904S: Maintained 4904S: Maintained
4905F: Documentation/devicetree/bindings/gpio/
4905F: Documentation/gpio/ 4906F: Documentation/gpio/
4906F: Documentation/ABI/testing/gpio-cdev 4907F: Documentation/ABI/testing/gpio-cdev
4907F: Documentation/ABI/obsolete/sysfs-gpio 4908F: Documentation/ABI/obsolete/sysfs-gpio
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 9d8a85801ed1..fe99f894e57d 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -13,7 +13,6 @@ config ALPHA
13 select GENERIC_IRQ_PROBE 13 select GENERIC_IRQ_PROBE
14 select AUTO_IRQ_AFFINITY if SMP 14 select AUTO_IRQ_AFFINITY if SMP
15 select GENERIC_IRQ_SHOW 15 select GENERIC_IRQ_SHOW
16 select ARCH_WANT_OPTIONAL_GPIOLIB
17 select ARCH_WANT_IPC_PARSE_VERSION 16 select ARCH_WANT_IPC_PARSE_VERSION
18 select ARCH_HAVE_NMI_SAFE_CMPXCHG 17 select ARCH_HAVE_NMI_SAFE_CMPXCHG
19 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 18 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
diff --git a/arch/arc/plat-axs10x/Kconfig b/arch/arc/plat-axs10x/Kconfig
index 426ac4b8bb39..c54d1ae57fe0 100644
--- a/arch/arc/plat-axs10x/Kconfig
+++ b/arch/arc/plat-axs10x/Kconfig
@@ -13,7 +13,7 @@ menuconfig ARC_PLAT_AXS10X
13 select OF_GPIO 13 select OF_GPIO
14 select MIGHT_HAVE_PCI 14 select MIGHT_HAVE_PCI
15 select GENERIC_IRQ_CHIP 15 select GENERIC_IRQ_CHIP
16 select ARCH_REQUIRE_GPIOLIB 16 select GPIOLIB
17 help 17 help
18 Support for the ARC AXS10x Software Development Platforms. 18 Support for the ARC AXS10x Software Development Platforms.
19 19
diff --git a/arch/arc/plat-tb10x/Kconfig b/arch/arc/plat-tb10x/Kconfig
index d14b3d3c5dfd..149e0917645d 100644
--- a/arch/arc/plat-tb10x/Kconfig
+++ b/arch/arc/plat-tb10x/Kconfig
@@ -21,7 +21,7 @@ menuconfig ARC_PLAT_TB10X
21 select PINCTRL 21 select PINCTRL
22 select PINCTRL_TB10X 22 select PINCTRL_TB10X
23 select PINMUX 23 select PINMUX
24 select ARCH_REQUIRE_GPIOLIB 24 select GPIOLIB
25 select GPIO_TB10X 25 select GPIO_TB10X
26 select TB10X_IRQC 26 select TB10X_IRQC
27 help 27 help
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index b6878eb64884..18b88779e701 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -74,7 +74,7 @@ config PLATFORM_AT32AP
74 select SUBARCH_AVR32B 74 select SUBARCH_AVR32B
75 select MMU 75 select MMU
76 select PERFORMANCE_COUNTERS 76 select PERFORMANCE_COUNTERS
77 select ARCH_REQUIRE_GPIOLIB 77 select GPIOLIB
78 select GENERIC_ALLOCATOR 78 select GENERIC_ALLOCATOR
79 select HAVE_FB_ATMEL 79 select HAVE_FB_ATMEL
80 80
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index e086f9e93728..99bda1ba3d2f 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -61,7 +61,7 @@ config CRIS
61 select CLONE_BACKWARDS2 61 select CLONE_BACKWARDS2
62 select OLD_SIGSUSPEND 62 select OLD_SIGSUSPEND
63 select OLD_SIGACTION 63 select OLD_SIGACTION
64 select ARCH_REQUIRE_GPIOLIB 64 select GPIOLIB
65 select IRQ_DOMAIN if ETRAX_ARCH_V32 65 select IRQ_DOMAIN if ETRAX_ARCH_V32
66 select OF if ETRAX_ARCH_V32 66 select OF if ETRAX_ARCH_V32
67 select OF_EARLY_FLATTREE if ETRAX_ARCH_V32 67 select OF_EARLY_FLATTREE if ETRAX_ARCH_V32
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index 0dfcf1281e9c..c1beb5ae181f 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -22,11 +22,11 @@ config M68KCLASSIC
22 22
23config COLDFIRE 23config COLDFIRE
24 bool "Coldfire CPU family support" 24 bool "Coldfire CPU family support"
25 select ARCH_REQUIRE_GPIOLIB
26 select ARCH_HAVE_CUSTOM_GPIO_H 25 select ARCH_HAVE_CUSTOM_GPIO_H
27 select CPU_HAS_NO_BITFIELDS 26 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_MULDIV64 27 select CPU_HAS_NO_MULDIV64
29 select GENERIC_CSUM 28 select GENERIC_CSUM
29 select GPIOLIB
30 select HAVE_CLK 30 select HAVE_CLK
31 31
32endchoice 32endchoice
diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index 973640f46752..50f979c2b02d 100644
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -16,7 +16,6 @@ config META21_FPGA
16 16
17config SOC_TZ1090 17config SOC_TZ1090
18 bool "Toumaz Xenif TZ1090 SoC (Comet)" 18 bool "Toumaz Xenif TZ1090 SoC (Comet)"
19 select ARCH_WANT_OPTIONAL_GPIOLIB
20 select IMGPDC_IRQ 19 select IMGPDC_IRQ
21 select METAG_LNKGET_AROUND_CACHE 20 select METAG_LNKGET_AROUND_CACHE
22 select METAG_META21 21 select METAG_META21
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3ee1ea61b2dc..d2ac1174ee17 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -79,7 +79,7 @@ config MIPS_ALCHEMY
79 select SYS_HAS_CPU_MIPS32_R1 79 select SYS_HAS_CPU_MIPS32_R1
80 select SYS_SUPPORTS_32BIT_KERNEL 80 select SYS_SUPPORTS_32BIT_KERNEL
81 select SYS_SUPPORTS_APM_EMULATION 81 select SYS_SUPPORTS_APM_EMULATION
82 select ARCH_REQUIRE_GPIOLIB 82 select GPIOLIB
83 select SYS_SUPPORTS_ZBOOT 83 select SYS_SUPPORTS_ZBOOT
84 select COMMON_CLK 84 select COMMON_CLK
85 85
@@ -98,7 +98,7 @@ config AR7
98 select SYS_SUPPORTS_LITTLE_ENDIAN 98 select SYS_SUPPORTS_LITTLE_ENDIAN
99 select SYS_SUPPORTS_MIPS16 99 select SYS_SUPPORTS_MIPS16
100 select SYS_SUPPORTS_ZBOOT_UART16550 100 select SYS_SUPPORTS_ZBOOT_UART16550
101 select ARCH_REQUIRE_GPIOLIB 101 select GPIOLIB
102 select VLYNQ 102 select VLYNQ
103 select HAVE_CLK 103 select HAVE_CLK
104 help 104 help
@@ -122,11 +122,11 @@ config ATH25
122config ATH79 122config ATH79
123 bool "Atheros AR71XX/AR724X/AR913X based boards" 123 bool "Atheros AR71XX/AR724X/AR913X based boards"
124 select ARCH_HAS_RESET_CONTROLLER 124 select ARCH_HAS_RESET_CONTROLLER
125 select ARCH_REQUIRE_GPIOLIB
126 select BOOT_RAW 125 select BOOT_RAW
127 select CEVT_R4K 126 select CEVT_R4K
128 select CSRC_R4K 127 select CSRC_R4K
129 select DMA_NONCOHERENT 128 select DMA_NONCOHERENT
129 select GPIOLIB
130 select HAVE_CLK 130 select HAVE_CLK
131 select COMMON_CLK 131 select COMMON_CLK
132 select CLKDEV_LOOKUP 132 select CLKDEV_LOOKUP
@@ -170,7 +170,6 @@ config BMIPS_GENERIC
170 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 170 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
171 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 171 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
172 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 172 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
173 select ARCH_WANT_OPTIONAL_GPIOLIB
174 help 173 help
175 Build a generic DT-based kernel image that boots on select 174 Build a generic DT-based kernel image that boots on select
176 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 175 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
@@ -179,7 +178,6 @@ config BMIPS_GENERIC
179 178
180config BCM47XX 179config BCM47XX
181 bool "Broadcom BCM47XX based boards" 180 bool "Broadcom BCM47XX based boards"
182 select ARCH_WANT_OPTIONAL_GPIOLIB
183 select BOOT_RAW 181 select BOOT_RAW
184 select CEVT_R4K 182 select CEVT_R4K
185 select CSRC_R4K 183 select CSRC_R4K
@@ -211,7 +209,7 @@ config BCM63XX
211 select SYS_SUPPORTS_BIG_ENDIAN 209 select SYS_SUPPORTS_BIG_ENDIAN
212 select SYS_HAS_EARLY_PRINTK 210 select SYS_HAS_EARLY_PRINTK
213 select SWAP_IO_SPACE 211 select SWAP_IO_SPACE
214 select ARCH_REQUIRE_GPIOLIB 212 select GPIOLIB
215 select HAVE_CLK 213 select HAVE_CLK
216 select MIPS_L1_CACHE_SHIFT_4 214 select MIPS_L1_CACHE_SHIFT_4
217 help 215 help
@@ -305,7 +303,7 @@ config MACH_INGENIC
305 select SYS_SUPPORTS_ZBOOT_UART16550 303 select SYS_SUPPORTS_ZBOOT_UART16550
306 select DMA_NONCOHERENT 304 select DMA_NONCOHERENT
307 select IRQ_MIPS_CPU 305 select IRQ_MIPS_CPU
308 select ARCH_REQUIRE_GPIOLIB 306 select GPIOLIB
309 select COMMON_CLK 307 select COMMON_CLK
310 select GENERIC_IRQ_CHIP 308 select GENERIC_IRQ_CHIP
311 select BUILTIN_DTB 309 select BUILTIN_DTB
@@ -325,7 +323,7 @@ config LANTIQ
325 select SYS_SUPPORTS_MIPS16 323 select SYS_SUPPORTS_MIPS16
326 select SYS_SUPPORTS_MULTITHREADING 324 select SYS_SUPPORTS_MULTITHREADING
327 select SYS_HAS_EARLY_PRINTK 325 select SYS_HAS_EARLY_PRINTK
328 select ARCH_REQUIRE_GPIOLIB 326 select GPIOLIB
329 select SWAP_IO_SPACE 327 select SWAP_IO_SPACE
330 select BOOT_RAW 328 select BOOT_RAW
331 select CLKDEV_LOOKUP 329 select CLKDEV_LOOKUP
@@ -377,7 +375,6 @@ config MACH_LOONGSON64
377 375
378config MACH_PISTACHIO 376config MACH_PISTACHIO
379 bool "IMG Pistachio SoC based boards" 377 bool "IMG Pistachio SoC based boards"
380 select ARCH_REQUIRE_GPIOLIB
381 select BOOT_ELF32 378 select BOOT_ELF32
382 select BOOT_RAW 379 select BOOT_RAW
383 select CEVT_R4K 380 select CEVT_R4K
@@ -385,6 +382,7 @@ config MACH_PISTACHIO
385 select COMMON_CLK 382 select COMMON_CLK
386 select CSRC_R4K 383 select CSRC_R4K
387 select DMA_MAYBE_COHERENT 384 select DMA_MAYBE_COHERENT
385 select GPIOLIB
388 select IRQ_MIPS_CPU 386 select IRQ_MIPS_CPU
389 select LIBFDT 387 select LIBFDT
390 select MFD_SYSCON 388 select MFD_SYSCON
@@ -406,13 +404,13 @@ config MACH_PISTACHIO
406 404
407config MACH_XILFPGA 405config MACH_XILFPGA
408 bool "MIPSfpga Xilinx based boards" 406 bool "MIPSfpga Xilinx based boards"
409 select ARCH_REQUIRE_GPIOLIB
410 select BOOT_ELF32 407 select BOOT_ELF32
411 select BOOT_RAW 408 select BOOT_RAW
412 select BUILTIN_DTB 409 select BUILTIN_DTB
413 select CEVT_R4K 410 select CEVT_R4K
414 select COMMON_CLK 411 select COMMON_CLK
415 select CSRC_R4K 412 select CSRC_R4K
413 select GPIOLIB
416 select IRQ_MIPS_CPU 414 select IRQ_MIPS_CPU
417 select LIBFDT 415 select LIBFDT
418 select MIPS_CPU_SCACHE 416 select MIPS_CPU_SCACHE
@@ -536,7 +534,7 @@ config MACH_VR41XX
536 select CSRC_R4K 534 select CSRC_R4K
537 select SYS_HAS_CPU_VR41XX 535 select SYS_HAS_CPU_VR41XX
538 select SYS_SUPPORTS_MIPS16 536 select SYS_SUPPORTS_MIPS16
539 select ARCH_REQUIRE_GPIOLIB 537 select GPIOLIB
540 538
541config NXP_STB220 539config NXP_STB220
542 bool "NXP STB220 board" 540 bool "NXP STB220 board"
@@ -856,7 +854,7 @@ config MIKROTIK_RB532
856 select SYS_SUPPORTS_LITTLE_ENDIAN 854 select SYS_SUPPORTS_LITTLE_ENDIAN
857 select SWAP_IO_SPACE 855 select SWAP_IO_SPACE
858 select BOOT_RAW 856 select BOOT_RAW
859 select ARCH_REQUIRE_GPIOLIB 857 select GPIOLIB
860 select MIPS_L1_CACHE_SHIFT_4 858 select MIPS_L1_CACHE_SHIFT_4
861 help 859 help
862 Support the Mikrotik(tm) RouterBoard 532 series, 860 Support the Mikrotik(tm) RouterBoard 532 series,
@@ -879,7 +877,7 @@ config CAVIUM_OCTEON_SOC
879 select HW_HAS_PCI 877 select HW_HAS_PCI
880 select ZONE_DMA32 878 select ZONE_DMA32
881 select HOLES_IN_ZONE 879 select HOLES_IN_ZONE
882 select ARCH_REQUIRE_GPIOLIB 880 select GPIOLIB
883 select LIBFDT 881 select LIBFDT
884 select USE_OF 882 select USE_OF
885 select ARCH_SPARSEMEM_ENABLE 883 select ARCH_SPARSEMEM_ENABLE
@@ -937,7 +935,7 @@ config NLM_XLP_BOARD
937 select SYS_SUPPORTS_32BIT_KERNEL 935 select SYS_SUPPORTS_32BIT_KERNEL
938 select SYS_SUPPORTS_64BIT_KERNEL 936 select SYS_SUPPORTS_64BIT_KERNEL
939 select ARCH_PHYS_ADDR_T_64BIT 937 select ARCH_PHYS_ADDR_T_64BIT
940 select ARCH_REQUIRE_GPIOLIB 938 select GPIOLIB
941 select SYS_SUPPORTS_BIG_ENDIAN 939 select SYS_SUPPORTS_BIG_ENDIAN
942 select SYS_SUPPORTS_LITTLE_ENDIAN 940 select SYS_SUPPORTS_LITTLE_ENDIAN
943 select SYS_SUPPORTS_HIGHMEM 941 select SYS_SUPPORTS_HIGHMEM
@@ -1077,7 +1075,7 @@ config MIPS_CLOCK_VSYSCALL
1077 def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1075 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1078 1076
1079config GPIO_TXX9 1077config GPIO_TXX9
1080 select ARCH_REQUIRE_GPIOLIB 1078 select GPIOLIB
1081 bool 1079 bool
1082 1080
1083config FW_CFE 1081config FW_CFE
@@ -1342,7 +1340,7 @@ config CPU_LOONGSON3
1342 select CPU_SUPPORTS_HUGEPAGES 1340 select CPU_SUPPORTS_HUGEPAGES
1343 select WEAK_ORDERING 1341 select WEAK_ORDERING
1344 select WEAK_REORDERING_BEYOND_LLSC 1342 select WEAK_REORDERING_BEYOND_LLSC
1345 select ARCH_REQUIRE_GPIOLIB 1343 select GPIOLIB
1346 help 1344 help
1347 The Loongson 3 processor implements the MIPS64R2 instruction 1345 The Loongson 3 processor implements the MIPS64R2 instruction
1348 set with many extensions. 1346 set with many extensions.
@@ -1362,7 +1360,7 @@ config CPU_LOONGSON2F
1362 bool "Loongson 2F" 1360 bool "Loongson 2F"
1363 depends on SYS_HAS_CPU_LOONGSON2F 1361 depends on SYS_HAS_CPU_LOONGSON2F
1364 select CPU_LOONGSON2 1362 select CPU_LOONGSON2
1365 select ARCH_REQUIRE_GPIOLIB 1363 select GPIOLIB
1366 help 1364 help
1367 The Loongson 2F processor implements the MIPS III instruction set 1365 The Loongson 2F processor implements the MIPS III instruction set
1368 with many extensions. 1366 with many extensions.
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 7fa24881b708..88b4d6a792c1 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -20,7 +20,7 @@ config MIPS_MTX1
20 20
21config MIPS_DB1XXX 21config MIPS_DB1XXX
22 bool "Alchemy DB1XXX / PB1XXX boards" 22 bool "Alchemy DB1XXX / PB1XXX boards"
23 select ARCH_REQUIRE_GPIOLIB 23 select GPIOLIB
24 select HW_HAS_PCI 24 select HW_HAS_PCI
25 select SYS_SUPPORTS_LITTLE_ENDIAN 25 select SYS_SUPPORTS_LITTLE_ENDIAN
26 select SYS_HAS_EARLY_PRINTK 26 select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/pic32/Kconfig b/arch/mips/pic32/Kconfig
index 1985971b9890..527d37da05ac 100644
--- a/arch/mips/pic32/Kconfig
+++ b/arch/mips/pic32/Kconfig
@@ -14,7 +14,7 @@ config PIC32MZDA
14 select SYS_HAS_EARLY_PRINTK 14 select SYS_HAS_EARLY_PRINTK
15 select SYS_SUPPORTS_32BIT_KERNEL 15 select SYS_SUPPORTS_32BIT_KERNEL
16 select SYS_SUPPORTS_LITTLE_ENDIAN 16 select SYS_SUPPORTS_LITTLE_ENDIAN
17 select ARCH_REQUIRE_GPIOLIB 17 select GPIOLIB
18 select COMMON_CLK 18 select COMMON_CLK
19 select CLKDEV_LOOKUP 19 select CLKDEV_LOOKUP
20 select LIBFDT 20 select LIBFDT
diff --git a/arch/nios2/Kconfig b/arch/nios2/Kconfig
index 437555424bda..87ca653eb5f3 100644
--- a/arch/nios2/Kconfig
+++ b/arch/nios2/Kconfig
@@ -1,6 +1,5 @@
1config NIOS2 1config NIOS2
2 def_bool y 2 def_bool y
3 select ARCH_WANT_OPTIONAL_GPIOLIB
4 select CLKSRC_OF 3 select CLKSRC_OF
5 select GENERIC_ATOMIC64 4 select GENERIC_ATOMIC64
6 select GENERIC_CLOCKEVENTS 5 select GENERIC_CLOCKEVENTS
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 3048e34db6d8..22645a7c6b8a 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -278,14 +278,9 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
278 * GPIOLIB hooks 278 * GPIOLIB hooks
279 */ 279 */
280#if defined(CONFIG_GPIOLIB) 280#if defined(CONFIG_GPIOLIB)
281static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc)
282{
283 return container_of(gc, struct mpc52xx_gpt_priv, gc);
284}
285
286static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio) 281static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
287{ 282{
288 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); 283 struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);
289 284
290 return (in_be32(&gpt->regs->status) >> 8) & 1; 285 return (in_be32(&gpt->regs->status) >> 8) & 1;
291} 286}
@@ -293,7 +288,7 @@ static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
293static void 288static void
294mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v) 289mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)
295{ 290{
296 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); 291 struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);
297 unsigned long flags; 292 unsigned long flags;
298 u32 r; 293 u32 r;
299 294
@@ -307,7 +302,7 @@ mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)
307 302
308static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 303static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
309{ 304{
310 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); 305 struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);
311 unsigned long flags; 306 unsigned long flags;
312 307
313 dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio); 308 dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);
@@ -354,9 +349,9 @@ mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
354 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK, 349 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
355 MPC52xx_GPT_MODE_MS_GPIO); 350 MPC52xx_GPT_MODE_MS_GPIO);
356 351
357 rc = gpiochip_add(&gpt->gc); 352 rc = gpiochip_add_data(&gpt->gc, gpt);
358 if (rc) 353 if (rc)
359 dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc); 354 dev_err(gpt->dev, "gpiochip_add_data() failed; rc=%i\n", rc);
360 355
361 dev_dbg(gpt->dev, "%s() complete.\n", __func__); 356 dev_dbg(gpt->dev, "%s() complete.\n", __func__);
362} 357}
diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
index 15e8021ddef9..dbcd0303afed 100644
--- a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
+++ b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
@@ -16,7 +16,7 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/mutex.h> 17#include <linux/mutex.h>
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/gpio.h> 19#include <linux/gpio/driver.h>
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_gpio.h> 21#include <linux/of_gpio.h>
22#include <linux/slab.h> 22#include <linux/slab.h>
@@ -99,7 +99,7 @@ static void mcu_power_off(void)
99 99
100static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 100static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
101{ 101{
102 struct mcu *mcu = container_of(gc, struct mcu, gc); 102 struct mcu *mcu = gpiochip_get_data(gc);
103 u8 bit = 1 << (4 + gpio); 103 u8 bit = 1 << (4 + gpio);
104 104
105 mutex_lock(&mcu->lock); 105 mutex_lock(&mcu->lock);
@@ -136,7 +136,7 @@ static int mcu_gpiochip_add(struct mcu *mcu)
136 gc->direction_output = mcu_gpio_dir_out; 136 gc->direction_output = mcu_gpio_dir_out;
137 gc->of_node = np; 137 gc->of_node = np;
138 138
139 return gpiochip_add(gc); 139 return gpiochip_add_data(gc, mcu);
140} 140}
141 141
142static int mcu_gpiochip_remove(struct mcu *mcu) 142static int mcu_gpiochip_remove(struct mcu *mcu)
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 8ed65365be50..6c110994d902 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -532,15 +532,9 @@ struct cpm1_gpio16_chip {
532 u16 cpdata; 532 u16 cpdata;
533}; 533};
534 534
535static inline struct cpm1_gpio16_chip *
536to_cpm1_gpio16_chip(struct of_mm_gpio_chip *mm_gc)
537{
538 return container_of(mm_gc, struct cpm1_gpio16_chip, mm_gc);
539}
540
541static void cpm1_gpio16_save_regs(struct of_mm_gpio_chip *mm_gc) 535static void cpm1_gpio16_save_regs(struct of_mm_gpio_chip *mm_gc)
542{ 536{
543 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); 537 struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
544 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 538 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
545 539
546 cpm1_gc->cpdata = in_be16(&iop->dat); 540 cpm1_gc->cpdata = in_be16(&iop->dat);
@@ -560,7 +554,7 @@ static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)
560static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask, 554static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,
561 int value) 555 int value)
562{ 556{
563 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); 557 struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
564 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 558 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
565 559
566 if (value) 560 if (value)
@@ -574,7 +568,7 @@ static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,
574static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) 568static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
575{ 569{
576 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 570 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
577 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); 571 struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
578 unsigned long flags; 572 unsigned long flags;
579 u16 pin_mask = 1 << (15 - gpio); 573 u16 pin_mask = 1 << (15 - gpio);
580 574
@@ -588,7 +582,7 @@ static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
588static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 582static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
589{ 583{
590 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 584 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
591 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); 585 struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
592 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 586 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
593 unsigned long flags; 587 unsigned long flags;
594 u16 pin_mask = 1 << (15 - gpio); 588 u16 pin_mask = 1 << (15 - gpio);
@@ -606,7 +600,7 @@ static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
606static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio) 600static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)
607{ 601{
608 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 602 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
609 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); 603 struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
610 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 604 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
611 unsigned long flags; 605 unsigned long flags;
612 u16 pin_mask = 1 << (15 - gpio); 606 u16 pin_mask = 1 << (15 - gpio);
@@ -642,7 +636,7 @@ int cpm1_gpiochip_add16(struct device_node *np)
642 gc->get = cpm1_gpio16_get; 636 gc->get = cpm1_gpio16_get;
643 gc->set = cpm1_gpio16_set; 637 gc->set = cpm1_gpio16_set;
644 638
645 return of_mm_gpiochip_add(np, mm_gc); 639 return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);
646} 640}
647 641
648struct cpm1_gpio32_chip { 642struct cpm1_gpio32_chip {
@@ -653,15 +647,9 @@ struct cpm1_gpio32_chip {
653 u32 cpdata; 647 u32 cpdata;
654}; 648};
655 649
656static inline struct cpm1_gpio32_chip *
657to_cpm1_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
658{
659 return container_of(mm_gc, struct cpm1_gpio32_chip, mm_gc);
660}
661
662static void cpm1_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc) 650static void cpm1_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
663{ 651{
664 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); 652 struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
665 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 653 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
666 654
667 cpm1_gc->cpdata = in_be32(&iop->dat); 655 cpm1_gc->cpdata = in_be32(&iop->dat);
@@ -681,7 +669,7 @@ static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
681static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask, 669static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
682 int value) 670 int value)
683{ 671{
684 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); 672 struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
685 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 673 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
686 674
687 if (value) 675 if (value)
@@ -695,7 +683,7 @@ static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
695static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) 683static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
696{ 684{
697 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 685 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
698 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); 686 struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
699 unsigned long flags; 687 unsigned long flags;
700 u32 pin_mask = 1 << (31 - gpio); 688 u32 pin_mask = 1 << (31 - gpio);
701 689
@@ -709,7 +697,7 @@ static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
709static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 697static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
710{ 698{
711 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 699 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
712 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); 700 struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
713 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 701 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
714 unsigned long flags; 702 unsigned long flags;
715 u32 pin_mask = 1 << (31 - gpio); 703 u32 pin_mask = 1 << (31 - gpio);
@@ -727,7 +715,7 @@ static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
727static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) 715static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
728{ 716{
729 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 717 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
730 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); 718 struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
731 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 719 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
732 unsigned long flags; 720 unsigned long flags;
733 u32 pin_mask = 1 << (31 - gpio); 721 u32 pin_mask = 1 << (31 - gpio);
@@ -763,7 +751,7 @@ int cpm1_gpiochip_add32(struct device_node *np)
763 gc->get = cpm1_gpio32_get; 751 gc->get = cpm1_gpio32_get;
764 gc->set = cpm1_gpio32_set; 752 gc->set = cpm1_gpio32_set;
765 753
766 return of_mm_gpiochip_add(np, mm_gc); 754 return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);
767} 755}
768 756
769static int cpm_init_par_io(void) 757static int cpm_init_par_io(void)
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 9d32465eddb1..0ac12e5fd8ab 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -80,15 +80,9 @@ struct cpm2_gpio32_chip {
80 u32 cpdata; 80 u32 cpdata;
81}; 81};
82 82
83static inline struct cpm2_gpio32_chip *
84to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
85{
86 return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
87}
88
89static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc) 83static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
90{ 84{
91 struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc); 85 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(&mm_gc->gc);
92 struct cpm2_ioports __iomem *iop = mm_gc->regs; 86 struct cpm2_ioports __iomem *iop = mm_gc->regs;
93 87
94 cpm2_gc->cpdata = in_be32(&iop->dat); 88 cpm2_gc->cpdata = in_be32(&iop->dat);
@@ -108,7 +102,7 @@ static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
108static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask, 102static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
109 int value) 103 int value)
110{ 104{
111 struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc); 105 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(&mm_gc->gc);
112 struct cpm2_ioports __iomem *iop = mm_gc->regs; 106 struct cpm2_ioports __iomem *iop = mm_gc->regs;
113 107
114 if (value) 108 if (value)
@@ -122,7 +116,7 @@ static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
122static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) 116static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
123{ 117{
124 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 118 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
125 struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc); 119 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);
126 unsigned long flags; 120 unsigned long flags;
127 u32 pin_mask = 1 << (31 - gpio); 121 u32 pin_mask = 1 << (31 - gpio);
128 122
@@ -136,7 +130,7 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
136static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 130static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
137{ 131{
138 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 132 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
139 struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc); 133 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);
140 struct cpm2_ioports __iomem *iop = mm_gc->regs; 134 struct cpm2_ioports __iomem *iop = mm_gc->regs;
141 unsigned long flags; 135 unsigned long flags;
142 u32 pin_mask = 1 << (31 - gpio); 136 u32 pin_mask = 1 << (31 - gpio);
@@ -154,7 +148,7 @@ static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
154static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) 148static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
155{ 149{
156 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 150 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
157 struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc); 151 struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);
158 struct cpm2_ioports __iomem *iop = mm_gc->regs; 152 struct cpm2_ioports __iomem *iop = mm_gc->regs;
159 unsigned long flags; 153 unsigned long flags;
160 u32 pin_mask = 1 << (31 - gpio); 154 u32 pin_mask = 1 << (31 - gpio);
@@ -190,6 +184,6 @@ int cpm2_gpiochip_add32(struct device_node *np)
190 gc->get = cpm2_gpio32_get; 184 gc->get = cpm2_gpio32_get;
191 gc->set = cpm2_gpio32_set; 185 gc->set = cpm2_gpio32_set;
192 186
193 return of_mm_gpiochip_add(np, mm_gc); 187 return of_mm_gpiochip_add_data(np, mm_gc, cpm2_gc);
194} 188}
195#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */ 189#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
diff --git a/arch/powerpc/sysdev/ppc4xx_gpio.c b/arch/powerpc/sysdev/ppc4xx_gpio.c
index d7a7ef135b9f..5382d04dd872 100644
--- a/arch/powerpc/sysdev/ppc4xx_gpio.c
+++ b/arch/powerpc/sysdev/ppc4xx_gpio.c
@@ -27,7 +27,7 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_gpio.h> 29#include <linux/of_gpio.h>
30#include <linux/gpio.h> 30#include <linux/gpio/driver.h>
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33 33
@@ -67,12 +67,6 @@ struct ppc4xx_gpio_chip {
67 * There are a maximum of 32 gpios in each gpio controller. 67 * There are a maximum of 32 gpios in each gpio controller.
68 */ 68 */
69 69
70static inline struct ppc4xx_gpio_chip *
71to_ppc4xx_gpiochip(struct of_mm_gpio_chip *mm_gc)
72{
73 return container_of(mm_gc, struct ppc4xx_gpio_chip, mm_gc);
74}
75
76static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio) 70static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
77{ 71{
78 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 72 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
@@ -96,8 +90,7 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
96static void 90static void
97ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 91ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
98{ 92{
99 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 93 struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);
100 struct ppc4xx_gpio_chip *chip = to_ppc4xx_gpiochip(mm_gc);
101 unsigned long flags; 94 unsigned long flags;
102 95
103 spin_lock_irqsave(&chip->lock, flags); 96 spin_lock_irqsave(&chip->lock, flags);
@@ -112,7 +105,7 @@ ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
112static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 105static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
113{ 106{
114 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 107 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
115 struct ppc4xx_gpio_chip *chip = to_ppc4xx_gpiochip(mm_gc); 108 struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);
116 struct ppc4xx_gpio __iomem *regs = mm_gc->regs; 109 struct ppc4xx_gpio __iomem *regs = mm_gc->regs;
117 unsigned long flags; 110 unsigned long flags;
118 111
@@ -142,7 +135,7 @@ static int
142ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 135ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
143{ 136{
144 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 137 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
145 struct ppc4xx_gpio_chip *chip = to_ppc4xx_gpiochip(mm_gc); 138 struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);
146 struct ppc4xx_gpio __iomem *regs = mm_gc->regs; 139 struct ppc4xx_gpio __iomem *regs = mm_gc->regs;
147 unsigned long flags; 140 unsigned long flags;
148 141
@@ -200,7 +193,7 @@ static int __init ppc4xx_add_gpiochips(void)
200 gc->get = ppc4xx_gpio_get; 193 gc->get = ppc4xx_gpio_get;
201 gc->set = ppc4xx_gpio_set; 194 gc->set = ppc4xx_gpio_set;
202 195
203 ret = of_mm_gpiochip_add(np, mm_gc); 196 ret = of_mm_gpiochip_add_data(np, mm_gc, ppc4xx_gc);
204 if (ret) 197 if (ret)
205 goto err; 198 goto err;
206 continue; 199 continue;
diff --git a/arch/powerpc/sysdev/simple_gpio.c b/arch/powerpc/sysdev/simple_gpio.c
index 56ce8ca3281b..ef470b470b04 100644
--- a/arch/powerpc/sysdev/simple_gpio.c
+++ b/arch/powerpc/sysdev/simple_gpio.c
@@ -19,7 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_gpio.h> 21#include <linux/of_gpio.h>
22#include <linux/gpio.h> 22#include <linux/gpio/driver.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <asm/prom.h> 24#include <asm/prom.h>
25#include "simple_gpio.h" 25#include "simple_gpio.h"
@@ -32,11 +32,6 @@ struct u8_gpio_chip {
32 u8 data; 32 u8 data;
33}; 33};
34 34
35static struct u8_gpio_chip *to_u8_gpio_chip(struct of_mm_gpio_chip *mm_gc)
36{
37 return container_of(mm_gc, struct u8_gpio_chip, mm_gc);
38}
39
40static u8 u8_pin2mask(unsigned int pin) 35static u8 u8_pin2mask(unsigned int pin)
41{ 36{
42 return 1 << (8 - 1 - pin); 37 return 1 << (8 - 1 - pin);
@@ -52,7 +47,7 @@ static int u8_gpio_get(struct gpio_chip *gc, unsigned int gpio)
52static void u8_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 47static void u8_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
53{ 48{
54 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 49 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
55 struct u8_gpio_chip *u8_gc = to_u8_gpio_chip(mm_gc); 50 struct u8_gpio_chip *u8_gc = gpiochip_get_data(gc);
56 unsigned long flags; 51 unsigned long flags;
57 52
58 spin_lock_irqsave(&u8_gc->lock, flags); 53 spin_lock_irqsave(&u8_gc->lock, flags);
@@ -80,7 +75,7 @@ static int u8_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
80 75
81static void u8_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) 76static void u8_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
82{ 77{
83 struct u8_gpio_chip *u8_gc = to_u8_gpio_chip(mm_gc); 78 struct u8_gpio_chip *u8_gc = gpiochip_get_data(&mm_gc->gc);
84 79
85 u8_gc->data = in_8(mm_gc->regs); 80 u8_gc->data = in_8(mm_gc->regs);
86} 81}
@@ -108,7 +103,7 @@ static int __init u8_simple_gpiochip_add(struct device_node *np)
108 gc->get = u8_gpio_get; 103 gc->get = u8_gpio_get;
109 gc->set = u8_gpio_set; 104 gc->set = u8_gpio_set;
110 105
111 ret = of_mm_gpiochip_add(np, mm_gc); 106 ret = of_mm_gpiochip_add_data(np, mm_gc, u8_gc);
112 if (ret) 107 if (ret)
113 goto err; 108 goto err;
114 return 0; 109 return 0;
diff --git a/arch/sh/boards/mach-sdk7786/gpio.c b/arch/sh/boards/mach-sdk7786/gpio.c
index f71ce09d4e15..47997010b77a 100644
--- a/arch/sh/boards/mach-sdk7786/gpio.c
+++ b/arch/sh/boards/mach-sdk7786/gpio.c
@@ -9,7 +9,7 @@
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/gpio.h> 12#include <linux/gpio/driver.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/spinlock.h> 15#include <linux/spinlock.h>
@@ -44,6 +44,6 @@ static struct gpio_chip usrgpir_gpio_chip = {
44 44
45static int __init usrgpir_gpio_setup(void) 45static int __init usrgpir_gpio_setup(void)
46{ 46{
47 return gpiochip_add(&usrgpir_gpio_chip); 47 return gpiochip_add_data(&usrgpir_gpio_chip, NULL);
48} 48}
49device_initcall(usrgpir_gpio_setup); 49device_initcall(usrgpir_gpio_setup);
diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c
index 1fb2cbee25f2..cea88b0effa2 100644
--- a/arch/sh/boards/mach-x3proto/gpio.c
+++ b/arch/sh/boards/mach-x3proto/gpio.c
@@ -13,7 +13,7 @@
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/gpio.h> 16#include <linux/gpio/driver.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
@@ -107,7 +107,7 @@ int __init x3proto_gpio_setup(void)
107 if (unlikely(ilsel < 0)) 107 if (unlikely(ilsel < 0))
108 return ilsel; 108 return ilsel;
109 109
110 ret = gpiochip_add(&x3proto_gpio_chip); 110 ret = gpiochip_add_data(&x3proto_gpio_chip, NULL);
111 if (unlikely(ret)) 111 if (unlikely(ret))
112 goto err_gpio; 112 goto err_gpio;
113 113
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index d5003812c748..db0a26cffa97 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -21,7 +21,6 @@ config SPARC
21 select HAVE_ARCH_KGDB if !SMP || SPARC64 21 select HAVE_ARCH_KGDB if !SMP || SPARC64
22 select HAVE_ARCH_TRACEHOOK 22 select HAVE_ARCH_TRACEHOOK
23 select SYSCTL_EXCEPTION_TRACE 23 select SYSCTL_EXCEPTION_TRACE
24 select ARCH_WANT_OPTIONAL_GPIOLIB
25 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 24 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
26 select RTC_CLASS 25 select RTC_CLASS
27 select RTC_DRV_M48T59 26 select RTC_DRV_M48T59
diff --git a/arch/unicore32/kernel/gpio.c b/arch/unicore32/kernel/gpio.c
index 5ab23794ea17..49347a0e9288 100644
--- a/arch/unicore32/kernel/gpio.c
+++ b/arch/unicore32/kernel/gpio.c
@@ -14,6 +14,8 @@
14 14
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/gpio/driver.h>
18/* FIXME: needed for gpio_set_value() - convert to use descriptors or hogs */
17#include <linux/gpio.h> 19#include <linux/gpio.h>
18#include <mach/hardware.h> 20#include <mach/hardware.h>
19 21
@@ -118,5 +120,5 @@ void __init puv3_init_gpio(void)
118 * gpio_set_value(GPO_SET_V2, 1); 120 * gpio_set_value(GPO_SET_V2, 1);
119 */ 121 */
120#endif 122#endif
121 gpiochip_add(&puv3_gpio_chip); 123 gpiochip_add_data(&puv3_gpio_chip, NULL);
122} 124}
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index e832d3e9835e..85257afe71c3 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -5,7 +5,6 @@ config XTENSA
5 def_bool y 5 def_bool y
6 select ARCH_WANT_FRAME_POINTERS 6 select ARCH_WANT_FRAME_POINTERS
7 select ARCH_WANT_IPC_PARSE_VERSION 7 select ARCH_WANT_IPC_PARSE_VERSION
8 select ARCH_WANT_OPTIONAL_GPIOLIB
9 select BUILDTIME_EXTABLE_SORT 8 select BUILDTIME_EXTABLE_SORT
10 select CLONE_BACKWARDS 9 select CLONE_BACKWARDS
11 select COMMON_CLK 10 select COMMON_CLK
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 5f3429f0bf46..d00e7b67be9a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -33,7 +33,6 @@ config ARCH_REQUIRE_GPIOLIB
33 33
34menuconfig GPIOLIB 34menuconfig GPIOLIB
35 bool "GPIO Support" 35 bool "GPIO Support"
36 depends on ARCH_WANT_OPTIONAL_GPIOLIB || ARCH_REQUIRE_GPIOLIB
37 help 36 help
38 This enables GPIO support through the generic GPIO library. 37 This enables GPIO support through the generic GPIO library.
39 You only need to enable this, if you also want to enable 38 You only need to enable this, if you also want to enable
@@ -49,7 +48,7 @@ config GPIO_DEVRES
49 48
50config OF_GPIO 49config OF_GPIO
51 def_bool y 50 def_bool y
52 depends on OF 51 depends on OF || COMPILE_TEST
53 52
54config GPIO_ACPI 53config GPIO_ACPI
55 def_bool y 54 def_bool y
@@ -122,6 +121,7 @@ config GPIO_ALTERA
122config GPIO_AMDPT 121config GPIO_AMDPT
123 tristate "AMD Promontory GPIO support" 122 tristate "AMD Promontory GPIO support"
124 depends on ACPI 123 depends on ACPI
124 select GPIO_GENERIC
125 help 125 help
126 driver for GPIO functionality on Promontory IOHub 126 driver for GPIO functionality on Promontory IOHub
127 Require ACPI ASL code to enumerate as a platform device. 127 Require ACPI ASL code to enumerate as a platform device.
@@ -303,6 +303,7 @@ config GPIO_MPC8XXX
303 FSL_SOC_BOOKE || PPC_86xx || ARCH_LAYERSCAPE || ARM || \ 303 FSL_SOC_BOOKE || PPC_86xx || ARCH_LAYERSCAPE || ARM || \
304 COMPILE_TEST 304 COMPILE_TEST
305 select GPIO_GENERIC 305 select GPIO_GENERIC
306 select IRQ_DOMAIN
306 help 307 help
307 Say Y here if you're going to use hardware that connects to the 308 Say Y here if you're going to use hardware that connects to the
308 MPC512x/831x/834x/837x/8572/8610/QorIQ GPIOs. 309 MPC512x/831x/834x/837x/8572/8610/QorIQ GPIOs.
@@ -399,6 +400,11 @@ config GPIO_TB10X
399 select GENERIC_IRQ_CHIP 400 select GENERIC_IRQ_CHIP
400 select OF_GPIO 401 select OF_GPIO
401 402
403config GPIO_TEGRA
404 bool
405 default y
406 depends on ARCH_TEGRA || COMPILE_TEST
407
402config GPIO_TS4800 408config GPIO_TS4800
403 tristate "TS-4800 DIO blocks and compatibles" 409 tristate "TS-4800 DIO blocks and compatibles"
404 depends on OF_GPIO 410 depends on OF_GPIO
@@ -473,7 +479,7 @@ config GPIO_XILINX
473 479
474config GPIO_XLP 480config GPIO_XLP
475 tristate "Netlogic XLP GPIO support" 481 tristate "Netlogic XLP GPIO support"
476 depends on CPU_XLP && OF_GPIO 482 depends on OF_GPIO && (CPU_XLP || ARCH_VULCAN || COMPILE_TEST)
477 select GPIOLIB_IRQCHIP 483 select GPIOLIB_IRQCHIP
478 help 484 help
479 This driver provides support for GPIO interface on Netlogic XLP MIPS64 485 This driver provides support for GPIO interface on Netlogic XLP MIPS64
@@ -510,6 +516,13 @@ config GPIO_ZX
510 help 516 help
511 Say yes here to support the GPIO device on ZTE ZX SoCs. 517 Say yes here to support the GPIO device on ZTE ZX SoCs.
512 518
519config GPIO_LOONGSON1
520 tristate "Loongson1 GPIO support"
521 depends on MACH_LOONGSON32
522 select GPIO_GENERIC
523 help
524 Say Y or M here to support GPIO on Loongson1 SoCs.
525
513endmenu 526endmenu
514 527
515menu "Port-mapped I/O GPIO drivers" 528menu "Port-mapped I/O GPIO drivers"
@@ -557,7 +570,7 @@ config GPIO_IT87
557 Say yes here to support GPIO functionality of IT87xx Super I/O chips. 570 Say yes here to support GPIO functionality of IT87xx Super I/O chips.
558 571
559 This driver is tested with ITE IT8728 and IT8732 Super I/O chips, and 572 This driver is tested with ITE IT8728 and IT8732 Super I/O chips, and
560 supports the IT8761E Super I/O chip as well. 573 supports the IT8761E, IT8620E and IT8628E Super I/O chip as well.
561 574
562 To compile this driver as a module, choose M here: the module will 575 To compile this driver as a module, choose M here: the module will
563 be called gpio_it87 576 be called gpio_it87
@@ -1091,6 +1104,7 @@ menu "SPI or I2C GPIO expanders"
1091 1104
1092config GPIO_MCP23S08 1105config GPIO_MCP23S08
1093 tristate "Microchip MCP23xxx I/O expander" 1106 tristate "Microchip MCP23xxx I/O expander"
1107 select GPIOLIB_IRQCHIP
1094 help 1108 help
1095 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017 1109 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017
1096 I/O expanders. 1110 I/O expanders.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1e0b74f3b1ed..991598ea3fba 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -12,6 +12,9 @@ obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
12# Device drivers. Generally keep list sorted alphabetically 12# Device drivers. Generally keep list sorted alphabetically
13obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o 13obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
14 14
15# directly supported by gpio-generic
16gpio-generic-$(CONFIG_GPIO_GENERIC) += gpio-mmio.o
17
15obj-$(CONFIG_GPIO_104_DIO_48E) += gpio-104-dio-48e.o 18obj-$(CONFIG_GPIO_104_DIO_48E) += gpio-104-dio-48e.o
16obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o 19obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o
17obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o 20obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o
@@ -95,7 +98,7 @@ obj-$(CONFIG_GPIO_SX150X) += gpio-sx150x.o
95obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o 98obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o
96obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o 99obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o
97obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o 100obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o
98obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o 101obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o
99obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o 102obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
100obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o 103obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o
101obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o 104obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o
@@ -127,3 +130,4 @@ obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o
127obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o 130obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o
128obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o 131obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o
129obj-$(CONFIG_GPIO_ZX) += gpio-zx.o 132obj-$(CONFIG_GPIO_ZX) += gpio-zx.o
133obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c
index c81224ff2dca..80f9ddf13343 100644
--- a/drivers/gpio/gpio-74x164.c
+++ b/drivers/gpio/gpio-74x164.c
@@ -75,6 +75,29 @@ static void gen_74x164_set_value(struct gpio_chip *gc,
75 mutex_unlock(&chip->lock); 75 mutex_unlock(&chip->lock);
76} 76}
77 77
78static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
79 unsigned long *bits)
80{
81 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
82 unsigned int i, idx, shift;
83 u8 bank, bankmask;
84
85 mutex_lock(&chip->lock);
86 for (i = 0, bank = chip->registers - 1; i < chip->registers;
87 i++, bank--) {
88 idx = i / sizeof(*mask);
89 shift = i % sizeof(*mask) * BITS_PER_BYTE;
90 bankmask = mask[idx] >> shift;
91 if (!bankmask)
92 continue;
93
94 chip->buffer[bank] &= ~bankmask;
95 chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
96 }
97 __gen_74x164_write_config(chip);
98 mutex_unlock(&chip->lock);
99}
100
78static int gen_74x164_direction_output(struct gpio_chip *gc, 101static int gen_74x164_direction_output(struct gpio_chip *gc,
79 unsigned offset, int val) 102 unsigned offset, int val)
80{ 103{
@@ -114,6 +137,7 @@ static int gen_74x164_probe(struct spi_device *spi)
114 chip->gpio_chip.direction_output = gen_74x164_direction_output; 137 chip->gpio_chip.direction_output = gen_74x164_direction_output;
115 chip->gpio_chip.get = gen_74x164_get_value; 138 chip->gpio_chip.get = gen_74x164_get_value;
116 chip->gpio_chip.set = gen_74x164_set_value; 139 chip->gpio_chip.set = gen_74x164_set_value;
140 chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
117 chip->gpio_chip.base = -1; 141 chip->gpio_chip.base = -1;
118 142
119 chip->registers = nregs; 143 chip->registers = nregs;
@@ -153,6 +177,7 @@ static int gen_74x164_remove(struct spi_device *spi)
153 177
154static const struct of_device_id gen_74x164_dt_ids[] = { 178static const struct of_device_id gen_74x164_dt_ids[] = {
155 { .compatible = "fairchild,74hc595" }, 179 { .compatible = "fairchild,74hc595" },
180 { .compatible = "nxp,74lvc594" },
156 {}, 181 {},
157}; 182};
158MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); 183MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
diff --git a/drivers/gpio/gpio-amdpt.c b/drivers/gpio/gpio-amdpt.c
index c2484046e8e9..9b78dc837603 100644
--- a/drivers/gpio/gpio-amdpt.c
+++ b/drivers/gpio/gpio-amdpt.c
@@ -28,7 +28,6 @@
28struct pt_gpio_chip { 28struct pt_gpio_chip {
29 struct gpio_chip gc; 29 struct gpio_chip gc;
30 void __iomem *reg_base; 30 void __iomem *reg_base;
31 spinlock_t lock;
32}; 31};
33 32
34static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) 33static int pt_gpio_request(struct gpio_chip *gc, unsigned offset)
@@ -39,19 +38,19 @@ static int pt_gpio_request(struct gpio_chip *gc, unsigned offset)
39 38
40 dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset); 39 dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset);
41 40
42 spin_lock_irqsave(&pt_gpio->lock, flags); 41 spin_lock_irqsave(&gc->bgpio_lock, flags);
43 42
44 using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG); 43 using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
45 if (using_pins & BIT(offset)) { 44 if (using_pins & BIT(offset)) {
46 dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n", 45 dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n",
47 offset); 46 offset);
48 spin_unlock_irqrestore(&pt_gpio->lock, flags); 47 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
49 return -EINVAL; 48 return -EINVAL;
50 } 49 }
51 50
52 writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG); 51 writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG);
53 52
54 spin_unlock_irqrestore(&pt_gpio->lock, flags); 53 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
55 54
56 return 0; 55 return 0;
57} 56}
@@ -62,111 +61,17 @@ static void pt_gpio_free(struct gpio_chip *gc, unsigned offset)
62 unsigned long flags; 61 unsigned long flags;
63 u32 using_pins; 62 u32 using_pins;
64 63
65 spin_lock_irqsave(&pt_gpio->lock, flags); 64 spin_lock_irqsave(&gc->bgpio_lock, flags);
66 65
67 using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG); 66 using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
68 using_pins &= ~BIT(offset); 67 using_pins &= ~BIT(offset);
69 writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG); 68 writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG);
70 69
71 spin_unlock_irqrestore(&pt_gpio->lock, flags); 70 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
72 71
73 dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset); 72 dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset);
74} 73}
75 74
76static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value)
77{
78 struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc);
79 unsigned long flags;
80 u32 data;
81
82 dev_dbg(gc->parent, "pt_gpio_set_value offset=%x, value=%x\n",
83 offset, value);
84
85 spin_lock_irqsave(&pt_gpio->lock, flags);
86
87 data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG);
88 data &= ~BIT(offset);
89 if (value)
90 data |= BIT(offset);
91 writel(data, pt_gpio->reg_base + PT_OUTPUTDATA_REG);
92
93 spin_unlock_irqrestore(&pt_gpio->lock, flags);
94}
95
96static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset)
97{
98 struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc);
99 unsigned long flags;
100 u32 data;
101
102 spin_lock_irqsave(&pt_gpio->lock, flags);
103
104 data = readl(pt_gpio->reg_base + PT_DIRECTION_REG);
105
106 /* configure as output */
107 if (data & BIT(offset))
108 data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG);
109 else /* configure as input */
110 data = readl(pt_gpio->reg_base + PT_INPUTDATA_REG);
111
112 spin_unlock_irqrestore(&pt_gpio->lock, flags);
113
114 data >>= offset;
115 data &= 1;
116
117 dev_dbg(gc->parent, "pt_gpio_get_value offset=%x, value=%x\n",
118 offset, data);
119
120 return data;
121}
122
123static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
124{
125 struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc);
126 unsigned long flags;
127 u32 data;
128
129 dev_dbg(gc->parent, "pt_gpio_dirction_input offset=%x\n", offset);
130
131 spin_lock_irqsave(&pt_gpio->lock, flags);
132
133 data = readl(pt_gpio->reg_base + PT_DIRECTION_REG);
134 data &= ~BIT(offset);
135 writel(data, pt_gpio->reg_base + PT_DIRECTION_REG);
136
137 spin_unlock_irqrestore(&pt_gpio->lock, flags);
138
139 return 0;
140}
141
142static int pt_gpio_direction_output(struct gpio_chip *gc,
143 unsigned offset, int value)
144{
145 struct pt_gpio_chip *pt_gpio = gpiochip_get_data(gc);
146 unsigned long flags;
147 u32 data;
148
149 dev_dbg(gc->parent, "pt_gpio_direction_output offset=%x, value=%x\n",
150 offset, value);
151
152 spin_lock_irqsave(&pt_gpio->lock, flags);
153
154 data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG);
155 if (value)
156 data |= BIT(offset);
157 else
158 data &= ~BIT(offset);
159 writel(data, pt_gpio->reg_base + PT_OUTPUTDATA_REG);
160
161 data = readl(pt_gpio->reg_base + PT_DIRECTION_REG);
162 data |= BIT(offset);
163 writel(data, pt_gpio->reg_base + PT_DIRECTION_REG);
164
165 spin_unlock_irqrestore(&pt_gpio->lock, flags);
166
167 return 0;
168}
169
170static int pt_gpio_probe(struct platform_device *pdev) 75static int pt_gpio_probe(struct platform_device *pdev)
171{ 76{
172 struct device *dev = &pdev->dev; 77 struct device *dev = &pdev->dev;
@@ -196,18 +101,19 @@ static int pt_gpio_probe(struct platform_device *pdev)
196 return PTR_ERR(pt_gpio->reg_base); 101 return PTR_ERR(pt_gpio->reg_base);
197 } 102 }
198 103
199 spin_lock_init(&pt_gpio->lock); 104 ret = bgpio_init(&pt_gpio->gc, dev, 4,
105 pt_gpio->reg_base + PT_INPUTDATA_REG,
106 pt_gpio->reg_base + PT_OUTPUTDATA_REG, NULL,
107 pt_gpio->reg_base + PT_DIRECTION_REG, NULL,
108 BGPIOF_READ_OUTPUT_REG_SET);
109 if (ret) {
110 dev_err(&pdev->dev, "bgpio_init failed\n");
111 return ret;
112 }
200 113
201 pt_gpio->gc.label = pdev->name;
202 pt_gpio->gc.owner = THIS_MODULE; 114 pt_gpio->gc.owner = THIS_MODULE;
203 pt_gpio->gc.parent = dev;
204 pt_gpio->gc.request = pt_gpio_request; 115 pt_gpio->gc.request = pt_gpio_request;
205 pt_gpio->gc.free = pt_gpio_free; 116 pt_gpio->gc.free = pt_gpio_free;
206 pt_gpio->gc.direction_input = pt_gpio_direction_input;
207 pt_gpio->gc.direction_output = pt_gpio_direction_output;
208 pt_gpio->gc.get = pt_gpio_get_value;
209 pt_gpio->gc.set = pt_gpio_set_value;
210 pt_gpio->gc.base = -1;
211 pt_gpio->gc.ngpio = PT_TOTAL_GPIO; 117 pt_gpio->gc.ngpio = PT_TOTAL_GPIO;
212#if defined(CONFIG_OF_GPIO) 118#if defined(CONFIG_OF_GPIO)
213 pt_gpio->gc.of_node = pdev->dev.of_node; 119 pt_gpio->gc.of_node = pdev->dev.of_node;
@@ -239,6 +145,7 @@ static int pt_gpio_remove(struct platform_device *pdev)
239 145
240static const struct acpi_device_id pt_gpio_acpi_match[] = { 146static const struct acpi_device_id pt_gpio_acpi_match[] = {
241 { "AMDF030", 0 }, 147 { "AMDF030", 0 },
148 { "AMDIF030", 0 },
242 { }, 149 { },
243}; 150};
244MODULE_DEVICE_TABLE(acpi, pt_gpio_acpi_match); 151MODULE_DEVICE_TABLE(acpi, pt_gpio_acpi_match);
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c
index 2fd38d598f3d..9aabc48ff5de 100644
--- a/drivers/gpio/gpio-bcm-kona.c
+++ b/drivers/gpio/gpio-bcm-kona.c
@@ -1,4 +1,7 @@
1/* 1/*
2 * Broadcom Kona GPIO Driver
3 *
4 * Author: Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>
2 * Copyright (C) 2012-2014 Broadcom Corporation 5 * Copyright (C) 2012-2014 Broadcom Corporation
3 * 6 *
4 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
@@ -17,7 +20,7 @@
17#include <linux/gpio.h> 20#include <linux/gpio.h>
18#include <linux/of_device.h> 21#include <linux/of_device.h>
19#include <linux/of_irq.h> 22#include <linux/of_irq.h>
20#include <linux/module.h> 23#include <linux/init.h>
21#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
22#include <linux/irqchip/chained_irq.h> 25#include <linux/irqchip/chained_irq.h>
23 26
@@ -502,8 +505,6 @@ static struct of_device_id const bcm_kona_gpio_of_match[] = {
502 {} 505 {}
503}; 506};
504 507
505MODULE_DEVICE_TABLE(of, bcm_kona_gpio_of_match);
506
507/* 508/*
508 * This lock class tells lockdep that GPIO irqs are in a different 509 * This lock class tells lockdep that GPIO irqs are in a different
509 * category than their parents, so it won't report false recursion. 510 * category than their parents, so it won't report false recursion.
@@ -659,9 +660,4 @@ static struct platform_driver bcm_kona_gpio_driver = {
659 }, 660 },
660 .probe = bcm_kona_gpio_probe, 661 .probe = bcm_kona_gpio_probe,
661}; 662};
662 663builtin_platform_driver(bcm_kona_gpio_driver);
663module_platform_driver(bcm_kona_gpio_driver);
664
665MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>");
666MODULE_DESCRIPTION("Broadcom Kona GPIO Driver");
667MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index 42d51c59ed50..e6489143721a 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -461,6 +461,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
461 bank->id = num_banks; 461 bank->id = num_banks;
462 if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) { 462 if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) {
463 dev_err(dev, "Invalid bank width %d\n", bank_width); 463 dev_err(dev, "Invalid bank width %d\n", bank_width);
464 err = -EINVAL;
464 goto fail; 465 goto fail;
465 } else { 466 } else {
466 bank->width = bank_width; 467 bank->width = bank_width;
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 597de1ef497b..34779bb375de 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -7,6 +7,7 @@
7 * 7 *
8 * All enquiries to support@picochip.com 8 * All enquiries to support@picochip.com
9 */ 9 */
10#include <linux/acpi.h>
10#include <linux/gpio/driver.h> 11#include <linux/gpio/driver.h>
11/* FIXME: for gpio_get_value(), replace this with direct register read */ 12/* FIXME: for gpio_get_value(), replace this with direct register read */
12#include <linux/gpio.h> 13#include <linux/gpio.h>
@@ -22,10 +23,13 @@
22#include <linux/of_address.h> 23#include <linux/of_address.h>
23#include <linux/of_irq.h> 24#include <linux/of_irq.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/property.h>
25#include <linux/spinlock.h> 27#include <linux/spinlock.h>
26#include <linux/platform_data/gpio-dwapb.h> 28#include <linux/platform_data/gpio-dwapb.h>
27#include <linux/slab.h> 29#include <linux/slab.h>
28 30
31#include "gpiolib.h"
32
29#define GPIO_SWPORTA_DR 0x00 33#define GPIO_SWPORTA_DR 0x00
30#define GPIO_SWPORTA_DDR 0x04 34#define GPIO_SWPORTA_DDR 0x04
31#define GPIO_SWPORTB_DR 0x0c 35#define GPIO_SWPORTB_DR 0x0c
@@ -290,14 +294,14 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
290 struct dwapb_port_property *pp) 294 struct dwapb_port_property *pp)
291{ 295{
292 struct gpio_chip *gc = &port->gc; 296 struct gpio_chip *gc = &port->gc;
293 struct device_node *node = pp->node; 297 struct fwnode_handle *fwnode = pp->fwnode;
294 struct irq_chip_generic *irq_gc = NULL; 298 struct irq_chip_generic *irq_gc = NULL;
295 unsigned int hwirq, ngpio = gc->ngpio; 299 unsigned int hwirq, ngpio = gc->ngpio;
296 struct irq_chip_type *ct; 300 struct irq_chip_type *ct;
297 int err, i; 301 int err, i;
298 302
299 gpio->domain = irq_domain_add_linear(node, ngpio, 303 gpio->domain = irq_domain_create_linear(fwnode, ngpio,
300 &irq_generic_chip_ops, gpio); 304 &irq_generic_chip_ops, gpio);
301 if (!gpio->domain) 305 if (!gpio->domain)
302 return; 306 return;
303 307
@@ -409,13 +413,13 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
409 err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, 413 err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout,
410 NULL, false); 414 NULL, false);
411 if (err) { 415 if (err) {
412 dev_err(gpio->dev, "failed to init gpio chip for %s\n", 416 dev_err(gpio->dev, "failed to init gpio chip for port%d\n",
413 pp->name); 417 port->idx);
414 return err; 418 return err;
415 } 419 }
416 420
417#ifdef CONFIG_OF_GPIO 421#ifdef CONFIG_OF_GPIO
418 port->gc.of_node = pp->node; 422 port->gc.of_node = to_of_node(pp->fwnode);
419#endif 423#endif
420 port->gc.ngpio = pp->ngpio; 424 port->gc.ngpio = pp->ngpio;
421 port->gc.base = pp->gpio_base; 425 port->gc.base = pp->gpio_base;
@@ -429,11 +433,15 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
429 433
430 err = gpiochip_add_data(&port->gc, port); 434 err = gpiochip_add_data(&port->gc, port);
431 if (err) 435 if (err)
432 dev_err(gpio->dev, "failed to register gpiochip for %s\n", 436 dev_err(gpio->dev, "failed to register gpiochip for port%d\n",
433 pp->name); 437 port->idx);
434 else 438 else
435 port->is_registered = true; 439 port->is_registered = true;
436 440
441 /* Add GPIO-signaled ACPI event support */
442 if (pp->irq)
443 acpi_gpiochip_request_interrupts(&port->gc);
444
437 return err; 445 return err;
438} 446}
439 447
@@ -447,19 +455,15 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
447} 455}
448 456
449static struct dwapb_platform_data * 457static struct dwapb_platform_data *
450dwapb_gpio_get_pdata_of(struct device *dev) 458dwapb_gpio_get_pdata(struct device *dev)
451{ 459{
452 struct device_node *node, *port_np; 460 struct fwnode_handle *fwnode;
453 struct dwapb_platform_data *pdata; 461 struct dwapb_platform_data *pdata;
454 struct dwapb_port_property *pp; 462 struct dwapb_port_property *pp;
455 int nports; 463 int nports;
456 int i; 464 int i;
457 465
458 node = dev->of_node; 466 nports = device_get_child_node_count(dev);
459 if (!IS_ENABLED(CONFIG_OF_GPIO) || !node)
460 return ERR_PTR(-ENODEV);
461
462 nports = of_get_child_count(node);
463 if (nports == 0) 467 if (nports == 0)
464 return ERR_PTR(-ENODEV); 468 return ERR_PTR(-ENODEV);
465 469
@@ -474,21 +478,22 @@ dwapb_gpio_get_pdata_of(struct device *dev)
474 pdata->nports = nports; 478 pdata->nports = nports;
475 479
476 i = 0; 480 i = 0;
477 for_each_child_of_node(node, port_np) { 481 device_for_each_child_node(dev, fwnode) {
478 pp = &pdata->properties[i++]; 482 pp = &pdata->properties[i++];
479 pp->node = port_np; 483 pp->fwnode = fwnode;
480 484
481 if (of_property_read_u32(port_np, "reg", &pp->idx) || 485 if (fwnode_property_read_u32(fwnode, "reg", &pp->idx) ||
482 pp->idx >= DWAPB_MAX_PORTS) { 486 pp->idx >= DWAPB_MAX_PORTS) {
483 dev_err(dev, "missing/invalid port index for %s\n", 487 dev_err(dev,
484 port_np->full_name); 488 "missing/invalid port index for port%d\n", i);
485 return ERR_PTR(-EINVAL); 489 return ERR_PTR(-EINVAL);
486 } 490 }
487 491
488 if (of_property_read_u32(port_np, "snps,nr-gpios", 492 if (fwnode_property_read_u32(fwnode, "snps,nr-gpios",
489 &pp->ngpio)) { 493 &pp->ngpio)) {
490 dev_info(dev, "failed to get number of gpios for %s\n", 494 dev_info(dev,
491 port_np->full_name); 495 "failed to get number of gpios for port%d\n",
496 i);
492 pp->ngpio = 32; 497 pp->ngpio = 32;
493 } 498 }
494 499
@@ -496,18 +501,19 @@ dwapb_gpio_get_pdata_of(struct device *dev)
496 * Only port A can provide interrupts in all configurations of 501 * Only port A can provide interrupts in all configurations of
497 * the IP. 502 * the IP.
498 */ 503 */
499 if (pp->idx == 0 && 504 if (dev->of_node && pp->idx == 0 &&
500 of_property_read_bool(port_np, "interrupt-controller")) { 505 fwnode_property_read_bool(fwnode,
501 pp->irq = irq_of_parse_and_map(port_np, 0); 506 "interrupt-controller")) {
502 if (!pp->irq) { 507 pp->irq = irq_of_parse_and_map(to_of_node(fwnode), 0);
503 dev_warn(dev, "no irq for bank %s\n", 508 if (!pp->irq)
504 port_np->full_name); 509 dev_warn(dev, "no irq for port%d\n", pp->idx);
505 }
506 } 510 }
507 511
512 if (has_acpi_companion(dev) && pp->idx == 0)
513 pp->irq = platform_get_irq(to_platform_device(dev), 0);
514
508 pp->irq_shared = false; 515 pp->irq_shared = false;
509 pp->gpio_base = -1; 516 pp->gpio_base = -1;
510 pp->name = port_np->full_name;
511 } 517 }
512 518
513 return pdata; 519 return pdata;
@@ -523,7 +529,7 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
523 struct dwapb_platform_data *pdata = dev_get_platdata(dev); 529 struct dwapb_platform_data *pdata = dev_get_platdata(dev);
524 530
525 if (!pdata) { 531 if (!pdata) {
526 pdata = dwapb_gpio_get_pdata_of(dev); 532 pdata = dwapb_gpio_get_pdata(dev);
527 if (IS_ERR(pdata)) 533 if (IS_ERR(pdata))
528 return PTR_ERR(pdata); 534 return PTR_ERR(pdata);
529 } 535 }
@@ -580,6 +586,13 @@ static const struct of_device_id dwapb_of_match[] = {
580}; 586};
581MODULE_DEVICE_TABLE(of, dwapb_of_match); 587MODULE_DEVICE_TABLE(of, dwapb_of_match);
582 588
589static const struct acpi_device_id dwapb_acpi_match[] = {
590 {"HISI0181", 0},
591 {"APMC0D07", 0},
592 { }
593};
594MODULE_DEVICE_TABLE(acpi, dwapb_acpi_match);
595
583#ifdef CONFIG_PM_SLEEP 596#ifdef CONFIG_PM_SLEEP
584static int dwapb_gpio_suspend(struct device *dev) 597static int dwapb_gpio_suspend(struct device *dev)
585{ 598{
@@ -674,6 +687,7 @@ static struct platform_driver dwapb_gpio_driver = {
674 .name = "gpio-dwapb", 687 .name = "gpio-dwapb",
675 .pm = &dwapb_gpio_pm_ops, 688 .pm = &dwapb_gpio_pm_ops,
676 .of_match_table = of_match_ptr(dwapb_of_match), 689 .of_match_table = of_match_ptr(dwapb_of_match),
690 .acpi_match_table = ACPI_PTR(dwapb_acpi_match),
677 }, 691 },
678 .probe = dwapb_gpio_probe, 692 .probe = dwapb_gpio_probe,
679 .remove = dwapb_gpio_remove, 693 .remove = dwapb_gpio_remove,
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
index daac2d480db1..05aa538c3767 100644
--- a/drivers/gpio/gpio-f7188x.c
+++ b/drivers/gpio/gpio-f7188x.c
@@ -15,7 +15,8 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h> 18#include <linux/gpio/driver.h>
19#include <linux/bitops.h>
19 20
20#define DRVNAME "gpio-f7188x" 21#define DRVNAME "gpio-f7188x"
21 22
@@ -129,6 +130,9 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
129static int f7188x_gpio_direction_out(struct gpio_chip *chip, 130static int f7188x_gpio_direction_out(struct gpio_chip *chip,
130 unsigned offset, int value); 131 unsigned offset, int value);
131static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); 132static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
133static int f7188x_gpio_set_single_ended(struct gpio_chip *gc,
134 unsigned offset,
135 enum single_ended_mode mode);
132 136
133#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ 137#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
134 { \ 138 { \
@@ -139,6 +143,7 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
139 .get = f7188x_gpio_get, \ 143 .get = f7188x_gpio_get, \
140 .direction_output = f7188x_gpio_direction_out, \ 144 .direction_output = f7188x_gpio_direction_out, \
141 .set = f7188x_gpio_set, \ 145 .set = f7188x_gpio_set, \
146 .set_single_ended = f7188x_gpio_set_single_ended, \
142 .base = _base, \ 147 .base = _base, \
143 .ngpio = _ngpio, \ 148 .ngpio = _ngpio, \
144 .can_sleep = true, \ 149 .can_sleep = true, \
@@ -217,7 +222,7 @@ static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
217 superio_select(sio->addr, SIO_LD_GPIO); 222 superio_select(sio->addr, SIO_LD_GPIO);
218 223
219 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); 224 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
220 dir &= ~(1 << offset); 225 dir &= ~BIT(offset);
221 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); 226 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
222 227
223 superio_exit(sio->addr); 228 superio_exit(sio->addr);
@@ -238,7 +243,7 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
238 superio_select(sio->addr, SIO_LD_GPIO); 243 superio_select(sio->addr, SIO_LD_GPIO);
239 244
240 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); 245 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
241 dir = !!(dir & (1 << offset)); 246 dir = !!(dir & BIT(offset));
242 if (dir) 247 if (dir)
243 data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); 248 data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
244 else 249 else
@@ -246,7 +251,7 @@ static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
246 251
247 superio_exit(sio->addr); 252 superio_exit(sio->addr);
248 253
249 return !!(data & 1 << offset); 254 return !!(data & BIT(offset));
250} 255}
251 256
252static int f7188x_gpio_direction_out(struct gpio_chip *chip, 257static int f7188x_gpio_direction_out(struct gpio_chip *chip,
@@ -264,13 +269,13 @@ static int f7188x_gpio_direction_out(struct gpio_chip *chip,
264 269
265 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); 270 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
266 if (value) 271 if (value)
267 data_out |= (1 << offset); 272 data_out |= BIT(offset);
268 else 273 else
269 data_out &= ~(1 << offset); 274 data_out &= ~BIT(offset);
270 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); 275 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
271 276
272 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); 277 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
273 dir |= (1 << offset); 278 dir |= BIT(offset);
274 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); 279 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
275 280
276 superio_exit(sio->addr); 281 superio_exit(sio->addr);
@@ -292,14 +297,43 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
292 297
293 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); 298 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
294 if (value) 299 if (value)
295 data_out |= (1 << offset); 300 data_out |= BIT(offset);
296 else 301 else
297 data_out &= ~(1 << offset); 302 data_out &= ~BIT(offset);
298 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); 303 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
299 304
300 superio_exit(sio->addr); 305 superio_exit(sio->addr);
301} 306}
302 307
308static int f7188x_gpio_set_single_ended(struct gpio_chip *chip,
309 unsigned offset,
310 enum single_ended_mode mode)
311{
312 int err;
313 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
314 struct f7188x_sio *sio = bank->data->sio;
315 u8 data;
316
317 if (mode != LINE_MODE_OPEN_DRAIN &&
318 mode != LINE_MODE_PUSH_PULL)
319 return -ENOTSUPP;
320
321 err = superio_enter(sio->addr);
322 if (err)
323 return err;
324 superio_select(sio->addr, SIO_LD_GPIO);
325
326 data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
327 if (mode == LINE_MODE_OPEN_DRAIN)
328 data &= ~BIT(offset);
329 else
330 data |= BIT(offset);
331 superio_outb(sio->addr, gpio_out_mode(bank->regbase), data);
332
333 superio_exit(sio->addr);
334 return 0;
335}
336
303/* 337/*
304 * Platform device and driver. 338 * Platform device and driver.
305 */ 339 */
diff --git a/drivers/gpio/gpio-it87.c b/drivers/gpio/gpio-it87.c
index b219c82414bf..63a962d18cd6 100644
--- a/drivers/gpio/gpio-it87.c
+++ b/drivers/gpio/gpio-it87.c
@@ -34,6 +34,8 @@
34 34
35/* Chip Id numbers */ 35/* Chip Id numbers */
36#define NO_DEV_ID 0xffff 36#define NO_DEV_ID 0xffff
37#define IT8620_ID 0x8620
38#define IT8628_ID 0x8628
37#define IT8728_ID 0x8728 39#define IT8728_ID 0x8728
38#define IT8732_ID 0x8732 40#define IT8732_ID 0x8732
39#define IT8761_ID 0x8761 41#define IT8761_ID 0x8761
@@ -302,6 +304,14 @@ static int __init it87_gpio_init(void)
302 it87_gpio->chip = it87_template_chip; 304 it87_gpio->chip = it87_template_chip;
303 305
304 switch (chip_type) { 306 switch (chip_type) {
307 case IT8620_ID:
308 case IT8628_ID:
309 gpio_ba_reg = 0x62;
310 it87_gpio->io_size = 11;
311 it87_gpio->output_base = 0xc8;
312 it87_gpio->simple_size = 0;
313 it87_gpio->chip.ngpio = 64;
314 break;
305 case IT8728_ID: 315 case IT8728_ID:
306 case IT8732_ID: 316 case IT8732_ID:
307 gpio_ba_reg = 0x62; 317 gpio_ba_reg = 0x62;
diff --git a/drivers/gpio/gpio-loongson1.c b/drivers/gpio/gpio-loongson1.c
new file mode 100644
index 000000000000..10c09bdd8514
--- /dev/null
+++ b/drivers/gpio/gpio-loongson1.c
@@ -0,0 +1,102 @@
1/*
2 * GPIO Driver for Loongson 1 SoC
3 *
4 * Copyright (C) 2015-2016 Zhang, Keguang <keguang.zhang@gmail.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/gpio/driver.h>
12#include <linux/platform_device.h>
13
14/* Loongson 1 GPIO Register Definitions */
15#define GPIO_CFG 0x0
16#define GPIO_DIR 0x10
17#define GPIO_DATA 0x20
18#define GPIO_OUTPUT 0x30
19
20static void __iomem *gpio_reg_base;
21
22static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
23{
24 unsigned long pinmask = gc->pin2mask(gc, offset);
25 unsigned long flags;
26
27 spin_lock_irqsave(&gc->bgpio_lock, flags);
28 __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | pinmask,
29 gpio_reg_base + GPIO_CFG);
30 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
31
32 return 0;
33}
34
35static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset)
36{
37 unsigned long pinmask = gc->pin2mask(gc, offset);
38 unsigned long flags;
39
40 spin_lock_irqsave(&gc->bgpio_lock, flags);
41 __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~pinmask,
42 gpio_reg_base + GPIO_CFG);
43 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
44}
45
46static int ls1x_gpio_probe(struct platform_device *pdev)
47{
48 struct device *dev = &pdev->dev;
49 struct gpio_chip *gc;
50 struct resource *res;
51 int ret;
52
53 gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
54 if (!gc)
55 return -ENOMEM;
56
57 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
58 if (!res) {
59 dev_err(dev, "failed to get I/O memory\n");
60 return -EINVAL;
61 }
62
63 gpio_reg_base = devm_ioremap_resource(dev, res);
64 if (IS_ERR(gpio_reg_base))
65 return PTR_ERR(gpio_reg_base);
66
67 ret = bgpio_init(gc, dev, 4, gpio_reg_base + GPIO_DATA,
68 gpio_reg_base + GPIO_OUTPUT, NULL,
69 NULL, gpio_reg_base + GPIO_DIR, 0);
70 if (ret)
71 goto err;
72
73 gc->owner = THIS_MODULE;
74 gc->request = ls1x_gpio_request;
75 gc->free = ls1x_gpio_free;
76 gc->base = pdev->id * 32;
77
78 ret = devm_gpiochip_add_data(dev, gc, NULL);
79 if (ret)
80 goto err;
81
82 platform_set_drvdata(pdev, gc);
83 dev_info(dev, "Loongson1 GPIO driver registered\n");
84
85 return 0;
86err:
87 dev_err(dev, "failed to register GPIO device\n");
88 return ret;
89}
90
91static struct platform_driver ls1x_gpio_driver = {
92 .probe = ls1x_gpio_probe,
93 .driver = {
94 .name = "ls1x-gpio",
95 },
96};
97
98module_platform_driver(ls1x_gpio_driver);
99
100MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>");
101MODULE_DESCRIPTION("Loongson1 GPIO driver");
102MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c
index 7fffc1d6c055..d55af50e7034 100644
--- a/drivers/gpio/gpio-mb86s7x.c
+++ b/drivers/gpio/gpio-mb86s7x.c
@@ -17,7 +17,6 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/module.h>
21#include <linux/err.h> 20#include <linux/err.h>
22#include <linux/errno.h> 21#include <linux/errno.h>
23#include <linux/ioport.h> 22#include <linux/ioport.h>
@@ -185,8 +184,6 @@ static int mb86s70_gpio_probe(struct platform_device *pdev)
185 gchip->gc.parent = &pdev->dev; 184 gchip->gc.parent = &pdev->dev;
186 gchip->gc.base = -1; 185 gchip->gc.base = -1;
187 186
188 platform_set_drvdata(pdev, gchip);
189
190 ret = gpiochip_add_data(&gchip->gc, gchip); 187 ret = gpiochip_add_data(&gchip->gc, gchip);
191 if (ret) { 188 if (ret) {
192 dev_err(&pdev->dev, "couldn't register gpio driver\n"); 189 dev_err(&pdev->dev, "couldn't register gpio driver\n");
@@ -210,7 +207,6 @@ static const struct of_device_id mb86s70_gpio_dt_ids[] = {
210 { .compatible = "fujitsu,mb86s70-gpio" }, 207 { .compatible = "fujitsu,mb86s70-gpio" },
211 { /* sentinel */ } 208 { /* sentinel */ }
212}; 209};
213MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);
214 210
215static struct platform_driver mb86s70_gpio_driver = { 211static struct platform_driver mb86s70_gpio_driver = {
216 .driver = { 212 .driver = {
@@ -225,8 +221,4 @@ static int __init mb86s70_gpio_init(void)
225{ 221{
226 return platform_driver_register(&mb86s70_gpio_driver); 222 return platform_driver_register(&mb86s70_gpio_driver);
227} 223}
228module_init(mb86s70_gpio_init); 224device_initcall(mb86s70_gpio_init);
229
230MODULE_DESCRIPTION("MB86S7x GPIO Driver");
231MODULE_ALIAS("platform:mb86s70-gpio");
232MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-mc9s08dz60.c b/drivers/gpio/gpio-mc9s08dz60.c
index 14f252f9eb29..2fcad5b9cca5 100644
--- a/drivers/gpio/gpio-mc9s08dz60.c
+++ b/drivers/gpio/gpio-mc9s08dz60.c
@@ -15,7 +15,7 @@
15 */ 15 */
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/module.h> 18#include <linux/init.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
@@ -111,8 +111,6 @@ static const struct i2c_device_id mc9s08dz60_id[] = {
111 {}, 111 {},
112}; 112};
113 113
114MODULE_DEVICE_TABLE(i2c, mc9s08dz60_id);
115
116static struct i2c_driver mc9s08dz60_i2c_driver = { 114static struct i2c_driver mc9s08dz60_i2c_driver = {
117 .driver = { 115 .driver = {
118 .name = "mc9s08dz60", 116 .name = "mc9s08dz60",
@@ -120,10 +118,4 @@ static struct i2c_driver mc9s08dz60_i2c_driver = {
120 .probe = mc9s08dz60_probe, 118 .probe = mc9s08dz60_probe,
121 .id_table = mc9s08dz60_id, 119 .id_table = mc9s08dz60_id,
122}; 120};
123 121builtin_i2c_driver(mc9s08dz60_i2c_driver);
124module_i2c_driver(mc9s08dz60_i2c_driver);
125
126MODULE_AUTHOR("Freescale Semiconductor, Inc. "
127 "Wu Guoxing <b39297@freescale.com>");
128MODULE_DESCRIPTION("mc9s08dz60 gpio function on mx35 3ds board");
129MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c
index 47e486910aab..ac22efc1840e 100644
--- a/drivers/gpio/gpio-mcp23s08.c
+++ b/drivers/gpio/gpio-mcp23s08.c
@@ -77,7 +77,6 @@ struct mcp23s08 {
77 /* lock protects the cached values */ 77 /* lock protects the cached values */
78 struct mutex lock; 78 struct mutex lock;
79 struct mutex irq_lock; 79 struct mutex irq_lock;
80 struct irq_domain *irq_domain;
81 80
82 struct gpio_chip chip; 81 struct gpio_chip chip;
83 82
@@ -96,11 +95,6 @@ struct mcp23s08_driver_data {
96 struct mcp23s08 chip[]; 95 struct mcp23s08 chip[];
97}; 96};
98 97
99/* This lock class tells lockdep that GPIO irqs are in a different
100 * category than their parents, so it won't report false recursion.
101 */
102static struct lock_class_key gpio_lock_class;
103
104/*----------------------------------------------------------------------*/ 98/*----------------------------------------------------------------------*/
105 99
106#if IS_ENABLED(CONFIG_I2C) 100#if IS_ENABLED(CONFIG_I2C)
@@ -368,8 +362,9 @@ static irqreturn_t mcp23s08_irq(int irq, void *data)
368 for (i = 0; i < mcp->chip.ngpio; i++) { 362 for (i = 0; i < mcp->chip.ngpio; i++) {
369 if ((BIT(i) & mcp->cache[MCP_INTF]) && 363 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
370 ((BIT(i) & intcap & mcp->irq_rise) || 364 ((BIT(i) & intcap & mcp->irq_rise) ||
371 (mcp->irq_fall & ~intcap & BIT(i)))) { 365 (mcp->irq_fall & ~intcap & BIT(i)) ||
372 child_irq = irq_find_mapping(mcp->irq_domain, i); 366 (BIT(i) & mcp->cache[MCP_INTCON]))) {
367 child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
373 handle_nested_irq(child_irq); 368 handle_nested_irq(child_irq);
374 } 369 }
375 } 370 }
@@ -377,16 +372,10 @@ static irqreturn_t mcp23s08_irq(int irq, void *data)
377 return IRQ_HANDLED; 372 return IRQ_HANDLED;
378} 373}
379 374
380static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
381{
382 struct mcp23s08 *mcp = gpiochip_get_data(chip);
383
384 return irq_find_mapping(mcp->irq_domain, offset);
385}
386
387static void mcp23s08_irq_mask(struct irq_data *data) 375static void mcp23s08_irq_mask(struct irq_data *data)
388{ 376{
389 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 377 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
378 struct mcp23s08 *mcp = gpiochip_get_data(gc);
390 unsigned int pos = data->hwirq; 379 unsigned int pos = data->hwirq;
391 380
392 mcp->cache[MCP_GPINTEN] &= ~BIT(pos); 381 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
@@ -394,7 +383,8 @@ static void mcp23s08_irq_mask(struct irq_data *data)
394 383
395static void mcp23s08_irq_unmask(struct irq_data *data) 384static void mcp23s08_irq_unmask(struct irq_data *data)
396{ 385{
397 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 386 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
387 struct mcp23s08 *mcp = gpiochip_get_data(gc);
398 unsigned int pos = data->hwirq; 388 unsigned int pos = data->hwirq;
399 389
400 mcp->cache[MCP_GPINTEN] |= BIT(pos); 390 mcp->cache[MCP_GPINTEN] |= BIT(pos);
@@ -402,7 +392,8 @@ static void mcp23s08_irq_unmask(struct irq_data *data)
402 392
403static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type) 393static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
404{ 394{
405 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 395 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
396 struct mcp23s08 *mcp = gpiochip_get_data(gc);
406 unsigned int pos = data->hwirq; 397 unsigned int pos = data->hwirq;
407 int status = 0; 398 int status = 0;
408 399
@@ -418,6 +409,12 @@ static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
418 mcp->cache[MCP_INTCON] &= ~BIT(pos); 409 mcp->cache[MCP_INTCON] &= ~BIT(pos);
419 mcp->irq_rise &= ~BIT(pos); 410 mcp->irq_rise &= ~BIT(pos);
420 mcp->irq_fall |= BIT(pos); 411 mcp->irq_fall |= BIT(pos);
412 } else if (type & IRQ_TYPE_LEVEL_HIGH) {
413 mcp->cache[MCP_INTCON] |= BIT(pos);
414 mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
415 } else if (type & IRQ_TYPE_LEVEL_LOW) {
416 mcp->cache[MCP_INTCON] |= BIT(pos);
417 mcp->cache[MCP_DEFVAL] |= BIT(pos);
421 } else 418 } else
422 return -EINVAL; 419 return -EINVAL;
423 420
@@ -426,14 +423,16 @@ static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
426 423
427static void mcp23s08_irq_bus_lock(struct irq_data *data) 424static void mcp23s08_irq_bus_lock(struct irq_data *data)
428{ 425{
429 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 426 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
427 struct mcp23s08 *mcp = gpiochip_get_data(gc);
430 428
431 mutex_lock(&mcp->irq_lock); 429 mutex_lock(&mcp->irq_lock);
432} 430}
433 431
434static void mcp23s08_irq_bus_unlock(struct irq_data *data) 432static void mcp23s08_irq_bus_unlock(struct irq_data *data)
435{ 433{
436 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 434 struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
435 struct mcp23s08 *mcp = gpiochip_get_data(gc);
437 436
438 mutex_lock(&mcp->lock); 437 mutex_lock(&mcp->lock);
439 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]); 438 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
@@ -443,27 +442,6 @@ static void mcp23s08_irq_bus_unlock(struct irq_data *data)
443 mutex_unlock(&mcp->irq_lock); 442 mutex_unlock(&mcp->irq_lock);
444} 443}
445 444
446static int mcp23s08_irq_reqres(struct irq_data *data)
447{
448 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
449
450 if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) {
451 dev_err(mcp->chip.parent,
452 "unable to lock HW IRQ %lu for IRQ usage\n",
453 data->hwirq);
454 return -EINVAL;
455 }
456
457 return 0;
458}
459
460static void mcp23s08_irq_relres(struct irq_data *data)
461{
462 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
463
464 gpiochip_unlock_as_irq(&mcp->chip, data->hwirq);
465}
466
467static struct irq_chip mcp23s08_irq_chip = { 445static struct irq_chip mcp23s08_irq_chip = {
468 .name = "gpio-mcp23xxx", 446 .name = "gpio-mcp23xxx",
469 .irq_mask = mcp23s08_irq_mask, 447 .irq_mask = mcp23s08_irq_mask,
@@ -471,24 +449,16 @@ static struct irq_chip mcp23s08_irq_chip = {
471 .irq_set_type = mcp23s08_irq_set_type, 449 .irq_set_type = mcp23s08_irq_set_type,
472 .irq_bus_lock = mcp23s08_irq_bus_lock, 450 .irq_bus_lock = mcp23s08_irq_bus_lock,
473 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock, 451 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
474 .irq_request_resources = mcp23s08_irq_reqres,
475 .irq_release_resources = mcp23s08_irq_relres,
476}; 452};
477 453
478static int mcp23s08_irq_setup(struct mcp23s08 *mcp) 454static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
479{ 455{
480 struct gpio_chip *chip = &mcp->chip; 456 struct gpio_chip *chip = &mcp->chip;
481 int err, irq, j; 457 int err;
482 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED; 458 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
483 459
484 mutex_init(&mcp->irq_lock); 460 mutex_init(&mcp->irq_lock);
485 461
486 mcp->irq_domain = irq_domain_add_linear(chip->parent->of_node,
487 chip->ngpio,
488 &irq_domain_simple_ops, mcp);
489 if (!mcp->irq_domain)
490 return -ENODEV;
491
492 if (mcp->irq_active_high) 462 if (mcp->irq_active_high)
493 irqflags |= IRQF_TRIGGER_HIGH; 463 irqflags |= IRQF_TRIGGER_HIGH;
494 else 464 else
@@ -503,30 +473,23 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
503 return err; 473 return err;
504 } 474 }
505 475
506 chip->to_irq = mcp23s08_gpio_to_irq; 476 err = gpiochip_irqchip_add(chip,
507 477 &mcp23s08_irq_chip,
508 for (j = 0; j < mcp->chip.ngpio; j++) { 478 0,
509 irq = irq_create_mapping(mcp->irq_domain, j); 479 handle_simple_irq,
510 irq_set_lockdep_class(irq, &gpio_lock_class); 480 IRQ_TYPE_NONE);
511 irq_set_chip_data(irq, mcp); 481 if (err) {
512 irq_set_chip(irq, &mcp23s08_irq_chip); 482 dev_err(chip->parent,
513 irq_set_nested_thread(irq, true); 483 "could not connect irqchip to gpiochip: %d\n", err);
514 irq_set_noprobe(irq); 484 return err;
515 } 485 }
516 return 0;
517}
518 486
519static void mcp23s08_irq_teardown(struct mcp23s08 *mcp) 487 gpiochip_set_chained_irqchip(chip,
520{ 488 &mcp23s08_irq_chip,
521 unsigned int irq, i; 489 mcp->irq,
490 NULL);
522 491
523 for (i = 0; i < mcp->chip.ngpio; i++) { 492 return 0;
524 irq = irq_find_mapping(mcp->irq_domain, i);
525 if (irq > 0)
526 irq_dispose_mapping(irq);
527 }
528
529 irq_domain_remove(mcp->irq_domain);
530} 493}
531 494
532/*----------------------------------------------------------------------*/ 495/*----------------------------------------------------------------------*/
@@ -721,7 +684,6 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
721 if (mcp->irq && mcp->irq_controller) { 684 if (mcp->irq && mcp->irq_controller) {
722 status = mcp23s08_irq_setup(mcp); 685 status = mcp23s08_irq_setup(mcp);
723 if (status) { 686 if (status) {
724 mcp23s08_irq_teardown(mcp);
725 goto fail; 687 goto fail;
726 } 688 }
727 } 689 }
@@ -847,9 +809,6 @@ static int mcp230xx_remove(struct i2c_client *client)
847{ 809{
848 struct mcp23s08 *mcp = i2c_get_clientdata(client); 810 struct mcp23s08 *mcp = i2c_get_clientdata(client);
849 811
850 if (client->irq && mcp->irq_controller)
851 mcp23s08_irq_teardown(mcp);
852
853 gpiochip_remove(&mcp->chip); 812 gpiochip_remove(&mcp->chip);
854 kfree(mcp); 813 kfree(mcp);
855 814
@@ -1017,8 +976,6 @@ static int mcp23s08_remove(struct spi_device *spi)
1017 if (!data->mcp[addr]) 976 if (!data->mcp[addr])
1018 continue; 977 continue;
1019 978
1020 if (spi->irq && data->mcp[addr]->irq_controller)
1021 mcp23s08_irq_teardown(data->mcp[addr]);
1022 gpiochip_remove(&data->mcp[addr]->chip); 979 gpiochip_remove(&data->mcp[addr]->chip);
1023 } 980 }
1024 981
diff --git a/drivers/gpio/gpio-menz127.c b/drivers/gpio/gpio-menz127.c
index c5c9599a3a71..cc103aff45e4 100644
--- a/drivers/gpio/gpio-menz127.c
+++ b/drivers/gpio/gpio-menz127.c
@@ -35,7 +35,6 @@
35struct men_z127_gpio { 35struct men_z127_gpio {
36 struct gpio_chip gc; 36 struct gpio_chip gc;
37 void __iomem *reg_base; 37 void __iomem *reg_base;
38 struct mcb_device *mdev;
39 struct resource *mem; 38 struct resource *mem;
40}; 39};
41 40
@@ -43,7 +42,7 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
43 unsigned debounce) 42 unsigned debounce)
44{ 43{
45 struct men_z127_gpio *priv = gpiochip_get_data(gc); 44 struct men_z127_gpio *priv = gpiochip_get_data(gc);
46 struct device *dev = &priv->mdev->dev; 45 struct device *dev = gc->parent;
47 unsigned int rnd; 46 unsigned int rnd;
48 u32 db_en, db_cnt; 47 u32 db_en, db_cnt;
49 48
@@ -88,21 +87,25 @@ static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
88 return 0; 87 return 0;
89} 88}
90 89
91static int men_z127_request(struct gpio_chip *gc, unsigned gpio_pin) 90static int men_z127_set_single_ended(struct gpio_chip *gc,
91 unsigned offset,
92 enum single_ended_mode mode)
92{ 93{
93 struct men_z127_gpio *priv = gpiochip_get_data(gc); 94 struct men_z127_gpio *priv = gpiochip_get_data(gc);
94 u32 od_en; 95 u32 od_en;
95 96
96 if (gpio_pin >= gc->ngpio) 97 if (mode != LINE_MODE_OPEN_DRAIN &&
97 return -EINVAL; 98 mode != LINE_MODE_PUSH_PULL)
99 return -ENOTSUPP;
98 100
99 spin_lock(&gc->bgpio_lock); 101 spin_lock(&gc->bgpio_lock);
100 od_en = readl(priv->reg_base + MEN_Z127_ODER); 102 od_en = readl(priv->reg_base + MEN_Z127_ODER);
101 103
102 if (gpiochip_line_is_open_drain(gc, gpio_pin)) 104 if (mode == LINE_MODE_OPEN_DRAIN)
103 od_en |= BIT(gpio_pin); 105 od_en |= BIT(offset);
104 else 106 else
105 od_en &= ~BIT(gpio_pin); 107 /* Implicitly LINE_MODE_PUSH_PULL */
108 od_en &= ~BIT(offset);
106 109
107 writel(od_en, priv->reg_base + MEN_Z127_ODER); 110 writel(od_en, priv->reg_base + MEN_Z127_ODER);
108 spin_unlock(&gc->bgpio_lock); 111 spin_unlock(&gc->bgpio_lock);
@@ -135,7 +138,6 @@ static int men_z127_probe(struct mcb_device *mdev,
135 goto err_release; 138 goto err_release;
136 } 139 }
137 140
138 men_z127_gpio->mdev = mdev;
139 mcb_set_drvdata(mdev, men_z127_gpio); 141 mcb_set_drvdata(mdev, men_z127_gpio);
140 142
141 ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4, 143 ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4,
@@ -148,7 +150,7 @@ static int men_z127_probe(struct mcb_device *mdev,
148 goto err_unmap; 150 goto err_unmap;
149 151
150 men_z127_gpio->gc.set_debounce = men_z127_debounce; 152 men_z127_gpio->gc.set_debounce = men_z127_debounce;
151 men_z127_gpio->gc.request = men_z127_request; 153 men_z127_gpio->gc.set_single_ended = men_z127_set_single_ended;
152 154
153 ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio); 155 ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio);
154 if (ret) { 156 if (ret) {
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-mmio.c
index 54cddfa98f50..6c1cb3b8c02c 100644
--- a/drivers/gpio/gpio-generic.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -549,7 +549,7 @@ int bgpio_init(struct gpio_chip *gc, struct device *dev,
549} 549}
550EXPORT_SYMBOL_GPL(bgpio_init); 550EXPORT_SYMBOL_GPL(bgpio_init);
551 551
552#ifdef CONFIG_GPIO_GENERIC_PLATFORM 552#if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM)
553 553
554static void __iomem *bgpio_map(struct platform_device *pdev, 554static void __iomem *bgpio_map(struct platform_device *pdev,
555 const char *name, 555 const char *name,
diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c
index f02d0b490978..d58d38906ba6 100644
--- a/drivers/gpio/gpio-moxart.c
+++ b/drivers/gpio/gpio-moxart.c
@@ -15,7 +15,6 @@
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/of_address.h> 18#include <linux/of_address.h>
20#include <linux/of_gpio.h> 19#include <linux/of_gpio.h>
21#include <linux/pinctrl/consumer.h> 20#include <linux/pinctrl/consumer.h>
@@ -82,8 +81,4 @@ static struct platform_driver moxart_gpio_driver = {
82 }, 81 },
83 .probe = moxart_gpio_probe, 82 .probe = moxart_gpio_probe,
84}; 83};
85module_platform_driver(moxart_gpio_driver); 84builtin_platform_driver(moxart_gpio_driver);
86
87MODULE_DESCRIPTION("MOXART GPIO chip driver");
88MODULE_LICENSE("GPL");
89MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>");
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 11c6582ef0a6..cd5dc27320a2 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -34,7 +34,7 @@
34 */ 34 */
35 35
36#include <linux/err.h> 36#include <linux/err.h>
37#include <linux/module.h> 37#include <linux/init.h>
38#include <linux/gpio.h> 38#include <linux/gpio.h>
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/slab.h> 40#include <linux/slab.h>
@@ -557,7 +557,6 @@ static const struct of_device_id mvebu_gpio_of_match[] = {
557 /* sentinel */ 557 /* sentinel */
558 }, 558 },
559}; 559};
560MODULE_DEVICE_TABLE(of, mvebu_gpio_of_match);
561 560
562static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state) 561static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
563{ 562{
@@ -838,4 +837,4 @@ static struct platform_driver mvebu_gpio_driver = {
838 .suspend = mvebu_gpio_suspend, 837 .suspend = mvebu_gpio_suspend,
839 .resume = mvebu_gpio_resume, 838 .resume = mvebu_gpio_resume,
840}; 839};
841module_platform_driver(mvebu_gpio_driver); 840builtin_platform_driver(mvebu_gpio_driver);
diff --git a/drivers/gpio/gpio-octeon.c b/drivers/gpio/gpio-octeon.c
index 47aead1ed1cc..96a8a8cb2729 100644
--- a/drivers/gpio/gpio-octeon.c
+++ b/drivers/gpio/gpio-octeon.c
@@ -83,6 +83,7 @@ static int octeon_gpio_probe(struct platform_device *pdev)
83 struct octeon_gpio *gpio; 83 struct octeon_gpio *gpio;
84 struct gpio_chip *chip; 84 struct gpio_chip *chip;
85 struct resource *res_mem; 85 struct resource *res_mem;
86 void __iomem *reg_base;
86 int err = 0; 87 int err = 0;
87 88
88 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 89 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
@@ -91,21 +92,11 @@ static int octeon_gpio_probe(struct platform_device *pdev)
91 chip = &gpio->chip; 92 chip = &gpio->chip;
92 93
93 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 94 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
94 if (res_mem == NULL) { 95 reg_base = devm_ioremap_resource(&pdev->dev, res_mem);
95 dev_err(&pdev->dev, "found no memory resource\n"); 96 if (IS_ERR(reg_base))
96 err = -ENXIO; 97 return PTR_ERR(reg_base);
97 goto out;
98 }
99 if (!devm_request_mem_region(&pdev->dev, res_mem->start,
100 resource_size(res_mem),
101 res_mem->name)) {
102 dev_err(&pdev->dev, "request_mem_region failed\n");
103 err = -ENXIO;
104 goto out;
105 }
106 gpio->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start,
107 resource_size(res_mem));
108 98
99 gpio->register_base = (u64)reg_base;
109 pdev->dev.platform_data = chip; 100 pdev->dev.platform_data = chip;
110 chip->label = "octeon-gpio"; 101 chip->label = "octeon-gpio";
111 chip->parent = &pdev->dev; 102 chip->parent = &pdev->dev;
@@ -119,14 +110,13 @@ static int octeon_gpio_probe(struct platform_device *pdev)
119 chip->set = octeon_gpio_set; 110 chip->set = octeon_gpio_set;
120 err = devm_gpiochip_add_data(&pdev->dev, chip, gpio); 111 err = devm_gpiochip_add_data(&pdev->dev, chip, gpio);
121 if (err) 112 if (err)
122 goto out; 113 return err;
123 114
124 dev_info(&pdev->dev, "OCTEON GPIO driver probed.\n"); 115 dev_info(&pdev->dev, "OCTEON GPIO driver probed.\n");
125out: 116 return 0;
126 return err;
127} 117}
128 118
129static struct of_device_id octeon_gpio_match[] = { 119static const struct of_device_id octeon_gpio_match[] = {
130 { 120 {
131 .compatible = "cavium,octeon-3860-gpio", 121 .compatible = "cavium,octeon-3860-gpio",
132 }, 122 },
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 551dfa9d97ab..b98ede78c9d8 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -611,51 +611,12 @@ static inline void omap_set_gpio_irqenable(struct gpio_bank *bank,
611 omap_disable_gpio_irqbank(bank, BIT(offset)); 611 omap_disable_gpio_irqbank(bank, BIT(offset));
612} 612}
613 613
614/*
615 * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
616 * 1510 does not seem to have a wake-up register. If JTAG is connected
617 * to the target, system will wake up always on GPIO events. While
618 * system is running all registered GPIO interrupts need to have wake-up
619 * enabled. When system is suspended, only selected GPIO interrupts need
620 * to have wake-up enabled.
621 */
622static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset,
623 int enable)
624{
625 u32 gpio_bit = BIT(offset);
626 unsigned long flags;
627
628 if (bank->non_wakeup_gpios & gpio_bit) {
629 dev_err(bank->chip.parent,
630 "Unable to modify wakeup on non-wakeup GPIO%d\n",
631 offset);
632 return -EINVAL;
633 }
634
635 raw_spin_lock_irqsave(&bank->lock, flags);
636 if (enable)
637 bank->context.wake_en |= gpio_bit;
638 else
639 bank->context.wake_en &= ~gpio_bit;
640
641 writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en);
642 raw_spin_unlock_irqrestore(&bank->lock, flags);
643
644 return 0;
645}
646
647/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ 614/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
648static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) 615static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable)
649{ 616{
650 struct gpio_bank *bank = omap_irq_data_get_bank(d); 617 struct gpio_bank *bank = omap_irq_data_get_bank(d);
651 unsigned offset = d->hwirq;
652 int ret;
653 618
654 ret = omap_set_gpio_wakeup(bank, offset, enable); 619 return irq_set_irq_wake(bank->irq, enable);
655 if (!ret)
656 ret = irq_set_irq_wake(bank->irq, enable);
657
658 return ret;
659} 620}
660 621
661static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) 622static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
@@ -1187,6 +1148,7 @@ static int omap_gpio_probe(struct platform_device *pdev)
1187 irqc->irq_bus_lock = omap_gpio_irq_bus_lock, 1148 irqc->irq_bus_lock = omap_gpio_irq_bus_lock,
1188 irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, 1149 irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock,
1189 irqc->name = dev_name(&pdev->dev); 1150 irqc->name = dev_name(&pdev->dev);
1151 irqc->flags = IRQCHIP_MASK_ON_SUSPEND;
1190 1152
1191 bank->irq = platform_get_irq(pdev, 0); 1153 bank->irq = platform_get_irq(pdev, 0);
1192 if (bank->irq <= 0) { 1154 if (bank->irq <= 0) {
diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c
index 6f27b3d94d53..e248707ca39e 100644
--- a/drivers/gpio/gpio-palmas.c
+++ b/drivers/gpio/gpio-palmas.c
@@ -20,7 +20,7 @@
20 20
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/module.h> 23#include <linux/init.h>
24#include <linux/mfd/palmas.h> 24#include <linux/mfd/palmas.h>
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_device.h> 26#include <linux/of_device.h>
@@ -218,14 +218,3 @@ static int __init palmas_gpio_init(void)
218 return platform_driver_register(&palmas_gpio_driver); 218 return platform_driver_register(&palmas_gpio_driver);
219} 219}
220subsys_initcall(palmas_gpio_init); 220subsys_initcall(palmas_gpio_init);
221
222static void __exit palmas_gpio_exit(void)
223{
224 platform_driver_unregister(&palmas_gpio_driver);
225}
226module_exit(palmas_gpio_exit);
227
228MODULE_ALIAS("platform:palmas-gpio");
229MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
230MODULE_DESCRIPTION("GPIO driver for TI Palmas series PMICs");
231MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index e66084c295fb..5e3be32ebb8d 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -38,8 +38,13 @@
38#define PCA957X_MSK 6 38#define PCA957X_MSK 6
39#define PCA957X_INTS 7 39#define PCA957X_INTS 7
40 40
41#define PCAL953X_IN_LATCH 34
42#define PCAL953X_INT_MASK 37
43#define PCAL953X_INT_STAT 38
44
41#define PCA_GPIO_MASK 0x00FF 45#define PCA_GPIO_MASK 0x00FF
42#define PCA_INT 0x0100 46#define PCA_INT 0x0100
47#define PCA_PCAL 0x0200
43#define PCA953X_TYPE 0x1000 48#define PCA953X_TYPE 0x1000
44#define PCA957X_TYPE 0x2000 49#define PCA957X_TYPE 0x2000
45#define PCA_TYPE_MASK 0xF000 50#define PCA_TYPE_MASK 0xF000
@@ -77,7 +82,7 @@ static const struct i2c_device_id pca953x_id[] = {
77MODULE_DEVICE_TABLE(i2c, pca953x_id); 82MODULE_DEVICE_TABLE(i2c, pca953x_id);
78 83
79static const struct acpi_device_id pca953x_acpi_ids[] = { 84static const struct acpi_device_id pca953x_acpi_ids[] = {
80 { "INT3491", 16 | PCA953X_TYPE | PCA_INT, }, 85 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
81 { } 86 { }
82}; 87};
83MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 88MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
@@ -437,6 +442,18 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
437 struct pca953x_chip *chip = gpiochip_get_data(gc); 442 struct pca953x_chip *chip = gpiochip_get_data(gc);
438 u8 new_irqs; 443 u8 new_irqs;
439 int level, i; 444 int level, i;
445 u8 invert_irq_mask[MAX_BANK];
446
447 if (chip->driver_data & PCA_PCAL) {
448 /* Enable latch on interrupt-enabled inputs */
449 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
450
451 for (i = 0; i < NBANK(chip); i++)
452 invert_irq_mask[i] = ~chip->irq_mask[i];
453
454 /* Unmask enabled interrupts */
455 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
456 }
440 457
441 /* Look for any newly setup interrupt */ 458 /* Look for any newly setup interrupt */
442 for (i = 0; i < NBANK(chip); i++) { 459 for (i = 0; i < NBANK(chip); i++) {
@@ -498,6 +515,29 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
498 u8 trigger[MAX_BANK]; 515 u8 trigger[MAX_BANK];
499 int ret, i, offset = 0; 516 int ret, i, offset = 0;
500 517
518 if (chip->driver_data & PCA_PCAL) {
519 /* Read the current interrupt status from the device */
520 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
521 if (ret)
522 return false;
523
524 /* Check latched inputs and clear interrupt status */
525 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
526 if (ret)
527 return false;
528
529 for (i = 0; i < NBANK(chip); i++) {
530 /* Apply filter for rising/falling edge selection */
531 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
532 (cur_stat[i] & chip->irq_trig_raise[i]);
533 pending[i] &= trigger[i];
534 if (pending[i])
535 pending_seen = true;
536 }
537
538 return pending_seen;
539 }
540
501 switch (chip->chip_type) { 541 switch (chip->chip_type) {
502 case PCA953X_TYPE: 542 case PCA953X_TYPE:
503 offset = PCA953X_INPUT; 543 offset = PCA953X_INPUT;
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 5cb38212bbc0..6e3c1430616f 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * Copyright (C) 2008, 2009 Provigent Ltd. 2 * Copyright (C) 2008, 2009 Provigent Ltd.
3 * 3 *
4 * Author: Baruch Siach <baruch@tkos.co.il>
5 *
4 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
@@ -11,7 +13,7 @@
11 */ 13 */
12#include <linux/spinlock.h> 14#include <linux/spinlock.h>
13#include <linux/errno.h> 15#include <linux/errno.h>
14#include <linux/module.h> 16#include <linux/init.h>
15#include <linux/io.h> 17#include <linux/io.h>
16#include <linux/ioport.h> 18#include <linux/ioport.h>
17#include <linux/interrupt.h> 19#include <linux/interrupt.h>
@@ -59,15 +61,19 @@ struct pl061_gpio {
59#endif 61#endif
60}; 62};
61 63
64static int pl061_get_direction(struct gpio_chip *gc, unsigned offset)
65{
66 struct pl061_gpio *chip = gpiochip_get_data(gc);
67
68 return !(readb(chip->base + GPIODIR) & BIT(offset));
69}
70
62static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) 71static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
63{ 72{
64 struct pl061_gpio *chip = gpiochip_get_data(gc); 73 struct pl061_gpio *chip = gpiochip_get_data(gc);
65 unsigned long flags; 74 unsigned long flags;
66 unsigned char gpiodir; 75 unsigned char gpiodir;
67 76
68 if (offset >= gc->ngpio)
69 return -EINVAL;
70
71 spin_lock_irqsave(&chip->lock, flags); 77 spin_lock_irqsave(&chip->lock, flags);
72 gpiodir = readb(chip->base + GPIODIR); 78 gpiodir = readb(chip->base + GPIODIR);
73 gpiodir &= ~(BIT(offset)); 79 gpiodir &= ~(BIT(offset));
@@ -84,9 +90,6 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
84 unsigned long flags; 90 unsigned long flags;
85 unsigned char gpiodir; 91 unsigned char gpiodir;
86 92
87 if (offset >= gc->ngpio)
88 return -EINVAL;
89
90 spin_lock_irqsave(&chip->lock, flags); 93 spin_lock_irqsave(&chip->lock, flags);
91 writeb(!!value << offset, chip->base + (BIT(offset + 2))); 94 writeb(!!value << offset, chip->base + (BIT(offset + 2)));
92 gpiodir = readb(chip->base + GPIODIR); 95 gpiodir = readb(chip->base + GPIODIR);
@@ -319,6 +322,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
319 chip->gc.free = gpiochip_generic_free; 322 chip->gc.free = gpiochip_generic_free;
320 } 323 }
321 324
325 chip->gc.get_direction = pl061_get_direction;
322 chip->gc.direction_input = pl061_direction_input; 326 chip->gc.direction_input = pl061_direction_input;
323 chip->gc.direction_output = pl061_direction_output; 327 chip->gc.direction_output = pl061_direction_output;
324 chip->gc.get = pl061_get_value; 328 chip->gc.get = pl061_get_value;
@@ -429,8 +433,6 @@ static struct amba_id pl061_ids[] = {
429 { 0, 0 }, 433 { 0, 0 },
430}; 434};
431 435
432MODULE_DEVICE_TABLE(amba, pl061_ids);
433
434static struct amba_driver pl061_gpio_driver = { 436static struct amba_driver pl061_gpio_driver = {
435 .drv = { 437 .drv = {
436 .name = "pl061_gpio", 438 .name = "pl061_gpio",
@@ -446,8 +448,4 @@ static int __init pl061_gpio_init(void)
446{ 448{
447 return amba_driver_register(&pl061_gpio_driver); 449 return amba_driver_register(&pl061_gpio_driver);
448} 450}
449module_init(pl061_gpio_init); 451device_initcall(pl061_gpio_init);
450
451MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
452MODULE_DESCRIPTION("PL061 GPIO driver");
453MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c
index 1d6100fa312a..3b4dc1a9a68d 100644
--- a/drivers/gpio/gpio-rc5t583.c
+++ b/drivers/gpio/gpio-rc5t583.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/module.h>
27#include <linux/platform_device.h> 26#include <linux/platform_device.h>
28#include <linux/device.h> 27#include <linux/device.h>
29#include <linux/gpio.h> 28#include <linux/gpio.h>
@@ -152,14 +151,3 @@ static int __init rc5t583_gpio_init(void)
152 return platform_driver_register(&rc5t583_gpio_driver); 151 return platform_driver_register(&rc5t583_gpio_driver);
153} 152}
154subsys_initcall(rc5t583_gpio_init); 153subsys_initcall(rc5t583_gpio_init);
155
156static void __exit rc5t583_gpio_exit(void)
157{
158 platform_driver_unregister(&rc5t583_gpio_driver);
159}
160module_exit(rc5t583_gpio_exit);
161
162MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
163MODULE_DESCRIPTION("GPIO interface for RC5T583");
164MODULE_LICENSE("GPL v2");
165MODULE_ALIAS("platform:rc5t583-gpio");
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 4d9a315cfd43..681c93fb9e70 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -284,6 +284,25 @@ static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
284 spin_unlock_irqrestore(&p->lock, flags); 284 spin_unlock_irqrestore(&p->lock, flags);
285} 285}
286 286
287static void gpio_rcar_set_multiple(struct gpio_chip *chip, unsigned long *mask,
288 unsigned long *bits)
289{
290 struct gpio_rcar_priv *p = gpiochip_get_data(chip);
291 unsigned long flags;
292 u32 val, bankmask;
293
294 bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0);
295 if (!bankmask)
296 return;
297
298 spin_lock_irqsave(&p->lock, flags);
299 val = gpio_rcar_read(p, OUTDT);
300 val &= ~bankmask;
301 val |= (bankmask & bits[0]);
302 gpio_rcar_write(p, OUTDT, val);
303 spin_unlock_irqrestore(&p->lock, flags);
304}
305
287static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset, 306static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
288 int value) 307 int value)
289{ 308{
@@ -425,6 +444,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
425 gpio_chip->get = gpio_rcar_get; 444 gpio_chip->get = gpio_rcar_get;
426 gpio_chip->direction_output = gpio_rcar_direction_output; 445 gpio_chip->direction_output = gpio_rcar_direction_output;
427 gpio_chip->set = gpio_rcar_set; 446 gpio_chip->set = gpio_rcar_set;
447 gpio_chip->set_multiple = gpio_rcar_set_multiple;
428 gpio_chip->label = name; 448 gpio_chip->label = name;
429 gpio_chip->parent = dev; 449 gpio_chip->parent = dev;
430 gpio_chip->owner = THIS_MODULE; 450 gpio_chip->owner = THIS_MODULE;
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c
index e3cb6772f6ec..7da9e6c4546a 100644
--- a/drivers/gpio/gpio-sodaville.c
+++ b/drivers/gpio/gpio-sodaville.c
@@ -3,6 +3,8 @@
3 * 3 *
4 * Copyright (c) 2010, 2011 Intel Corporation 4 * Copyright (c) 2010, 2011 Intel Corporation
5 * 5 *
6 * Author: Hans J. Koch <hjk@linutronix.de>
7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License 2 as published 9 * it under the terms of the GNU General Public License 2 as published
8 * by the Free Software Foundation. 10 * by the Free Software Foundation.
@@ -15,7 +17,6 @@
15#include <linux/irq.h> 17#include <linux/irq.h>
16#include <linux/interrupt.h> 18#include <linux/interrupt.h>
17#include <linux/kernel.h> 19#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/pci.h> 20#include <linux/pci.h>
20#include <linux/platform_device.h> 21#include <linux/platform_device.h>
21#include <linux/of_irq.h> 22#include <linux/of_irq.h>
@@ -257,34 +258,17 @@ done:
257 return ret; 258 return ret;
258} 259}
259 260
260static void sdv_gpio_remove(struct pci_dev *pdev)
261{
262 struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev);
263
264 free_irq(pdev->irq, sd);
265 irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
266
267 gpiochip_remove(&sd->chip);
268 pci_release_region(pdev, GPIO_BAR);
269 iounmap(sd->gpio_pub_base);
270 pci_disable_device(pdev);
271 kfree(sd);
272}
273
274static const struct pci_device_id sdv_gpio_pci_ids[] = { 261static const struct pci_device_id sdv_gpio_pci_ids[] = {
275 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_SDV_GPIO) }, 262 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_SDV_GPIO) },
276 { 0, }, 263 { 0, },
277}; 264};
278 265
279static struct pci_driver sdv_gpio_driver = { 266static struct pci_driver sdv_gpio_driver = {
267 .driver = {
268 .suppress_bind_attrs = true,
269 },
280 .name = DRV_NAME, 270 .name = DRV_NAME,
281 .id_table = sdv_gpio_pci_ids, 271 .id_table = sdv_gpio_pci_ids,
282 .probe = sdv_gpio_probe, 272 .probe = sdv_gpio_probe,
283 .remove = sdv_gpio_remove,
284}; 273};
285 274builtin_pci_driver(sdv_gpio_driver);
286module_pci_driver(sdv_gpio_driver);
287
288MODULE_AUTHOR("Hans J. Koch <hjk@linutronix.de>");
289MODULE_DESCRIPTION("GPIO interface for Intel Sodaville SoCs");
290MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c
index 0d5b8c525dd9..853ca23cad88 100644
--- a/drivers/gpio/gpio-sta2x11.c
+++ b/drivers/gpio/gpio-sta2x11.c
@@ -20,7 +20,7 @@
20 * 20 *
21 */ 21 */
22 22
23#include <linux/module.h> 23#include <linux/init.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
@@ -432,8 +432,4 @@ static struct platform_driver sta2x11_gpio_platform_driver = {
432 }, 432 },
433 .probe = gsta_probe, 433 .probe = gsta_probe,
434}; 434};
435 435builtin_platform_driver(sta2x11_gpio_platform_driver);
436module_platform_driver(sta2x11_gpio_platform_driver);
437
438MODULE_LICENSE("GPL v2");
439MODULE_DESCRIPTION("sta2x11_gpio GPIO driver");
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index 5197edf1acfd..6f7af28b8966 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -5,7 +5,6 @@
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 */ 6 */
7 7
8#include <linux/module.h>
9#include <linux/init.h> 8#include <linux/init.h>
10#include <linux/platform_device.h> 9#include <linux/platform_device.h>
11#include <linux/slab.h> 10#include <linux/slab.h>
@@ -413,23 +412,13 @@ out_free:
413 return ret; 412 return ret;
414} 413}
415 414
416static int stmpe_gpio_remove(struct platform_device *pdev)
417{
418 struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev);
419 struct stmpe *stmpe = stmpe_gpio->stmpe;
420
421 gpiochip_remove(&stmpe_gpio->chip);
422 stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
423 kfree(stmpe_gpio);
424
425 return 0;
426}
427
428static struct platform_driver stmpe_gpio_driver = { 415static struct platform_driver stmpe_gpio_driver = {
429 .driver.name = "stmpe-gpio", 416 .driver = {
430 .driver.owner = THIS_MODULE, 417 .suppress_bind_attrs = true,
418 .name = "stmpe-gpio",
419 .owner = THIS_MODULE,
420 },
431 .probe = stmpe_gpio_probe, 421 .probe = stmpe_gpio_probe,
432 .remove = stmpe_gpio_remove,
433}; 422};
434 423
435static int __init stmpe_gpio_init(void) 424static int __init stmpe_gpio_init(void)
@@ -437,13 +426,3 @@ static int __init stmpe_gpio_init(void)
437 return platform_driver_register(&stmpe_gpio_driver); 426 return platform_driver_register(&stmpe_gpio_driver);
438} 427}
439subsys_initcall(stmpe_gpio_init); 428subsys_initcall(stmpe_gpio_init);
440
441static void __exit stmpe_gpio_exit(void)
442{
443 platform_driver_unregister(&stmpe_gpio_driver);
444}
445module_exit(stmpe_gpio_exit);
446
447MODULE_LICENSE("GPL v2");
448MODULE_DESCRIPTION("STMPExxxx GPIO driver");
449MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>");
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c
index d387eb524bf3..a177ebd921d5 100644
--- a/drivers/gpio/gpio-sx150x.c
+++ b/drivers/gpio/gpio-sx150x.c
@@ -1,5 +1,9 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2 * 2 *
3 * Driver for Semtech SX150X I2C GPIO Expanders
4 *
5 * Author: Gregory Bean <gbean@codeaurora.org>
6 *
3 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and 8 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation. 9 * only version 2 as published by the Free Software Foundation.
@@ -19,10 +23,8 @@
19#include <linux/init.h> 23#include <linux/init.h>
20#include <linux/interrupt.h> 24#include <linux/interrupt.h>
21#include <linux/irq.h> 25#include <linux/irq.h>
22#include <linux/module.h>
23#include <linux/mutex.h> 26#include <linux/mutex.h>
24#include <linux/slab.h> 27#include <linux/slab.h>
25#include <linux/i2c/sx150x.h>
26#include <linux/of.h> 28#include <linux/of.h>
27#include <linux/of_address.h> 29#include <linux/of_address.h>
28#include <linux/of_irq.h> 30#include <linux/of_irq.h>
@@ -82,6 +84,57 @@ struct sx150x_device_data {
82 } pri; 84 } pri;
83}; 85};
84 86
87/**
88 * struct sx150x_platform_data - config data for SX150x driver
89 * @gpio_base: The index number of the first GPIO assigned to this
90 * GPIO expander. The expander will create a block of
91 * consecutively numbered gpios beginning at the given base,
92 * with the size of the block depending on the model of the
93 * expander chip.
94 * @oscio_is_gpo: If set to true, the driver will configure OSCIO as a GPO
95 * instead of as an oscillator, increasing the size of the
96 * GP(I)O pool created by this expander by one. The
97 * output-only GPO pin will be added at the end of the block.
98 * @io_pullup_ena: A bit-mask which enables or disables the pull-up resistor
99 * for each IO line in the expander. Setting the bit at
100 * position n will enable the pull-up for the IO at
101 * the corresponding offset. For chips with fewer than
102 * 16 IO pins, high-end bits are ignored.
103 * @io_pulldn_ena: A bit-mask which enables-or disables the pull-down
104 * resistor for each IO line in the expander. Setting the
105 * bit at position n will enable the pull-down for the IO at
106 * the corresponding offset. For chips with fewer than
107 * 16 IO pins, high-end bits are ignored.
108 * @io_polarity: A bit-mask which enables polarity inversion for each IO line
109 * in the expander. Setting the bit at position n inverts
110 * the polarity of that IO line, while clearing it results
111 * in normal polarity. For chips with fewer than 16 IO pins,
112 * high-end bits are ignored.
113 * @irq_summary: The 'summary IRQ' line to which the GPIO expander's INT line
114 * is connected, via which it reports interrupt events
115 * across all GPIO lines. This must be a real,
116 * pre-existing IRQ line.
117 * Setting this value < 0 disables the irq_chip functionality
118 * of the driver.
119 * @irq_base: The first 'virtual IRQ' line at which our block of GPIO-based
120 * IRQ lines will appear. Similarly to gpio_base, the expander
121 * will create a block of irqs beginning at this number.
122 * This value is ignored if irq_summary is < 0.
123 * @reset_during_probe: If set to true, the driver will trigger a full
124 * reset of the chip at the beginning of the probe
125 * in order to place it in a known state.
126 */
127struct sx150x_platform_data {
128 unsigned gpio_base;
129 bool oscio_is_gpo;
130 u16 io_pullup_ena;
131 u16 io_pulldn_ena;
132 u16 io_polarity;
133 int irq_summary;
134 unsigned irq_base;
135 bool reset_during_probe;
136};
137
85struct sx150x_chip { 138struct sx150x_chip {
86 struct gpio_chip gpio_chip; 139 struct gpio_chip gpio_chip;
87 struct i2c_client *client; 140 struct i2c_client *client;
@@ -354,6 +407,32 @@ static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
354 mutex_unlock(&chip->lock); 407 mutex_unlock(&chip->lock);
355} 408}
356 409
410static int sx150x_gpio_set_single_ended(struct gpio_chip *gc,
411 unsigned offset,
412 enum single_ended_mode mode)
413{
414 struct sx150x_chip *chip = gpiochip_get_data(gc);
415
416 /* On the SX160X 789 we can set open drain */
417 if (chip->dev_cfg->model != SX150X_789)
418 return -ENOTSUPP;
419
420 if (mode == LINE_MODE_PUSH_PULL)
421 return sx150x_write_cfg(chip,
422 offset,
423 1,
424 chip->dev_cfg->pri.x789.reg_drain,
425 0);
426
427 if (mode == LINE_MODE_OPEN_DRAIN)
428 return sx150x_write_cfg(chip,
429 offset,
430 1,
431 chip->dev_cfg->pri.x789.reg_drain,
432 1);
433 return -ENOTSUPP;
434}
435
357static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 436static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
358{ 437{
359 struct sx150x_chip *chip = gpiochip_get_data(gc); 438 struct sx150x_chip *chip = gpiochip_get_data(gc);
@@ -508,6 +587,7 @@ static void sx150x_init_chip(struct sx150x_chip *chip,
508 chip->gpio_chip.direction_output = sx150x_gpio_direction_output; 587 chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
509 chip->gpio_chip.get = sx150x_gpio_get; 588 chip->gpio_chip.get = sx150x_gpio_get;
510 chip->gpio_chip.set = sx150x_gpio_set; 589 chip->gpio_chip.set = sx150x_gpio_set;
590 chip->gpio_chip.set_single_ended = sx150x_gpio_set_single_ended;
511 chip->gpio_chip.base = pdata->gpio_base; 591 chip->gpio_chip.base = pdata->gpio_base;
512 chip->gpio_chip.can_sleep = true; 592 chip->gpio_chip.can_sleep = true;
513 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; 593 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
@@ -597,12 +677,6 @@ static int sx150x_init_hw(struct sx150x_chip *chip,
597 677
598 if (chip->dev_cfg->model == SX150X_789) { 678 if (chip->dev_cfg->model == SX150X_789) {
599 err = sx150x_init_io(chip, 679 err = sx150x_init_io(chip,
600 chip->dev_cfg->pri.x789.reg_drain,
601 pdata->io_open_drain_ena);
602 if (err < 0)
603 return err;
604
605 err = sx150x_init_io(chip,
606 chip->dev_cfg->pri.x789.reg_polarity, 680 chip->dev_cfg->pri.x789.reg_polarity,
607 pdata->io_polarity); 681 pdata->io_polarity);
608 if (err < 0) 682 if (err < 0)
@@ -718,13 +792,3 @@ static int __init sx150x_init(void)
718 return i2c_add_driver(&sx150x_driver); 792 return i2c_add_driver(&sx150x_driver);
719} 793}
720subsys_initcall(sx150x_init); 794subsys_initcall(sx150x_init);
721
722static void __exit sx150x_exit(void)
723{
724 return i2c_del_driver(&sx150x_driver);
725}
726module_exit(sx150x_exit);
727
728MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
729MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
730MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c
index 4f566e6b81f1..2e35ed3abbcf 100644
--- a/drivers/gpio/gpio-tc3589x.c
+++ b/drivers/gpio/gpio-tc3589x.c
@@ -6,14 +6,14 @@
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */ 7 */
8 8
9#include <linux/module.h>
10#include <linux/init.h> 9#include <linux/init.h>
11#include <linux/platform_device.h> 10#include <linux/platform_device.h>
12#include <linux/slab.h> 11#include <linux/slab.h>
13#include <linux/gpio.h> 12#include <linux/gpio/driver.h>
14#include <linux/of.h> 13#include <linux/of.h>
15#include <linux/interrupt.h> 14#include <linux/interrupt.h>
16#include <linux/mfd/tc3589x.h> 15#include <linux/mfd/tc3589x.h>
16#include <linux/bitops.h>
17 17
18/* 18/*
19 * These registers are modified under the irq bus lock and cached to avoid 19 * These registers are modified under the irq bus lock and cached to avoid
@@ -39,7 +39,7 @@ static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
39 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); 39 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
40 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; 40 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
41 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; 41 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
42 u8 mask = 1 << (offset % 8); 42 u8 mask = BIT(offset % 8);
43 int ret; 43 int ret;
44 44
45 ret = tc3589x_reg_read(tc3589x, reg); 45 ret = tc3589x_reg_read(tc3589x, reg);
@@ -55,7 +55,7 @@ static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
55 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; 55 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
56 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; 56 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
57 unsigned pos = offset % 8; 57 unsigned pos = offset % 8;
58 u8 data[] = {!!val << pos, 1 << pos}; 58 u8 data[] = {val ? BIT(pos) : 0, BIT(pos)};
59 59
60 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data); 60 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
61} 61}
@@ -70,7 +70,7 @@ static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
70 70
71 tc3589x_gpio_set(chip, offset, val); 71 tc3589x_gpio_set(chip, offset, val);
72 72
73 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos); 73 return tc3589x_set_bits(tc3589x, reg, BIT(pos), BIT(pos));
74} 74}
75 75
76static int tc3589x_gpio_direction_input(struct gpio_chip *chip, 76static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
@@ -81,7 +81,47 @@ static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
81 u8 reg = TC3589x_GPIODIR0 + offset / 8; 81 u8 reg = TC3589x_GPIODIR0 + offset / 8;
82 unsigned pos = offset % 8; 82 unsigned pos = offset % 8;
83 83
84 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0); 84 return tc3589x_set_bits(tc3589x, reg, BIT(pos), 0);
85}
86
87static int tc3589x_gpio_single_ended(struct gpio_chip *chip,
88 unsigned offset,
89 enum single_ended_mode mode)
90{
91 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
92 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
93 /*
94 * These registers are alterated at each second address
95 * ODM bit 0 = drive to GND or Hi-Z (open drain)
96 * ODM bit 1 = drive to VDD or Hi-Z (open source)
97 */
98 u8 odmreg = TC3589x_GPIOODM0 + (offset / 8) * 2;
99 u8 odereg = TC3589x_GPIOODE0 + (offset / 8) * 2;
100 unsigned pos = offset % 8;
101 int ret;
102
103 switch(mode) {
104 case LINE_MODE_OPEN_DRAIN:
105 /* Set open drain mode */
106 ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), 0);
107 if (ret)
108 return ret;
109 /* Enable open drain/source mode */
110 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
111 case LINE_MODE_OPEN_SOURCE:
112 /* Set open source mode */
113 ret = tc3589x_set_bits(tc3589x, odmreg, BIT(pos), BIT(pos));
114 if (ret)
115 return ret;
116 /* Enable open drain/source mode */
117 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), BIT(pos));
118 case LINE_MODE_PUSH_PULL:
119 /* Disable open drain/source mode */
120 return tc3589x_set_bits(tc3589x, odereg, BIT(pos), 0);
121 default:
122 break;
123 }
124 return -ENOTSUPP;
85} 125}
86 126
87static struct gpio_chip template_chip = { 127static struct gpio_chip template_chip = {
@@ -91,6 +131,7 @@ static struct gpio_chip template_chip = {
91 .get = tc3589x_gpio_get, 131 .get = tc3589x_gpio_get,
92 .direction_output = tc3589x_gpio_direction_output, 132 .direction_output = tc3589x_gpio_direction_output,
93 .set = tc3589x_gpio_set, 133 .set = tc3589x_gpio_set,
134 .set_single_ended = tc3589x_gpio_single_ended,
94 .can_sleep = true, 135 .can_sleep = true,
95}; 136};
96 137
@@ -100,7 +141,7 @@ static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
100 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); 141 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
101 int offset = d->hwirq; 142 int offset = d->hwirq;
102 int regoffset = offset / 8; 143 int regoffset = offset / 8;
103 int mask = 1 << (offset % 8); 144 int mask = BIT(offset % 8);
104 145
105 if (type == IRQ_TYPE_EDGE_BOTH) { 146 if (type == IRQ_TYPE_EDGE_BOTH) {
106 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask; 147 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
@@ -165,7 +206,7 @@ static void tc3589x_gpio_irq_mask(struct irq_data *d)
165 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); 206 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
166 int offset = d->hwirq; 207 int offset = d->hwirq;
167 int regoffset = offset / 8; 208 int regoffset = offset / 8;
168 int mask = 1 << (offset % 8); 209 int mask = BIT(offset % 8);
169 210
170 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask; 211 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
171} 212}
@@ -176,7 +217,7 @@ static void tc3589x_gpio_irq_unmask(struct irq_data *d)
176 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); 217 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
177 int offset = d->hwirq; 218 int offset = d->hwirq;
178 int regoffset = offset / 8; 219 int regoffset = offset / 8;
179 int mask = 1 << (offset % 8); 220 int mask = BIT(offset % 8);
180 221
181 tc3589x_gpio->regs[REG_IE][regoffset] |= mask; 222 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
182} 223}
@@ -311,13 +352,3 @@ static int __init tc3589x_gpio_init(void)
311 return platform_driver_register(&tc3589x_gpio_driver); 352 return platform_driver_register(&tc3589x_gpio_driver);
312} 353}
313subsys_initcall(tc3589x_gpio_init); 354subsys_initcall(tc3589x_gpio_init);
314
315static void __exit tc3589x_gpio_exit(void)
316{
317 platform_driver_unregister(&tc3589x_gpio_driver);
318}
319module_exit(tc3589x_gpio_exit);
320
321MODULE_LICENSE("GPL v2");
322MODULE_DESCRIPTION("TC3589x GPIO driver");
323MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 790bb111b2cb..ec891a27952f 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -35,24 +35,27 @@
35#define GPIO_PORT(x) (((x) >> 3) & 0x3) 35#define GPIO_PORT(x) (((x) >> 3) & 0x3)
36#define GPIO_BIT(x) ((x) & 0x7) 36#define GPIO_BIT(x) ((x) & 0x7)
37 37
38#define GPIO_REG(x) (GPIO_BANK(x) * tegra_gpio_bank_stride + \ 38#define GPIO_REG(tgi, x) (GPIO_BANK(x) * tgi->soc->bank_stride + \
39 GPIO_PORT(x) * 4) 39 GPIO_PORT(x) * 4)
40 40
41#define GPIO_CNF(x) (GPIO_REG(x) + 0x00) 41#define GPIO_CNF(t, x) (GPIO_REG(t, x) + 0x00)
42#define GPIO_OE(x) (GPIO_REG(x) + 0x10) 42#define GPIO_OE(t, x) (GPIO_REG(t, x) + 0x10)
43#define GPIO_OUT(x) (GPIO_REG(x) + 0X20) 43#define GPIO_OUT(t, x) (GPIO_REG(t, x) + 0X20)
44#define GPIO_IN(x) (GPIO_REG(x) + 0x30) 44#define GPIO_IN(t, x) (GPIO_REG(t, x) + 0x30)
45#define GPIO_INT_STA(x) (GPIO_REG(x) + 0x40) 45#define GPIO_INT_STA(t, x) (GPIO_REG(t, x) + 0x40)
46#define GPIO_INT_ENB(x) (GPIO_REG(x) + 0x50) 46#define GPIO_INT_ENB(t, x) (GPIO_REG(t, x) + 0x50)
47#define GPIO_INT_LVL(x) (GPIO_REG(x) + 0x60) 47#define GPIO_INT_LVL(t, x) (GPIO_REG(t, x) + 0x60)
48#define GPIO_INT_CLR(x) (GPIO_REG(x) + 0x70) 48#define GPIO_INT_CLR(t, x) (GPIO_REG(t, x) + 0x70)
49 49#define GPIO_DBC_CNT(t, x) (GPIO_REG(t, x) + 0xF0)
50#define GPIO_MSK_CNF(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x00) 50
51#define GPIO_MSK_OE(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x10) 51
52#define GPIO_MSK_OUT(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0X20) 52#define GPIO_MSK_CNF(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x00)
53#define GPIO_MSK_INT_STA(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x40) 53#define GPIO_MSK_OE(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x10)
54#define GPIO_MSK_INT_ENB(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x50) 54#define GPIO_MSK_OUT(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0X20)
55#define GPIO_MSK_INT_LVL(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x60) 55#define GPIO_MSK_DBC_EN(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x30)
56#define GPIO_MSK_INT_STA(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x40)
57#define GPIO_MSK_INT_ENB(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x50)
58#define GPIO_MSK_INT_LVL(t, x) (GPIO_REG(t, x) + t->soc->upper_offset + 0x60)
56 59
57#define GPIO_INT_LVL_MASK 0x010101 60#define GPIO_INT_LVL_MASK 0x010101
58#define GPIO_INT_LVL_EDGE_RISING 0x000101 61#define GPIO_INT_LVL_EDGE_RISING 0x000101
@@ -61,10 +64,13 @@
61#define GPIO_INT_LVL_LEVEL_HIGH 0x000001 64#define GPIO_INT_LVL_LEVEL_HIGH 0x000001
62#define GPIO_INT_LVL_LEVEL_LOW 0x000000 65#define GPIO_INT_LVL_LEVEL_LOW 0x000000
63 66
67struct tegra_gpio_info;
68
64struct tegra_gpio_bank { 69struct tegra_gpio_bank {
65 int bank; 70 int bank;
66 int irq; 71 int irq;
67 spinlock_t lvl_lock[4]; 72 spinlock_t lvl_lock[4];
73 spinlock_t dbc_lock[4]; /* Lock for updating debounce count register */
68#ifdef CONFIG_PM_SLEEP 74#ifdef CONFIG_PM_SLEEP
69 u32 cnf[4]; 75 u32 cnf[4];
70 u32 out[4]; 76 u32 out[4];
@@ -72,25 +78,39 @@ struct tegra_gpio_bank {
72 u32 int_enb[4]; 78 u32 int_enb[4];
73 u32 int_lvl[4]; 79 u32 int_lvl[4];
74 u32 wake_enb[4]; 80 u32 wake_enb[4];
81 u32 dbc_enb[4];
75#endif 82#endif
83 u32 dbc_cnt[4];
84 struct tegra_gpio_info *tgi;
76}; 85};
77 86
78static struct device *dev; 87struct tegra_gpio_soc_config {
79static struct irq_domain *irq_domain; 88 bool debounce_supported;
80static void __iomem *regs; 89 u32 bank_stride;
81static u32 tegra_gpio_bank_count; 90 u32 upper_offset;
82static u32 tegra_gpio_bank_stride; 91};
83static u32 tegra_gpio_upper_offset; 92
84static struct tegra_gpio_bank *tegra_gpio_banks; 93struct tegra_gpio_info {
94 struct device *dev;
95 void __iomem *regs;
96 struct irq_domain *irq_domain;
97 struct tegra_gpio_bank *bank_info;
98 const struct tegra_gpio_soc_config *soc;
99 struct gpio_chip gc;
100 struct irq_chip ic;
101 struct lock_class_key lock_class;
102 u32 bank_count;
103};
85 104
86static inline void tegra_gpio_writel(u32 val, u32 reg) 105static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi,
106 u32 val, u32 reg)
87{ 107{
88 __raw_writel(val, regs + reg); 108 __raw_writel(val, tgi->regs + reg);
89} 109}
90 110
91static inline u32 tegra_gpio_readl(u32 reg) 111static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg)
92{ 112{
93 return __raw_readl(regs + reg); 113 return __raw_readl(tgi->regs + reg);
94} 114}
95 115
96static int tegra_gpio_compose(int bank, int port, int bit) 116static int tegra_gpio_compose(int bank, int port, int bit)
@@ -98,24 +118,25 @@ static int tegra_gpio_compose(int bank, int port, int bit)
98 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7); 118 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7);
99} 119}
100 120
101static void tegra_gpio_mask_write(u32 reg, int gpio, int value) 121static void tegra_gpio_mask_write(struct tegra_gpio_info *tgi, u32 reg,
122 int gpio, int value)
102{ 123{
103 u32 val; 124 u32 val;
104 125
105 val = 0x100 << GPIO_BIT(gpio); 126 val = 0x100 << GPIO_BIT(gpio);
106 if (value) 127 if (value)
107 val |= 1 << GPIO_BIT(gpio); 128 val |= 1 << GPIO_BIT(gpio);
108 tegra_gpio_writel(val, reg); 129 tegra_gpio_writel(tgi, val, reg);
109} 130}
110 131
111static void tegra_gpio_enable(int gpio) 132static void tegra_gpio_enable(struct tegra_gpio_info *tgi, int gpio)
112{ 133{
113 tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 1); 134 tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 1);
114} 135}
115 136
116static void tegra_gpio_disable(int gpio) 137static void tegra_gpio_disable(struct tegra_gpio_info *tgi, int gpio)
117{ 138{
118 tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 0); 139 tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 0);
119} 140}
120 141
121static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset) 142static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset)
@@ -125,83 +146,138 @@ static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset)
125 146
126static void tegra_gpio_free(struct gpio_chip *chip, unsigned offset) 147static void tegra_gpio_free(struct gpio_chip *chip, unsigned offset)
127{ 148{
149 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
150
128 pinctrl_free_gpio(offset); 151 pinctrl_free_gpio(offset);
129 tegra_gpio_disable(offset); 152 tegra_gpio_disable(tgi, offset);
130} 153}
131 154
132static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 155static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
133{ 156{
134 tegra_gpio_mask_write(GPIO_MSK_OUT(offset), offset, value); 157 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
158
159 tegra_gpio_mask_write(tgi, GPIO_MSK_OUT(tgi, offset), offset, value);
135} 160}
136 161
137static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset) 162static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset)
138{ 163{
164 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
165 int bval = BIT(GPIO_BIT(offset));
166
139 /* If gpio is in output mode then read from the out value */ 167 /* If gpio is in output mode then read from the out value */
140 if ((tegra_gpio_readl(GPIO_OE(offset)) >> GPIO_BIT(offset)) & 1) 168 if (tegra_gpio_readl(tgi, GPIO_OE(tgi, offset)) & bval)
141 return (tegra_gpio_readl(GPIO_OUT(offset)) >> 169 return !!(tegra_gpio_readl(tgi, GPIO_OUT(tgi, offset)) & bval);
142 GPIO_BIT(offset)) & 0x1;
143 170
144 return (tegra_gpio_readl(GPIO_IN(offset)) >> GPIO_BIT(offset)) & 0x1; 171 return !!(tegra_gpio_readl(tgi, GPIO_IN(tgi, offset)) & bval);
145} 172}
146 173
147static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 174static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
148{ 175{
149 tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 0); 176 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
150 tegra_gpio_enable(offset); 177
178 tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 0);
179 tegra_gpio_enable(tgi, offset);
151 return 0; 180 return 0;
152} 181}
153 182
154static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset, 183static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
155 int value) 184 int value)
156{ 185{
186 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
187
157 tegra_gpio_set(chip, offset, value); 188 tegra_gpio_set(chip, offset, value);
158 tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 1); 189 tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 1);
159 tegra_gpio_enable(offset); 190 tegra_gpio_enable(tgi, offset);
160 return 0; 191 return 0;
161} 192}
162 193
163static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 194static int tegra_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
164{ 195{
165 return irq_find_mapping(irq_domain, offset); 196 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
197 u32 pin_mask = BIT(GPIO_BIT(offset));
198 u32 cnf, oe;
199
200 cnf = tegra_gpio_readl(tgi, GPIO_CNF(tgi, offset));
201 if (!(cnf & pin_mask))
202 return -EINVAL;
203
204 oe = tegra_gpio_readl(tgi, GPIO_OE(tgi, offset));
205
206 return (oe & pin_mask) ? GPIOF_DIR_OUT : GPIOF_DIR_IN;
166} 207}
167 208
168static struct gpio_chip tegra_gpio_chip = { 209static int tegra_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
169 .label = "tegra-gpio", 210 unsigned int debounce)
170 .request = tegra_gpio_request, 211{
171 .free = tegra_gpio_free, 212 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
172 .direction_input = tegra_gpio_direction_input, 213 struct tegra_gpio_bank *bank = &tgi->bank_info[GPIO_BANK(offset)];
173 .get = tegra_gpio_get, 214 unsigned int debounce_ms = DIV_ROUND_UP(debounce, 1000);
174 .direction_output = tegra_gpio_direction_output, 215 unsigned long flags;
175 .set = tegra_gpio_set, 216 int port;
176 .to_irq = tegra_gpio_to_irq, 217
177 .base = 0, 218 if (!debounce_ms) {
178}; 219 tegra_gpio_mask_write(tgi, GPIO_MSK_DBC_EN(tgi, offset),
220 offset, 0);
221 return 0;
222 }
223
224 debounce_ms = min(debounce_ms, 255U);
225 port = GPIO_PORT(offset);
226
227 /* There is only one debounce count register per port and hence
228 * set the maximum of current and requested debounce time.
229 */
230 spin_lock_irqsave(&bank->dbc_lock[port], flags);
231 if (bank->dbc_cnt[port] < debounce_ms) {
232 tegra_gpio_writel(tgi, debounce_ms, GPIO_DBC_CNT(tgi, offset));
233 bank->dbc_cnt[port] = debounce_ms;
234 }
235 spin_unlock_irqrestore(&bank->dbc_lock[port], flags);
236
237 tegra_gpio_mask_write(tgi, GPIO_MSK_DBC_EN(tgi, offset), offset, 1);
238
239 return 0;
240}
241
242static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
243{
244 struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
245
246 return irq_find_mapping(tgi->irq_domain, offset);
247}
179 248
180static void tegra_gpio_irq_ack(struct irq_data *d) 249static void tegra_gpio_irq_ack(struct irq_data *d)
181{ 250{
251 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
252 struct tegra_gpio_info *tgi = bank->tgi;
182 int gpio = d->hwirq; 253 int gpio = d->hwirq;
183 254
184 tegra_gpio_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); 255 tegra_gpio_writel(tgi, 1 << GPIO_BIT(gpio), GPIO_INT_CLR(tgi, gpio));
185} 256}
186 257
187static void tegra_gpio_irq_mask(struct irq_data *d) 258static void tegra_gpio_irq_mask(struct irq_data *d)
188{ 259{
260 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
261 struct tegra_gpio_info *tgi = bank->tgi;
189 int gpio = d->hwirq; 262 int gpio = d->hwirq;
190 263
191 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0); 264 tegra_gpio_mask_write(tgi, GPIO_MSK_INT_ENB(tgi, gpio), gpio, 0);
192} 265}
193 266
194static void tegra_gpio_irq_unmask(struct irq_data *d) 267static void tegra_gpio_irq_unmask(struct irq_data *d)
195{ 268{
269 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
270 struct tegra_gpio_info *tgi = bank->tgi;
196 int gpio = d->hwirq; 271 int gpio = d->hwirq;
197 272
198 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1); 273 tegra_gpio_mask_write(tgi, GPIO_MSK_INT_ENB(tgi, gpio), gpio, 1);
199} 274}
200 275
201static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) 276static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
202{ 277{
203 int gpio = d->hwirq; 278 int gpio = d->hwirq;
204 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); 279 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
280 struct tegra_gpio_info *tgi = bank->tgi;
205 int port = GPIO_PORT(gpio); 281 int port = GPIO_PORT(gpio);
206 int lvl_type; 282 int lvl_type;
207 int val; 283 int val;
@@ -233,23 +309,24 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
233 return -EINVAL; 309 return -EINVAL;
234 } 310 }
235 311
236 ret = gpiochip_lock_as_irq(&tegra_gpio_chip, gpio); 312 ret = gpiochip_lock_as_irq(&tgi->gc, gpio);
237 if (ret) { 313 if (ret) {
238 dev_err(dev, "unable to lock Tegra GPIO %d as IRQ\n", gpio); 314 dev_err(tgi->dev,
315 "unable to lock Tegra GPIO %d as IRQ\n", gpio);
239 return ret; 316 return ret;
240 } 317 }
241 318
242 spin_lock_irqsave(&bank->lvl_lock[port], flags); 319 spin_lock_irqsave(&bank->lvl_lock[port], flags);
243 320
244 val = tegra_gpio_readl(GPIO_INT_LVL(gpio)); 321 val = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio));
245 val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio)); 322 val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio));
246 val |= lvl_type << GPIO_BIT(gpio); 323 val |= lvl_type << GPIO_BIT(gpio);
247 tegra_gpio_writel(val, GPIO_INT_LVL(gpio)); 324 tegra_gpio_writel(tgi, val, GPIO_INT_LVL(tgi, gpio));
248 325
249 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 326 spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
250 327
251 tegra_gpio_mask_write(GPIO_MSK_OE(gpio), gpio, 0); 328 tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, gpio), gpio, 0);
252 tegra_gpio_enable(gpio); 329 tegra_gpio_enable(tgi, gpio);
253 330
254 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 331 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
255 irq_set_handler_locked(d, handle_level_irq); 332 irq_set_handler_locked(d, handle_level_irq);
@@ -261,9 +338,11 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
261 338
262static void tegra_gpio_irq_shutdown(struct irq_data *d) 339static void tegra_gpio_irq_shutdown(struct irq_data *d)
263{ 340{
341 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
342 struct tegra_gpio_info *tgi = bank->tgi;
264 int gpio = d->hwirq; 343 int gpio = d->hwirq;
265 344
266 gpiochip_unlock_as_irq(&tegra_gpio_chip, gpio); 345 gpiochip_unlock_as_irq(&tgi->gc, gpio);
267} 346}
268 347
269static void tegra_gpio_irq_handler(struct irq_desc *desc) 348static void tegra_gpio_irq_handler(struct irq_desc *desc)
@@ -271,19 +350,24 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)
271 int port; 350 int port;
272 int pin; 351 int pin;
273 int unmasked = 0; 352 int unmasked = 0;
353 int gpio;
354 u32 lvl;
355 unsigned long sta;
274 struct irq_chip *chip = irq_desc_get_chip(desc); 356 struct irq_chip *chip = irq_desc_get_chip(desc);
275 struct tegra_gpio_bank *bank = irq_desc_get_handler_data(desc); 357 struct tegra_gpio_bank *bank = irq_desc_get_handler_data(desc);
358 struct tegra_gpio_info *tgi = bank->tgi;
276 359
277 chained_irq_enter(chip, desc); 360 chained_irq_enter(chip, desc);
278 361
279 for (port = 0; port < 4; port++) { 362 for (port = 0; port < 4; port++) {
280 int gpio = tegra_gpio_compose(bank->bank, port, 0); 363 gpio = tegra_gpio_compose(bank->bank, port, 0);
281 unsigned long sta = tegra_gpio_readl(GPIO_INT_STA(gpio)) & 364 sta = tegra_gpio_readl(tgi, GPIO_INT_STA(tgi, gpio)) &
282 tegra_gpio_readl(GPIO_INT_ENB(gpio)); 365 tegra_gpio_readl(tgi, GPIO_INT_ENB(tgi, gpio));
283 u32 lvl = tegra_gpio_readl(GPIO_INT_LVL(gpio)); 366 lvl = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio));
284 367
285 for_each_set_bit(pin, &sta, 8) { 368 for_each_set_bit(pin, &sta, 8) {
286 tegra_gpio_writel(1 << pin, GPIO_INT_CLR(gpio)); 369 tegra_gpio_writel(tgi, 1 << pin,
370 GPIO_INT_CLR(tgi, gpio));
287 371
288 /* if gpio is edge triggered, clear condition 372 /* if gpio is edge triggered, clear condition
289 * before executing the handler so that we don't 373 * before executing the handler so that we don't
@@ -306,22 +390,37 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)
306#ifdef CONFIG_PM_SLEEP 390#ifdef CONFIG_PM_SLEEP
307static int tegra_gpio_resume(struct device *dev) 391static int tegra_gpio_resume(struct device *dev)
308{ 392{
393 struct platform_device *pdev = to_platform_device(dev);
394 struct tegra_gpio_info *tgi = platform_get_drvdata(pdev);
309 unsigned long flags; 395 unsigned long flags;
310 int b; 396 int b;
311 int p; 397 int p;
312 398
313 local_irq_save(flags); 399 local_irq_save(flags);
314 400
315 for (b = 0; b < tegra_gpio_bank_count; b++) { 401 for (b = 0; b < tgi->bank_count; b++) {
316 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; 402 struct tegra_gpio_bank *bank = &tgi->bank_info[b];
317 403
318 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { 404 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
319 unsigned int gpio = (b<<5) | (p<<3); 405 unsigned int gpio = (b<<5) | (p<<3);
320 tegra_gpio_writel(bank->cnf[p], GPIO_CNF(gpio)); 406 tegra_gpio_writel(tgi, bank->cnf[p],
321 tegra_gpio_writel(bank->out[p], GPIO_OUT(gpio)); 407 GPIO_CNF(tgi, gpio));
322 tegra_gpio_writel(bank->oe[p], GPIO_OE(gpio)); 408
323 tegra_gpio_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio)); 409 if (tgi->soc->debounce_supported) {
324 tegra_gpio_writel(bank->int_enb[p], GPIO_INT_ENB(gpio)); 410 tegra_gpio_writel(tgi, bank->dbc_cnt[p],
411 GPIO_DBC_CNT(tgi, gpio));
412 tegra_gpio_writel(tgi, bank->dbc_enb[p],
413 GPIO_MSK_DBC_EN(tgi, gpio));
414 }
415
416 tegra_gpio_writel(tgi, bank->out[p],
417 GPIO_OUT(tgi, gpio));
418 tegra_gpio_writel(tgi, bank->oe[p],
419 GPIO_OE(tgi, gpio));
420 tegra_gpio_writel(tgi, bank->int_lvl[p],
421 GPIO_INT_LVL(tgi, gpio));
422 tegra_gpio_writel(tgi, bank->int_enb[p],
423 GPIO_INT_ENB(tgi, gpio));
325 } 424 }
326 } 425 }
327 426
@@ -331,25 +430,39 @@ static int tegra_gpio_resume(struct device *dev)
331 430
332static int tegra_gpio_suspend(struct device *dev) 431static int tegra_gpio_suspend(struct device *dev)
333{ 432{
433 struct platform_device *pdev = to_platform_device(dev);
434 struct tegra_gpio_info *tgi = platform_get_drvdata(pdev);
334 unsigned long flags; 435 unsigned long flags;
335 int b; 436 int b;
336 int p; 437 int p;
337 438
338 local_irq_save(flags); 439 local_irq_save(flags);
339 for (b = 0; b < tegra_gpio_bank_count; b++) { 440 for (b = 0; b < tgi->bank_count; b++) {
340 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; 441 struct tegra_gpio_bank *bank = &tgi->bank_info[b];
341 442
342 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { 443 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
343 unsigned int gpio = (b<<5) | (p<<3); 444 unsigned int gpio = (b<<5) | (p<<3);
344 bank->cnf[p] = tegra_gpio_readl(GPIO_CNF(gpio)); 445 bank->cnf[p] = tegra_gpio_readl(tgi,
345 bank->out[p] = tegra_gpio_readl(GPIO_OUT(gpio)); 446 GPIO_CNF(tgi, gpio));
346 bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio)); 447 bank->out[p] = tegra_gpio_readl(tgi,
347 bank->int_enb[p] = tegra_gpio_readl(GPIO_INT_ENB(gpio)); 448 GPIO_OUT(tgi, gpio));
348 bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio)); 449 bank->oe[p] = tegra_gpio_readl(tgi,
450 GPIO_OE(tgi, gpio));
451 if (tgi->soc->debounce_supported) {
452 bank->dbc_enb[p] = tegra_gpio_readl(tgi,
453 GPIO_MSK_DBC_EN(tgi, gpio));
454 bank->dbc_enb[p] = (bank->dbc_enb[p] << 8) |
455 bank->dbc_enb[p];
456 }
457
458 bank->int_enb[p] = tegra_gpio_readl(tgi,
459 GPIO_INT_ENB(tgi, gpio));
460 bank->int_lvl[p] = tegra_gpio_readl(tgi,
461 GPIO_INT_LVL(tgi, gpio));
349 462
350 /* Enable gpio irq for wake up source */ 463 /* Enable gpio irq for wake up source */
351 tegra_gpio_writel(bank->wake_enb[p], 464 tegra_gpio_writel(tgi, bank->wake_enb[p],
352 GPIO_INT_ENB(gpio)); 465 GPIO_INT_ENB(tgi, gpio));
353 } 466 }
354 } 467 }
355 local_irq_restore(flags); 468 local_irq_restore(flags);
@@ -382,22 +495,23 @@ static int tegra_gpio_irq_set_wake(struct irq_data *d, unsigned int enable)
382 495
383static int dbg_gpio_show(struct seq_file *s, void *unused) 496static int dbg_gpio_show(struct seq_file *s, void *unused)
384{ 497{
498 struct tegra_gpio_info *tgi = s->private;
385 int i; 499 int i;
386 int j; 500 int j;
387 501
388 for (i = 0; i < tegra_gpio_bank_count; i++) { 502 for (i = 0; i < tgi->bank_count; i++) {
389 for (j = 0; j < 4; j++) { 503 for (j = 0; j < 4; j++) {
390 int gpio = tegra_gpio_compose(i, j, 0); 504 int gpio = tegra_gpio_compose(i, j, 0);
391 seq_printf(s, 505 seq_printf(s,
392 "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", 506 "%d:%d %02x %02x %02x %02x %02x %02x %06x\n",
393 i, j, 507 i, j,
394 tegra_gpio_readl(GPIO_CNF(gpio)), 508 tegra_gpio_readl(tgi, GPIO_CNF(tgi, gpio)),
395 tegra_gpio_readl(GPIO_OE(gpio)), 509 tegra_gpio_readl(tgi, GPIO_OE(tgi, gpio)),
396 tegra_gpio_readl(GPIO_OUT(gpio)), 510 tegra_gpio_readl(tgi, GPIO_OUT(tgi, gpio)),
397 tegra_gpio_readl(GPIO_IN(gpio)), 511 tegra_gpio_readl(tgi, GPIO_IN(tgi, gpio)),
398 tegra_gpio_readl(GPIO_INT_STA(gpio)), 512 tegra_gpio_readl(tgi, GPIO_INT_STA(tgi, gpio)),
399 tegra_gpio_readl(GPIO_INT_ENB(gpio)), 513 tegra_gpio_readl(tgi, GPIO_INT_ENB(tgi, gpio)),
400 tegra_gpio_readl(GPIO_INT_LVL(gpio))); 514 tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio)));
401 } 515 }
402 } 516 }
403 return 0; 517 return 0;
@@ -405,7 +519,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
405 519
406static int dbg_gpio_open(struct inode *inode, struct file *file) 520static int dbg_gpio_open(struct inode *inode, struct file *file)
407{ 521{
408 return single_open(file, dbg_gpio_show, &inode->i_private); 522 return single_open(file, dbg_gpio_show, inode->i_private);
409} 523}
410 524
411static const struct file_operations debug_fops = { 525static const struct file_operations debug_fops = {
@@ -415,66 +529,28 @@ static const struct file_operations debug_fops = {
415 .release = single_release, 529 .release = single_release,
416}; 530};
417 531
418static void tegra_gpio_debuginit(void) 532static void tegra_gpio_debuginit(struct tegra_gpio_info *tgi)
419{ 533{
420 (void) debugfs_create_file("tegra_gpio", S_IRUGO, 534 (void) debugfs_create_file("tegra_gpio", S_IRUGO,
421 NULL, NULL, &debug_fops); 535 NULL, tgi, &debug_fops);
422} 536}
423 537
424#else 538#else
425 539
426static inline void tegra_gpio_debuginit(void) 540static inline void tegra_gpio_debuginit(struct tegra_gpio_info *tgi)
427{ 541{
428} 542}
429 543
430#endif 544#endif
431 545
432static struct irq_chip tegra_gpio_irq_chip = {
433 .name = "GPIO",
434 .irq_ack = tegra_gpio_irq_ack,
435 .irq_mask = tegra_gpio_irq_mask,
436 .irq_unmask = tegra_gpio_irq_unmask,
437 .irq_set_type = tegra_gpio_irq_set_type,
438 .irq_shutdown = tegra_gpio_irq_shutdown,
439#ifdef CONFIG_PM_SLEEP
440 .irq_set_wake = tegra_gpio_irq_set_wake,
441#endif
442};
443
444static const struct dev_pm_ops tegra_gpio_pm_ops = { 546static const struct dev_pm_ops tegra_gpio_pm_ops = {
445 SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume) 547 SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume)
446}; 548};
447 549
448struct tegra_gpio_soc_config {
449 u32 bank_stride;
450 u32 upper_offset;
451};
452
453static struct tegra_gpio_soc_config tegra20_gpio_config = {
454 .bank_stride = 0x80,
455 .upper_offset = 0x800,
456};
457
458static struct tegra_gpio_soc_config tegra30_gpio_config = {
459 .bank_stride = 0x100,
460 .upper_offset = 0x80,
461};
462
463static const struct of_device_id tegra_gpio_of_match[] = {
464 { .compatible = "nvidia,tegra30-gpio", .data = &tegra30_gpio_config },
465 { .compatible = "nvidia,tegra20-gpio", .data = &tegra20_gpio_config },
466 { },
467};
468
469/* This lock class tells lockdep that GPIO irqs are in a different
470 * category than their parents, so it won't report false recursion.
471 */
472static struct lock_class_key gpio_lock_class;
473
474static int tegra_gpio_probe(struct platform_device *pdev) 550static int tegra_gpio_probe(struct platform_device *pdev)
475{ 551{
476 const struct of_device_id *match; 552 const struct tegra_gpio_soc_config *config;
477 struct tegra_gpio_soc_config *config; 553 struct tegra_gpio_info *tgi;
478 struct resource *res; 554 struct resource *res;
479 struct tegra_gpio_bank *bank; 555 struct tegra_gpio_bank *bank;
480 int ret; 556 int ret;
@@ -482,102 +558,153 @@ static int tegra_gpio_probe(struct platform_device *pdev)
482 int i; 558 int i;
483 int j; 559 int j;
484 560
485 dev = &pdev->dev; 561 config = of_device_get_match_data(&pdev->dev);
486 562 if (!config) {
487 match = of_match_device(tegra_gpio_of_match, &pdev->dev);
488 if (!match) {
489 dev_err(&pdev->dev, "Error: No device match found\n"); 563 dev_err(&pdev->dev, "Error: No device match found\n");
490 return -ENODEV; 564 return -ENODEV;
491 } 565 }
492 config = (struct tegra_gpio_soc_config *)match->data;
493 566
494 tegra_gpio_bank_stride = config->bank_stride; 567 tgi = devm_kzalloc(&pdev->dev, sizeof(*tgi), GFP_KERNEL);
495 tegra_gpio_upper_offset = config->upper_offset; 568 if (!tgi)
569 return -ENODEV;
570
571 tgi->soc = config;
572 tgi->dev = &pdev->dev;
496 573
497 for (;;) { 574 for (;;) {
498 res = platform_get_resource(pdev, IORESOURCE_IRQ, tegra_gpio_bank_count); 575 res = platform_get_resource(pdev, IORESOURCE_IRQ,
576 tgi->bank_count);
499 if (!res) 577 if (!res)
500 break; 578 break;
501 tegra_gpio_bank_count++; 579 tgi->bank_count++;
502 } 580 }
503 if (!tegra_gpio_bank_count) { 581 if (!tgi->bank_count) {
504 dev_err(&pdev->dev, "Missing IRQ resource\n"); 582 dev_err(&pdev->dev, "Missing IRQ resource\n");
505 return -ENODEV; 583 return -ENODEV;
506 } 584 }
507 585
508 tegra_gpio_chip.ngpio = tegra_gpio_bank_count * 32; 586 tgi->gc.label = "tegra-gpio";
587 tgi->gc.request = tegra_gpio_request;
588 tgi->gc.free = tegra_gpio_free;
589 tgi->gc.direction_input = tegra_gpio_direction_input;
590 tgi->gc.get = tegra_gpio_get;
591 tgi->gc.direction_output = tegra_gpio_direction_output;
592 tgi->gc.set = tegra_gpio_set;
593 tgi->gc.get_direction = tegra_gpio_get_direction;
594 tgi->gc.to_irq = tegra_gpio_to_irq;
595 tgi->gc.base = 0;
596 tgi->gc.ngpio = tgi->bank_count * 32;
597 tgi->gc.parent = &pdev->dev;
598 tgi->gc.of_node = pdev->dev.of_node;
599
600 tgi->ic.name = "GPIO";
601 tgi->ic.irq_ack = tegra_gpio_irq_ack;
602 tgi->ic.irq_mask = tegra_gpio_irq_mask;
603 tgi->ic.irq_unmask = tegra_gpio_irq_unmask;
604 tgi->ic.irq_set_type = tegra_gpio_irq_set_type;
605 tgi->ic.irq_shutdown = tegra_gpio_irq_shutdown;
606#ifdef CONFIG_PM_SLEEP
607 tgi->ic.irq_set_wake = tegra_gpio_irq_set_wake;
608#endif
609
610 platform_set_drvdata(pdev, tgi);
611
612 if (config->debounce_supported)
613 tgi->gc.set_debounce = tegra_gpio_set_debounce;
509 614
510 tegra_gpio_banks = devm_kzalloc(&pdev->dev, 615 tgi->bank_info = devm_kzalloc(&pdev->dev, tgi->bank_count *
511 tegra_gpio_bank_count * sizeof(*tegra_gpio_banks), 616 sizeof(*tgi->bank_info), GFP_KERNEL);
512 GFP_KERNEL); 617 if (!tgi->bank_info)
513 if (!tegra_gpio_banks)
514 return -ENODEV; 618 return -ENODEV;
515 619
516 irq_domain = irq_domain_add_linear(pdev->dev.of_node, 620 tgi->irq_domain = irq_domain_add_linear(pdev->dev.of_node,
517 tegra_gpio_chip.ngpio, 621 tgi->gc.ngpio,
518 &irq_domain_simple_ops, NULL); 622 &irq_domain_simple_ops, NULL);
519 if (!irq_domain) 623 if (!tgi->irq_domain)
520 return -ENODEV; 624 return -ENODEV;
521 625
522 for (i = 0; i < tegra_gpio_bank_count; i++) { 626 for (i = 0; i < tgi->bank_count; i++) {
523 res = platform_get_resource(pdev, IORESOURCE_IRQ, i); 627 res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
524 if (!res) { 628 if (!res) {
525 dev_err(&pdev->dev, "Missing IRQ resource\n"); 629 dev_err(&pdev->dev, "Missing IRQ resource\n");
526 return -ENODEV; 630 return -ENODEV;
527 } 631 }
528 632
529 bank = &tegra_gpio_banks[i]; 633 bank = &tgi->bank_info[i];
530 bank->bank = i; 634 bank->bank = i;
531 bank->irq = res->start; 635 bank->irq = res->start;
636 bank->tgi = tgi;
532 } 637 }
533 638
534 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 639 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
535 regs = devm_ioremap_resource(&pdev->dev, res); 640 tgi->regs = devm_ioremap_resource(&pdev->dev, res);
536 if (IS_ERR(regs)) 641 if (IS_ERR(tgi->regs))
537 return PTR_ERR(regs); 642 return PTR_ERR(tgi->regs);
538 643
539 for (i = 0; i < tegra_gpio_bank_count; i++) { 644 for (i = 0; i < tgi->bank_count; i++) {
540 for (j = 0; j < 4; j++) { 645 for (j = 0; j < 4; j++) {
541 int gpio = tegra_gpio_compose(i, j, 0); 646 int gpio = tegra_gpio_compose(i, j, 0);
542 tegra_gpio_writel(0x00, GPIO_INT_ENB(gpio)); 647 tegra_gpio_writel(tgi, 0x00, GPIO_INT_ENB(tgi, gpio));
543 } 648 }
544 } 649 }
545 650
546 tegra_gpio_chip.of_node = pdev->dev.of_node; 651 ret = devm_gpiochip_add_data(&pdev->dev, &tgi->gc, tgi);
547
548 ret = devm_gpiochip_add_data(&pdev->dev, &tegra_gpio_chip, NULL);
549 if (ret < 0) { 652 if (ret < 0) {
550 irq_domain_remove(irq_domain); 653 irq_domain_remove(tgi->irq_domain);
551 return ret; 654 return ret;
552 } 655 }
553 656
554 for (gpio = 0; gpio < tegra_gpio_chip.ngpio; gpio++) { 657 for (gpio = 0; gpio < tgi->gc.ngpio; gpio++) {
555 int irq = irq_create_mapping(irq_domain, gpio); 658 int irq = irq_create_mapping(tgi->irq_domain, gpio);
556 /* No validity check; all Tegra GPIOs are valid IRQs */ 659 /* No validity check; all Tegra GPIOs are valid IRQs */
557 660
558 bank = &tegra_gpio_banks[GPIO_BANK(gpio)]; 661 bank = &tgi->bank_info[GPIO_BANK(gpio)];
559 662
560 irq_set_lockdep_class(irq, &gpio_lock_class); 663 irq_set_lockdep_class(irq, &tgi->lock_class);
561 irq_set_chip_data(irq, bank); 664 irq_set_chip_data(irq, bank);
562 irq_set_chip_and_handler(irq, &tegra_gpio_irq_chip, 665 irq_set_chip_and_handler(irq, &tgi->ic, handle_simple_irq);
563 handle_simple_irq);
564 } 666 }
565 667
566 for (i = 0; i < tegra_gpio_bank_count; i++) { 668 for (i = 0; i < tgi->bank_count; i++) {
567 bank = &tegra_gpio_banks[i]; 669 bank = &tgi->bank_info[i];
568 670
569 irq_set_chained_handler_and_data(bank->irq, 671 irq_set_chained_handler_and_data(bank->irq,
570 tegra_gpio_irq_handler, bank); 672 tegra_gpio_irq_handler, bank);
571 673
572 for (j = 0; j < 4; j++) 674 for (j = 0; j < 4; j++) {
573 spin_lock_init(&bank->lvl_lock[j]); 675 spin_lock_init(&bank->lvl_lock[j]);
676 spin_lock_init(&bank->dbc_lock[j]);
677 }
574 } 678 }
575 679
576 tegra_gpio_debuginit(); 680 tegra_gpio_debuginit(tgi);
577 681
578 return 0; 682 return 0;
579} 683}
580 684
685static const struct tegra_gpio_soc_config tegra20_gpio_config = {
686 .bank_stride = 0x80,
687 .upper_offset = 0x800,
688};
689
690static const struct tegra_gpio_soc_config tegra30_gpio_config = {
691 .bank_stride = 0x100,
692 .upper_offset = 0x80,
693};
694
695static const struct tegra_gpio_soc_config tegra210_gpio_config = {
696 .debounce_supported = true,
697 .bank_stride = 0x100,
698 .upper_offset = 0x80,
699};
700
701static const struct of_device_id tegra_gpio_of_match[] = {
702 { .compatible = "nvidia,tegra210-gpio", .data = &tegra210_gpio_config },
703 { .compatible = "nvidia,tegra30-gpio", .data = &tegra30_gpio_config },
704 { .compatible = "nvidia,tegra20-gpio", .data = &tegra20_gpio_config },
705 { },
706};
707
581static struct platform_driver tegra_gpio_driver = { 708static struct platform_driver tegra_gpio_driver = {
582 .driver = { 709 .driver = {
583 .name = "tegra-gpio", 710 .name = "tegra-gpio",
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c
index 85ed608c2b27..181f86ce00cd 100644
--- a/drivers/gpio/gpio-timberdale.c
+++ b/drivers/gpio/gpio-timberdale.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Timberdale FPGA GPIO driver 2 * Timberdale FPGA GPIO driver
3 * Author: Mocean Laboratories
3 * Copyright (c) 2009 Intel Corporation 4 * Copyright (c) 2009 Intel Corporation
4 * 5 *
5 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
@@ -20,7 +21,7 @@
20 * Timberdale FPGA GPIO 21 * Timberdale FPGA GPIO
21 */ 22 */
22 23
23#include <linux/module.h> 24#include <linux/init.h>
24#include <linux/gpio.h> 25#include <linux/gpio.h>
25#include <linux/platform_device.h> 26#include <linux/platform_device.h>
26#include <linux/irq.h> 27#include <linux/irq.h>
@@ -290,40 +291,14 @@ static int timbgpio_probe(struct platform_device *pdev)
290 return 0; 291 return 0;
291} 292}
292 293
293static int timbgpio_remove(struct platform_device *pdev)
294{
295 struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
296 struct timbgpio *tgpio = platform_get_drvdata(pdev);
297 int irq = platform_get_irq(pdev, 0);
298
299 if (irq >= 0 && tgpio->irq_base > 0) {
300 int i;
301 for (i = 0; i < pdata->nr_pins; i++) {
302 irq_set_chip(tgpio->irq_base + i, NULL);
303 irq_set_chip_data(tgpio->irq_base + i, NULL);
304 }
305
306 irq_set_handler(irq, NULL);
307 irq_set_handler_data(irq, NULL);
308 }
309
310 return 0;
311}
312
313static struct platform_driver timbgpio_platform_driver = { 294static struct platform_driver timbgpio_platform_driver = {
314 .driver = { 295 .driver = {
315 .name = DRIVER_NAME, 296 .name = DRIVER_NAME,
297 .suppress_bind_attrs = true,
316 }, 298 },
317 .probe = timbgpio_probe, 299 .probe = timbgpio_probe,
318 .remove = timbgpio_remove,
319}; 300};
320 301
321/*--------------------------------------------------------------------------*/ 302/*--------------------------------------------------------------------------*/
322 303
323module_platform_driver(timbgpio_platform_driver); 304builtin_platform_driver(timbgpio_platform_driver);
324
325MODULE_DESCRIPTION("Timberdale GPIO driver");
326MODULE_LICENSE("GPL v2");
327MODULE_AUTHOR("Mocean Laboratories");
328MODULE_ALIAS("platform:"DRIVER_NAME);
329
diff --git a/drivers/gpio/gpio-tpic2810.c b/drivers/gpio/gpio-tpic2810.c
index 9f020aa4b067..cace79c1b70a 100644
--- a/drivers/gpio/gpio-tpic2810.c
+++ b/drivers/gpio/gpio-tpic2810.c
@@ -57,39 +57,34 @@ static int tpic2810_direction_output(struct gpio_chip *chip,
57 return 0; 57 return 0;
58} 58}
59 59
60static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value) 60static void tpic2810_set_mask_bits(struct gpio_chip *chip, u8 mask, u8 bits)
61{ 61{
62 struct tpic2810 *gpio = gpiochip_get_data(chip); 62 struct tpic2810 *gpio = gpiochip_get_data(chip);
63 u8 buffer;
64 int err;
63 65
64 mutex_lock(&gpio->lock); 66 mutex_lock(&gpio->lock);
65 67
66 if (value) 68 buffer = gpio->buffer & ~mask;
67 gpio->buffer |= BIT(offset); 69 buffer |= (mask & bits);
68 else
69 gpio->buffer &= ~BIT(offset);
70 70
71 i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND, 71 err = i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND,
72 gpio->buffer); 72 buffer);
73 if (!err)
74 gpio->buffer = buffer;
73 75
74 mutex_unlock(&gpio->lock); 76 mutex_unlock(&gpio->lock);
75} 77}
76 78
79static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value)
80{
81 tpic2810_set_mask_bits(chip, BIT(offset), value ? BIT(offset) : 0);
82}
83
77static void tpic2810_set_multiple(struct gpio_chip *chip, unsigned long *mask, 84static void tpic2810_set_multiple(struct gpio_chip *chip, unsigned long *mask,
78 unsigned long *bits) 85 unsigned long *bits)
79{ 86{
80 struct tpic2810 *gpio = gpiochip_get_data(chip); 87 tpic2810_set_mask_bits(chip, *mask, *bits);
81
82 mutex_lock(&gpio->lock);
83
84 /* clear bits under mask */
85 gpio->buffer &= ~(*mask);
86 /* set bits under mask */
87 gpio->buffer |= ((*mask) & (*bits));
88
89 i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND,
90 gpio->buffer);
91
92 mutex_unlock(&gpio->lock);
93} 88}
94 89
95static struct gpio_chip template_chip = { 90static struct gpio_chip template_chip = {
diff --git a/drivers/gpio/gpio-tps65218.c b/drivers/gpio/gpio-tps65218.c
index 313c0e484607..0eaeac8de9de 100644
--- a/drivers/gpio/gpio-tps65218.c
+++ b/drivers/gpio/gpio-tps65218.c
@@ -101,16 +101,6 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset)
101 101
102 break; 102 break;
103 case 1: 103 case 1:
104 /* GP02 is push-pull by default, can be set as open drain. */
105 if (gpiochip_line_is_open_drain(gc, offset)) {
106 ret = tps65218_clear_bits(tps65218,
107 TPS65218_REG_CONFIG1,
108 TPS65218_CONFIG1_GPO2_BUF,
109 TPS65218_PROTECT_L1);
110 if (ret)
111 return ret;
112 }
113
114 /* Setup GPO2 */ 104 /* Setup GPO2 */
115 ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1, 105 ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
116 TPS65218_CONFIG1_IO1_SEL, 106 TPS65218_CONFIG1_IO1_SEL,
@@ -148,6 +138,40 @@ static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset)
148 return 0; 138 return 0;
149} 139}
150 140
141static int tps65218_gpio_set_single_ended(struct gpio_chip *gc,
142 unsigned offset,
143 enum single_ended_mode mode)
144{
145 struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
146 struct tps65218 *tps65218 = tps65218_gpio->tps65218;
147
148 switch (offset) {
149 case 0:
150 case 2:
151 /* GPO1 is hardwired to be open drain */
152 if (mode == LINE_MODE_OPEN_DRAIN)
153 return 0;
154 return -ENOTSUPP;
155 case 1:
156 /* GPO2 is push-pull by default, can be set as open drain. */
157 if (mode == LINE_MODE_OPEN_DRAIN)
158 return tps65218_clear_bits(tps65218,
159 TPS65218_REG_CONFIG1,
160 TPS65218_CONFIG1_GPO2_BUF,
161 TPS65218_PROTECT_L1);
162 if (mode == LINE_MODE_PUSH_PULL)
163 return tps65218_set_bits(tps65218,
164 TPS65218_REG_CONFIG1,
165 TPS65218_CONFIG1_GPO2_BUF,
166 TPS65218_CONFIG1_GPO2_BUF,
167 TPS65218_PROTECT_L1);
168 return -ENOTSUPP;
169 default:
170 break;
171 }
172 return -ENOTSUPP;
173}
174
151static struct gpio_chip template_chip = { 175static struct gpio_chip template_chip = {
152 .label = "gpio-tps65218", 176 .label = "gpio-tps65218",
153 .owner = THIS_MODULE, 177 .owner = THIS_MODULE,
@@ -156,6 +180,7 @@ static struct gpio_chip template_chip = {
156 .direction_input = tps65218_gpio_input, 180 .direction_input = tps65218_gpio_input,
157 .get = tps65218_gpio_get, 181 .get = tps65218_gpio_get,
158 .set = tps65218_gpio_set, 182 .set = tps65218_gpio_set,
183 .set_single_ended = tps65218_gpio_set_single_ended,
159 .can_sleep = true, 184 .can_sleep = true,
160 .ngpio = 3, 185 .ngpio = 3,
161 .base = -1, 186 .base = -1,
diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c
index c88bdc8ee2c9..6b15e68a314f 100644
--- a/drivers/gpio/gpio-tps6586x.c
+++ b/drivers/gpio/gpio-tps6586x.c
@@ -24,7 +24,7 @@
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/module.h> 27#include <linux/init.h>
28#include <linux/mfd/tps6586x.h> 28#include <linux/mfd/tps6586x.h>
29#include <linux/of_device.h> 29#include <linux/of_device.h>
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
@@ -140,14 +140,3 @@ static int __init tps6586x_gpio_init(void)
140 return platform_driver_register(&tps6586x_gpio_driver); 140 return platform_driver_register(&tps6586x_gpio_driver);
141} 141}
142subsys_initcall(tps6586x_gpio_init); 142subsys_initcall(tps6586x_gpio_init);
143
144static void __exit tps6586x_gpio_exit(void)
145{
146 platform_driver_unregister(&tps6586x_gpio_driver);
147}
148module_exit(tps6586x_gpio_exit);
149
150MODULE_ALIAS("platform:tps6586x-gpio");
151MODULE_DESCRIPTION("GPIO interface for TPS6586X PMIC");
152MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
153MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c
index cdbd7c740043..0ae6a5a54ea8 100644
--- a/drivers/gpio/gpio-tps65910.c
+++ b/drivers/gpio/gpio-tps65910.c
@@ -4,7 +4,7 @@
4 * Copyright 2010 Texas Instruments Inc. 4 * Copyright 2010 Texas Instruments Inc.
5 * 5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk> 6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria jedu@slimlogic.co.uk> 7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -14,7 +14,7 @@
14 */ 14 */
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/module.h> 17#include <linux/init.h>
18#include <linux/errno.h> 18#include <linux/errno.h>
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/i2c.h> 20#include <linux/i2c.h>
@@ -193,15 +193,3 @@ static int __init tps65910_gpio_init(void)
193 return platform_driver_register(&tps65910_gpio_driver); 193 return platform_driver_register(&tps65910_gpio_driver);
194} 194}
195subsys_initcall(tps65910_gpio_init); 195subsys_initcall(tps65910_gpio_init);
196
197static void __exit tps65910_gpio_exit(void)
198{
199 platform_driver_unregister(&tps65910_gpio_driver);
200}
201module_exit(tps65910_gpio_exit);
202
203MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
204MODULE_AUTHOR("Jorge Eduardo Candelaria jedu@slimlogic.co.uk>");
205MODULE_DESCRIPTION("GPIO interface for TPS65910/TPS6511 PMICs");
206MODULE_LICENSE("GPL v2");
207MODULE_ALIAS("platform:tps65910-gpio");
diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c
index 8cdb9f7ec7e0..4e450121129b 100644
--- a/drivers/gpio/gpio-vx855.c
+++ b/drivers/gpio/gpio-vx855.c
@@ -186,6 +186,28 @@ static int vx855gpio_direction_output(struct gpio_chip *gpio,
186 return 0; 186 return 0;
187} 187}
188 188
189static int vx855gpio_set_single_ended(struct gpio_chip *gpio,
190 unsigned int nr,
191 enum single_ended_mode mode)
192{
193 /* The GPI cannot be single-ended */
194 if (nr < NR_VX855_GPI)
195 return -EINVAL;
196
197 /* The GPO's are push-pull */
198 if (nr < NR_VX855_GPInO) {
199 if (mode != LINE_MODE_PUSH_PULL)
200 return -ENOTSUPP;
201 return 0;
202 }
203
204 /* The GPIO's are open drain */
205 if (mode != LINE_MODE_OPEN_DRAIN)
206 return -ENOTSUPP;
207
208 return 0;
209}
210
189static const char *vx855gpio_names[NR_VX855_GP] = { 211static const char *vx855gpio_names[NR_VX855_GP] = {
190 "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4", 212 "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
191 "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9", 213 "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
@@ -209,6 +231,7 @@ static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
209 c->direction_output = vx855gpio_direction_output; 231 c->direction_output = vx855gpio_direction_output;
210 c->get = vx855gpio_get; 232 c->get = vx855gpio_get;
211 c->set = vx855gpio_set; 233 c->set = vx855gpio_set;
234 c->set_single_ended = vx855gpio_set_single_ended;
212 c->dbg_show = NULL; 235 c->dbg_show = NULL;
213 c->base = 0; 236 c->base = 0;
214 c->ngpio = NR_VX855_GP; 237 c->ngpio = NR_VX855_GP;
diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c
index 18cb0f534b91..41ec7834059a 100644
--- a/drivers/gpio/gpio-wm831x.c
+++ b/drivers/gpio/gpio-wm831x.c
@@ -132,6 +132,28 @@ static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
132 return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn); 132 return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn);
133} 133}
134 134
135static int wm831x_set_single_ended(struct gpio_chip *chip,
136 unsigned int offset,
137 enum single_ended_mode mode)
138{
139 struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
140 struct wm831x *wm831x = wm831x_gpio->wm831x;
141 int reg = WM831X_GPIO1_CONTROL + offset;
142
143 switch (mode) {
144 case LINE_MODE_OPEN_DRAIN:
145 return wm831x_set_bits(wm831x, reg,
146 WM831X_GPN_OD_MASK, WM831X_GPN_OD);
147 case LINE_MODE_PUSH_PULL:
148 return wm831x_set_bits(wm831x, reg,
149 WM831X_GPN_OD_MASK, 0);
150 default:
151 break;
152 }
153
154 return -ENOTSUPP;
155}
156
135#ifdef CONFIG_DEBUG_FS 157#ifdef CONFIG_DEBUG_FS
136static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 158static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
137{ 159{
@@ -216,7 +238,7 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
216 pull, 238 pull,
217 powerdomain, 239 powerdomain,
218 reg & WM831X_GPN_POL ? "" : " inverted", 240 reg & WM831X_GPN_POL ? "" : " inverted",
219 reg & WM831X_GPN_OD ? "open-drain" : "CMOS", 241 reg & WM831X_GPN_OD ? "open-drain" : "push-pull",
220 tristated ? " tristated" : "", 242 tristated ? " tristated" : "",
221 reg); 243 reg);
222 } 244 }
@@ -234,6 +256,7 @@ static struct gpio_chip template_chip = {
234 .set = wm831x_gpio_set, 256 .set = wm831x_gpio_set,
235 .to_irq = wm831x_gpio_to_irq, 257 .to_irq = wm831x_gpio_to_irq,
236 .set_debounce = wm831x_gpio_set_debounce, 258 .set_debounce = wm831x_gpio_set_debounce,
259 .set_single_ended = wm831x_set_single_ended,
237 .dbg_show = wm831x_gpio_dbg_show, 260 .dbg_show = wm831x_gpio_dbg_show,
238 .can_sleep = true, 261 .can_sleep = true,
239}; 262};
diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c
index b089df99a0d0..744af388c949 100644
--- a/drivers/gpio/gpio-wm8994.c
+++ b/drivers/gpio/gpio-wm8994.c
@@ -103,6 +103,28 @@ static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
103 wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value); 103 wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset, WM8994_GPN_LVL, value);
104} 104}
105 105
106static int wm8994_gpio_set_single_ended(struct gpio_chip *chip,
107 unsigned int offset,
108 enum single_ended_mode mode)
109{
110 struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip);
111 struct wm8994 *wm8994 = wm8994_gpio->wm8994;
112
113 switch (mode) {
114 case LINE_MODE_OPEN_DRAIN:
115 return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
116 WM8994_GPN_OP_CFG_MASK,
117 WM8994_GPN_OP_CFG);
118 case LINE_MODE_PUSH_PULL:
119 return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
120 WM8994_GPN_OP_CFG_MASK, 0);
121 default:
122 break;
123 }
124
125 return -ENOTSUPP;
126}
127
106static int wm8994_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 128static int wm8994_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
107{ 129{
108 struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip); 130 struct wm8994_gpio *wm8994_gpio = gpiochip_get_data(chip);
@@ -217,7 +239,7 @@ static void wm8994_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
217 if (reg & WM8994_GPN_OP_CFG) 239 if (reg & WM8994_GPN_OP_CFG)
218 seq_printf(s, "open drain "); 240 seq_printf(s, "open drain ");
219 else 241 else
220 seq_printf(s, "CMOS "); 242 seq_printf(s, "push-pull ");
221 243
222 seq_printf(s, "%s (%x)\n", 244 seq_printf(s, "%s (%x)\n",
223 wm8994_gpio_fn(reg & WM8994_GPN_FN_MASK), reg); 245 wm8994_gpio_fn(reg & WM8994_GPN_FN_MASK), reg);
@@ -235,6 +257,7 @@ static struct gpio_chip template_chip = {
235 .get = wm8994_gpio_get, 257 .get = wm8994_gpio_get,
236 .direction_output = wm8994_gpio_direction_out, 258 .direction_output = wm8994_gpio_direction_out,
237 .set = wm8994_gpio_set, 259 .set = wm8994_gpio_set,
260 .set_single_ended = wm8994_gpio_set_single_ended,
238 .to_irq = wm8994_gpio_to_irq, 261 .to_irq = wm8994_gpio_to_irq,
239 .dbg_show = wm8994_gpio_dbg_show, 262 .dbg_show = wm8994_gpio_dbg_show,
240 .can_sleep = true, 263 .can_sleep = true,
diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index 31cbcb84cfaf..033258634b8c 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c
@@ -216,23 +216,10 @@ static int xgene_gpio_sb_domain_alloc(struct irq_domain *domain,
216 &parent_fwspec); 216 &parent_fwspec);
217} 217}
218 218
219static void xgene_gpio_sb_domain_free(struct irq_domain *domain,
220 unsigned int virq,
221 unsigned int nr_irqs)
222{
223 struct irq_data *d;
224 unsigned int i;
225
226 for (i = 0; i < nr_irqs; i++) {
227 d = irq_domain_get_irq_data(domain, virq + i);
228 irq_domain_reset_irq_data(d);
229 }
230}
231
232static const struct irq_domain_ops xgene_gpio_sb_domain_ops = { 219static const struct irq_domain_ops xgene_gpio_sb_domain_ops = {
233 .translate = xgene_gpio_sb_domain_translate, 220 .translate = xgene_gpio_sb_domain_translate,
234 .alloc = xgene_gpio_sb_domain_alloc, 221 .alloc = xgene_gpio_sb_domain_alloc,
235 .free = xgene_gpio_sb_domain_free, 222 .free = irq_domain_free_irqs_common,
236 .activate = xgene_gpio_sb_domain_activate, 223 .activate = xgene_gpio_sb_domain_activate,
237 .deactivate = xgene_gpio_sb_domain_deactivate, 224 .deactivate = xgene_gpio_sb_domain_deactivate,
238}; 225};
diff --git a/drivers/gpio/gpio-xgene.c b/drivers/gpio/gpio-xgene.c
index 0dc916191689..40a8881c2ce8 100644
--- a/drivers/gpio/gpio-xgene.c
+++ b/drivers/gpio/gpio-xgene.c
@@ -17,7 +17,7 @@
17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */ 18 */
19 19
20#include <linux/module.h> 20#include <linux/acpi.h>
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/io.h> 23#include <linux/io.h>
@@ -85,6 +85,17 @@ static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
85 spin_unlock_irqrestore(&chip->lock, flags); 85 spin_unlock_irqrestore(&chip->lock, flags);
86} 86}
87 87
88static int xgene_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
89{
90 struct xgene_gpio *chip = gpiochip_get_data(gc);
91 unsigned long bank_offset, bit_offset;
92
93 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
94 bit_offset = GPIO_BIT_OFFSET(offset);
95
96 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));
97}
98
88static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset) 99static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
89{ 100{
90 struct xgene_gpio *chip = gpiochip_get_data(gc); 101 struct xgene_gpio *chip = gpiochip_get_data(gc);
@@ -189,6 +200,7 @@ static int xgene_gpio_probe(struct platform_device *pdev)
189 200
190 spin_lock_init(&gpio->lock); 201 spin_lock_init(&gpio->lock);
191 gpio->chip.parent = &pdev->dev; 202 gpio->chip.parent = &pdev->dev;
203 gpio->chip.get_direction = xgene_gpio_get_direction;
192 gpio->chip.direction_input = xgene_gpio_dir_in; 204 gpio->chip.direction_input = xgene_gpio_dir_in;
193 gpio->chip.direction_output = xgene_gpio_dir_out; 205 gpio->chip.direction_output = xgene_gpio_dir_out;
194 gpio->chip.get = xgene_gpio_get; 206 gpio->chip.get = xgene_gpio_get;
@@ -216,19 +228,21 @@ static const struct of_device_id xgene_gpio_of_match[] = {
216 { .compatible = "apm,xgene-gpio", }, 228 { .compatible = "apm,xgene-gpio", },
217 {}, 229 {},
218}; 230};
219MODULE_DEVICE_TABLE(of, xgene_gpio_of_match); 231
232#ifdef CONFIG_ACPI
233static const struct acpi_device_id xgene_gpio_acpi_match[] = {
234 { "APMC0D14", 0 },
235 { },
236};
237#endif
220 238
221static struct platform_driver xgene_gpio_driver = { 239static struct platform_driver xgene_gpio_driver = {
222 .driver = { 240 .driver = {
223 .name = "xgene-gpio", 241 .name = "xgene-gpio",
224 .of_match_table = xgene_gpio_of_match, 242 .of_match_table = xgene_gpio_of_match,
243 .acpi_match_table = ACPI_PTR(xgene_gpio_acpi_match),
225 .pm = XGENE_GPIO_PM_OPS, 244 .pm = XGENE_GPIO_PM_OPS,
226 }, 245 },
227 .probe = xgene_gpio_probe, 246 .probe = xgene_gpio_probe,
228}; 247};
229 248builtin_platform_driver(xgene_gpio_driver);
230module_platform_driver(xgene_gpio_driver);
231
232MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
233MODULE_DESCRIPTION("APM X-Gene GPIO driver");
234MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c
index aa5813d2deb1..08897dc11915 100644
--- a/drivers/gpio/gpio-xlp.c
+++ b/drivers/gpio/gpio-xlp.c
@@ -85,7 +85,8 @@ enum {
85 XLP_GPIO_VARIANT_XLP316, 85 XLP_GPIO_VARIANT_XLP316,
86 XLP_GPIO_VARIANT_XLP208, 86 XLP_GPIO_VARIANT_XLP208,
87 XLP_GPIO_VARIANT_XLP980, 87 XLP_GPIO_VARIANT_XLP980,
88 XLP_GPIO_VARIANT_XLP532 88 XLP_GPIO_VARIANT_XLP532,
89 GPIO_VARIANT_VULCAN
89}; 90};
90 91
91struct xlp_gpio_priv { 92struct xlp_gpio_priv {
@@ -285,6 +286,10 @@ static const struct of_device_id xlp_gpio_of_ids[] = {
285 .compatible = "netlogic,xlp532-gpio", 286 .compatible = "netlogic,xlp532-gpio",
286 .data = (void *)XLP_GPIO_VARIANT_XLP532, 287 .data = (void *)XLP_GPIO_VARIANT_XLP532,
287 }, 288 },
289 {
290 .compatible = "brcm,vulcan-gpio",
291 .data = (void *)GPIO_VARIANT_VULCAN,
292 },
288 { /* sentinel */ }, 293 { /* sentinel */ },
289}; 294};
290MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids); 295MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids);
@@ -347,6 +352,7 @@ static int xlp_gpio_probe(struct platform_device *pdev)
347 break; 352 break;
348 case XLP_GPIO_VARIANT_XLP980: 353 case XLP_GPIO_VARIANT_XLP980:
349 case XLP_GPIO_VARIANT_XLP532: 354 case XLP_GPIO_VARIANT_XLP532:
355 case GPIO_VARIANT_VULCAN:
350 priv->gpio_out_en = gpio_base + GPIO_9XX_OUTPUT_EN; 356 priv->gpio_out_en = gpio_base + GPIO_9XX_OUTPUT_EN;
351 priv->gpio_paddrv = gpio_base + GPIO_9XX_PADDRV; 357 priv->gpio_paddrv = gpio_base + GPIO_9XX_PADDRV;
352 priv->gpio_intr_stat = gpio_base + GPIO_9XX_INT_STAT; 358 priv->gpio_intr_stat = gpio_base + GPIO_9XX_INT_STAT;
@@ -354,7 +360,12 @@ static int xlp_gpio_probe(struct platform_device *pdev)
354 priv->gpio_intr_pol = gpio_base + GPIO_9XX_INT_POL; 360 priv->gpio_intr_pol = gpio_base + GPIO_9XX_INT_POL;
355 priv->gpio_intr_en = gpio_base + GPIO_9XX_INT_EN00; 361 priv->gpio_intr_en = gpio_base + GPIO_9XX_INT_EN00;
356 362
357 ngpio = (soc_type == XLP_GPIO_VARIANT_XLP980) ? 66 : 67; 363 if (soc_type == XLP_GPIO_VARIANT_XLP980)
364 ngpio = 66;
365 else if (soc_type == XLP_GPIO_VARIANT_XLP532)
366 ngpio = 67;
367 else
368 ngpio = 70;
358 break; 369 break;
359 default: 370 default:
360 dev_err(&pdev->dev, "Unknown Processor type!\n"); 371 dev_err(&pdev->dev, "Unknown Processor type!\n");
@@ -377,10 +388,14 @@ static int xlp_gpio_probe(struct platform_device *pdev)
377 gc->get = xlp_gpio_get; 388 gc->get = xlp_gpio_get;
378 389
379 spin_lock_init(&priv->lock); 390 spin_lock_init(&priv->lock);
380 irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0); 391 /* XLP has fixed IRQ range for GPIO interrupts */
381 if (irq_base < 0) { 392 if (soc_type == GPIO_VARIANT_VULCAN)
393 irq_base = irq_alloc_descs(-1, 0, gc->ngpio, 0);
394 else
395 irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0);
396 if (IS_ERR_VALUE(irq_base)) {
382 dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n"); 397 dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n");
383 return -ENODEV; 398 return irq_base;
384 } 399 }
385 400
386 err = gpiochip_add_data(gc, priv); 401 err = gpiochip_add_data(gc, priv);
diff --git a/drivers/gpio/gpio-zevio.c b/drivers/gpio/gpio-zevio.c
index cda6d922be98..e23ef7b9451d 100644
--- a/drivers/gpio/gpio-zevio.c
+++ b/drivers/gpio/gpio-zevio.c
@@ -10,7 +10,7 @@
10 10
11#include <linux/spinlock.h> 11#include <linux/spinlock.h>
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/module.h> 13#include <linux/init.h>
14#include <linux/bitops.h> 14#include <linux/bitops.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/of_device.h> 16#include <linux/of_device.h>
@@ -203,32 +203,17 @@ static int zevio_gpio_probe(struct platform_device *pdev)
203 return 0; 203 return 0;
204} 204}
205 205
206static int zevio_gpio_remove(struct platform_device *pdev)
207{
208 struct zevio_gpio *controller = platform_get_drvdata(pdev);
209
210 of_mm_gpiochip_remove(&controller->chip);
211
212 return 0;
213}
214
215static const struct of_device_id zevio_gpio_of_match[] = { 206static const struct of_device_id zevio_gpio_of_match[] = {
216 { .compatible = "lsi,zevio-gpio", }, 207 { .compatible = "lsi,zevio-gpio", },
217 { }, 208 { },
218}; 209};
219 210
220MODULE_DEVICE_TABLE(of, zevio_gpio_of_match);
221
222static struct platform_driver zevio_gpio_driver = { 211static struct platform_driver zevio_gpio_driver = {
223 .driver = { 212 .driver = {
224 .name = "gpio-zevio", 213 .name = "gpio-zevio",
225 .of_match_table = zevio_gpio_of_match, 214 .of_match_table = zevio_gpio_of_match,
215 .suppress_bind_attrs = true,
226 }, 216 },
227 .probe = zevio_gpio_probe, 217 .probe = zevio_gpio_probe,
228 .remove = zevio_gpio_remove,
229}; 218};
230module_platform_driver(zevio_gpio_driver); 219builtin_platform_driver(zevio_gpio_driver);
231
232MODULE_LICENSE("GPL");
233MODULE_AUTHOR("Fabian Vogt <fabian@ritter-vogt.de>");
234MODULE_DESCRIPTION("LSI ZEVIO SoC GPIO driver");
diff --git a/drivers/gpio/gpio-zx.c b/drivers/gpio/gpio-zx.c
index 47c79fa65670..93de8be0d885 100644
--- a/drivers/gpio/gpio-zx.c
+++ b/drivers/gpio/gpio-zx.c
@@ -1,4 +1,8 @@
1/* 1/*
2 * ZTE ZX296702 GPIO driver
3 *
4 * Author: Jun Nie <jun.nie@linaro.org>
5 *
2 * Copyright (C) 2015 Linaro Ltd. 6 * Copyright (C) 2015 Linaro Ltd.
3 * 7 *
4 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -10,7 +14,7 @@
10#include <linux/errno.h> 14#include <linux/errno.h>
11#include <linux/gpio/driver.h> 15#include <linux/gpio/driver.h>
12#include <linux/irqchip/chained_irq.h> 16#include <linux/irqchip/chained_irq.h>
13#include <linux/module.h> 17#include <linux/init.h>
14#include <linux/of.h> 18#include <linux/of.h>
15#include <linux/pinctrl/consumer.h> 19#include <linux/pinctrl/consumer.h>
16#include <linux/platform_device.h> 20#include <linux/platform_device.h>
@@ -282,7 +286,6 @@ static const struct of_device_id zx_gpio_match[] = {
282 }, 286 },
283 { }, 287 { },
284}; 288};
285MODULE_DEVICE_TABLE(of, zx_gpio_match);
286 289
287static struct platform_driver zx_gpio_driver = { 290static struct platform_driver zx_gpio_driver = {
288 .probe = zx_gpio_probe, 291 .probe = zx_gpio_probe,
@@ -291,9 +294,4 @@ static struct platform_driver zx_gpio_driver = {
291 .of_match_table = of_match_ptr(zx_gpio_match), 294 .of_match_table = of_match_ptr(zx_gpio_match),
292 }, 295 },
293}; 296};
294 297builtin_platform_driver(zx_gpio_driver)
295module_platform_driver(zx_gpio_driver)
296
297MODULE_AUTHOR("Jun Nie <jun.nie@linaro.org>");
298MODULE_DESCRIPTION("ZTE ZX296702 GPIO driver");
299MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 66d3d247d76d..75c6355b018d 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -713,7 +713,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
713 pm_runtime_enable(&pdev->dev); 713 pm_runtime_enable(&pdev->dev);
714 ret = pm_runtime_get_sync(&pdev->dev); 714 ret = pm_runtime_get_sync(&pdev->dev);
715 if (ret < 0) 715 if (ret < 0)
716 return ret; 716 goto err_pm_dis;
717 717
718 /* report a bug if gpio chip registration fails */ 718 /* report a bug if gpio chip registration fails */
719 ret = gpiochip_add_data(chip, gpio); 719 ret = gpiochip_add_data(chip, gpio);
@@ -745,6 +745,8 @@ err_rm_gpiochip:
745 gpiochip_remove(chip); 745 gpiochip_remove(chip);
746err_pm_put: 746err_pm_put:
747 pm_runtime_put(&pdev->dev); 747 pm_runtime_put(&pdev->dev);
748err_pm_dis:
749 pm_runtime_disable(&pdev->dev);
748 750
749 return ret; 751 return ret;
750} 752}
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 42a4bb7cf49a..d22dcc38179d 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -196,21 +196,68 @@ static struct gpio_desc *of_parse_own_gpio(struct device_node *np,
196} 196}
197 197
198/** 198/**
199 * of_gpiochip_set_names() - set up the names of the lines
200 * @chip: GPIO chip whose lines should be named, if possible
201 */
202static void of_gpiochip_set_names(struct gpio_chip *gc)
203{
204 struct gpio_device *gdev = gc->gpiodev;
205 struct device_node *np = gc->of_node;
206 int i;
207 int nstrings;
208
209 nstrings = of_property_count_strings(np, "gpio-line-names");
210 if (nstrings <= 0)
211 /* Lines names not present */
212 return;
213
214 /* This is normally not what you want */
215 if (gdev->ngpio != nstrings)
216 dev_info(&gdev->dev, "gpio-line-names specifies %d line "
217 "names but there are %d lines on the chip\n",
218 nstrings, gdev->ngpio);
219
220 /*
221 * Make sure to not index beyond the end of the number of descriptors
222 * of the GPIO device.
223 */
224 for (i = 0; i < gdev->ngpio; i++) {
225 const char *name;
226 int ret;
227
228 ret = of_property_read_string_index(np,
229 "gpio-line-names",
230 i,
231 &name);
232 if (ret) {
233 if (ret != -ENODATA)
234 dev_err(&gdev->dev,
235 "unable to name line %d: %d\n",
236 i, ret);
237 break;
238 }
239 gdev->descs[i].name = name;
240 }
241}
242
243/**
199 * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions 244 * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
200 * @chip: gpio chip to act on 245 * @chip: gpio chip to act on
201 * 246 *
202 * This is only used by of_gpiochip_add to request/set GPIO initial 247 * This is only used by of_gpiochip_add to request/set GPIO initial
203 * configuration. 248 * configuration.
249 * It retures error if it fails otherwise 0 on success.
204 */ 250 */
205static void of_gpiochip_scan_gpios(struct gpio_chip *chip) 251static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
206{ 252{
207 struct gpio_desc *desc = NULL; 253 struct gpio_desc *desc = NULL;
208 struct device_node *np; 254 struct device_node *np;
209 const char *name; 255 const char *name;
210 enum gpio_lookup_flags lflags; 256 enum gpio_lookup_flags lflags;
211 enum gpiod_flags dflags; 257 enum gpiod_flags dflags;
258 int ret;
212 259
213 for_each_child_of_node(chip->of_node, np) { 260 for_each_available_child_of_node(chip->of_node, np) {
214 if (!of_property_read_bool(np, "gpio-hog")) 261 if (!of_property_read_bool(np, "gpio-hog"))
215 continue; 262 continue;
216 263
@@ -218,9 +265,12 @@ static void of_gpiochip_scan_gpios(struct gpio_chip *chip)
218 if (IS_ERR(desc)) 265 if (IS_ERR(desc))
219 continue; 266 continue;
220 267
221 if (gpiod_hog(desc, name, lflags, dflags)) 268 ret = gpiod_hog(desc, name, lflags, dflags);
222 continue; 269 if (ret < 0)
270 return ret;
223 } 271 }
272
273 return 0;
224} 274}
225 275
226/** 276/**
@@ -440,11 +490,13 @@ int of_gpiochip_add(struct gpio_chip *chip)
440 if (status) 490 if (status)
441 return status; 491 return status;
442 492
443 of_node_get(chip->of_node); 493 /* If the chip defines names itself, these take precedence */
494 if (!chip->names)
495 of_gpiochip_set_names(chip);
444 496
445 of_gpiochip_scan_gpios(chip); 497 of_node_get(chip->of_node);
446 498
447 return 0; 499 return of_gpiochip_scan_gpios(chip);
448} 500}
449 501
450void of_gpiochip_remove(struct gpio_chip *chip) 502void of_gpiochip_remove(struct gpio_chip *chip)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index b747c76fd2b1..d407f904a31c 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -622,14 +622,31 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data)
622 struct gpio_desc *desc = &gdev->descs[i]; 622 struct gpio_desc *desc = &gdev->descs[i];
623 623
624 desc->gdev = gdev; 624 desc->gdev = gdev;
625 625 /*
626 /* REVISIT: most hardware initializes GPIOs as inputs (often 626 * REVISIT: most hardware initializes GPIOs as inputs
627 * with pullups enabled) so power usage is minimized. Linux 627 * (often with pullups enabled) so power usage is
628 * code should set the gpio direction first thing; but until 628 * minimized. Linux code should set the gpio direction
629 * it does, and in case chip->get_direction is not set, we may 629 * first thing; but until it does, and in case
630 * expose the wrong direction in sysfs. 630 * chip->get_direction is not set, we may expose the
631 * wrong direction in sysfs.
631 */ 632 */
632 desc->flags = !chip->direction_input ? (1 << FLAG_IS_OUT) : 0; 633
634 if (chip->get_direction) {
635 /*
636 * If we have .get_direction, set up the initial
637 * direction flag from the hardware.
638 */
639 int dir = chip->get_direction(chip, i);
640
641 if (!dir)
642 set_bit(FLAG_IS_OUT, &desc->flags);
643 } else if (!chip->direction_input) {
644 /*
645 * If the chip lacks the .direction_input callback
646 * we logically assume all lines are outputs.
647 */
648 set_bit(FLAG_IS_OUT, &desc->flags);
649 }
633 } 650 }
634 651
635 spin_unlock_irqrestore(&gpio_lock, flags); 652 spin_unlock_irqrestore(&gpio_lock, flags);
@@ -1547,8 +1564,8 @@ EXPORT_SYMBOL_GPL(gpiod_direction_input);
1547 1564
1548static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) 1565static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
1549{ 1566{
1550 struct gpio_chip *chip; 1567 struct gpio_chip *gc = desc->gdev->chip;
1551 int status = -EINVAL; 1568 int ret;
1552 1569
1553 /* GPIOs used for IRQs shall not be set as output */ 1570 /* GPIOs used for IRQs shall not be set as output */
1554 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { 1571 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) {
@@ -1558,28 +1575,50 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
1558 return -EIO; 1575 return -EIO;
1559 } 1576 }
1560 1577
1561 /* Open drain pin should not be driven to 1 */ 1578 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
1562 if (value && test_bit(FLAG_OPEN_DRAIN, &desc->flags)) 1579 /* First see if we can enable open drain in hardware */
1563 return gpiod_direction_input(desc); 1580 if (gc->set_single_ended) {
1564 1581 ret = gc->set_single_ended(gc, gpio_chip_hwgpio(desc),
1565 /* Open source pin should not be driven to 0 */ 1582 LINE_MODE_OPEN_DRAIN);
1566 if (!value && test_bit(FLAG_OPEN_SOURCE, &desc->flags)) 1583 if (!ret)
1567 return gpiod_direction_input(desc); 1584 goto set_output_value;
1585 }
1586 /* Emulate open drain by not actively driving the line high */
1587 if (value)
1588 return gpiod_direction_input(desc);
1589 }
1590 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
1591 if (gc->set_single_ended) {
1592 ret = gc->set_single_ended(gc, gpio_chip_hwgpio(desc),
1593 LINE_MODE_OPEN_SOURCE);
1594 if (!ret)
1595 goto set_output_value;
1596 }
1597 /* Emulate open source by not actively driving the line low */
1598 if (!value)
1599 return gpiod_direction_input(desc);
1600 } else {
1601 /* Make sure to disable open drain/source hardware, if any */
1602 if (gc->set_single_ended)
1603 gc->set_single_ended(gc,
1604 gpio_chip_hwgpio(desc),
1605 LINE_MODE_PUSH_PULL);
1606 }
1568 1607
1569 chip = desc->gdev->chip; 1608set_output_value:
1570 if (!chip->set || !chip->direction_output) { 1609 if (!gc->set || !gc->direction_output) {
1571 gpiod_warn(desc, 1610 gpiod_warn(desc,
1572 "%s: missing set() or direction_output() operations\n", 1611 "%s: missing set() or direction_output() operations\n",
1573 __func__); 1612 __func__);
1574 return -EIO; 1613 return -EIO;
1575 } 1614 }
1576 1615
1577 status = chip->direction_output(chip, gpio_chip_hwgpio(desc), value); 1616 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), value);
1578 if (status == 0) 1617 if (!ret)
1579 set_bit(FLAG_IS_OUT, &desc->flags); 1618 set_bit(FLAG_IS_OUT, &desc->flags);
1580 trace_gpio_value(desc_to_gpio(desc), 0, value); 1619 trace_gpio_value(desc_to_gpio(desc), 0, value);
1581 trace_gpio_direction(desc_to_gpio(desc), 0, status); 1620 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
1582 return status; 1621 return ret;
1583} 1622}
1584 1623
1585/** 1624/**
@@ -1841,10 +1880,10 @@ static void gpio_chip_set_multiple(struct gpio_chip *chip,
1841 } 1880 }
1842} 1881}
1843 1882
1844static void gpiod_set_array_value_priv(bool raw, bool can_sleep, 1883void gpiod_set_array_value_complex(bool raw, bool can_sleep,
1845 unsigned int array_size, 1884 unsigned int array_size,
1846 struct gpio_desc **desc_array, 1885 struct gpio_desc **desc_array,
1847 int *value_array) 1886 int *value_array)
1848{ 1887{
1849 int i = 0; 1888 int i = 0;
1850 1889
@@ -1950,8 +1989,8 @@ void gpiod_set_raw_array_value(unsigned int array_size,
1950{ 1989{
1951 if (!desc_array) 1990 if (!desc_array)
1952 return; 1991 return;
1953 gpiod_set_array_value_priv(true, false, array_size, desc_array, 1992 gpiod_set_array_value_complex(true, false, array_size, desc_array,
1954 value_array); 1993 value_array);
1955} 1994}
1956EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); 1995EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
1957 1996
@@ -1972,8 +2011,8 @@ void gpiod_set_array_value(unsigned int array_size,
1972{ 2011{
1973 if (!desc_array) 2012 if (!desc_array)
1974 return; 2013 return;
1975 gpiod_set_array_value_priv(false, false, array_size, desc_array, 2014 gpiod_set_array_value_complex(false, false, array_size, desc_array,
1976 value_array); 2015 value_array);
1977} 2016}
1978EXPORT_SYMBOL_GPL(gpiod_set_array_value); 2017EXPORT_SYMBOL_GPL(gpiod_set_array_value);
1979 2018
@@ -1998,13 +2037,22 @@ EXPORT_SYMBOL_GPL(gpiod_cansleep);
1998 */ 2037 */
1999int gpiod_to_irq(const struct gpio_desc *desc) 2038int gpiod_to_irq(const struct gpio_desc *desc)
2000{ 2039{
2001 struct gpio_chip *chip; 2040 struct gpio_chip *chip;
2002 int offset; 2041 int offset;
2003 2042
2004 VALIDATE_DESC(desc); 2043 VALIDATE_DESC(desc);
2005 chip = desc->gdev->chip; 2044 chip = desc->gdev->chip;
2006 offset = gpio_chip_hwgpio(desc); 2045 offset = gpio_chip_hwgpio(desc);
2007 return chip->to_irq ? chip->to_irq(chip, offset) : -ENXIO; 2046 if (chip->to_irq) {
2047 int retirq = chip->to_irq(chip, offset);
2048
2049 /* Zero means NO_IRQ */
2050 if (!retirq)
2051 return -ENXIO;
2052
2053 return retirq;
2054 }
2055 return -ENXIO;
2008} 2056}
2009EXPORT_SYMBOL_GPL(gpiod_to_irq); 2057EXPORT_SYMBOL_GPL(gpiod_to_irq);
2010 2058
@@ -2176,8 +2224,8 @@ void gpiod_set_raw_array_value_cansleep(unsigned int array_size,
2176 might_sleep_if(extra_checks); 2224 might_sleep_if(extra_checks);
2177 if (!desc_array) 2225 if (!desc_array)
2178 return; 2226 return;
2179 gpiod_set_array_value_priv(true, true, array_size, desc_array, 2227 gpiod_set_array_value_complex(true, true, array_size, desc_array,
2180 value_array); 2228 value_array);
2181} 2229}
2182EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); 2230EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
2183 2231
@@ -2199,8 +2247,8 @@ void gpiod_set_array_value_cansleep(unsigned int array_size,
2199 might_sleep_if(extra_checks); 2247 might_sleep_if(extra_checks);
2200 if (!desc_array) 2248 if (!desc_array)
2201 return; 2249 return;
2202 gpiod_set_array_value_priv(false, true, array_size, desc_array, 2250 gpiod_set_array_value_complex(false, true, array_size, desc_array,
2203 value_array); 2251 value_array);
2204} 2252}
2205EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); 2253EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
2206 2254
@@ -2726,15 +2774,16 @@ int gpiod_hog(struct gpio_desc *desc, const char *name,
2726 2774
2727 local_desc = gpiochip_request_own_desc(chip, hwnum, name); 2775 local_desc = gpiochip_request_own_desc(chip, hwnum, name);
2728 if (IS_ERR(local_desc)) { 2776 if (IS_ERR(local_desc)) {
2729 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed\n", 2777 status = PTR_ERR(local_desc);
2730 name, chip->label, hwnum); 2778 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
2731 return PTR_ERR(local_desc); 2779 name, chip->label, hwnum, status);
2780 return status;
2732 } 2781 }
2733 2782
2734 status = gpiod_configure_flags(desc, name, dflags); 2783 status = gpiod_configure_flags(desc, name, dflags);
2735 if (status < 0) { 2784 if (status < 0) {
2736 pr_err("setup of hog GPIO %s (chip %s, offset %d) failed\n", 2785 pr_err("setup of hog GPIO %s (chip %s, offset %d) failed, %d\n",
2737 name, chip->label, hwnum); 2786 name, chip->label, hwnum, status);
2738 gpiochip_free_own_desc(desc); 2787 gpiochip_free_own_desc(desc);
2739 return status; 2788 return status;
2740 } 2789 }
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index e30e5fdb1214..2d9ea5e0cab3 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -141,6 +141,10 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
141 const char *list_name, int index, enum of_gpio_flags *flags); 141 const char *list_name, int index, enum of_gpio_flags *flags);
142 142
143struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum); 143struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum);
144void gpiod_set_array_value_complex(bool raw, bool can_sleep,
145 unsigned int array_size,
146 struct gpio_desc **desc_array,
147 int *value_array);
144 148
145extern struct spinlock gpio_lock; 149extern struct spinlock gpio_lock;
146extern struct list_head gpio_devices; 150extern struct list_head gpio_devices;
diff --git a/drivers/input/keyboard/adp5588-keys.c b/drivers/input/keyboard/adp5588-keys.c
index 21a62d0fa764..53fe9a3fb620 100644
--- a/drivers/input/keyboard/adp5588-keys.c
+++ b/drivers/input/keyboard/adp5588-keys.c
@@ -73,7 +73,7 @@ static int adp5588_write(struct i2c_client *client, u8 reg, u8 val)
73#ifdef CONFIG_GPIOLIB 73#ifdef CONFIG_GPIOLIB
74static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) 74static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
75{ 75{
76 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc); 76 struct adp5588_kpad *kpad = gpiochip_get_data(chip);
77 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); 77 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]);
78 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); 78 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]);
79 int val; 79 int val;
@@ -93,7 +93,7 @@ static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
93static void adp5588_gpio_set_value(struct gpio_chip *chip, 93static void adp5588_gpio_set_value(struct gpio_chip *chip,
94 unsigned off, int val) 94 unsigned off, int val)
95{ 95{
96 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc); 96 struct adp5588_kpad *kpad = gpiochip_get_data(chip);
97 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); 97 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]);
98 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); 98 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]);
99 99
@@ -112,7 +112,7 @@ static void adp5588_gpio_set_value(struct gpio_chip *chip,
112 112
113static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) 113static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
114{ 114{
115 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc); 115 struct adp5588_kpad *kpad = gpiochip_get_data(chip);
116 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); 116 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]);
117 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); 117 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]);
118 int ret; 118 int ret;
@@ -130,7 +130,7 @@ static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
130static int adp5588_gpio_direction_output(struct gpio_chip *chip, 130static int adp5588_gpio_direction_output(struct gpio_chip *chip,
131 unsigned off, int val) 131 unsigned off, int val)
132{ 132{
133 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc); 133 struct adp5588_kpad *kpad = gpiochip_get_data(chip);
134 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); 134 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]);
135 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]); 135 unsigned int bit = ADP5588_BIT(kpad->gpiomap[off]);
136 int ret; 136 int ret;
@@ -210,7 +210,7 @@ static int adp5588_gpio_add(struct adp5588_kpad *kpad)
210 210
211 mutex_init(&kpad->gpio_lock); 211 mutex_init(&kpad->gpio_lock);
212 212
213 error = gpiochip_add(&kpad->gc); 213 error = gpiochip_add_data(&kpad->gc, kpad);
214 if (error) { 214 if (error) {
215 dev_err(dev, "gpiochip_add failed, err: %d\n", error); 215 dev_err(dev, "gpiochip_add failed, err: %d\n", error);
216 return error; 216 return error;
diff --git a/drivers/input/keyboard/adp5589-keys.c b/drivers/input/keyboard/adp5589-keys.c
index c01a1d648f9f..32d94c63dc33 100644
--- a/drivers/input/keyboard/adp5589-keys.c
+++ b/drivers/input/keyboard/adp5589-keys.c
@@ -387,7 +387,7 @@ static int adp5589_write(struct i2c_client *client, u8 reg, u8 val)
387#ifdef CONFIG_GPIOLIB 387#ifdef CONFIG_GPIOLIB
388static int adp5589_gpio_get_value(struct gpio_chip *chip, unsigned off) 388static int adp5589_gpio_get_value(struct gpio_chip *chip, unsigned off)
389{ 389{
390 struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); 390 struct adp5589_kpad *kpad = gpiochip_get_data(chip);
391 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); 391 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]);
392 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); 392 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]);
393 393
@@ -399,7 +399,7 @@ static int adp5589_gpio_get_value(struct gpio_chip *chip, unsigned off)
399static void adp5589_gpio_set_value(struct gpio_chip *chip, 399static void adp5589_gpio_set_value(struct gpio_chip *chip,
400 unsigned off, int val) 400 unsigned off, int val)
401{ 401{
402 struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); 402 struct adp5589_kpad *kpad = gpiochip_get_data(chip);
403 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); 403 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]);
404 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); 404 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]);
405 405
@@ -418,7 +418,7 @@ static void adp5589_gpio_set_value(struct gpio_chip *chip,
418 418
419static int adp5589_gpio_direction_input(struct gpio_chip *chip, unsigned off) 419static int adp5589_gpio_direction_input(struct gpio_chip *chip, unsigned off)
420{ 420{
421 struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); 421 struct adp5589_kpad *kpad = gpiochip_get_data(chip);
422 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); 422 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]);
423 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); 423 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]);
424 int ret; 424 int ret;
@@ -438,7 +438,7 @@ static int adp5589_gpio_direction_input(struct gpio_chip *chip, unsigned off)
438static int adp5589_gpio_direction_output(struct gpio_chip *chip, 438static int adp5589_gpio_direction_output(struct gpio_chip *chip,
439 unsigned off, int val) 439 unsigned off, int val)
440{ 440{
441 struct adp5589_kpad *kpad = container_of(chip, struct adp5589_kpad, gc); 441 struct adp5589_kpad *kpad = gpiochip_get_data(chip);
442 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); 442 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]);
443 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); 443 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]);
444 int ret; 444 int ret;
@@ -525,9 +525,9 @@ static int adp5589_gpio_add(struct adp5589_kpad *kpad)
525 525
526 mutex_init(&kpad->gpio_lock); 526 mutex_init(&kpad->gpio_lock);
527 527
528 error = gpiochip_add(&kpad->gc); 528 error = gpiochip_add_data(&kpad->gc, kpad);
529 if (error) { 529 if (error) {
530 dev_err(dev, "gpiochip_add failed, err: %d\n", error); 530 dev_err(dev, "gpiochip_add_data() failed, err: %d\n", error);
531 return error; 531 return error;
532 } 532 }
533 533
diff --git a/drivers/input/touchscreen/ad7879.c b/drivers/input/touchscreen/ad7879.c
index 69d299d5dd00..e4bf1103e6f8 100644
--- a/drivers/input/touchscreen/ad7879.c
+++ b/drivers/input/touchscreen/ad7879.c
@@ -379,7 +379,7 @@ static const struct attribute_group ad7879_attr_group = {
379static int ad7879_gpio_direction_input(struct gpio_chip *chip, 379static int ad7879_gpio_direction_input(struct gpio_chip *chip,
380 unsigned gpio) 380 unsigned gpio)
381{ 381{
382 struct ad7879 *ts = container_of(chip, struct ad7879, gc); 382 struct ad7879 *ts = gpiochip_get_data(chip);
383 int err; 383 int err;
384 384
385 mutex_lock(&ts->mutex); 385 mutex_lock(&ts->mutex);
@@ -393,7 +393,7 @@ static int ad7879_gpio_direction_input(struct gpio_chip *chip,
393static int ad7879_gpio_direction_output(struct gpio_chip *chip, 393static int ad7879_gpio_direction_output(struct gpio_chip *chip,
394 unsigned gpio, int level) 394 unsigned gpio, int level)
395{ 395{
396 struct ad7879 *ts = container_of(chip, struct ad7879, gc); 396 struct ad7879 *ts = gpiochip_get_data(chip);
397 int err; 397 int err;
398 398
399 mutex_lock(&ts->mutex); 399 mutex_lock(&ts->mutex);
@@ -412,7 +412,7 @@ static int ad7879_gpio_direction_output(struct gpio_chip *chip,
412 412
413static int ad7879_gpio_get_value(struct gpio_chip *chip, unsigned gpio) 413static int ad7879_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
414{ 414{
415 struct ad7879 *ts = container_of(chip, struct ad7879, gc); 415 struct ad7879 *ts = gpiochip_get_data(chip);
416 u16 val; 416 u16 val;
417 417
418 mutex_lock(&ts->mutex); 418 mutex_lock(&ts->mutex);
@@ -425,7 +425,7 @@ static int ad7879_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
425static void ad7879_gpio_set_value(struct gpio_chip *chip, 425static void ad7879_gpio_set_value(struct gpio_chip *chip,
426 unsigned gpio, int value) 426 unsigned gpio, int value)
427{ 427{
428 struct ad7879 *ts = container_of(chip, struct ad7879, gc); 428 struct ad7879 *ts = gpiochip_get_data(chip);
429 429
430 mutex_lock(&ts->mutex); 430 mutex_lock(&ts->mutex);
431 if (value) 431 if (value)
@@ -456,7 +456,7 @@ static int ad7879_gpio_add(struct ad7879 *ts,
456 ts->gc.owner = THIS_MODULE; 456 ts->gc.owner = THIS_MODULE;
457 ts->gc.parent = ts->dev; 457 ts->gc.parent = ts->dev;
458 458
459 ret = gpiochip_add(&ts->gc); 459 ret = gpiochip_add_data(&ts->gc, ts);
460 if (ret) 460 if (ret)
461 dev_err(ts->dev, "failed to register gpio %d\n", 461 dev_err(ts->dev, "failed to register gpio %d\n",
462 ts->gc.base); 462 ts->gc.base);
diff --git a/drivers/mfd/intel_quark_i2c_gpio.c b/drivers/mfd/intel_quark_i2c_gpio.c
index bdc5e27222c0..a24b35fc2b5b 100644
--- a/drivers/mfd/intel_quark_i2c_gpio.c
+++ b/drivers/mfd/intel_quark_i2c_gpio.c
@@ -219,8 +219,7 @@ static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
219 return -ENOMEM; 219 return -ENOMEM;
220 220
221 /* Set the properties for portA */ 221 /* Set the properties for portA */
222 pdata->properties->node = NULL; 222 pdata->properties->fwnode = NULL;
223 pdata->properties->name = "intel-quark-x1000-gpio-portA";
224 pdata->properties->idx = 0; 223 pdata->properties->idx = 0;
225 pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO; 224 pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
226 pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE; 225 pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index a6681b8b17c3..97dff6a09ff0 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -212,7 +212,7 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
212 } 212 }
213 } 213 }
214 214
215 return -ENOSYS; 215 return 0;
216 216
217found: 217found:
218 return pfc->irqs[i]; 218 return pfc->irqs[i];
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c
index 0e73fd10ba72..63b371d6ee55 100644
--- a/drivers/platform/x86/intel_pmic_gpio.c
+++ b/drivers/platform/x86/intel_pmic_gpio.c
@@ -30,7 +30,7 @@
30#include <linux/ioport.h> 30#include <linux/ioport.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/io.h> 32#include <linux/io.h>
33#include <linux/gpio.h> 33#include <linux/gpio/driver.h>
34#include <asm/intel_scu_ipc.h> 34#include <asm/intel_scu_ipc.h>
35#include <linux/device.h> 35#include <linux/device.h>
36#include <linux/intel_pmic_gpio.h> 36#include <linux/intel_pmic_gpio.h>
@@ -174,7 +174,7 @@ static int pmic_irq_type(struct irq_data *data, unsigned type)
174 174
175static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 175static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
176{ 176{
177 struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); 177 struct pmic_gpio *pg = gpiochip_get_data(chip);
178 178
179 return pg->irq_base + offset; 179 return pg->irq_base + offset;
180} 180}
@@ -279,7 +279,7 @@ static int platform_pmic_gpio_probe(struct platform_device *pdev)
279 mutex_init(&pg->buslock); 279 mutex_init(&pg->buslock);
280 280
281 pg->chip.parent = dev; 281 pg->chip.parent = dev;
282 retval = gpiochip_add(&pg->chip); 282 retval = gpiochip_add_data(&pg->chip, pg);
283 if (retval) { 283 if (retval) {
284 pr_err("Can not add pmic gpio chip\n"); 284 pr_err("Can not add pmic gpio chip\n");
285 goto err; 285 goto err;
diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c
index 65845712571c..333eb2215a57 100644
--- a/drivers/soc/fsl/qe/gpio.c
+++ b/drivers/soc/fsl/qe/gpio.c
@@ -18,6 +18,8 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/of_gpio.h> 20#include <linux/of_gpio.h>
21#include <linux/gpio/driver.h>
22/* FIXME: needed for gpio_to_chip() get rid of this */
21#include <linux/gpio.h> 23#include <linux/gpio.h>
22#include <linux/slab.h> 24#include <linux/slab.h>
23#include <linux/export.h> 25#include <linux/export.h>
@@ -37,15 +39,9 @@ struct qe_gpio_chip {
37 struct qe_pio_regs saved_regs; 39 struct qe_pio_regs saved_regs;
38}; 40};
39 41
40static inline struct qe_gpio_chip *
41to_qe_gpio_chip(struct of_mm_gpio_chip *mm_gc)
42{
43 return container_of(mm_gc, struct qe_gpio_chip, mm_gc);
44}
45
46static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) 42static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
47{ 43{
48 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); 44 struct qe_gpio_chip *qe_gc = gpiochip_get_data(&mm_gc->gc);
49 struct qe_pio_regs __iomem *regs = mm_gc->regs; 45 struct qe_pio_regs __iomem *regs = mm_gc->regs;
50 46
51 qe_gc->cpdata = in_be32(&regs->cpdata); 47 qe_gc->cpdata = in_be32(&regs->cpdata);
@@ -69,7 +65,7 @@ static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio)
69static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 65static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
70{ 66{
71 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 67 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
72 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); 68 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
73 struct qe_pio_regs __iomem *regs = mm_gc->regs; 69 struct qe_pio_regs __iomem *regs = mm_gc->regs;
74 unsigned long flags; 70 unsigned long flags;
75 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); 71 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
@@ -89,7 +85,7 @@ static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
89static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 85static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
90{ 86{
91 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 87 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
92 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); 88 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
93 unsigned long flags; 89 unsigned long flags;
94 90
95 spin_lock_irqsave(&qe_gc->lock, flags); 91 spin_lock_irqsave(&qe_gc->lock, flags);
@@ -104,7 +100,7 @@ static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
104static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 100static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
105{ 101{
106 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 102 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
107 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); 103 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
108 unsigned long flags; 104 unsigned long flags;
109 105
110 qe_gpio_set(gc, gpio, val); 106 qe_gpio_set(gc, gpio, val);
@@ -165,7 +161,7 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index)
165 } 161 }
166 162
167 mm_gc = to_of_mm_gpio_chip(gc); 163 mm_gc = to_of_mm_gpio_chip(gc);
168 qe_gc = to_qe_gpio_chip(mm_gc); 164 qe_gc = gpiochip_get_data(gc);
169 165
170 spin_lock_irqsave(&qe_gc->lock, flags); 166 spin_lock_irqsave(&qe_gc->lock, flags);
171 167
@@ -302,7 +298,7 @@ static int __init qe_add_gpiochips(void)
302 gc->get = qe_gpio_get; 298 gc->get = qe_gpio_get;
303 gc->set = qe_gpio_set; 299 gc->set = qe_gpio_set;
304 300
305 ret = of_mm_gpiochip_add(np, mm_gc); 301 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
306 if (ret) 302 if (ret)
307 goto err; 303 goto err;
308 continue; 304 continue;
diff --git a/drivers/ssb/driver_gpio.c b/drivers/ssb/driver_gpio.c
index f92e266d48f8..180e027b1c8a 100644
--- a/drivers/ssb/driver_gpio.c
+++ b/drivers/ssb/driver_gpio.c
@@ -8,7 +8,7 @@
8 * Licensed under the GNU/GPL. See COPYING for details. 8 * Licensed under the GNU/GPL. See COPYING for details.
9 */ 9 */
10 10
11#include <linux/gpio.h> 11#include <linux/gpio/driver.h>
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irqdomain.h> 14#include <linux/irqdomain.h>
@@ -22,15 +22,10 @@
22 * Shared 22 * Shared
23 **************************************************/ 23 **************************************************/
24 24
25static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
26{
27 return container_of(chip, struct ssb_bus, gpio);
28}
29
30#if IS_ENABLED(CONFIG_SSB_EMBEDDED) 25#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
31static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) 26static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
32{ 27{
33 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 28 struct ssb_bus *bus = gpiochip_get_data(chip);
34 29
35 if (bus->bustype == SSB_BUSTYPE_SSB) 30 if (bus->bustype == SSB_BUSTYPE_SSB)
36 return irq_find_mapping(bus->irq_domain, gpio); 31 return irq_find_mapping(bus->irq_domain, gpio);
@@ -45,7 +40,7 @@ static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
45 40
46static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio) 41static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
47{ 42{
48 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 43 struct ssb_bus *bus = gpiochip_get_data(chip);
49 44
50 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio); 45 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
51} 46}
@@ -53,7 +48,7 @@ static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
53static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio, 48static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
54 int value) 49 int value)
55{ 50{
56 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 51 struct ssb_bus *bus = gpiochip_get_data(chip);
57 52
58 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0); 53 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
59} 54}
@@ -61,7 +56,7 @@ static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
61static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip, 56static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
62 unsigned gpio) 57 unsigned gpio)
63{ 58{
64 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 59 struct ssb_bus *bus = gpiochip_get_data(chip);
65 60
66 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0); 61 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
67 return 0; 62 return 0;
@@ -70,7 +65,7 @@ static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
70static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip, 65static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
71 unsigned gpio, int value) 66 unsigned gpio, int value)
72{ 67{
73 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 68 struct ssb_bus *bus = gpiochip_get_data(chip);
74 69
75 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio); 70 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
76 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0); 71 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
@@ -79,7 +74,7 @@ static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
79 74
80static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio) 75static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
81{ 76{
82 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 77 struct ssb_bus *bus = gpiochip_get_data(chip);
83 78
84 ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0); 79 ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
85 /* clear pulldown */ 80 /* clear pulldown */
@@ -92,7 +87,7 @@ static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
92 87
93static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio) 88static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
94{ 89{
95 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 90 struct ssb_bus *bus = gpiochip_get_data(chip);
96 91
97 /* clear pullup */ 92 /* clear pullup */
98 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0); 93 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
@@ -246,7 +241,7 @@ static int ssb_gpio_chipco_init(struct ssb_bus *bus)
246 if (err) 241 if (err)
247 return err; 242 return err;
248 243
249 err = gpiochip_add(chip); 244 err = gpiochip_add_data(chip, bus);
250 if (err) { 245 if (err) {
251 ssb_gpio_irq_chipco_domain_exit(bus); 246 ssb_gpio_irq_chipco_domain_exit(bus);
252 return err; 247 return err;
@@ -263,7 +258,7 @@ static int ssb_gpio_chipco_init(struct ssb_bus *bus)
263 258
264static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio) 259static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
265{ 260{
266 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 261 struct ssb_bus *bus = gpiochip_get_data(chip);
267 262
268 return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio); 263 return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
269} 264}
@@ -271,7 +266,7 @@ static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
271static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio, 266static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
272 int value) 267 int value)
273{ 268{
274 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 269 struct ssb_bus *bus = gpiochip_get_data(chip);
275 270
276 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0); 271 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
277} 272}
@@ -279,7 +274,7 @@ static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
279static int ssb_gpio_extif_direction_input(struct gpio_chip *chip, 274static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
280 unsigned gpio) 275 unsigned gpio)
281{ 276{
282 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 277 struct ssb_bus *bus = gpiochip_get_data(chip);
283 278
284 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0); 279 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
285 return 0; 280 return 0;
@@ -288,7 +283,7 @@ static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
288static int ssb_gpio_extif_direction_output(struct gpio_chip *chip, 283static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
289 unsigned gpio, int value) 284 unsigned gpio, int value)
290{ 285{
291 struct ssb_bus *bus = ssb_gpio_get_bus(chip); 286 struct ssb_bus *bus = gpiochip_get_data(chip);
292 287
293 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio); 288 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
294 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0); 289 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
@@ -439,7 +434,7 @@ static int ssb_gpio_extif_init(struct ssb_bus *bus)
439 if (err) 434 if (err)
440 return err; 435 return err;
441 436
442 err = gpiochip_add(chip); 437 err = gpiochip_add_data(chip, bus);
443 if (err) { 438 if (err) {
444 ssb_gpio_irq_extif_domain_exit(bus); 439 ssb_gpio_irq_extif_domain_exit(bus);
445 return err; 440 return err;
diff --git a/drivers/staging/vme/devices/vme_pio2_gpio.c b/drivers/staging/vme/devices/vme_pio2_gpio.c
index df992c3cb5ce..6d361201d98c 100644
--- a/drivers/staging/vme/devices/vme_pio2_gpio.c
+++ b/drivers/staging/vme/devices/vme_pio2_gpio.c
@@ -17,7 +17,7 @@
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/ctype.h> 19#include <linux/ctype.h>
20#include <linux/gpio.h> 20#include <linux/gpio/driver.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/vme.h> 22#include <linux/vme.h>
23 23
@@ -25,16 +25,11 @@
25 25
26static const char driver_name[] = "pio2_gpio"; 26static const char driver_name[] = "pio2_gpio";
27 27
28static struct pio2_card *gpio_to_pio2_card(struct gpio_chip *chip)
29{
30 return container_of(chip, struct pio2_card, gc);
31}
32
33static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset) 28static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset)
34{ 29{
35 u8 reg; 30 u8 reg;
36 int retval; 31 int retval;
37 struct pio2_card *card = gpio_to_pio2_card(chip); 32 struct pio2_card *card = gpiochip_get_data(chip);
38 33
39 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) | 34 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
40 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { 35 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
@@ -71,7 +66,7 @@ static void pio2_gpio_set(struct gpio_chip *chip,
71{ 66{
72 u8 reg; 67 u8 reg;
73 int retval; 68 int retval;
74 struct pio2_card *card = gpio_to_pio2_card(chip); 69 struct pio2_card *card = gpiochip_get_data(chip);
75 70
76 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) | 71 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
77 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { 72 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
@@ -100,7 +95,7 @@ static void pio2_gpio_set(struct gpio_chip *chip,
100static int pio2_gpio_dir_in(struct gpio_chip *chip, unsigned offset) 95static int pio2_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
101{ 96{
102 int data; 97 int data;
103 struct pio2_card *card = gpio_to_pio2_card(chip); 98 struct pio2_card *card = gpiochip_get_data(chip);
104 99
105 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) | 100 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
106 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { 101 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
@@ -119,7 +114,7 @@ static int pio2_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
119static int pio2_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value) 114static int pio2_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
120{ 115{
121 int data; 116 int data;
122 struct pio2_card *card = gpio_to_pio2_card(chip); 117 struct pio2_card *card = gpiochip_get_data(chip);
123 118
124 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) | 119 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
125 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { 120 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
@@ -205,7 +200,7 @@ int pio2_gpio_init(struct pio2_card *card)
205 card->gc.set = pio2_gpio_set; 200 card->gc.set = pio2_gpio_set;
206 201
207 /* This function adds a memory mapped GPIO chip */ 202 /* This function adds a memory mapped GPIO chip */
208 retval = gpiochip_add(&card->gc); 203 retval = gpiochip_add_data(&card->gc, card);
209 if (retval) { 204 if (retval) {
210 dev_err(&card->vdev->dev, "Unable to register GPIO\n"); 205 dev_err(&card->vdev->dev, "Unable to register GPIO\n");
211 kfree(card->gc.label); 206 kfree(card->gc.label);
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index 3f98165b479c..3f6e0ab725fe 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -17,7 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/device.h> 19#include <linux/device.h>
20#include <linux/gpio.h> 20#include <linux/gpio/driver.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/of.h> 22#include <linux/of.h>
23#include <linux/of_device.h> 23#include <linux/of_device.h>
@@ -1036,7 +1036,7 @@ static SIMPLE_DEV_PM_OPS(max310x_pm_ops, max310x_suspend, max310x_resume);
1036static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset) 1036static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset)
1037{ 1037{
1038 unsigned int val; 1038 unsigned int val;
1039 struct max310x_port *s = container_of(chip, struct max310x_port, gpio); 1039 struct max310x_port *s = gpiochip_get_data(chip);
1040 struct uart_port *port = &s->p[offset / 4].port; 1040 struct uart_port *port = &s->p[offset / 4].port;
1041 1041
1042 val = max310x_port_read(port, MAX310X_GPIODATA_REG); 1042 val = max310x_port_read(port, MAX310X_GPIODATA_REG);
@@ -1046,7 +1046,7 @@ static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset)
1046 1046
1047static void max310x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 1047static void max310x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1048{ 1048{
1049 struct max310x_port *s = container_of(chip, struct max310x_port, gpio); 1049 struct max310x_port *s = gpiochip_get_data(chip);
1050 struct uart_port *port = &s->p[offset / 4].port; 1050 struct uart_port *port = &s->p[offset / 4].port;
1051 1051
1052 max310x_port_update(port, MAX310X_GPIODATA_REG, 1 << (offset % 4), 1052 max310x_port_update(port, MAX310X_GPIODATA_REG, 1 << (offset % 4),
@@ -1055,7 +1055,7 @@ static void max310x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1055 1055
1056static int max310x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 1056static int max310x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
1057{ 1057{
1058 struct max310x_port *s = container_of(chip, struct max310x_port, gpio); 1058 struct max310x_port *s = gpiochip_get_data(chip);
1059 struct uart_port *port = &s->p[offset / 4].port; 1059 struct uart_port *port = &s->p[offset / 4].port;
1060 1060
1061 max310x_port_update(port, MAX310X_GPIOCFG_REG, 1 << (offset % 4), 0); 1061 max310x_port_update(port, MAX310X_GPIOCFG_REG, 1 << (offset % 4), 0);
@@ -1066,7 +1066,7 @@ static int max310x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
1066static int max310x_gpio_direction_output(struct gpio_chip *chip, 1066static int max310x_gpio_direction_output(struct gpio_chip *chip,
1067 unsigned offset, int value) 1067 unsigned offset, int value)
1068{ 1068{
1069 struct max310x_port *s = container_of(chip, struct max310x_port, gpio); 1069 struct max310x_port *s = gpiochip_get_data(chip);
1070 struct uart_port *port = &s->p[offset / 4].port; 1070 struct uart_port *port = &s->p[offset / 4].port;
1071 1071
1072 max310x_port_update(port, MAX310X_GPIODATA_REG, 1 << (offset % 4), 1072 max310x_port_update(port, MAX310X_GPIODATA_REG, 1 << (offset % 4),
@@ -1183,7 +1183,7 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
1183 s->gpio.base = -1; 1183 s->gpio.base = -1;
1184 s->gpio.ngpio = devtype->nr * 4; 1184 s->gpio.ngpio = devtype->nr * 4;
1185 s->gpio.can_sleep = 1; 1185 s->gpio.can_sleep = 1;
1186 ret = gpiochip_add(&s->gpio); 1186 ret = gpiochip_add_data(&s->gpio, s);
1187 if (ret) 1187 if (ret)
1188 goto out_uart; 1188 goto out_uart;
1189#endif 1189#endif
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index 025a4264430e..e6393619405a 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -17,7 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/device.h> 19#include <linux/device.h>
20#include <linux/gpio.h> 20#include <linux/gpio/driver.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/of.h> 23#include <linux/of.h>
@@ -1104,8 +1104,7 @@ static const struct uart_ops sc16is7xx_ops = {
1104static int sc16is7xx_gpio_get(struct gpio_chip *chip, unsigned offset) 1104static int sc16is7xx_gpio_get(struct gpio_chip *chip, unsigned offset)
1105{ 1105{
1106 unsigned int val; 1106 unsigned int val;
1107 struct sc16is7xx_port *s = container_of(chip, struct sc16is7xx_port, 1107 struct sc16is7xx_port *s = gpiochip_get_data(chip);
1108 gpio);
1109 struct uart_port *port = &s->p[0].port; 1108 struct uart_port *port = &s->p[0].port;
1110 1109
1111 val = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG); 1110 val = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG);
@@ -1115,8 +1114,7 @@ static int sc16is7xx_gpio_get(struct gpio_chip *chip, unsigned offset)
1115 1114
1116static void sc16is7xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 1115static void sc16is7xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
1117{ 1116{
1118 struct sc16is7xx_port *s = container_of(chip, struct sc16is7xx_port, 1117 struct sc16is7xx_port *s = gpiochip_get_data(chip);
1119 gpio);
1120 struct uart_port *port = &s->p[0].port; 1118 struct uart_port *port = &s->p[0].port;
1121 1119
1122 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset), 1120 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset),
@@ -1126,8 +1124,7 @@ static void sc16is7xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
1126static int sc16is7xx_gpio_direction_input(struct gpio_chip *chip, 1124static int sc16is7xx_gpio_direction_input(struct gpio_chip *chip,
1127 unsigned offset) 1125 unsigned offset)
1128{ 1126{
1129 struct sc16is7xx_port *s = container_of(chip, struct sc16is7xx_port, 1127 struct sc16is7xx_port *s = gpiochip_get_data(chip);
1130 gpio);
1131 struct uart_port *port = &s->p[0].port; 1128 struct uart_port *port = &s->p[0].port;
1132 1129
1133 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), 0); 1130 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), 0);
@@ -1138,8 +1135,7 @@ static int sc16is7xx_gpio_direction_input(struct gpio_chip *chip,
1138static int sc16is7xx_gpio_direction_output(struct gpio_chip *chip, 1135static int sc16is7xx_gpio_direction_output(struct gpio_chip *chip,
1139 unsigned offset, int val) 1136 unsigned offset, int val)
1140{ 1137{
1141 struct sc16is7xx_port *s = container_of(chip, struct sc16is7xx_port, 1138 struct sc16is7xx_port *s = gpiochip_get_data(chip);
1142 gpio);
1143 struct uart_port *port = &s->p[0].port; 1139 struct uart_port *port = &s->p[0].port;
1144 1140
1145 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset), 1141 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset),
@@ -1210,7 +1206,7 @@ static int sc16is7xx_probe(struct device *dev,
1210 s->gpio.base = -1; 1206 s->gpio.base = -1;
1211 s->gpio.ngpio = devtype->nr_gpio; 1207 s->gpio.ngpio = devtype->nr_gpio;
1212 s->gpio.can_sleep = 1; 1208 s->gpio.can_sleep = 1;
1213 ret = gpiochip_add(&s->gpio); 1209 ret = gpiochip_add_data(&s->gpio, s);
1214 if (ret) 1210 if (ret)
1215 goto out_thread; 1211 goto out_thread;
1216 } 1212 }
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index bee976f82788..50882e09289b 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -20,6 +20,18 @@ struct gpio_device;
20#ifdef CONFIG_GPIOLIB 20#ifdef CONFIG_GPIOLIB
21 21
22/** 22/**
23 * enum single_ended_mode - mode for single ended operation
24 * @LINE_MODE_PUSH_PULL: normal mode for a GPIO line, drive actively high/low
25 * @LINE_MODE_OPEN_DRAIN: set line to be open drain
26 * @LINE_MODE_OPEN_SOURCE: set line to be open source
27 */
28enum single_ended_mode {
29 LINE_MODE_PUSH_PULL,
30 LINE_MODE_OPEN_DRAIN,
31 LINE_MODE_OPEN_SOURCE,
32};
33
34/**
23 * struct gpio_chip - abstract a GPIO controller 35 * struct gpio_chip - abstract a GPIO controller
24 * @label: a functional name for the GPIO device, such as a part 36 * @label: a functional name for the GPIO device, such as a part
25 * number or the name of the SoC IP-block implementing it. 37 * number or the name of the SoC IP-block implementing it.
@@ -38,7 +50,15 @@ struct gpio_device;
38 * @set: assigns output value for signal "offset" 50 * @set: assigns output value for signal "offset"
39 * @set_multiple: assigns output values for multiple signals defined by "mask" 51 * @set_multiple: assigns output values for multiple signals defined by "mask"
40 * @set_debounce: optional hook for setting debounce time for specified gpio in 52 * @set_debounce: optional hook for setting debounce time for specified gpio in
41 * interrupt triggered gpio chips 53 * interrupt triggered gpio chips
54 * @set_single_ended: optional hook for setting a line as open drain, open
55 * source, or non-single ended (restore from open drain/source to normal
56 * push-pull mode) this should be implemented if the hardware supports
57 * open drain or open source settings. The GPIOlib will otherwise try
58 * to emulate open drain/source by not actively driving lines high/low
59 * if a consumer request this. The driver may return -ENOTSUPP if e.g.
60 * it supports just open drain but not open source and is called
61 * with LINE_MODE_OPEN_SOURCE as mode argument.
42 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; 62 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
43 * implementation may not sleep 63 * implementation may not sleep
44 * @dbg_show: optional routine to show contents in debugfs; default code 64 * @dbg_show: optional routine to show contents in debugfs; default code
@@ -130,6 +150,9 @@ struct gpio_chip {
130 int (*set_debounce)(struct gpio_chip *chip, 150 int (*set_debounce)(struct gpio_chip *chip,
131 unsigned offset, 151 unsigned offset,
132 unsigned debounce); 152 unsigned debounce);
153 int (*set_single_ended)(struct gpio_chip *chip,
154 unsigned offset,
155 enum single_ended_mode mode);
133 156
134 int (*to_irq)(struct gpio_chip *chip, 157 int (*to_irq)(struct gpio_chip *chip,
135 unsigned offset); 158 unsigned offset);
diff --git a/include/linux/i2c/sx150x.h b/include/linux/i2c/sx150x.h
deleted file mode 100644
index 52baa79d69a7..000000000000
--- a/include/linux/i2c/sx150x.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * Driver for the Semtech SX150x I2C GPIO Expanders
3 *
4 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA.
19 */
20#ifndef __LINUX_I2C_SX150X_H
21#define __LINUX_I2C_SX150X_H
22
23/**
24 * struct sx150x_platform_data - config data for SX150x driver
25 * @gpio_base: The index number of the first GPIO assigned to this
26 * GPIO expander. The expander will create a block of
27 * consecutively numbered gpios beginning at the given base,
28 * with the size of the block depending on the model of the
29 * expander chip.
30 * @oscio_is_gpo: If set to true, the driver will configure OSCIO as a GPO
31 * instead of as an oscillator, increasing the size of the
32 * GP(I)O pool created by this expander by one. The
33 * output-only GPO pin will be added at the end of the block.
34 * @io_pullup_ena: A bit-mask which enables or disables the pull-up resistor
35 * for each IO line in the expander. Setting the bit at
36 * position n will enable the pull-up for the IO at
37 * the corresponding offset. For chips with fewer than
38 * 16 IO pins, high-end bits are ignored.
39 * @io_pulldn_ena: A bit-mask which enables-or disables the pull-down
40 * resistor for each IO line in the expander. Setting the
41 * bit at position n will enable the pull-down for the IO at
42 * the corresponding offset. For chips with fewer than
43 * 16 IO pins, high-end bits are ignored.
44 * @io_open_drain_ena: A bit-mask which enables-or disables open-drain
45 * operation for each IO line in the expander. Setting the
46 * bit at position n enables open-drain operation for
47 * the IO at the corresponding offset. Clearing the bit
48 * enables regular push-pull operation for that IO.
49 * For chips with fewer than 16 IO pins, high-end bits
50 * are ignored.
51 * @io_polarity: A bit-mask which enables polarity inversion for each IO line
52 * in the expander. Setting the bit at position n inverts
53 * the polarity of that IO line, while clearing it results
54 * in normal polarity. For chips with fewer than 16 IO pins,
55 * high-end bits are ignored.
56 * @irq_summary: The 'summary IRQ' line to which the GPIO expander's INT line
57 * is connected, via which it reports interrupt events
58 * across all GPIO lines. This must be a real,
59 * pre-existing IRQ line.
60 * Setting this value < 0 disables the irq_chip functionality
61 * of the driver.
62 * @irq_base: The first 'virtual IRQ' line at which our block of GPIO-based
63 * IRQ lines will appear. Similarly to gpio_base, the expander
64 * will create a block of irqs beginning at this number.
65 * This value is ignored if irq_summary is < 0.
66 * @reset_during_probe: If set to true, the driver will trigger a full
67 * reset of the chip at the beginning of the probe
68 * in order to place it in a known state.
69 */
70struct sx150x_platform_data {
71 unsigned gpio_base;
72 bool oscio_is_gpo;
73 u16 io_pullup_ena;
74 u16 io_pulldn_ena;
75 u16 io_open_drain_ena;
76 u16 io_polarity;
77 int irq_summary;
78 unsigned irq_base;
79 bool reset_during_probe;
80};
81
82#endif /* __LINUX_I2C_SX150X_H */
diff --git a/include/linux/platform_data/gpio-dwapb.h b/include/linux/platform_data/gpio-dwapb.h
index 28702c849af1..2dc7f4a8ab09 100644
--- a/include/linux/platform_data/gpio-dwapb.h
+++ b/include/linux/platform_data/gpio-dwapb.h
@@ -15,8 +15,7 @@
15#define GPIO_DW_APB_H 15#define GPIO_DW_APB_H
16 16
17struct dwapb_port_property { 17struct dwapb_port_property {
18 struct device_node *node; 18 struct fwnode_handle *fwnode;
19 const char *name;
20 unsigned int idx; 19 unsigned int idx;
21 unsigned int ngpio; 20 unsigned int ngpio;
22 unsigned int gpio_base; 21 unsigned int gpio_base;
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 503c5b9dd030..d65f6f31a5b3 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -1100,6 +1100,7 @@ void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq,
1100 } 1100 }
1101 irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1101 irq_domain_free_irqs_parent(domain, virq, nr_irqs);
1102} 1102}
1103EXPORT_SYMBOL_GPL(irq_domain_free_irqs_common);
1103 1104
1104/** 1105/**
1105 * irq_domain_free_irqs_top - Clear handler and handler data, clear irqdata and free parent 1106 * irq_domain_free_irqs_top - Clear handler and handler data, clear irqdata and free parent
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 33e290b703df..60212266d5d1 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -4520,14 +4520,9 @@ static int rt5677_set_bias_level(struct snd_soc_codec *codec,
4520} 4520}
4521 4521
4522#ifdef CONFIG_GPIOLIB 4522#ifdef CONFIG_GPIOLIB
4523static inline struct rt5677_priv *gpio_to_rt5677(struct gpio_chip *chip)
4524{
4525 return container_of(chip, struct rt5677_priv, gpio_chip);
4526}
4527
4528static void rt5677_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 4523static void rt5677_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
4529{ 4524{
4530 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); 4525 struct rt5677_priv *rt5677 = gpiochip_get_data(chip);
4531 4526
4532 switch (offset) { 4527 switch (offset) {
4533 case RT5677_GPIO1 ... RT5677_GPIO5: 4528 case RT5677_GPIO1 ... RT5677_GPIO5:
@@ -4548,7 +4543,7 @@ static void rt5677_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
4548static int rt5677_gpio_direction_out(struct gpio_chip *chip, 4543static int rt5677_gpio_direction_out(struct gpio_chip *chip,
4549 unsigned offset, int value) 4544 unsigned offset, int value)
4550{ 4545{
4551 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); 4546 struct rt5677_priv *rt5677 = gpiochip_get_data(chip);
4552 4547
4553 switch (offset) { 4548 switch (offset) {
4554 case RT5677_GPIO1 ... RT5677_GPIO5: 4549 case RT5677_GPIO1 ... RT5677_GPIO5:
@@ -4572,7 +4567,7 @@ static int rt5677_gpio_direction_out(struct gpio_chip *chip,
4572 4567
4573static int rt5677_gpio_get(struct gpio_chip *chip, unsigned offset) 4568static int rt5677_gpio_get(struct gpio_chip *chip, unsigned offset)
4574{ 4569{
4575 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); 4570 struct rt5677_priv *rt5677 = gpiochip_get_data(chip);
4576 int value, ret; 4571 int value, ret;
4577 4572
4578 ret = regmap_read(rt5677->regmap, RT5677_GPIO_ST, &value); 4573 ret = regmap_read(rt5677->regmap, RT5677_GPIO_ST, &value);
@@ -4584,7 +4579,7 @@ static int rt5677_gpio_get(struct gpio_chip *chip, unsigned offset)
4584 4579
4585static int rt5677_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 4580static int rt5677_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
4586{ 4581{
4587 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); 4582 struct rt5677_priv *rt5677 = gpiochip_get_data(chip);
4588 4583
4589 switch (offset) { 4584 switch (offset) {
4590 case RT5677_GPIO1 ... RT5677_GPIO5: 4585 case RT5677_GPIO1 ... RT5677_GPIO5:
@@ -4638,7 +4633,7 @@ static void rt5677_gpio_config(struct rt5677_priv *rt5677, unsigned offset,
4638 4633
4639static int rt5677_to_irq(struct gpio_chip *chip, unsigned offset) 4634static int rt5677_to_irq(struct gpio_chip *chip, unsigned offset)
4640{ 4635{
4641 struct rt5677_priv *rt5677 = gpio_to_rt5677(chip); 4636 struct rt5677_priv *rt5677 = gpiochip_get_data(chip);
4642 struct regmap_irq_chip_data *data = rt5677->irq_data; 4637 struct regmap_irq_chip_data *data = rt5677->irq_data;
4643 int irq; 4638 int irq;
4644 4639
@@ -4697,7 +4692,7 @@ static void rt5677_init_gpio(struct i2c_client *i2c)
4697 rt5677->gpio_chip.parent = &i2c->dev; 4692 rt5677->gpio_chip.parent = &i2c->dev;
4698 rt5677->gpio_chip.base = -1; 4693 rt5677->gpio_chip.base = -1;
4699 4694
4700 ret = gpiochip_add(&rt5677->gpio_chip); 4695 ret = gpiochip_add_data(&rt5677->gpio_chip, rt5677);
4701 if (ret != 0) 4696 if (ret != 0)
4702 dev_err(&i2c->dev, "Failed to add GPIOs: %d\n", ret); 4697 dev_err(&i2c->dev, "Failed to add GPIOs: %d\n", ret);
4703} 4698}
diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c
index 171a23ddd15d..512a9d25fe6f 100644
--- a/sound/soc/codecs/wm5100.c
+++ b/sound/soc/codecs/wm5100.c
@@ -17,6 +17,7 @@
17#include <linux/export.h> 17#include <linux/export.h>
18#include <linux/pm.h> 18#include <linux/pm.h>
19#include <linux/gcd.h> 19#include <linux/gcd.h>
20#include <linux/gpio/driver.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/i2c.h> 22#include <linux/i2c.h>
22#include <linux/pm_runtime.h> 23#include <linux/pm_runtime.h>
@@ -2236,14 +2237,9 @@ static irqreturn_t wm5100_edge_irq(int irq, void *data)
2236} 2237}
2237 2238
2238#ifdef CONFIG_GPIOLIB 2239#ifdef CONFIG_GPIOLIB
2239static inline struct wm5100_priv *gpio_to_wm5100(struct gpio_chip *chip)
2240{
2241 return container_of(chip, struct wm5100_priv, gpio_chip);
2242}
2243
2244static void wm5100_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 2240static void wm5100_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
2245{ 2241{
2246 struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); 2242 struct wm5100_priv *wm5100 = gpiochip_get_data(chip);
2247 2243
2248 regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset, 2244 regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset,
2249 WM5100_GP1_LVL, !!value << WM5100_GP1_LVL_SHIFT); 2245 WM5100_GP1_LVL, !!value << WM5100_GP1_LVL_SHIFT);
@@ -2252,7 +2248,7 @@ static void wm5100_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
2252static int wm5100_gpio_direction_out(struct gpio_chip *chip, 2248static int wm5100_gpio_direction_out(struct gpio_chip *chip,
2253 unsigned offset, int value) 2249 unsigned offset, int value)
2254{ 2250{
2255 struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); 2251 struct wm5100_priv *wm5100 = gpiochip_get_data(chip);
2256 int val, ret; 2252 int val, ret;
2257 2253
2258 val = (1 << WM5100_GP1_FN_SHIFT) | (!!value << WM5100_GP1_LVL_SHIFT); 2254 val = (1 << WM5100_GP1_FN_SHIFT) | (!!value << WM5100_GP1_LVL_SHIFT);
@@ -2268,7 +2264,7 @@ static int wm5100_gpio_direction_out(struct gpio_chip *chip,
2268 2264
2269static int wm5100_gpio_get(struct gpio_chip *chip, unsigned offset) 2265static int wm5100_gpio_get(struct gpio_chip *chip, unsigned offset)
2270{ 2266{
2271 struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); 2267 struct wm5100_priv *wm5100 = gpiochip_get_data(chip);
2272 unsigned int reg; 2268 unsigned int reg;
2273 int ret; 2269 int ret;
2274 2270
@@ -2281,7 +2277,7 @@ static int wm5100_gpio_get(struct gpio_chip *chip, unsigned offset)
2281 2277
2282static int wm5100_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 2278static int wm5100_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
2283{ 2279{
2284 struct wm5100_priv *wm5100 = gpio_to_wm5100(chip); 2280 struct wm5100_priv *wm5100 = gpiochip_get_data(chip);
2285 2281
2286 return regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset, 2282 return regmap_update_bits(wm5100->regmap, WM5100_GPIO_CTRL_1 + offset,
2287 WM5100_GP1_FN_MASK | WM5100_GP1_DIR, 2283 WM5100_GP1_FN_MASK | WM5100_GP1_DIR,
@@ -2313,7 +2309,7 @@ static void wm5100_init_gpio(struct i2c_client *i2c)
2313 else 2309 else
2314 wm5100->gpio_chip.base = -1; 2310 wm5100->gpio_chip.base = -1;
2315 2311
2316 ret = gpiochip_add(&wm5100->gpio_chip); 2312 ret = gpiochip_add_data(&wm5100->gpio_chip, wm5100);
2317 if (ret != 0) 2313 if (ret != 0)
2318 dev_err(&i2c->dev, "Failed to add GPIOs: %d\n", ret); 2314 dev_err(&i2c->dev, "Failed to add GPIOs: %d\n", ret);
2319} 2315}
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c
index a82b8bc2cfc0..a26ca490cf31 100644
--- a/sound/soc/codecs/wm8903.c
+++ b/sound/soc/codecs/wm8903.c
@@ -20,7 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/completion.h> 21#include <linux/completion.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/gpio.h> 23#include <linux/gpio/driver.h>
24#include <linux/pm.h> 24#include <linux/pm.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/regmap.h> 26#include <linux/regmap.h>
@@ -1766,11 +1766,6 @@ static int wm8903_resume(struct snd_soc_codec *codec)
1766} 1766}
1767 1767
1768#ifdef CONFIG_GPIOLIB 1768#ifdef CONFIG_GPIOLIB
1769static inline struct wm8903_priv *gpio_to_wm8903(struct gpio_chip *chip)
1770{
1771 return container_of(chip, struct wm8903_priv, gpio_chip);
1772}
1773
1774static int wm8903_gpio_request(struct gpio_chip *chip, unsigned offset) 1769static int wm8903_gpio_request(struct gpio_chip *chip, unsigned offset)
1775{ 1770{
1776 if (offset >= WM8903_NUM_GPIO) 1771 if (offset >= WM8903_NUM_GPIO)
@@ -1781,7 +1776,7 @@ static int wm8903_gpio_request(struct gpio_chip *chip, unsigned offset)
1781 1776
1782static int wm8903_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 1777static int wm8903_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
1783{ 1778{
1784 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip); 1779 struct wm8903_priv *wm8903 = gpiochip_get_data(chip);
1785 unsigned int mask, val; 1780 unsigned int mask, val;
1786 int ret; 1781 int ret;
1787 1782
@@ -1799,7 +1794,7 @@ static int wm8903_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
1799 1794
1800static int wm8903_gpio_get(struct gpio_chip *chip, unsigned offset) 1795static int wm8903_gpio_get(struct gpio_chip *chip, unsigned offset)
1801{ 1796{
1802 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip); 1797 struct wm8903_priv *wm8903 = gpiochip_get_data(chip);
1803 unsigned int reg; 1798 unsigned int reg;
1804 1799
1805 regmap_read(wm8903->regmap, WM8903_GPIO_CONTROL_1 + offset, &reg); 1800 regmap_read(wm8903->regmap, WM8903_GPIO_CONTROL_1 + offset, &reg);
@@ -1810,7 +1805,7 @@ static int wm8903_gpio_get(struct gpio_chip *chip, unsigned offset)
1810static int wm8903_gpio_direction_out(struct gpio_chip *chip, 1805static int wm8903_gpio_direction_out(struct gpio_chip *chip,
1811 unsigned offset, int value) 1806 unsigned offset, int value)
1812{ 1807{
1813 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip); 1808 struct wm8903_priv *wm8903 = gpiochip_get_data(chip);
1814 unsigned int mask, val; 1809 unsigned int mask, val;
1815 int ret; 1810 int ret;
1816 1811
@@ -1828,7 +1823,7 @@ static int wm8903_gpio_direction_out(struct gpio_chip *chip,
1828 1823
1829static void wm8903_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 1824static void wm8903_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1830{ 1825{
1831 struct wm8903_priv *wm8903 = gpio_to_wm8903(chip); 1826 struct wm8903_priv *wm8903 = gpiochip_get_data(chip);
1832 1827
1833 regmap_update_bits(wm8903->regmap, WM8903_GPIO_CONTROL_1 + offset, 1828 regmap_update_bits(wm8903->regmap, WM8903_GPIO_CONTROL_1 + offset,
1834 WM8903_GP1_LVL_MASK, 1829 WM8903_GP1_LVL_MASK,
@@ -1860,7 +1855,7 @@ static void wm8903_init_gpio(struct wm8903_priv *wm8903)
1860 else 1855 else
1861 wm8903->gpio_chip.base = -1; 1856 wm8903->gpio_chip.base = -1;
1862 1857
1863 ret = gpiochip_add(&wm8903->gpio_chip); 1858 ret = gpiochip_add_data(&wm8903->gpio_chip, wm8903);
1864 if (ret != 0) 1859 if (ret != 0)
1865 dev_err(wm8903->dev, "Failed to add GPIOs: %d\n", ret); 1860 dev_err(wm8903->dev, "Failed to add GPIOs: %d\n", ret);
1866} 1861}
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 720a14e0687d..fc164d69a557 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -18,7 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/pm.h> 19#include <linux/pm.h>
20#include <linux/gcd.h> 20#include <linux/gcd.h>
21#include <linux/gpio.h> 21#include <linux/gpio/driver.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/input.h> 23#include <linux/input.h>
24#include <linux/pm_runtime.h> 24#include <linux/pm_runtime.h>
@@ -3307,14 +3307,9 @@ static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio)
3307} 3307}
3308 3308
3309#ifdef CONFIG_GPIOLIB 3309#ifdef CONFIG_GPIOLIB
3310static inline struct wm8962_priv *gpio_to_wm8962(struct gpio_chip *chip)
3311{
3312 return container_of(chip, struct wm8962_priv, gpio_chip);
3313}
3314
3315static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) 3310static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset)
3316{ 3311{
3317 struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); 3312 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3318 3313
3319 /* The WM8962 GPIOs aren't linearly numbered. For simplicity 3314 /* The WM8962 GPIOs aren't linearly numbered. For simplicity
3320 * we export linear numbers and error out if the unsupported 3315 * we export linear numbers and error out if the unsupported
@@ -3337,7 +3332,7 @@ static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset)
3337 3332
3338static void wm8962_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 3333static void wm8962_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
3339{ 3334{
3340 struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); 3335 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3341 struct snd_soc_codec *codec = wm8962->codec; 3336 struct snd_soc_codec *codec = wm8962->codec;
3342 3337
3343 snd_soc_update_bits(codec, WM8962_GPIO_BASE + offset, 3338 snd_soc_update_bits(codec, WM8962_GPIO_BASE + offset,
@@ -3347,7 +3342,7 @@ static void wm8962_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
3347static int wm8962_gpio_direction_out(struct gpio_chip *chip, 3342static int wm8962_gpio_direction_out(struct gpio_chip *chip,
3348 unsigned offset, int value) 3343 unsigned offset, int value)
3349{ 3344{
3350 struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); 3345 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3351 struct snd_soc_codec *codec = wm8962->codec; 3346 struct snd_soc_codec *codec = wm8962->codec;
3352 int ret, val; 3347 int ret, val;
3353 3348
@@ -3386,7 +3381,7 @@ static void wm8962_init_gpio(struct snd_soc_codec *codec)
3386 else 3381 else
3387 wm8962->gpio_chip.base = -1; 3382 wm8962->gpio_chip.base = -1;
3388 3383
3389 ret = gpiochip_add(&wm8962->gpio_chip); 3384 ret = gpiochip_add_data(&wm8962->gpio_chip, wm8962);
3390 if (ret != 0) 3385 if (ret != 0)
3391 dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret); 3386 dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret);
3392} 3387}
diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c
index f99b34f7647b..a73044251218 100644
--- a/sound/soc/codecs/wm8996.c
+++ b/sound/soc/codecs/wm8996.c
@@ -17,6 +17,7 @@
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/pm.h> 18#include <linux/pm.h>
19#include <linux/gcd.h> 19#include <linux/gcd.h>
20#include <linux/gpio/driver.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/i2c.h> 22#include <linux/i2c.h>
22#include <linux/regmap.h> 23#include <linux/regmap.h>
@@ -2139,14 +2140,9 @@ static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
2139} 2140}
2140 2141
2141#ifdef CONFIG_GPIOLIB 2142#ifdef CONFIG_GPIOLIB
2142static inline struct wm8996_priv *gpio_to_wm8996(struct gpio_chip *chip)
2143{
2144 return container_of(chip, struct wm8996_priv, gpio_chip);
2145}
2146
2147static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 2143static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
2148{ 2144{
2149 struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2145 struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2150 2146
2151 regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2147 regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset,
2152 WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); 2148 WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT);
@@ -2155,7 +2151,7 @@ static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
2155static int wm8996_gpio_direction_out(struct gpio_chip *chip, 2151static int wm8996_gpio_direction_out(struct gpio_chip *chip,
2156 unsigned offset, int value) 2152 unsigned offset, int value)
2157{ 2153{
2158 struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2154 struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2159 int val; 2155 int val;
2160 2156
2161 val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT); 2157 val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT);
@@ -2167,7 +2163,7 @@ static int wm8996_gpio_direction_out(struct gpio_chip *chip,
2167 2163
2168static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset) 2164static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset)
2169{ 2165{
2170 struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2166 struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2171 unsigned int reg; 2167 unsigned int reg;
2172 int ret; 2168 int ret;
2173 2169
@@ -2180,7 +2176,7 @@ static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset)
2180 2176
2181static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 2177static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
2182{ 2178{
2183 struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2179 struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2184 2180
2185 return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2181 return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset,
2186 WM8996_GP1_FN_MASK | WM8996_GP1_DIR, 2182 WM8996_GP1_FN_MASK | WM8996_GP1_DIR,
@@ -2211,7 +2207,7 @@ static void wm8996_init_gpio(struct wm8996_priv *wm8996)
2211 else 2207 else
2212 wm8996->gpio_chip.base = -1; 2208 wm8996->gpio_chip.base = -1;
2213 2209
2214 ret = gpiochip_add(&wm8996->gpio_chip); 2210 ret = gpiochip_add_data(&wm8996->gpio_chip, wm8996);
2215 if (ret != 0) 2211 if (ret != 0)
2216 dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret); 2212 dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret);
2217} 2213}
diff --git a/sound/soc/soc-ac97.c b/sound/soc/soc-ac97.c
index 7e0acd83b0e6..bc4a55bb3fd9 100644
--- a/sound/soc/soc-ac97.c
+++ b/sound/soc/soc-ac97.c
@@ -59,8 +59,7 @@ static void soc_ac97_device_release(struct device *dev)
59#ifdef CONFIG_GPIOLIB 59#ifdef CONFIG_GPIOLIB
60static inline struct snd_soc_codec *gpio_to_codec(struct gpio_chip *chip) 60static inline struct snd_soc_codec *gpio_to_codec(struct gpio_chip *chip)
61{ 61{
62 struct snd_ac97_gpio_priv *gpio_priv = 62 struct snd_ac97_gpio_priv *gpio_priv = gpiochip_get_data(chip);
63 container_of(chip, struct snd_ac97_gpio_priv, gpio_chip);
64 63
65 return gpio_priv->codec; 64 return gpio_priv->codec;
66} 65}
@@ -98,8 +97,7 @@ static int snd_soc_ac97_gpio_get(struct gpio_chip *chip, unsigned offset)
98static void snd_soc_ac97_gpio_set(struct gpio_chip *chip, unsigned offset, 97static void snd_soc_ac97_gpio_set(struct gpio_chip *chip, unsigned offset,
99 int value) 98 int value)
100{ 99{
101 struct snd_ac97_gpio_priv *gpio_priv = 100 struct snd_ac97_gpio_priv *gpio_priv = gpiochip_get_data(chip);
102 container_of(chip, struct snd_ac97_gpio_priv, gpio_chip);
103 struct snd_soc_codec *codec = gpio_to_codec(chip); 101 struct snd_soc_codec *codec = gpio_to_codec(chip);
104 102
105 gpio_priv->gpios_set &= ~(1 << offset); 103 gpio_priv->gpios_set &= ~(1 << offset);
@@ -145,7 +143,7 @@ static int snd_soc_ac97_init_gpio(struct snd_ac97 *ac97,
145 gpio_priv->gpio_chip.parent = codec->dev; 143 gpio_priv->gpio_chip.parent = codec->dev;
146 gpio_priv->gpio_chip.base = -1; 144 gpio_priv->gpio_chip.base = -1;
147 145
148 ret = gpiochip_add(&gpio_priv->gpio_chip); 146 ret = gpiochip_add_data(&gpio_priv->gpio_chip, gpio_priv);
149 if (ret != 0) 147 if (ret != 0)
150 dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret); 148 dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret);
151 return ret; 149 return ret;
diff --git a/tools/gpio/Makefile b/tools/gpio/Makefile
index 4d198d5c4203..c155d6bc47a7 100644
--- a/tools/gpio/Makefile
+++ b/tools/gpio/Makefile
@@ -1,5 +1,5 @@
1CC = $(CROSS_COMPILE)gcc 1CC = $(CROSS_COMPILE)gcc
2CFLAGS += -Wall -g -D_GNU_SOURCE 2CFLAGS += -O2 -Wall -g -D_GNU_SOURCE
3 3
4all: lsgpio 4all: lsgpio
5 5
diff --git a/tools/gpio/lsgpio.c b/tools/gpio/lsgpio.c
index 1124da375942..eb3f56efd215 100644
--- a/tools/gpio/lsgpio.c
+++ b/tools/gpio/lsgpio.c
@@ -147,7 +147,7 @@ void print_usage(void)
147 147
148int main(int argc, char **argv) 148int main(int argc, char **argv)
149{ 149{
150 const char *device_name; 150 const char *device_name = NULL;
151 int ret; 151 int ret;
152 int c; 152 int c;
153 153