aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-23 11:46:04 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-23 11:46:04 -0500
commit1ec5c1867af085897bb9e0f67bef3713334dbe7f (patch)
tree6d4fa09006a3a4a163fd357bc10da047207341cf
parentd5dee39b27201f9f5460eca55efcc91a663b738c (diff)
parent3498d8694d41af701c51289e7caf3ffefc7bfb6b (diff)
Merge tag 'gpio-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.11 cycle Core changes: - Augment fwnode_get_named_gpiod() to configure the GPIO pin immediately after requesting it like all other APIs do. This is a treewide change also updating all users. - Pass a GPIO label down to gpiod_request() from fwnode_get_named_gpiod(). This makes debugfs and the userspace ABI correctly reflect the current in-kernel consumer of a pin taken using this abstraction. This is a treewide change also updating all users. - Rename devm_get_gpiod_from_child() to devm_fwnode_get_gpiod_from_child() to reflect the fact that this function is operating on a fwnode object. This is a treewide change also updating all users. - Make it possible to take multiple GPIOs in a single hog of device tree hogs. - The refactorings switching GPIO chips to use the .set_config() callback using standard pin control properties and providing a backend into the pin control subsystem that were also merged into the pin control tree naturally appear here too. Testing instrumentation: - A whole slew of cleanups and improvements to the mockup GPIO driver. We now have an extended userspace test exercising the subsystem, and we can inject interrupts etc from userspace to fully test the core GPIO functionality. New drivers: - New driver for the Cortina Systems Gemini GPIO controller. - New driver for the Exar XR17V352/354/358 chips. - New driver for the ACCES PCI-IDIO-16 PCI GPIO card. Driver changes: - RCAR: set the irqchip parent device, add fine-grained runtime PM support. - pca953x: support optional RESET control line on the chip. - DaVinci: cleanups and simplifications. Add support for multiple instances. - .set_multiple() and naming of lines on more or less all of the ISA/PCI GPIO controllers. - mcp23s08: refactored to use regmap as a first step to further rewrites and modernizations" * tag 'gpio-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (61 commits) gpio: reintroduce devm_get_gpiod_from_child() gpio: pci-idio-16: Fix PCI BAR index gpio: pci-idio-16: Fix PCI device ID code gpio: mockup: implement event injecting over debugfs gpio: mockup: add a dummy irqchip gpio: mockup: implement naming the lines gpio: mockup: code shrink gpio: mockup: readability tweaks gpio: Add GPIO support for the ACCES PCI-IDIO-16 gpio: Add the devm_fwnode_get_index_gpiod_from_child() helper gpio: Rename devm_get_gpiod_from_child() gpio: mcp23s08: Select REGMAP/REGMAP_I2C to fix build error gpio: ws16c48: Add support for GPIO names gpio: gpio-mm: Add support for GPIO names gpio: 104-idio-16: Add support for GPIO names gpio: 104-idi-48: Add support for GPIO names gpio: 104-dio-48e: Add support for GPIO names gpio: ws16c48: Remove unnecessary driver_data set gpio: gpio-mm: Remove unnecessary driver_data set gpio: 104-idio-16: Remove unnecessary driver_data set ...
Diffstat
-rw-r--r--Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt24
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-pca953x.txt4
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio.txt8
-rw-r--r--Documentation/gpio/driver.txt55
-rw-r--r--MAINTAINERS6
-rw-r--r--drivers/gpio/Kconfig29
-rw-r--r--drivers/gpio/Makefile3
-rw-r--r--drivers/gpio/devres.c32
-rw-r--r--drivers/gpio/gpio-104-dio-48e.c91
-rw-r--r--drivers/gpio/gpio-104-idi-48.c45
-rw-r--r--drivers/gpio/gpio-104-idio-16.c60
-rw-r--r--drivers/gpio/gpio-davinci.c177
-rw-r--r--drivers/gpio/gpio-exar.c200
-rw-r--r--drivers/gpio/gpio-gemini.c236
-rw-r--r--drivers/gpio/gpio-gpio-mm.c68
-rw-r--r--drivers/gpio/gpio-intel-mid.c2
-rw-r--r--drivers/gpio/gpio-mcp23s08.c320
-rw-r--r--drivers/gpio/gpio-mm-lantiq.c2
-rw-r--r--drivers/gpio/gpio-mockup.c377
-rw-r--r--drivers/gpio/gpio-mvebu.c2
-rw-r--r--drivers/gpio/gpio-pca953x.c9
-rw-r--r--drivers/gpio/gpio-pci-idio-16.c349
-rw-r--r--drivers/gpio/gpio-rcar.c21
-rw-r--r--drivers/gpio/gpio-stp-xway.c2
-rw-r--r--drivers/gpio/gpio-ws16c48.c90
-rw-r--r--drivers/gpio/gpiolib-acpi.c5
-rw-r--r--drivers/gpio/gpiolib-of.c31
-rw-r--r--drivers/gpio/gpiolib.c55
-rw-r--r--drivers/gpio/gpiolib.h3
-rw-r--r--drivers/input/keyboard/gpio_keys.c12
-rw-r--r--drivers/input/keyboard/gpio_keys_polled.c14
-rw-r--r--drivers/leds/leds-gpio.c14
-rw-r--r--drivers/video/fbdev/amba-clcd-nomadik.c19
-rw-r--r--include/linux/gpio/consumer.h55
-rw-r--r--include/linux/platform_data/gpio-davinci.h15
-rw-r--r--tools/gpio/.gitignore4
-rw-r--r--tools/gpio/gpio-hammer.c2
37 files changed, 1842 insertions, 599 deletions
diff --git a/Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt b/Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt
new file mode 100644
index 000000000000..5c9246c054e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt
@@ -0,0 +1,24 @@
1Cortina Systems Gemini GPIO Controller
2
3Required properties:
4
5- compatible : Must be "cortina,gemini-gpio"
6- reg : Should contain registers location and length
7- interrupts : Should contain the interrupt line for the GPIO block
8- gpio-controller : marks this as a GPIO controller
9- #gpio-cells : Should be 2, see gpio/gpio.txt
10- interrupt-controller : marks this as an interrupt controller
11- #interrupt-cells : a standard two-cell interrupt flag, see
12 interrupt-controller/interrupts.txt
13
14Example:
15
16gpio@4d000000 {
17 compatible = "cortina,gemini-gpio";
18 reg = <0x4d000000 0x100>;
19 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
23 #interrupt-cells = <2>;
24};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
index 08dd15f89ba9..e63935710011 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
@@ -29,6 +29,10 @@ Required properties:
29 onsemi,pca9654 29 onsemi,pca9654
30 exar,xra1202 30 exar,xra1202
31 31
32Optional properties:
33 - reset-gpios: GPIO specification for the RESET input. This is an
34 active low signal to the PCA953x.
35
32Example: 36Example:
33 37
34 38
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index 68d28f62a6f4..84ede036f73d 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -187,10 +187,10 @@ gpio-controller's driver probe function.
187 187
188Each GPIO hog definition is represented as a child node of the GPIO controller. 188Each GPIO hog definition is represented as a child node of the GPIO controller.
189Required properties: 189Required properties:
190- gpio-hog: A property specifying that this child node represent a GPIO hog. 190- gpio-hog: A property specifying that this child node represents a GPIO hog.
191- gpios: Store the GPIO information (id, flags, ...). Shall contain the 191- gpios: Store the GPIO information (id, flags, ...) for each GPIO to
192 number of cells specified in its parent node (GPIO controller 192 affect. Shall contain an integer multiple of the number of cells
193 node). 193 specified in its parent node (GPIO controller node).
194Only one of the following properties scanned in the order shown below. 194Only one of the following properties scanned in the order shown below.
195This means that when multiple properties are present they will be searched 195This means that when multiple properties are present they will be searched
196in the order presented below and the first match is taken as the intended 196in the order presented below and the first match is taken as the intended
diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt
index ad8f0c0cd13f..fc1d2f83564d 100644
--- a/Documentation/gpio/driver.txt
+++ b/Documentation/gpio/driver.txt
@@ -41,34 +41,71 @@ In the gpiolib framework each GPIO controller is packaged as a "struct
41gpio_chip" (see linux/gpio/driver.h for its complete definition) with members 41gpio_chip" (see linux/gpio/driver.h for its complete definition) with members
42common to each controller of that type: 42common to each controller of that type:
43 43
44 - methods to establish GPIO direction 44 - methods to establish GPIO line direction
45 - methods used to access GPIO values 45 - methods used to access GPIO line values
46 - method to return the IRQ number associated to a given GPIO 46 - method to set electrical configuration to a a given GPIO line
47 - method to return the IRQ number associated to a given GPIO line
47 - flag saying whether calls to its methods may sleep 48 - flag saying whether calls to its methods may sleep
49 - optional line names array to identify lines
48 - optional debugfs dump method (showing extra state like pullup config) 50 - optional debugfs dump method (showing extra state like pullup config)
49 - optional base number (will be automatically assigned if omitted) 51 - optional base number (will be automatically assigned if omitted)
50 - label for diagnostics and GPIOs mapping using platform data 52 - optional label for diagnostics and GPIO chip mapping using platform data
51 53
52The code implementing a gpio_chip should support multiple instances of the 54The code implementing a gpio_chip should support multiple instances of the
53controller, possibly using the driver model. That code will configure each 55controller, possibly using the driver model. That code will configure each
54gpio_chip and issue gpiochip_add(). Removing a GPIO controller should be rare; 56gpio_chip and issue gpiochip_add[_data]() or devm_gpiochip_add_data().
55use gpiochip_remove() when it is unavoidable. 57Removing a GPIO controller should be rare; use [devm_]gpiochip_remove() when
58it is unavoidable.
56 59
57Most often a gpio_chip is part of an instance-specific structure with state not 60Often a gpio_chip is part of an instance-specific structure with states not
58exposed by the GPIO interfaces, such as addressing, power management, and more. 61exposed by the GPIO interfaces, such as addressing, power management, and more.
59Chips such as codecs will have complex non-GPIO state. 62Chips such as audio codecs will have complex non-GPIO states.
60 63
61Any debugfs dump method should normally ignore signals which haven't been 64Any debugfs dump method should normally ignore signals which haven't been
62requested as GPIOs. They can use gpiochip_is_requested(), which returns either 65requested as GPIOs. They can use gpiochip_is_requested(), which returns either
63NULL or the label associated with that GPIO when it was requested. 66NULL or the label associated with that GPIO when it was requested.
64 67
65RT_FULL: GPIO driver should not use spinlock_t or any sleepable APIs 68RT_FULL: the GPIO driver should not use spinlock_t or any sleepable APIs
66(like PM runtime) in its gpio_chip implementation (.get/.set and direction 69(like PM runtime) in its gpio_chip implementation (.get/.set and direction
67control callbacks) if it is expected to call GPIO APIs from atomic context 70control callbacks) if it is expected to call GPIO APIs from atomic context
68on -RT (inside hard IRQ handlers and similar contexts). Normally this should 71on -RT (inside hard IRQ handlers and similar contexts). Normally this should
69not be required. 72not be required.
70 73
71 74
75GPIO electrical configuration
76-----------------------------
77
78GPIOs can be configured for several electrical modes of operation by using the
79.set_config() callback. Currently this API supports setting debouncing and
80single-ended modes (open drain/open source). These settings are described
81below.
82
83The .set_config() callback uses the same enumerators and configuration
84semantics as the generic pin control drivers. This is not a coincidence: it is
85possible to assign the .set_config() to the function gpiochip_generic_config()
86which will result in pinctrl_gpio_set_config() being called and eventually
87ending up in the pin control back-end "behind" the GPIO controller, usually
88closer to the actual pins. This way the pin controller can manage the below
89listed GPIO configurations.
90
91
92GPIOs with debounce support
93---------------------------
94
95Debouncing is a configuration set to a pin indicating that it is connected to
96a mechanical switch or button, or similar that may bounce. Bouncing means the
97line is pulled high/low quickly at very short intervals for mechanical
98reasons. This can result in the value being unstable or irqs fireing repeatedly
99unless the line is debounced.
100
101Debouncing in practice involves setting up a timer when something happens on
102the line, wait a little while and then sample the line again, so see if it
103still has the same value (low or high). This could also be repeated by a clever
104state machine, waiting for a line to become stable. In either case, it sets
105a certain number of milliseconds for debouncing, or just "on/off" if that time
106is not configurable.
107
108
72GPIOs with open drain/source support 109GPIOs with open drain/source support
73------------------------------------ 110------------------------------------
74 111
diff --git a/MAINTAINERS b/MAINTAINERS
index bc004b0e686c..d461a94d2eb0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -265,6 +265,12 @@ L: linux-iio@vger.kernel.org
265S: Maintained 265S: Maintained
266F: drivers/iio/counter/104-quad-8.c 266F: drivers/iio/counter/104-quad-8.c
267 267
268ACCES PCI-IDIO-16 GPIO DRIVER
269M: William Breathitt Gray <vilhelm.gray@gmail.com>
270L: linux-gpio@vger.kernel.org
271S: Maintained
272F: drivers/gpio/gpio-pci-idio-16.c
273
268ACENIC DRIVER 274ACENIC DRIVER
269M: Jes Sorensen <jes@trained-monkey.org> 275M: Jes Sorensen <jes@trained-monkey.org>
270L: linux-acenic@sunsite.dk 276L: linux-acenic@sunsite.dk
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index d5d36549ecc1..05043071fc98 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -185,6 +185,13 @@ config GPIO_ETRAXFS
185 help 185 help
186 Say yes here to support the GPIO controller on Axis ETRAX FS SoCs. 186 Say yes here to support the GPIO controller on Axis ETRAX FS SoCs.
187 187
188config GPIO_EXAR
189 tristate "Support for GPIO pins on XR17V352/354/358"
190 depends on SERIAL_8250_EXAR
191 help
192 Selecting this option will enable handling of GPIO pins present
193 on Exar XR17V352/354/358 chips.
194
188config GPIO_GE_FPGA 195config GPIO_GE_FPGA
189 bool "GE FPGA based GPIO" 196 bool "GE FPGA based GPIO"
190 depends on GE_FPGA 197 depends on GE_FPGA
@@ -197,6 +204,15 @@ config GPIO_GE_FPGA
197 and write pin state) for GPIO implemented in a number of GE single 204 and write pin state) for GPIO implemented in a number of GE single
198 board computers. 205 board computers.
199 206
207config GPIO_GEMINI
208 bool "Gemini GPIO"
209 depends on ARCH_GEMINI
210 depends on OF_GPIO
211 select GPIO_GENERIC
212 select GPIOLIB_IRQCHIP
213 help
214 Support for common GPIOs found in Cortina systems Gemini platforms.
215
200config GPIO_GENERIC_PLATFORM 216config GPIO_GENERIC_PLATFORM
201 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)" 217 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
202 select GPIO_GENERIC 218 select GPIO_GENERIC
@@ -282,6 +298,8 @@ config GPIO_MOCKUP
282 tristate "GPIO Testing Driver" 298 tristate "GPIO Testing Driver"
283 depends on GPIOLIB && SYSFS 299 depends on GPIOLIB && SYSFS
284 select GPIO_SYSFS 300 select GPIO_SYSFS
301 select GPIOLIB_IRQCHIP
302 select IRQ_WORK
285 help 303 help
286 This enables GPIO Testing driver, which provides a way to test GPIO 304 This enables GPIO Testing driver, which provides a way to test GPIO
287 subsystem through sysfs(or char device) and debugfs. GPIO_SYSFS 305 subsystem through sysfs(or char device) and debugfs. GPIO_SYSFS
@@ -1141,6 +1159,15 @@ config GPIO_PCH
1141 ML7223/ML7831 is companion chip for Intel Atom E6xx series. 1159 ML7223/ML7831 is companion chip for Intel Atom E6xx series.
1142 ML7223/ML7831 is completely compatible for Intel EG20T PCH. 1160 ML7223/ML7831 is completely compatible for Intel EG20T PCH.
1143 1161
1162config GPIO_PCI_IDIO_16
1163 tristate "ACCES PCI-IDIO-16 GPIO support"
1164 select GPIOLIB_IRQCHIP
1165 help
1166 Enables GPIO support for the ACCES PCI-IDIO-16. An interrupt is
1167 generated when any of the inputs change state (low to high or high to
1168 low). Input filter control is not supported by this driver, and the
1169 input filters are deactivated by this driver.
1170
1144config GPIO_RDC321X 1171config GPIO_RDC321X
1145 tristate "RDC R-321x GPIO support" 1172 tristate "RDC R-321x GPIO support"
1146 select MFD_CORE 1173 select MFD_CORE
@@ -1197,6 +1224,8 @@ config GPIO_MCP23S08
1197 tristate "Microchip MCP23xxx I/O expander" 1224 tristate "Microchip MCP23xxx I/O expander"
1198 depends on OF_GPIO 1225 depends on OF_GPIO
1199 select GPIOLIB_IRQCHIP 1226 select GPIOLIB_IRQCHIP
1227 select REGMAP_I2C if I2C
1228 select REGMAP if SPI_MASTER
1200 help 1229 help
1201 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017 1230 SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017
1202 I/O expanders. 1231 I/O expanders.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index a7676b82de6f..becb96c724fe 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -46,8 +46,10 @@ obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o
46obj-$(CONFIG_GPIO_EM) += gpio-em.o 46obj-$(CONFIG_GPIO_EM) += gpio-em.o
47obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o 47obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
48obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etraxfs.o 48obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etraxfs.o
49obj-$(CONFIG_GPIO_EXAR) += gpio-exar.o
49obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o 50obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o
50obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o 51obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o
52obj-$(CONFIG_GPIO_GEMINI) += gpio-gemini.o
51obj-$(CONFIG_GPIO_GPIO_MM) += gpio-gpio-mm.o 53obj-$(CONFIG_GPIO_GPIO_MM) += gpio-gpio-mm.o
52obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o 54obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o
53obj-$(CONFIG_HTC_EGPIO) += gpio-htc-egpio.o 55obj-$(CONFIG_HTC_EGPIO) += gpio-htc-egpio.o
@@ -90,6 +92,7 @@ obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o
90obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o 92obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o
91obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o 93obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o
92obj-$(CONFIG_GPIO_PCH) += gpio-pch.o 94obj-$(CONFIG_GPIO_PCH) += gpio-pch.o
95obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-pci-idio-16.o
93obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o 96obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o
94obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o 97obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
95obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o 98obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
diff --git a/drivers/gpio/devres.c b/drivers/gpio/devres.c
index b760cbbb41d8..7031eea165c9 100644
--- a/drivers/gpio/devres.c
+++ b/drivers/gpio/devres.c
@@ -11,7 +11,7 @@
11 * 11 *
12 * This file is based on kernel/irq/devres.c 12 * This file is based on kernel/irq/devres.c
13 * 13 *
14 * Copyright (c) 2011 John Crispin <blogic@openwrt.org> 14 * Copyright (c) 2011 John Crispin <john@phrozen.org>
15 */ 15 */
16 16
17#include <linux/module.h> 17#include <linux/module.h>
@@ -21,6 +21,8 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/gfp.h> 22#include <linux/gfp.h>
23 23
24#include "gpiolib.h"
25
24static void devm_gpiod_release(struct device *dev, void *res) 26static void devm_gpiod_release(struct device *dev, void *res)
25{ 27{
26 struct gpio_desc **desc = res; 28 struct gpio_desc **desc = res;
@@ -123,19 +125,26 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
123EXPORT_SYMBOL(devm_gpiod_get_index); 125EXPORT_SYMBOL(devm_gpiod_get_index);
124 126
125/** 127/**
126 * devm_get_gpiod_from_child - get a GPIO descriptor from a device's child node 128 * devm_fwnode_get_index_gpiod_from_child - get a GPIO descriptor from a
129 * device's child node
127 * @dev: GPIO consumer 130 * @dev: GPIO consumer
128 * @con_id: function within the GPIO consumer 131 * @con_id: function within the GPIO consumer
132 * @index: index of the GPIO to obtain in the consumer
129 * @child: firmware node (child of @dev) 133 * @child: firmware node (child of @dev)
134 * @flags: GPIO initialization flags
130 * 135 *
131 * GPIO descriptors returned from this function are automatically disposed on 136 * GPIO descriptors returned from this function are automatically disposed on
132 * driver detach. 137 * driver detach.
138 *
139 * On successfull request the GPIO pin is configured in accordance with
140 * provided @flags.
133 */ 141 */
134struct gpio_desc *devm_get_gpiod_from_child(struct device *dev, 142struct gpio_desc *devm_fwnode_get_index_gpiod_from_child(struct device *dev,
135 const char *con_id, 143 const char *con_id, int index,
136 struct fwnode_handle *child) 144 struct fwnode_handle *child,
145 enum gpiod_flags flags,
146 const char *label)
137{ 147{
138 static const char * const suffixes[] = { "gpios", "gpio" };
139 char prop_name[32]; /* 32 is max size of property name */ 148 char prop_name[32]; /* 32 is max size of property name */
140 struct gpio_desc **dr; 149 struct gpio_desc **dr;
141 struct gpio_desc *desc; 150 struct gpio_desc *desc;
@@ -146,15 +155,16 @@ struct gpio_desc *devm_get_gpiod_from_child(struct device *dev,
146 if (!dr) 155 if (!dr)
147 return ERR_PTR(-ENOMEM); 156 return ERR_PTR(-ENOMEM);
148 157
149 for (i = 0; i < ARRAY_SIZE(suffixes); i++) { 158 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
150 if (con_id) 159 if (con_id)
151 snprintf(prop_name, sizeof(prop_name), "%s-%s", 160 snprintf(prop_name, sizeof(prop_name), "%s-%s",
152 con_id, suffixes[i]); 161 con_id, gpio_suffixes[i]);
153 else 162 else
154 snprintf(prop_name, sizeof(prop_name), "%s", 163 snprintf(prop_name, sizeof(prop_name), "%s",
155 suffixes[i]); 164 gpio_suffixes[i]);
156 165
157 desc = fwnode_get_named_gpiod(child, prop_name); 166 desc = fwnode_get_named_gpiod(child, prop_name, index, flags,
167 label);
158 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT)) 168 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
159 break; 169 break;
160 } 170 }
@@ -168,7 +178,7 @@ struct gpio_desc *devm_get_gpiod_from_child(struct device *dev,
168 178
169 return desc; 179 return desc;
170} 180}
171EXPORT_SYMBOL(devm_get_gpiod_from_child); 181EXPORT_SYMBOL(devm_fwnode_get_index_gpiod_from_child);
172 182
173/** 183/**
174 * devm_gpiod_get_index_optional - Resource-managed gpiod_get_index_optional() 184 * devm_gpiod_get_index_optional - Resource-managed gpiod_get_index_optional()
diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c
index fcf776971ca9..17bd2ab4ebe2 100644
--- a/drivers/gpio/gpio-104-dio-48e.c
+++ b/drivers/gpio/gpio-104-dio-48e.c
@@ -48,7 +48,6 @@ MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
48 * @control: Control registers state 48 * @control: Control registers state
49 * @lock: synchronization lock to prevent I/O race conditions 49 * @lock: synchronization lock to prevent I/O race conditions
50 * @base: base port address of the GPIO device 50 * @base: base port address of the GPIO device
51 * @irq: Interrupt line number
52 * @irq_mask: I/O bits affected by interrupts 51 * @irq_mask: I/O bits affected by interrupts
53 */ 52 */
54struct dio48e_gpio { 53struct dio48e_gpio {
@@ -58,7 +57,6 @@ struct dio48e_gpio {
58 unsigned char control[2]; 57 unsigned char control[2];
59 spinlock_t lock; 58 spinlock_t lock;
60 unsigned base; 59 unsigned base;
61 unsigned irq;
62 unsigned char irq_mask; 60 unsigned char irq_mask;
63}; 61};
64 62
@@ -204,6 +202,44 @@ static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
204 spin_unlock_irqrestore(&dio48egpio->lock, flags); 202 spin_unlock_irqrestore(&dio48egpio->lock, flags);
205} 203}
206 204
205static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
206 unsigned long *mask, unsigned long *bits)
207{
208 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
209 unsigned int i;
210 const unsigned int gpio_reg_size = 8;
211 unsigned int port;
212 unsigned int out_port;
213 unsigned int bitmask;
214 unsigned long flags;
215
216 /* set bits are evaluated a gpio register size at a time */
217 for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
218 /* no more set bits in this mask word; skip to the next word */
219 if (!mask[BIT_WORD(i)]) {
220 i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
221 continue;
222 }
223
224 port = i / gpio_reg_size;
225 out_port = (port > 2) ? port + 1 : port;
226 bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)];
227
228 spin_lock_irqsave(&dio48egpio->lock, flags);
229
230 /* update output state data and set device gpio register */
231 dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)];
232 dio48egpio->out_state[port] |= bitmask;
233 outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
234
235 spin_unlock_irqrestore(&dio48egpio->lock, flags);
236
237 /* prepare for next gpio register set */
238 mask[BIT_WORD(i)] >>= gpio_reg_size;
239 bits[BIT_WORD(i)] >>= gpio_reg_size;
240 }
241}
242
207static void dio48e_irq_ack(struct irq_data *data) 243static void dio48e_irq_ack(struct irq_data *data)
208{ 244{
209} 245}
@@ -302,6 +338,26 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
302 return IRQ_HANDLED; 338 return IRQ_HANDLED;
303} 339}
304 340
341#define DIO48E_NGPIO 48
342static const char *dio48e_names[DIO48E_NGPIO] = {
343 "PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2",
344 "PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5",
345 "PPI Group 0 Port A 6", "PPI Group 0 Port A 7", "PPI Group 0 Port B 0",
346 "PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3",
347 "PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6",
348 "PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1",
349 "PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4",
350 "PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7",
351 "PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2",
352 "PPI Group 1 Port A 3", "PPI Group 1 Port A 4", "PPI Group 1 Port A 5",
353 "PPI Group 1 Port A 6", "PPI Group 1 Port A 7", "PPI Group 1 Port B 0",
354 "PPI Group 1 Port B 1", "PPI Group 1 Port B 2", "PPI Group 1 Port B 3",
355 "PPI Group 1 Port B 4", "PPI Group 1 Port B 5", "PPI Group 1 Port B 6",
356 "PPI Group 1 Port B 7", "PPI Group 1 Port C 0", "PPI Group 1 Port C 1",
357 "PPI Group 1 Port C 2", "PPI Group 1 Port C 3", "PPI Group 1 Port C 4",
358 "PPI Group 1 Port C 5", "PPI Group 1 Port C 6", "PPI Group 1 Port C 7"
359};
360
305static int dio48e_probe(struct device *dev, unsigned int id) 361static int dio48e_probe(struct device *dev, unsigned int id)
306{ 362{
307 struct dio48e_gpio *dio48egpio; 363 struct dio48e_gpio *dio48egpio;
@@ -322,20 +378,19 @@ static int dio48e_probe(struct device *dev, unsigned int id)
322 dio48egpio->chip.parent = dev; 378 dio48egpio->chip.parent = dev;
323 dio48egpio->chip.owner = THIS_MODULE; 379 dio48egpio->chip.owner = THIS_MODULE;
324 dio48egpio->chip.base = -1; 380 dio48egpio->chip.base = -1;
325 dio48egpio->chip.ngpio = 48; 381 dio48egpio->chip.ngpio = DIO48E_NGPIO;
382 dio48egpio->chip.names = dio48e_names;
326 dio48egpio->chip.get_direction = dio48e_gpio_get_direction; 383 dio48egpio->chip.get_direction = dio48e_gpio_get_direction;
327 dio48egpio->chip.direction_input = dio48e_gpio_direction_input; 384 dio48egpio->chip.direction_input = dio48e_gpio_direction_input;
328 dio48egpio->chip.direction_output = dio48e_gpio_direction_output; 385 dio48egpio->chip.direction_output = dio48e_gpio_direction_output;
329 dio48egpio->chip.get = dio48e_gpio_get; 386 dio48egpio->chip.get = dio48e_gpio_get;
330 dio48egpio->chip.set = dio48e_gpio_set; 387 dio48egpio->chip.set = dio48e_gpio_set;
388 dio48egpio->chip.set_multiple = dio48e_gpio_set_multiple;
331 dio48egpio->base = base[id]; 389 dio48egpio->base = base[id];
332 dio48egpio->irq = irq[id];
333 390
334 spin_lock_init(&dio48egpio->lock); 391 spin_lock_init(&dio48egpio->lock);
335 392
336 dev_set_drvdata(dev, dio48egpio); 393 err = devm_gpiochip_add_data(dev, &dio48egpio->chip, dio48egpio);
337
338 err = gpiochip_add_data(&dio48egpio->chip, dio48egpio);
339 if (err) { 394 if (err) {
340 dev_err(dev, "GPIO registering failed (%d)\n", err); 395 dev_err(dev, "GPIO registering failed (%d)\n", err);
341 return err; 396 return err;
@@ -360,30 +415,17 @@ static int dio48e_probe(struct device *dev, unsigned int id)
360 handle_edge_irq, IRQ_TYPE_NONE); 415 handle_edge_irq, IRQ_TYPE_NONE);
361 if (err) { 416 if (err) {
362 dev_err(dev, "Could not add irqchip (%d)\n", err); 417 dev_err(dev, "Could not add irqchip (%d)\n", err);
363 goto err_gpiochip_remove; 418 return err;
364 } 419 }
365 420
366 err = request_irq(irq[id], dio48e_irq_handler, 0, name, dio48egpio); 421 err = devm_request_irq(dev, irq[id], dio48e_irq_handler, 0, name,
422 dio48egpio);
367 if (err) { 423 if (err) {
368 dev_err(dev, "IRQ handler registering failed (%d)\n", err); 424 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
369 goto err_gpiochip_remove; 425 return err;
370 } 426 }
371 427
372 return 0; 428 return 0;
373
374err_gpiochip_remove:
375 gpiochip_remove(&dio48egpio->chip);
376 return err;
377}
378
379static int dio48e_remove(struct device *dev, unsigned int id)
380{
381 struct dio48e_gpio *const dio48egpio = dev_get_drvdata(dev);
382
383 free_irq(dio48egpio->irq, dio48egpio);
384 gpiochip_remove(&dio48egpio->chip);
385
386 return 0;
387} 429}
388 430
389static struct isa_driver dio48e_driver = { 431static struct isa_driver dio48e_driver = {
@@ -391,7 +433,6 @@ static struct isa_driver dio48e_driver = {
391 .driver = { 433 .driver = {
392 .name = "104-dio-48e" 434 .name = "104-dio-48e"
393 }, 435 },
394 .remove = dio48e_remove
395}; 436};
396module_isa_driver(dio48e_driver, num_dio48e); 437module_isa_driver(dio48e_driver, num_dio48e);
397 438
diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c
index 2d2763ea1a68..568375a7ebc2 100644
--- a/drivers/gpio/gpio-104-idi-48.c
+++ b/drivers/gpio/gpio-104-idi-48.c
@@ -47,7 +47,6 @@ MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers");
47 * @ack_lock: synchronization lock to prevent IRQ handler race conditions 47 * @ack_lock: synchronization lock to prevent IRQ handler race conditions
48 * @irq_mask: input bits affected by interrupts 48 * @irq_mask: input bits affected by interrupts
49 * @base: base port address of the GPIO device 49 * @base: base port address of the GPIO device
50 * @irq: Interrupt line number
51 * @cos_enb: Change-Of-State IRQ enable boundaries mask 50 * @cos_enb: Change-Of-State IRQ enable boundaries mask
52 */ 51 */
53struct idi_48_gpio { 52struct idi_48_gpio {
@@ -56,7 +55,6 @@ struct idi_48_gpio {
56 spinlock_t ack_lock; 55 spinlock_t ack_lock;
57 unsigned char irq_mask[6]; 56 unsigned char irq_mask[6];
58 unsigned base; 57 unsigned base;
59 unsigned irq;
60 unsigned char cos_enb; 58 unsigned char cos_enb;
61}; 59};
62 60
@@ -219,6 +217,18 @@ static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
219 return IRQ_HANDLED; 217 return IRQ_HANDLED;
220} 218}
221 219
220#define IDI48_NGPIO 48
221static const char *idi48_names[IDI48_NGPIO] = {
222 "Bit 0 A", "Bit 1 A", "Bit 2 A", "Bit 3 A", "Bit 4 A", "Bit 5 A",
223 "Bit 6 A", "Bit 7 A", "Bit 8 A", "Bit 9 A", "Bit 10 A", "Bit 11 A",
224 "Bit 12 A", "Bit 13 A", "Bit 14 A", "Bit 15 A", "Bit 16 A", "Bit 17 A",
225 "Bit 18 A", "Bit 19 A", "Bit 20 A", "Bit 21 A", "Bit 22 A", "Bit 23 A",
226 "Bit 0 B", "Bit 1 B", "Bit 2 B", "Bit 3 B", "Bit 4 B", "Bit 5 B",
227 "Bit 6 B", "Bit 7 B", "Bit 8 B", "Bit 9 B", "Bit 10 B", "Bit 11 B",
228 "Bit 12 B", "Bit 13 B", "Bit 14 B", "Bit 15 B", "Bit 16 B", "Bit 17 B",
229 "Bit 18 B", "Bit 19 B", "Bit 20 B", "Bit 21 B", "Bit 22 B", "Bit 23 B"
230};
231
222static int idi_48_probe(struct device *dev, unsigned int id) 232static int idi_48_probe(struct device *dev, unsigned int id)
223{ 233{
224 struct idi_48_gpio *idi48gpio; 234 struct idi_48_gpio *idi48gpio;
@@ -239,19 +249,17 @@ static int idi_48_probe(struct device *dev, unsigned int id)
239 idi48gpio->chip.parent = dev; 249 idi48gpio->chip.parent = dev;
240 idi48gpio->chip.owner = THIS_MODULE; 250 idi48gpio->chip.owner = THIS_MODULE;
241 idi48gpio->chip.base = -1; 251 idi48gpio->chip.base = -1;
242 idi48gpio->chip.ngpio = 48; 252 idi48gpio->chip.ngpio = IDI48_NGPIO;
253 idi48gpio->chip.names = idi48_names;
243 idi48gpio->chip.get_direction = idi_48_gpio_get_direction; 254 idi48gpio->chip.get_direction = idi_48_gpio_get_direction;
244 idi48gpio->chip.direction_input = idi_48_gpio_direction_input; 255 idi48gpio->chip.direction_input = idi_48_gpio_direction_input;
245 idi48gpio->chip.get = idi_48_gpio_get; 256 idi48gpio->chip.get = idi_48_gpio_get;
246 idi48gpio->base = base[id]; 257 idi48gpio->base = base[id];
247 idi48gpio->irq = irq[id];
248 258
249 spin_lock_init(&idi48gpio->lock); 259 spin_lock_init(&idi48gpio->lock);
250 spin_lock_init(&idi48gpio->ack_lock); 260 spin_lock_init(&idi48gpio->ack_lock);
251 261
252 dev_set_drvdata(dev, idi48gpio); 262 err = devm_gpiochip_add_data(dev, &idi48gpio->chip, idi48gpio);
253
254 err = gpiochip_add_data(&idi48gpio->chip, idi48gpio);
255 if (err) { 263 if (err) {
256 dev_err(dev, "GPIO registering failed (%d)\n", err); 264 dev_err(dev, "GPIO registering failed (%d)\n", err);
257 return err; 265 return err;
@@ -265,31 +273,17 @@ static int idi_48_probe(struct device *dev, unsigned int id)
265 handle_edge_irq, IRQ_TYPE_NONE); 273 handle_edge_irq, IRQ_TYPE_NONE);
266 if (err) { 274 if (err) {
267 dev_err(dev, "Could not add irqchip (%d)\n", err); 275 dev_err(dev, "Could not add irqchip (%d)\n", err);
268 goto err_gpiochip_remove; 276 return err;
269 } 277 }
270 278
271 err = request_irq(irq[id], idi_48_irq_handler, IRQF_SHARED, name, 279 err = devm_request_irq(dev, irq[id], idi_48_irq_handler, IRQF_SHARED,
272 idi48gpio); 280 name, idi48gpio);
273 if (err) { 281 if (err) {
274 dev_err(dev, "IRQ handler registering failed (%d)\n", err); 282 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
275 goto err_gpiochip_remove; 283 return err;
276 } 284 }
277 285
278 return 0; 286 return 0;
279
280err_gpiochip_remove:
281 gpiochip_remove(&idi48gpio->chip);
282 return err;
283}
284
285static int idi_48_remove(struct device *dev, unsigned int id)
286{
287 struct idi_48_gpio *const idi48gpio = dev_get_drvdata(dev);
288
289 free_irq(idi48gpio->irq, idi48gpio);
290 gpiochip_remove(&idi48gpio->chip);
291
292 return 0;
293} 287}
294 288
295static struct isa_driver idi_48_driver = { 289static struct isa_driver idi_48_driver = {
@@ -297,7 +291,6 @@ static struct isa_driver idi_48_driver = {
297 .driver = { 291 .driver = {
298 .name = "104-idi-48" 292 .name = "104-idi-48"
299 }, 293 },
300 .remove = idi_48_remove
301}; 294};
302module_isa_driver(idi_48_driver, num_idi_48); 295module_isa_driver(idi_48_driver, num_idi_48);
303 296
diff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-16.c
index 6787b8fcf0d8..7053cf736648 100644
--- a/drivers/gpio/gpio-104-idio-16.c
+++ b/drivers/gpio/gpio-104-idio-16.c
@@ -46,7 +46,6 @@ MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers");
46 * @lock: synchronization lock to prevent I/O race conditions 46 * @lock: synchronization lock to prevent I/O race conditions
47 * @irq_mask: I/O bits affected by interrupts 47 * @irq_mask: I/O bits affected by interrupts
48 * @base: base port address of the GPIO device 48 * @base: base port address of the GPIO device
49 * @irq: Interrupt line number
50 * @out_state: output bits state 49 * @out_state: output bits state
51 */ 50 */
52struct idio_16_gpio { 51struct idio_16_gpio {
@@ -54,7 +53,6 @@ struct idio_16_gpio {
54 spinlock_t lock; 53 spinlock_t lock;
55 unsigned long irq_mask; 54 unsigned long irq_mask;
56 unsigned base; 55 unsigned base;
57 unsigned irq;
58 unsigned out_state; 56 unsigned out_state;
59}; 57};
60 58
@@ -116,6 +114,25 @@ static void idio_16_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
116 spin_unlock_irqrestore(&idio16gpio->lock, flags); 114 spin_unlock_irqrestore(&idio16gpio->lock, flags);
117} 115}
118 116
117static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
118 unsigned long *mask, unsigned long *bits)
119{
120 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
121 unsigned long flags;
122
123 spin_lock_irqsave(&idio16gpio->lock, flags);
124
125 idio16gpio->out_state &= ~*mask;
126 idio16gpio->out_state |= *mask & *bits;
127
128 if (*mask & 0xFF)
129 outb(idio16gpio->out_state, idio16gpio->base);
130 if ((*mask >> 8) & 0xFF)
131 outb(idio16gpio->out_state >> 8, idio16gpio->base + 4);
132
133 spin_unlock_irqrestore(&idio16gpio->lock, flags);
134}
135
119static void idio_16_irq_ack(struct irq_data *data) 136static void idio_16_irq_ack(struct irq_data *data)
120{ 137{
121} 138}
@@ -193,6 +210,14 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
193 return IRQ_HANDLED; 210 return IRQ_HANDLED;
194} 211}
195 212
213#define IDIO_16_NGPIO 32
214static const char *idio_16_names[IDIO_16_NGPIO] = {
215 "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7",
216 "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15",
217 "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7",
218 "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15"
219};
220
196static int idio_16_probe(struct device *dev, unsigned int id) 221static int idio_16_probe(struct device *dev, unsigned int id)
197{ 222{
198 struct idio_16_gpio *idio16gpio; 223 struct idio_16_gpio *idio16gpio;
@@ -213,21 +238,20 @@ static int idio_16_probe(struct device *dev, unsigned int id)
213 idio16gpio->chip.parent = dev; 238 idio16gpio->chip.parent = dev;
214 idio16gpio->chip.owner = THIS_MODULE; 239 idio16gpio->chip.owner = THIS_MODULE;
215 idio16gpio->chip.base = -1; 240 idio16gpio->chip.base = -1;
216 idio16gpio->chip.ngpio = 32; 241 idio16gpio->chip.ngpio = IDIO_16_NGPIO;
242 idio16gpio->chip.names = idio_16_names;
217 idio16gpio->chip.get_direction = idio_16_gpio_get_direction; 243 idio16gpio->chip.get_direction = idio_16_gpio_get_direction;
218 idio16gpio->chip.direction_input = idio_16_gpio_direction_input; 244 idio16gpio->chip.direction_input = idio_16_gpio_direction_input;
219 idio16gpio->chip.direction_output = idio_16_gpio_direction_output; 245 idio16gpio->chip.direction_output = idio_16_gpio_direction_output;
220 idio16gpio->chip.get = idio_16_gpio_get; 246 idio16gpio->chip.get = idio_16_gpio_get;
221 idio16gpio->chip.set = idio_16_gpio_set; 247 idio16gpio->chip.set = idio_16_gpio_set;
248 idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple;
222 idio16gpio->base = base[id]; 249 idio16gpio->base = base[id];
223 idio16gpio->irq = irq[id];
224 idio16gpio->out_state = 0xFFFF; 250 idio16gpio->out_state = 0xFFFF;
225 251
226 spin_lock_init(&idio16gpio->lock); 252 spin_lock_init(&idio16gpio->lock);
227 253
228 dev_set_drvdata(dev, idio16gpio); 254 err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio);
229
230 err = gpiochip_add_data(&idio16gpio->chip, idio16gpio);
231 if (err) { 255 if (err) {
232 dev_err(dev, "GPIO registering failed (%d)\n", err); 256 dev_err(dev, "GPIO registering failed (%d)\n", err);
233 return err; 257 return err;
@@ -241,30 +265,17 @@ static int idio_16_probe(struct device *dev, unsigned int id)
241 handle_edge_irq, IRQ_TYPE_NONE); 265 handle_edge_irq, IRQ_TYPE_NONE);
242 if (err) { 266 if (err) {
243 dev_err(dev, "Could not add irqchip (%d)\n", err); 267 dev_err(dev, "Could not add irqchip (%d)\n", err);
244 goto err_gpiochip_remove; 268 return err;
245 } 269 }
246 270
247 err = request_irq(irq[id], idio_16_irq_handler, 0, name, idio16gpio); 271 err = devm_request_irq(dev, irq[id], idio_16_irq_handler, 0, name,
272 idio16gpio);
248 if (err) { 273 if (err) {
249 dev_err(dev, "IRQ handler registering failed (%d)\n", err); 274 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
250 goto err_gpiochip_remove; 275 return err;
251 } 276 }
252 277
253 return 0; 278 return 0;
254
255err_gpiochip_remove:
256 gpiochip_remove(&idio16gpio->chip);
257 return err;
258}
259
260static int idio_16_remove(struct device *dev, unsigned int id)
261{
262 struct idio_16_gpio *const idio16gpio = dev_get_drvdata(dev);
263
264 free_irq(idio16gpio->irq, idio16gpio);
265 gpiochip_remove(&idio16gpio->chip);
266
267 return 0;
268} 279}
269 280
270static struct isa_driver idio_16_driver = { 281static struct isa_driver idio_16_driver = {
@@ -272,7 +283,6 @@ static struct isa_driver idio_16_driver = {
272 .driver = { 283 .driver = {
273 .name = "104-idio-16" 284 .name = "104-idio-16"
274 }, 285 },
275 .remove = idio_16_remove
276}; 286};
277 287
278module_isa_driver(idio_16_driver, num_idio_16); 288module_isa_driver(idio_16_driver, num_idio_16);
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 9191056548fe..72f49d1e110d 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -43,25 +43,7 @@ typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
43#define MAX_LABEL_SIZE 20 43#define MAX_LABEL_SIZE 20
44 44
45static void __iomem *gpio_base; 45static void __iomem *gpio_base;
46 46static unsigned int offset_array[5] = {0x10, 0x38, 0x60, 0x88, 0xb0};
47static struct davinci_gpio_regs __iomem *gpio2regs(unsigned gpio)
48{
49 void __iomem *ptr;
50
51 if (gpio < 32 * 1)
52 ptr = gpio_base + 0x10;
53 else if (gpio < 32 * 2)
54 ptr = gpio_base + 0x38;
55 else if (gpio < 32 * 3)
56 ptr = gpio_base + 0x60;
57 else if (gpio < 32 * 4)
58 ptr = gpio_base + 0x88;
59 else if (gpio < 32 * 5)
60 ptr = gpio_base + 0xb0;
61 else
62 ptr = NULL;
63 return ptr;
64}
65 47
66static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d) 48static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d)
67{ 49{
@@ -81,11 +63,13 @@ static inline int __davinci_direction(struct gpio_chip *chip,
81 unsigned offset, bool out, int value) 63 unsigned offset, bool out, int value)
82{ 64{
83 struct davinci_gpio_controller *d = gpiochip_get_data(chip); 65 struct davinci_gpio_controller *d = gpiochip_get_data(chip);
84 struct davinci_gpio_regs __iomem *g = d->regs; 66 struct davinci_gpio_regs __iomem *g;
85 unsigned long flags; 67 unsigned long flags;
86 u32 temp; 68 u32 temp;
87 u32 mask = 1 << offset; 69 int bank = offset / 32;
70 u32 mask = __gpio_mask(offset);
88 71
72 g = d->regs[bank];
89 spin_lock_irqsave(&d->lock, flags); 73 spin_lock_irqsave(&d->lock, flags);
90 temp = readl_relaxed(&g->dir); 74 temp = readl_relaxed(&g->dir);
91 if (out) { 75 if (out) {
@@ -121,9 +105,12 @@ davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
121static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) 105static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
122{ 106{
123 struct davinci_gpio_controller *d = gpiochip_get_data(chip); 107 struct davinci_gpio_controller *d = gpiochip_get_data(chip);
124 struct davinci_gpio_regs __iomem *g = d->regs; 108 struct davinci_gpio_regs __iomem *g;
109 int bank = offset / 32;
125 110
126 return !!((1 << offset) & readl_relaxed(&g->in_data)); 111 g = d->regs[bank];
112
113 return !!(__gpio_mask(offset) & readl_relaxed(&g->in_data));
127} 114}
128 115
129/* 116/*
@@ -133,9 +120,13 @@ static void
133davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 120davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
134{ 121{
135 struct davinci_gpio_controller *d = gpiochip_get_data(chip); 122 struct davinci_gpio_controller *d = gpiochip_get_data(chip);
136 struct davinci_gpio_regs __iomem *g = d->regs; 123 struct davinci_gpio_regs __iomem *g;
124 int bank = offset / 32;
137 125
138 writel_relaxed((1 << offset), value ? &g->set_data : &g->clr_data); 126 g = d->regs[bank];
127
128 writel_relaxed(__gpio_mask(offset),
129 value ? &g->set_data : &g->clr_data);
139} 130}
140 131
141static struct davinci_gpio_platform_data * 132static struct davinci_gpio_platform_data *
@@ -172,34 +163,13 @@ of_err:
172 return NULL; 163 return NULL;
173} 164}
174 165
175#ifdef CONFIG_OF_GPIO
176static int davinci_gpio_of_xlate(struct gpio_chip *gc,
177 const struct of_phandle_args *gpiospec,
178 u32 *flags)
179{
180 struct davinci_gpio_controller *chips = dev_get_drvdata(gc->parent);
181 struct davinci_gpio_platform_data *pdata = dev_get_platdata(gc->parent);
182
183 if (gpiospec->args[0] > pdata->ngpio)
184 return -EINVAL;
185
186 if (gc != &chips[gpiospec->args[0] / 32].chip)
187 return -EINVAL;
188
189 if (flags)
190 *flags = gpiospec->args[1];
191
192 return gpiospec->args[0] % 32;
193}
194#endif
195
196static int davinci_gpio_probe(struct platform_device *pdev) 166static int davinci_gpio_probe(struct platform_device *pdev)
197{ 167{
198 int i, base; 168 static int ctrl_num, bank_base;
169 int gpio, bank;
199 unsigned ngpio, nbank; 170 unsigned ngpio, nbank;
200 struct davinci_gpio_controller *chips; 171 struct davinci_gpio_controller *chips;
201 struct davinci_gpio_platform_data *pdata; 172 struct davinci_gpio_platform_data *pdata;
202 struct davinci_gpio_regs __iomem *regs;
203 struct device *dev = &pdev->dev; 173 struct device *dev = &pdev->dev;
204 struct resource *res; 174 struct resource *res;
205 char label[MAX_LABEL_SIZE]; 175 char label[MAX_LABEL_SIZE];
@@ -238,41 +208,31 @@ static int davinci_gpio_probe(struct platform_device *pdev)
238 if (IS_ERR(gpio_base)) 208 if (IS_ERR(gpio_base))
239 return PTR_ERR(gpio_base); 209 return PTR_ERR(gpio_base);
240 210
241 for (i = 0, base = 0; base < ngpio; i++, base += 32) { 211 snprintf(label, MAX_LABEL_SIZE, "davinci_gpio.%d", ctrl_num++);
242 snprintf(label, MAX_LABEL_SIZE, "davinci_gpio.%d", i); 212 chips->chip.label = devm_kstrdup(dev, label, GFP_KERNEL);
243 chips[i].chip.label = devm_kstrdup(dev, label, GFP_KERNEL); 213 if (!chips->chip.label)
244 if (!chips[i].chip.label)
245 return -ENOMEM; 214 return -ENOMEM;
246 215
247 chips[i].chip.direction_input = davinci_direction_in; 216 chips->chip.direction_input = davinci_direction_in;
248 chips[i].chip.get = davinci_gpio_get; 217 chips->chip.get = davinci_gpio_get;
249 chips[i].chip.direction_output = davinci_direction_out; 218 chips->chip.direction_output = davinci_direction_out;
250 chips[i].chip.set = davinci_gpio_set; 219 chips->chip.set = davinci_gpio_set;
251 220
252 chips[i].chip.base = base; 221 chips->chip.ngpio = ngpio;
253 chips[i].chip.ngpio = ngpio - base; 222 chips->chip.base = bank_base;
254 if (chips[i].chip.ngpio > 32)
255 chips[i].chip.ngpio = 32;
256 223
257#ifdef CONFIG_OF_GPIO 224#ifdef CONFIG_OF_GPIO
258 chips[i].chip.of_gpio_n_cells = 2; 225 chips->chip.of_gpio_n_cells = 2;
259 chips[i].chip.of_xlate = davinci_gpio_of_xlate; 226 chips->chip.parent = dev;
260 chips[i].chip.parent = dev; 227 chips->chip.of_node = dev->of_node;
261 chips[i].chip.of_node = dev->of_node;
262#endif 228#endif
263 spin_lock_init(&chips[i].lock); 229 spin_lock_init(&chips->lock);
264 230 bank_base += ngpio;
265 regs = gpio2regs(base);
266 if (!regs)
267 return -ENXIO;
268 chips[i].regs = regs;
269 chips[i].set_data = &regs->set_data;
270 chips[i].clr_data = &regs->clr_data;
271 chips[i].in_data = &regs->in_data;
272 231
273 gpiochip_add_data(&chips[i].chip, &chips[i]); 232 for (gpio = 0, bank = 0; gpio < ngpio; gpio += 32, bank++)
274 } 233 chips->regs[bank] = gpio_base + offset_array[bank];
275 234
235 gpiochip_add_data(&chips->chip, chips);
276 platform_set_drvdata(pdev, chips); 236 platform_set_drvdata(pdev, chips);
277 davinci_gpio_irq_setup(pdev); 237 davinci_gpio_irq_setup(pdev);
278 return 0; 238 return 0;
@@ -333,16 +293,19 @@ static struct irq_chip gpio_irqchip = {
333 293
334static void gpio_irq_handler(struct irq_desc *desc) 294static void gpio_irq_handler(struct irq_desc *desc)
335{ 295{
336 unsigned int irq = irq_desc_get_irq(desc);
337 struct davinci_gpio_regs __iomem *g; 296 struct davinci_gpio_regs __iomem *g;
338 u32 mask = 0xffff; 297 u32 mask = 0xffff;
298 int bank_num;
339 struct davinci_gpio_controller *d; 299 struct davinci_gpio_controller *d;
300 struct davinci_gpio_irq_data *irqdata;
340 301
341 d = (struct davinci_gpio_controller *)irq_desc_get_handler_data(desc); 302 irqdata = (struct davinci_gpio_irq_data *)irq_desc_get_handler_data(desc);
342 g = (struct davinci_gpio_regs __iomem *)d->regs; 303 bank_num = irqdata->bank_num;
304 g = irqdata->regs;
305 d = irqdata->chip;
343 306
344 /* we only care about one bank */ 307 /* we only care about one bank */
345 if (irq & 1) 308 if ((bank_num % 2) == 1)
346 mask <<= 16; 309 mask <<= 16;
347 310
348 /* temporarily mask (level sensitive) parent IRQ */ 311 /* temporarily mask (level sensitive) parent IRQ */
@@ -350,6 +313,7 @@ static void gpio_irq_handler(struct irq_desc *desc)
350 while (1) { 313 while (1) {
351 u32 status; 314 u32 status;
352 int bit; 315 int bit;
316 irq_hw_number_t hw_irq;
353 317
354 /* ack any irqs */ 318 /* ack any irqs */
355 status = readl_relaxed(&g->intstat) & mask; 319 status = readl_relaxed(&g->intstat) & mask;
@@ -362,9 +326,13 @@ static void gpio_irq_handler(struct irq_desc *desc)
362 while (status) { 326 while (status) {
363 bit = __ffs(status); 327 bit = __ffs(status);
364 status &= ~BIT(bit); 328 status &= ~BIT(bit);
329 /* Max number of gpios per controller is 144 so
330 * hw_irq will be in [0..143]
331 */
332 hw_irq = (bank_num / 2) * 32 + bit;
333
365 generic_handle_irq( 334 generic_handle_irq(
366 irq_find_mapping(d->irq_domain, 335 irq_find_mapping(d->irq_domain, hw_irq));
367 d->chip.base + bit));
368 } 336 }
369 } 337 }
370 chained_irq_exit(irq_desc_get_chip(desc), desc); 338 chained_irq_exit(irq_desc_get_chip(desc), desc);
@@ -376,7 +344,7 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
376 struct davinci_gpio_controller *d = gpiochip_get_data(chip); 344 struct davinci_gpio_controller *d = gpiochip_get_data(chip);
377 345
378 if (d->irq_domain) 346 if (d->irq_domain)
379 return irq_create_mapping(d->irq_domain, d->chip.base + offset); 347 return irq_create_mapping(d->irq_domain, offset);
380 else 348 else
381 return -ENXIO; 349 return -ENXIO;
382} 350}
@@ -390,7 +358,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
390 * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). 358 * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs).
391 */ 359 */
392 if (offset < d->gpio_unbanked) 360 if (offset < d->gpio_unbanked)
393 return d->gpio_irq + offset; 361 return d->base_irq + offset;
394 else 362 else
395 return -ENODEV; 363 return -ENODEV;
396} 364}
@@ -403,7 +371,7 @@ static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger)
403 371
404 d = (struct davinci_gpio_controller *)irq_data_get_irq_handler_data(data); 372 d = (struct davinci_gpio_controller *)irq_data_get_irq_handler_data(data);
405 g = (struct davinci_gpio_regs __iomem *)d->regs; 373 g = (struct davinci_gpio_regs __iomem *)d->regs;
406 mask = __gpio_mask(data->irq - d->gpio_irq); 374 mask = __gpio_mask(data->irq - d->base_irq);
407 375
408 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 376 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
409 return -EINVAL; 377 return -EINVAL;
@@ -420,7 +388,9 @@ static int
420davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq, 388davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq,
421 irq_hw_number_t hw) 389 irq_hw_number_t hw)
422{ 390{
423 struct davinci_gpio_regs __iomem *g = gpio2regs(hw); 391 struct davinci_gpio_controller *chips =
392 (struct davinci_gpio_controller *)d->host_data;
393 struct davinci_gpio_regs __iomem *g = chips->regs[hw / 32];
424 394
425 irq_set_chip_and_handler_name(irq, &gpio_irqchip, handle_simple_irq, 395 irq_set_chip_and_handler_name(irq, &gpio_irqchip, handle_simple_irq,
426 "davinci_gpio"); 396 "davinci_gpio");
@@ -478,6 +448,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
478 struct irq_domain *irq_domain = NULL; 448 struct irq_domain *irq_domain = NULL;
479 const struct of_device_id *match; 449 const struct of_device_id *match;
480 struct irq_chip *irq_chip; 450 struct irq_chip *irq_chip;
451 struct davinci_gpio_irq_data *irqdata;
481 gpio_get_irq_chip_cb_t gpio_get_irq_chip; 452 gpio_get_irq_chip_cb_t gpio_get_irq_chip;
482 453
483 /* 454 /*
@@ -533,10 +504,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
533 * IRQs, while the others use banked IRQs, would need some setup 504 * IRQs, while the others use banked IRQs, would need some setup
534 * tweaks to recognize hardware which can do that. 505 * tweaks to recognize hardware which can do that.
535 */ 506 */
536 for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { 507 chips->chip.to_irq = gpio_to_irq_banked;
537 chips[bank].chip.to_irq = gpio_to_irq_banked; 508 chips->irq_domain = irq_domain;
538 chips[bank].irq_domain = irq_domain;
539 }
540 509
541 /* 510 /*
542 * AINTC can handle direct/unbanked IRQs for GPIOs, with the GPIO 511 * AINTC can handle direct/unbanked IRQs for GPIOs, with the GPIO
@@ -545,9 +514,9 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
545 */ 514 */
546 if (pdata->gpio_unbanked) { 515 if (pdata->gpio_unbanked) {
547 /* pass "bank 0" GPIO IRQs to AINTC */ 516 /* pass "bank 0" GPIO IRQs to AINTC */
548 chips[0].chip.to_irq = gpio_to_irq_unbanked; 517 chips->chip.to_irq = gpio_to_irq_unbanked;
549 chips[0].gpio_irq = bank_irq; 518 chips->base_irq = bank_irq;
550 chips[0].gpio_unbanked = pdata->gpio_unbanked; 519 chips->gpio_unbanked = pdata->gpio_unbanked;
551 binten = GENMASK(pdata->gpio_unbanked / 16, 0); 520 binten = GENMASK(pdata->gpio_unbanked / 16, 0);
552 521
553 /* AINTC handles mask/unmask; GPIO handles triggering */ 522 /* AINTC handles mask/unmask; GPIO handles triggering */
@@ -557,14 +526,14 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
557 irq_chip->irq_set_type = gpio_irq_type_unbanked; 526 irq_chip->irq_set_type = gpio_irq_type_unbanked;
558 527
559 /* default trigger: both edges */ 528 /* default trigger: both edges */
560 g = gpio2regs(0); 529 g = chips->regs[0];
561 writel_relaxed(~0, &g->set_falling); 530 writel_relaxed(~0, &g->set_falling);
562 writel_relaxed(~0, &g->set_rising); 531 writel_relaxed(~0, &g->set_rising);
563 532
564 /* set the direct IRQs up to use that irqchip */ 533 /* set the direct IRQs up to use that irqchip */
565 for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) { 534 for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) {
566 irq_set_chip(irq, irq_chip); 535 irq_set_chip(irq, irq_chip);
567 irq_set_handler_data(irq, &chips[gpio / 32]); 536 irq_set_handler_data(irq, chips);
568 irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); 537 irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
569 } 538 }
570 539
@@ -576,8 +545,11 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
576 * then chain through our own handler. 545 * then chain through our own handler.
577 */ 546 */
578 for (gpio = 0, bank = 0; gpio < ngpio; bank++, bank_irq++, gpio += 16) { 547 for (gpio = 0, bank = 0; gpio < ngpio; bank++, bank_irq++, gpio += 16) {
579 /* disabled by default, enabled only as needed */ 548 /* disabled by default, enabled only as needed
580 g = gpio2regs(gpio); 549 * There are register sets for 32 GPIOs. 2 banks of 16
550 * GPIOs are covered by each set of registers hence divide by 2
551 */
552 g = chips->regs[bank / 2];
581 writel_relaxed(~0, &g->clr_falling); 553 writel_relaxed(~0, &g->clr_falling);
582 writel_relaxed(~0, &g->clr_rising); 554 writel_relaxed(~0, &g->clr_rising);
583 555
@@ -586,8 +558,19 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
586 * gpio irqs. Pass the irq bank's corresponding controller to 558 * gpio irqs. Pass the irq bank's corresponding controller to
587 * the chained irq handler. 559 * the chained irq handler.
588 */ 560 */
561 irqdata = devm_kzalloc(&pdev->dev,
562 sizeof(struct
563 davinci_gpio_irq_data),
564 GFP_KERNEL);
565 if (!irqdata)
566 return -ENOMEM;
567
568 irqdata->regs = g;
569 irqdata->bank_num = bank;
570 irqdata->chip = chips;
571
589 irq_set_chained_handler_and_data(bank_irq, gpio_irq_handler, 572 irq_set_chained_handler_and_data(bank_irq, gpio_irq_handler,
590 &chips[gpio / 32]); 573 irqdata);
591 574
592 binten |= BIT(bank); 575 binten |= BIT(bank);
593 } 576 }
diff --git a/drivers/gpio/gpio-exar.c b/drivers/gpio/gpio-exar.c
new file mode 100644
index 000000000000..05c8946d6446
--- /dev/null
+++ b/drivers/gpio/gpio-exar.c
@@ -0,0 +1,200 @@
1/*
2 * GPIO driver for Exar XR17V35X chip
3 *
4 * Copyright (C) 2015 Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/bitops.h>
11#include <linux/device.h>
12#include <linux/gpio/driver.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/pci.h>
17#include <linux/platform_device.h>
18
19#define EXAR_OFFSET_MPIOLVL_LO 0x90
20#define EXAR_OFFSET_MPIOSEL_LO 0x93
21#define EXAR_OFFSET_MPIOLVL_HI 0x96
22#define EXAR_OFFSET_MPIOSEL_HI 0x99
23
24#define DRIVER_NAME "gpio_exar"
25
26static DEFINE_IDA(ida_index);
27
28struct exar_gpio_chip {
29 struct gpio_chip gpio_chip;
30 struct mutex lock;
31 int index;
32 void __iomem *regs;
33 char name[20];
34};
35
36static void exar_update(struct gpio_chip *chip, unsigned int reg, int val,
37 unsigned int offset)
38{
39 struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
40 int temp;
41
42 mutex_lock(&exar_gpio->lock);
43 temp = readb(exar_gpio->regs + reg);
44 temp &= ~BIT(offset);
45 if (val)
46 temp |= BIT(offset);
47 writeb(temp, exar_gpio->regs + reg);
48 mutex_unlock(&exar_gpio->lock);
49}
50
51static int exar_set_direction(struct gpio_chip *chip, int direction,
52 unsigned int offset)
53{
54 unsigned int bank = offset / 8;
55 unsigned int addr;
56
57 addr = bank ? EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO;
58 exar_update(chip, addr, direction, offset % 8);
59 return 0;
60}
61
62static int exar_direction_output(struct gpio_chip *chip, unsigned int offset,
63 int value)
64{
65 return exar_set_direction(chip, 0, offset);
66}
67
68static int exar_direction_input(struct gpio_chip *chip, unsigned int offset)
69{
70 return exar_set_direction(chip, 1, offset);
71}
72
73static int exar_get(struct gpio_chip *chip, unsigned int reg)
74{
75 struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
76 int value;
77
78 mutex_lock(&exar_gpio->lock);
79 value = readb(exar_gpio->regs + reg);
80 mutex_unlock(&exar_gpio->lock);
81
82 return !!value;
83}
84
85static int exar_get_direction(struct gpio_chip *chip, unsigned int offset)
86{
87 unsigned int bank = offset / 8;
88 unsigned int addr;
89 int val;
90
91 addr = bank ? EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO;
92 val = exar_get(chip, addr) >> (offset % 8);
93
94 return !!val;
95}
96
97static int exar_get_value(struct gpio_chip *chip, unsigned int offset)
98{
99 unsigned int bank = offset / 8;
100 unsigned int addr;
101 int val;
102
103 addr = bank ? EXAR_OFFSET_MPIOLVL_LO : EXAR_OFFSET_MPIOLVL_HI;
104 val = exar_get(chip, addr) >> (offset % 8);
105
106 return !!val;
107}
108
109static void exar_set_value(struct gpio_chip *chip, unsigned int offset,
110 int value)
111{
112 unsigned int bank = offset / 8;
113 unsigned int addr;
114
115 addr = bank ? EXAR_OFFSET_MPIOLVL_HI : EXAR_OFFSET_MPIOLVL_LO;
116 exar_update(chip, addr, value, offset % 8);
117}
118
119static int gpio_exar_probe(struct platform_device *pdev)
120{
121 struct pci_dev *pcidev = platform_get_drvdata(pdev);
122 struct exar_gpio_chip *exar_gpio;
123 void __iomem *p;
124 int index, ret;
125
126 if (pcidev->vendor != PCI_VENDOR_ID_EXAR)
127 return -ENODEV;
128
129 /*
130 * Map the pci device to get the register addresses.
131 * We will need to read and write those registers to control
132 * the GPIO pins.
133 * Using managed functions will save us from unmaping on exit.
134 * As the device is enabled using managed functions by the
135 * UART driver we can also use managed functions here.
136 */
137 p = pcim_iomap(pcidev, 0, 0);
138 if (!p)
139 return -ENOMEM;
140
141 exar_gpio = devm_kzalloc(&pcidev->dev, sizeof(*exar_gpio), GFP_KERNEL);
142 if (!exar_gpio)
143 return -ENOMEM;
144
145 mutex_init(&exar_gpio->lock);
146
147 index = ida_simple_get(&ida_index, 0, 0, GFP_KERNEL);
148
149 sprintf(exar_gpio->name, "exar_gpio%d", index);
150 exar_gpio->gpio_chip.label = exar_gpio->name;
151 exar_gpio->gpio_chip.parent = &pcidev->dev;
152 exar_gpio->gpio_chip.direction_output = exar_direction_output;
153 exar_gpio->gpio_chip.direction_input = exar_direction_input;
154 exar_gpio->gpio_chip.get_direction = exar_get_direction;
155 exar_gpio->gpio_chip.get = exar_get_value;
156 exar_gpio->gpio_chip.set = exar_set_value;
157 exar_gpio->gpio_chip.base = -1;
158 exar_gpio->gpio_chip.ngpio = 16;
159 exar_gpio->regs = p;
160 exar_gpio->index = index;
161
162 ret = devm_gpiochip_add_data(&pcidev->dev,
163 &exar_gpio->gpio_chip, exar_gpio);
164 if (ret)
165 goto err_destroy;
166
167 platform_set_drvdata(pdev, exar_gpio);
168
169 return 0;
170
171err_destroy:
172 ida_simple_remove(&ida_index, index);
173 mutex_destroy(&exar_gpio->lock);
174 return ret;
175}
176
177static int gpio_exar_remove(struct platform_device *pdev)
178{
179 struct exar_gpio_chip *exar_gpio = platform_get_drvdata(pdev);
180
181 ida_simple_remove(&ida_index, exar_gpio->index);
182 mutex_destroy(&exar_gpio->lock);
183
184 return 0;
185}
186
187static struct platform_driver gpio_exar_driver = {
188 .probe = gpio_exar_probe,
189 .remove = gpio_exar_remove,
190 .driver = {
191 .name = DRIVER_NAME,
192 },
193};
194
195module_platform_driver(gpio_exar_driver);
196
197MODULE_ALIAS("platform:" DRIVER_NAME);
198MODULE_DESCRIPTION("Exar GPIO driver");
199MODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>");
200MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-gemini.c b/drivers/gpio/gpio-gemini.c
new file mode 100644
index 000000000000..962485163b7f
--- /dev/null
+++ b/drivers/gpio/gpio-gemini.c
@@ -0,0 +1,236 @@
1/*
2 * Gemini gpiochip and interrupt routines
3 * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
4 *
5 * Based on arch/arm/mach-gemini/gpio.c:
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
7 *
8 * Based on plat-mxc/gpio.c:
9 * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
10 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
11 */
12#include <linux/gpio/driver.h>
13#include <linux/io.h>
14#include <linux/interrupt.h>
15#include <linux/platform_device.h>
16#include <linux/of_gpio.h>
17#include <linux/bitops.h>
18
19/* GPIO registers definition */
20#define GPIO_DATA_OUT 0x00
21#define GPIO_DATA_IN 0x04
22#define GPIO_DIR 0x08
23#define GPIO_DATA_SET 0x10
24#define GPIO_DATA_CLR 0x14
25#define GPIO_PULL_EN 0x18
26#define GPIO_PULL_TYPE 0x1C
27#define GPIO_INT_EN 0x20
28#define GPIO_INT_STAT 0x24
29#define GPIO_INT_MASK 0x2C
30#define GPIO_INT_CLR 0x30
31#define GPIO_INT_TYPE 0x34
32#define GPIO_INT_BOTH_EDGE 0x38
33#define GPIO_INT_LEVEL 0x3C
34#define GPIO_DEBOUNCE_EN 0x40
35#define GPIO_DEBOUNCE_PRESCALE 0x44
36
37/**
38 * struct gemini_gpio - Gemini GPIO state container
39 * @dev: containing device for this instance
40 * @gc: gpiochip for this instance
41 */
42struct gemini_gpio {
43 struct device *dev;
44 struct gpio_chip gc;
45 void __iomem *base;
46};
47
48static void gemini_gpio_ack_irq(struct irq_data *d)
49{
50 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
51 struct gemini_gpio *g = gpiochip_get_data(gc);
52
53 writel(BIT(irqd_to_hwirq(d)), g->base + GPIO_INT_CLR);
54}
55
56static void gemini_gpio_mask_irq(struct irq_data *d)
57{
58 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
59 struct gemini_gpio *g = gpiochip_get_data(gc);
60 u32 val;
61
62 val = readl(g->base + GPIO_INT_EN);
63 val &= ~BIT(irqd_to_hwirq(d));
64 writel(val, g->base + GPIO_INT_EN);
65}
66
67static void gemini_gpio_unmask_irq(struct irq_data *d)
68{
69 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
70 struct gemini_gpio *g = gpiochip_get_data(gc);
71 u32 val;
72
73 val = readl(g->base + GPIO_INT_EN);
74 val |= BIT(irqd_to_hwirq(d));
75 writel(val, g->base + GPIO_INT_EN);
76}
77
78static int gemini_gpio_set_irq_type(struct irq_data *d, unsigned int type)
79{
80 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
81 struct gemini_gpio *g = gpiochip_get_data(gc);
82 u32 mask = BIT(irqd_to_hwirq(d));
83 u32 reg_both, reg_level, reg_type;
84
85 reg_type = readl(g->base + GPIO_INT_TYPE);
86 reg_level = readl(g->base + GPIO_INT_LEVEL);
87 reg_both = readl(g->base + GPIO_INT_BOTH_EDGE);
88
89 switch (type) {
90 case IRQ_TYPE_EDGE_BOTH:
91 irq_set_handler_locked(d, handle_edge_irq);
92 reg_type &= ~mask;
93 reg_both |= mask;
94 break;
95 case IRQ_TYPE_EDGE_RISING:
96 irq_set_handler_locked(d, handle_edge_irq);
97 reg_type &= ~mask;
98 reg_both &= ~mask;
99 reg_level &= ~mask;
100 break;
101 case IRQ_TYPE_EDGE_FALLING:
102 irq_set_handler_locked(d, handle_edge_irq);
103 reg_type &= ~mask;
104 reg_both &= ~mask;
105 reg_level |= mask;
106 break;
107 case IRQ_TYPE_LEVEL_HIGH:
108 irq_set_handler_locked(d, handle_level_irq);
109 reg_type |= mask;
110 reg_level &= ~mask;
111 break;
112 case IRQ_TYPE_LEVEL_LOW:
113 irq_set_handler_locked(d, handle_level_irq);
114 reg_type |= mask;
115 reg_level |= mask;
116 break;
117 default:
118 irq_set_handler_locked(d, handle_bad_irq);
119 return -EINVAL;
120 }
121
122 writel(reg_type, g->base + GPIO_INT_TYPE);
123 writel(reg_level, g->base + GPIO_INT_LEVEL);
124 writel(reg_both, g->base + GPIO_INT_BOTH_EDGE);
125
126 gemini_gpio_ack_irq(d);
127
128 return 0;
129}
130
131static struct irq_chip gemini_gpio_irqchip = {
132 .name = "GPIO",
133 .irq_ack = gemini_gpio_ack_irq,
134 .irq_mask = gemini_gpio_mask_irq,
135 .irq_unmask = gemini_gpio_unmask_irq,
136 .irq_set_type = gemini_gpio_set_irq_type,
137};
138
139static void gemini_gpio_irq_handler(struct irq_desc *desc)
140{
141 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
142 struct gemini_gpio *g = gpiochip_get_data(gc);
143 struct irq_chip *irqchip = irq_desc_get_chip(desc);
144 int offset;
145 unsigned long stat;
146
147 chained_irq_enter(irqchip, desc);
148
149 stat = readl(g->base + GPIO_INT_STAT);
150 if (stat)
151 for_each_set_bit(offset, &stat, gc->ngpio)
152 generic_handle_irq(irq_find_mapping(gc->irqdomain,
153 offset));
154
155 chained_irq_exit(irqchip, desc);
156}
157
158static int gemini_gpio_probe(struct platform_device *pdev)
159{
160 struct device *dev = &pdev->dev;
161 struct resource *res;
162 struct gemini_gpio *g;
163 int irq;
164 int ret;
165
166 g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL);
167 if (!g)
168 return -ENOMEM;
169
170 g->dev = dev;
171
172 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
173 g->base = devm_ioremap_resource(dev, res);
174 if (IS_ERR(g->base))
175 return PTR_ERR(g->base);
176
177 irq = platform_get_irq(pdev, 0);
178 if (!irq)
179 return -EINVAL;
180
181 ret = bgpio_init(&g->gc, dev, 4,
182 g->base + GPIO_DATA_IN,
183 g->base + GPIO_DATA_SET,
184 g->base + GPIO_DATA_CLR,
185 g->base + GPIO_DIR,
186 NULL,
187 0);
188 if (ret) {
189 dev_err(dev, "unable to init generic GPIO\n");
190 return ret;
191 }
192 g->gc.label = "Gemini";
193 g->gc.base = -1;
194 g->gc.parent = dev;
195 g->gc.owner = THIS_MODULE;
196 /* ngpio is set by bgpio_init() */
197
198 ret = devm_gpiochip_add_data(dev, &g->gc, g);
199 if (ret)
200 return ret;
201
202 /* Disable, unmask and clear all interrupts */
203 writel(0x0, g->base + GPIO_INT_EN);
204 writel(0x0, g->base + GPIO_INT_MASK);
205 writel(~0x0, g->base + GPIO_INT_CLR);
206
207 ret = gpiochip_irqchip_add(&g->gc, &gemini_gpio_irqchip,
208 0, handle_bad_irq,
209 IRQ_TYPE_NONE);
210 if (ret) {
211 dev_info(dev, "could not add irqchip\n");
212 return ret;
213 }
214 gpiochip_set_chained_irqchip(&g->gc, &gemini_gpio_irqchip,
215 irq, gemini_gpio_irq_handler);
216
217 dev_info(dev, "Gemini GPIO @%p registered\n", g->base);
218
219 return 0;
220}
221
222static const struct of_device_id gemini_gpio_of_match[] = {
223 {
224 .compatible = "cortina,gemini-gpio",
225 },
226 {},
227};
228
229static struct platform_driver gemini_gpio_driver = {
230 .driver = {
231 .name = "gemini-gpio",
232 .of_match_table = of_match_ptr(gemini_gpio_of_match),
233 },
234 .probe = gemini_gpio_probe,
235};
236builtin_platform_driver(gemini_gpio_driver);
diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c
index 1e7def9449ce..fa4baa2543db 100644
--- a/drivers/gpio/gpio-gpio-mm.c
+++ b/drivers/gpio/gpio-gpio-mm.c
@@ -192,6 +192,56 @@ static void gpiomm_gpio_set(struct gpio_chip *chip, unsigned int offset,
192 spin_unlock_irqrestore(&gpiommgpio->lock, flags); 192 spin_unlock_irqrestore(&gpiommgpio->lock, flags);
193} 193}
194 194
195static void gpiomm_gpio_set_multiple(struct gpio_chip *chip,
196 unsigned long *mask, unsigned long *bits)
197{
198 struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip);
199 unsigned int i;
200 const unsigned int gpio_reg_size = 8;
201 unsigned int port;
202 unsigned int out_port;
203 unsigned int bitmask;
204 unsigned long flags;
205
206 /* set bits are evaluated a gpio register size at a time */
207 for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
208 /* no more set bits in this mask word; skip to the next word */
209 if (!mask[BIT_WORD(i)]) {
210 i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
211 continue;
212 }
213
214 port = i / gpio_reg_size;
215 out_port = (port > 2) ? port + 1 : port;
216 bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)];
217
218 spin_lock_irqsave(&gpiommgpio->lock, flags);
219
220 /* update output state data and set device gpio register */
221 gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)];
222 gpiommgpio->out_state[port] |= bitmask;
223 outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port);
224
225 spin_unlock_irqrestore(&gpiommgpio->lock, flags);
226
227 /* prepare for next gpio register set */
228 mask[BIT_WORD(i)] >>= gpio_reg_size;
229 bits[BIT_WORD(i)] >>= gpio_reg_size;
230 }
231}
232
233#define GPIOMM_NGPIO 48
234static const char *gpiomm_names[GPIOMM_NGPIO] = {
235 "Port 1A0", "Port 1A1", "Port 1A2", "Port 1A3", "Port 1A4", "Port 1A5",
236 "Port 1A6", "Port 1A7", "Port 1B0", "Port 1B1", "Port 1B2", "Port 1B3",
237 "Port 1B4", "Port 1B5", "Port 1B6", "Port 1B7", "Port 1C0", "Port 1C1",
238 "Port 1C2", "Port 1C3", "Port 1C4", "Port 1C5", "Port 1C6", "Port 1C7",
239 "Port 2A0", "Port 2A1", "Port 2A2", "Port 2A3", "Port 2A4", "Port 2A5",
240 "Port 2A6", "Port 2A7", "Port 2B0", "Port 2B1", "Port 2B2", "Port 2B3",
241 "Port 2B4", "Port 2B5", "Port 2B6", "Port 2B7", "Port 2C0", "Port 2C1",
242 "Port 2C2", "Port 2C3", "Port 2C4", "Port 2C5", "Port 2C6", "Port 2C7",
243};
244
195static int gpiomm_probe(struct device *dev, unsigned int id) 245static int gpiomm_probe(struct device *dev, unsigned int id)
196{ 246{
197 struct gpiomm_gpio *gpiommgpio; 247 struct gpiomm_gpio *gpiommgpio;
@@ -212,19 +262,19 @@ static int gpiomm_probe(struct device *dev, unsigned int id)
212 gpiommgpio->chip.parent = dev; 262 gpiommgpio->chip.parent = dev;
213 gpiommgpio->chip.owner = THIS_MODULE; 263 gpiommgpio->chip.owner = THIS_MODULE;
214 gpiommgpio->chip.base = -1; 264 gpiommgpio->chip.base = -1;
215 gpiommgpio->chip.ngpio = 48; 265 gpiommgpio->chip.ngpio = GPIOMM_NGPIO;
266 gpiommgpio->chip.names = gpiomm_names;
216 gpiommgpio->chip.get_direction = gpiomm_gpio_get_direction; 267 gpiommgpio->chip.get_direction = gpiomm_gpio_get_direction;
217 gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input; 268 gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input;
218 gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output; 269 gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output;
219 gpiommgpio->chip.get = gpiomm_gpio_get; 270 gpiommgpio->chip.get = gpiomm_gpio_get;
220 gpiommgpio->chip.set = gpiomm_gpio_set; 271 gpiommgpio->chip.set = gpiomm_gpio_set;
272 gpiommgpio->chip.set_multiple = gpiomm_gpio_set_multiple;
221 gpiommgpio->base = base[id]; 273 gpiommgpio->base = base[id];
222 274
223 spin_lock_init(&gpiommgpio->lock); 275 spin_lock_init(&gpiommgpio->lock);
224 276
225 dev_set_drvdata(dev, gpiommgpio); 277 err = devm_gpiochip_add_data(dev, &gpiommgpio->chip, gpiommgpio);
226
227 err = gpiochip_add_data(&gpiommgpio->chip, gpiommgpio);
228 if (err) { 278 if (err) {
229 dev_err(dev, "GPIO registering failed (%d)\n", err); 279 dev_err(dev, "GPIO registering failed (%d)\n", err);
230 return err; 280 return err;
@@ -243,21 +293,11 @@ static int gpiomm_probe(struct device *dev, unsigned int id)
243 return 0; 293 return 0;
244} 294}
245 295
246static int gpiomm_remove(struct device *dev, unsigned int id)
247{
248 struct gpiomm_gpio *const gpiommgpio = dev_get_drvdata(dev);
249
250 gpiochip_remove(&gpiommgpio->chip);
251
252 return 0;
253}
254
255static struct isa_driver gpiomm_driver = { 296static struct isa_driver gpiomm_driver = {
256 .probe = gpiomm_probe, 297 .probe = gpiomm_probe,
257 .driver = { 298 .driver = {
258 .name = "gpio-mm" 299 .name = "gpio-mm"
259 }, 300 },
260 .remove = gpiomm_remove
261}; 301};
262 302
263module_isa_driver(gpiomm_driver, num_gpiomm); 303module_isa_driver(gpiomm_driver, num_gpiomm);
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c
index a1e44c221f66..b76ecee82c3f 100644
--- a/drivers/gpio/gpio-intel-mid.c
+++ b/drivers/gpio/gpio-intel-mid.c
@@ -321,7 +321,7 @@ static void intel_mid_irq_init_hw(struct intel_mid_gpio *priv)
321 } 321 }
322} 322}
323 323
324static int intel_gpio_runtime_idle(struct device *dev) 324static int __maybe_unused intel_gpio_runtime_idle(struct device *dev)
325{ 325{
326 int err = pm_schedule_suspend(dev, 500); 326 int err = pm_schedule_suspend(dev, 500);
327 return err ?: -EBUSY; 327 return err ?: -EBUSY;
diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c
index 504550665091..bdb692345428 100644
--- a/drivers/gpio/gpio-mcp23s08.c
+++ b/drivers/gpio/gpio-mcp23s08.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/of_irq.h> 24#include <linux/of_irq.h>
25#include <linux/of_device.h> 25#include <linux/of_device.h>
26#include <linux/regmap.h>
26 27
27/** 28/**
28 * MCP types supported by driver 29 * MCP types supported by driver
@@ -58,16 +59,10 @@
58 59
59struct mcp23s08; 60struct mcp23s08;
60 61
61struct mcp23s08_ops {
62 int (*read)(struct mcp23s08 *mcp, unsigned reg);
63 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
64 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
65 u16 *vals, unsigned n);
66};
67
68struct mcp23s08 { 62struct mcp23s08 {
69 u8 addr; 63 u8 addr;
70 bool irq_active_high; 64 bool irq_active_high;
65 bool reg_shift;
71 66
72 u16 cache[11]; 67 u16 cache[11];
73 u16 irq_rise; 68 u16 irq_rise;
@@ -80,188 +75,126 @@ struct mcp23s08 {
80 75
81 struct gpio_chip chip; 76 struct gpio_chip chip;
82 77
83 const struct mcp23s08_ops *ops; 78 struct regmap *regmap;
84 void *data; /* ops specific data */ 79 struct device *dev;
85}; 80};
86 81
87/* A given spi_device can represent up to eight mcp23sxx chips 82static const struct regmap_config mcp23x08_regmap = {
88 * sharing the same chipselect but using different addresses 83 .reg_bits = 8,
89 * (e.g. chips #0 and #3 might be populated, but not #1 or $2). 84 .val_bits = 8,
90 * Driver data holds all the per-chip data.
91 */
92struct mcp23s08_driver_data {
93 unsigned ngpio;
94 struct mcp23s08 *mcp[8];
95 struct mcp23s08 chip[];
96};
97 85
98/*----------------------------------------------------------------------*/ 86 .reg_stride = 1,
99 87 .max_register = MCP_OLAT,
100#if IS_ENABLED(CONFIG_I2C)
101
102static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
103{
104 return i2c_smbus_read_byte_data(mcp->data, reg);
105}
106
107static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
108{
109 return i2c_smbus_write_byte_data(mcp->data, reg, val);
110}
111
112static int
113mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
114{
115 while (n--) {
116 int ret = mcp23008_read(mcp, reg++);
117 if (ret < 0)
118 return ret;
119 *vals++ = ret;
120 }
121
122 return 0;
123}
124
125static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
126{
127 return i2c_smbus_read_word_data(mcp->data, reg << 1);
128}
129
130static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
131{
132 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
133}
134
135static int
136mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
137{
138 while (n--) {
139 int ret = mcp23017_read(mcp, reg++);
140 if (ret < 0)
141 return ret;
142 *vals++ = ret;
143 }
144
145 return 0;
146}
147
148static const struct mcp23s08_ops mcp23008_ops = {
149 .read = mcp23008_read,
150 .write = mcp23008_write,
151 .read_regs = mcp23008_read_regs,
152}; 88};
153 89
154static const struct mcp23s08_ops mcp23017_ops = { 90static const struct regmap_config mcp23x17_regmap = {
155 .read = mcp23017_read, 91 .reg_bits = 8,
156 .write = mcp23017_write, 92 .val_bits = 16,
157 .read_regs = mcp23017_read_regs,
158};
159 93
160#endif /* CONFIG_I2C */ 94 .reg_stride = 2,
95 .max_register = MCP_OLAT << 1,
96 .val_format_endian = REGMAP_ENDIAN_LITTLE,
97};
161 98
162/*----------------------------------------------------------------------*/ 99/*----------------------------------------------------------------------*/
163 100
164#ifdef CONFIG_SPI_MASTER 101#ifdef CONFIG_SPI_MASTER
165 102
166static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg) 103static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
167{ 104{
168 u8 tx[2], rx[1]; 105 struct mcp23s08 *mcp = context;
169 int status; 106 struct spi_device *spi = to_spi_device(mcp->dev);
107 struct spi_message m;
108 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
109 { .tx_buf = data, .len = count, }, };
170 110
171 tx[0] = mcp->addr | 0x01; 111 spi_message_init(&m);
172 tx[1] = reg; 112 spi_message_add_tail(&t[0], &m);
173 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx)); 113 spi_message_add_tail(&t[1], &m);
174 return (status < 0) ? status : rx[0]; 114
115 return spi_sync(spi, &m);
175} 116}
176 117
177static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) 118static int mcp23sxx_spi_gather_write(void *context,
119 const void *reg, size_t reg_size,
120 const void *val, size_t val_size)
178{ 121{
179 u8 tx[3]; 122 struct mcp23s08 *mcp = context;
123 struct spi_device *spi = to_spi_device(mcp->dev);
124 struct spi_message m;
125 struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
126 { .tx_buf = reg, .len = reg_size, },
127 { .tx_buf = val, .len = val_size, }, };
180 128
181 tx[0] = mcp->addr; 129 spi_message_init(&m);
182 tx[1] = reg; 130 spi_message_add_tail(&t[0], &m);
183 tx[2] = val; 131 spi_message_add_tail(&t[1], &m);
184 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0); 132 spi_message_add_tail(&t[2], &m);
133
134 return spi_sync(spi, &m);
185} 135}
186 136
187static int 137static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
188mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) 138 void *val, size_t val_size)
189{ 139{
190 u8 tx[2], *tmp; 140 struct mcp23s08 *mcp = context;
191 int status; 141 struct spi_device *spi = to_spi_device(mcp->dev);
142 u8 tx[2];
192 143
193 if ((n + reg) > sizeof(mcp->cache)) 144 if (reg_size != 1)
194 return -EINVAL; 145 return -EINVAL;
146
195 tx[0] = mcp->addr | 0x01; 147 tx[0] = mcp->addr | 0x01;
196 tx[1] = reg; 148 tx[1] = *((u8 *) reg);
197 149
198 tmp = (u8 *)vals; 150 return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
199 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
200 if (status >= 0) {
201 while (n--)
202 vals[n] = tmp[n]; /* expand to 16bit */
203 }
204 return status;
205} 151}
206 152
207static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg) 153static const struct regmap_bus mcp23sxx_spi_regmap = {
208{ 154 .write = mcp23sxx_spi_write,
209 u8 tx[2], rx[2]; 155 .gather_write = mcp23sxx_spi_gather_write,
210 int status; 156 .read = mcp23sxx_spi_read,
157};
211 158
212 tx[0] = mcp->addr | 0x01; 159#endif /* CONFIG_SPI_MASTER */
213 tx[1] = reg << 1;
214 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
215 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
216}
217 160
218static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) 161static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
219{ 162{
220 u8 tx[4]; 163 return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
221
222 tx[0] = mcp->addr;
223 tx[1] = reg << 1;
224 tx[2] = val;
225 tx[3] = val >> 8;
226 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
227} 164}
228 165
229static int 166static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
230mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
231{ 167{
232 u8 tx[2]; 168 return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
233 int status; 169}
234 170
235 if ((n + reg) > sizeof(mcp->cache)) 171static int mcp_update_cache(struct mcp23s08 *mcp)
236 return -EINVAL; 172{
237 tx[0] = mcp->addr | 0x01; 173 int ret, reg, i;
238 tx[1] = reg << 1;
239 174
240 status = spi_write_then_read(mcp->data, tx, sizeof(tx), 175 for (i = 0; i < ARRAY_SIZE(mcp->cache); i++) {
241 (u8 *)vals, n * 2); 176 ret = mcp_read(mcp, i, &reg);
242 if (status >= 0) { 177 if (ret < 0)
243 while (n--) 178 return ret;
244 vals[n] = __le16_to_cpu((__le16)vals[n]); 179 mcp->cache[i] = reg;
245 } 180 }
246 181
247 return status; 182 return 0;
248} 183}
249 184
250static const struct mcp23s08_ops mcp23s08_ops = { 185/*----------------------------------------------------------------------*/
251 .read = mcp23s08_read,
252 .write = mcp23s08_write,
253 .read_regs = mcp23s08_read_regs,
254};
255 186
256static const struct mcp23s08_ops mcp23s17_ops = { 187/* A given spi_device can represent up to eight mcp23sxx chips
257 .read = mcp23s17_read, 188 * sharing the same chipselect but using different addresses
258 .write = mcp23s17_write, 189 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
259 .read_regs = mcp23s17_read_regs, 190 * Driver data holds all the per-chip data.
191 */
192struct mcp23s08_driver_data {
193 unsigned ngpio;
194 struct mcp23s08 *mcp[8];
195 struct mcp23s08 chip[];
260}; 196};
261 197
262#endif /* CONFIG_SPI_MASTER */
263
264/*----------------------------------------------------------------------*/
265 198
266static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) 199static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
267{ 200{
@@ -270,7 +203,7 @@ static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
270 203
271 mutex_lock(&mcp->lock); 204 mutex_lock(&mcp->lock);
272 mcp->cache[MCP_IODIR] |= (1 << offset); 205 mcp->cache[MCP_IODIR] |= (1 << offset);
273 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); 206 status = mcp_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
274 mutex_unlock(&mcp->lock); 207 mutex_unlock(&mcp->lock);
275 return status; 208 return status;
276} 209}
@@ -278,13 +211,13 @@ static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
278static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) 211static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
279{ 212{
280 struct mcp23s08 *mcp = gpiochip_get_data(chip); 213 struct mcp23s08 *mcp = gpiochip_get_data(chip);
281 int status; 214 int status, ret;
282 215
283 mutex_lock(&mcp->lock); 216 mutex_lock(&mcp->lock);
284 217
285 /* REVISIT reading this clears any IRQ ... */ 218 /* REVISIT reading this clears any IRQ ... */
286 status = mcp->ops->read(mcp, MCP_GPIO); 219 ret = mcp_read(mcp, MCP_GPIO, &status);
287 if (status < 0) 220 if (ret < 0)
288 status = 0; 221 status = 0;
289 else { 222 else {
290 mcp->cache[MCP_GPIO] = status; 223 mcp->cache[MCP_GPIO] = status;
@@ -303,7 +236,7 @@ static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
303 else 236 else
304 olat &= ~mask; 237 olat &= ~mask;
305 mcp->cache[MCP_OLAT] = olat; 238 mcp->cache[MCP_OLAT] = olat;
306 return mcp->ops->write(mcp, MCP_OLAT, olat); 239 return mcp_write(mcp, MCP_OLAT, olat);
307} 240}
308 241
309static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) 242static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -327,7 +260,7 @@ mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
327 status = __mcp23s08_set(mcp, mask, value); 260 status = __mcp23s08_set(mcp, mask, value);
328 if (status == 0) { 261 if (status == 0) {
329 mcp->cache[MCP_IODIR] &= ~mask; 262 mcp->cache[MCP_IODIR] &= ~mask;
330 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); 263 status = mcp_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
331 } 264 }
332 mutex_unlock(&mcp->lock); 265 mutex_unlock(&mcp->lock);
333 return status; 266 return status;
@@ -341,16 +274,14 @@ static irqreturn_t mcp23s08_irq(int irq, void *data)
341 unsigned int child_irq; 274 unsigned int child_irq;
342 275
343 mutex_lock(&mcp->lock); 276 mutex_lock(&mcp->lock);
344 intf = mcp->ops->read(mcp, MCP_INTF); 277 if (mcp_read(mcp, MCP_INTF, &intf) < 0) {
345 if (intf < 0) {
346 mutex_unlock(&mcp->lock); 278 mutex_unlock(&mcp->lock);
347 return IRQ_HANDLED; 279 return IRQ_HANDLED;
348 } 280 }
349 281
350 mcp->cache[MCP_INTF] = intf; 282 mcp->cache[MCP_INTF] = intf;
351 283
352 intcap = mcp->ops->read(mcp, MCP_INTCAP); 284 if (mcp_read(mcp, MCP_INTCAP, &intcap) < 0) {
353 if (intcap < 0) {
354 mutex_unlock(&mcp->lock); 285 mutex_unlock(&mcp->lock);
355 return IRQ_HANDLED; 286 return IRQ_HANDLED;
356 } 287 }
@@ -435,9 +366,9 @@ static void mcp23s08_irq_bus_unlock(struct irq_data *data)
435 struct mcp23s08 *mcp = gpiochip_get_data(gc); 366 struct mcp23s08 *mcp = gpiochip_get_data(gc);
436 367
437 mutex_lock(&mcp->lock); 368 mutex_lock(&mcp->lock);
438 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]); 369 mcp_write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
439 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]); 370 mcp_write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
440 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]); 371 mcp_write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
441 mutex_unlock(&mcp->lock); 372 mutex_unlock(&mcp->lock);
442 mutex_unlock(&mcp->irq_lock); 373 mutex_unlock(&mcp->irq_lock);
443} 374}
@@ -514,7 +445,7 @@ static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
514 bank = '0' + ((mcp->addr >> 1) & 0x7); 445 bank = '0' + ((mcp->addr >> 1) & 0x7);
515 446
516 mutex_lock(&mcp->lock); 447 mutex_lock(&mcp->lock);
517 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); 448 t = mcp_update_cache(mcp);
518 if (t < 0) { 449 if (t < 0) {
519 seq_printf(s, " I/O ERROR %d\n", t); 450 seq_printf(s, " I/O ERROR %d\n", t);
520 goto done; 451 goto done;
@@ -549,12 +480,12 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
549 void *data, unsigned addr, unsigned type, 480 void *data, unsigned addr, unsigned type,
550 struct mcp23s08_platform_data *pdata, int cs) 481 struct mcp23s08_platform_data *pdata, int cs)
551{ 482{
552 int status; 483 int status, ret;
553 bool mirror = false; 484 bool mirror = false;
554 485
555 mutex_init(&mcp->lock); 486 mutex_init(&mcp->lock);
556 487
557 mcp->data = data; 488 mcp->dev = dev;
558 mcp->addr = addr; 489 mcp->addr = addr;
559 mcp->irq_active_high = false; 490 mcp->irq_active_high = false;
560 491
@@ -571,19 +502,25 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
571 switch (type) { 502 switch (type) {
572#ifdef CONFIG_SPI_MASTER 503#ifdef CONFIG_SPI_MASTER
573 case MCP_TYPE_S08: 504 case MCP_TYPE_S08:
574 mcp->ops = &mcp23s08_ops; 505 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
506 &mcp23x08_regmap);
507 mcp->reg_shift = 0;
575 mcp->chip.ngpio = 8; 508 mcp->chip.ngpio = 8;
576 mcp->chip.label = "mcp23s08"; 509 mcp->chip.label = "mcp23s08";
577 break; 510 break;
578 511
579 case MCP_TYPE_S17: 512 case MCP_TYPE_S17:
580 mcp->ops = &mcp23s17_ops; 513 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
514 &mcp23x17_regmap);
515 mcp->reg_shift = 1;
581 mcp->chip.ngpio = 16; 516 mcp->chip.ngpio = 16;
582 mcp->chip.label = "mcp23s17"; 517 mcp->chip.label = "mcp23s17";
583 break; 518 break;
584 519
585 case MCP_TYPE_S18: 520 case MCP_TYPE_S18:
586 mcp->ops = &mcp23s17_ops; 521 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
522 &mcp23x17_regmap);
523 mcp->reg_shift = 1;
587 mcp->chip.ngpio = 16; 524 mcp->chip.ngpio = 16;
588 mcp->chip.label = "mcp23s18"; 525 mcp->chip.label = "mcp23s18";
589 break; 526 break;
@@ -591,13 +528,15 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
591 528
592#if IS_ENABLED(CONFIG_I2C) 529#if IS_ENABLED(CONFIG_I2C)
593 case MCP_TYPE_008: 530 case MCP_TYPE_008:
594 mcp->ops = &mcp23008_ops; 531 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x08_regmap);
532 mcp->reg_shift = 0;
595 mcp->chip.ngpio = 8; 533 mcp->chip.ngpio = 8;
596 mcp->chip.label = "mcp23008"; 534 mcp->chip.label = "mcp23008";
597 break; 535 break;
598 536
599 case MCP_TYPE_017: 537 case MCP_TYPE_017:
600 mcp->ops = &mcp23017_ops; 538 mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
539 mcp->reg_shift = 1;
601 mcp->chip.ngpio = 16; 540 mcp->chip.ngpio = 16;
602 mcp->chip.label = "mcp23017"; 541 mcp->chip.label = "mcp23017";
603 break; 542 break;
@@ -608,6 +547,9 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
608 return -EINVAL; 547 return -EINVAL;
609 } 548 }
610 549
550 if (IS_ERR(mcp->regmap))
551 return PTR_ERR(mcp->regmap);
552
611 mcp->chip.base = pdata->base; 553 mcp->chip.base = pdata->base;
612 mcp->chip.can_sleep = true; 554 mcp->chip.can_sleep = true;
613 mcp->chip.parent = dev; 555 mcp->chip.parent = dev;
@@ -617,8 +559,8 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
617 * and MCP_IOCON.HAEN = 1, so we work with all chips. 559 * and MCP_IOCON.HAEN = 1, so we work with all chips.
618 */ 560 */
619 561
620 status = mcp->ops->read(mcp, MCP_IOCON); 562 ret = mcp_read(mcp, MCP_IOCON, &status);
621 if (status < 0) 563 if (ret < 0)
622 goto fail; 564 goto fail;
623 565
624 mcp->irq_controller = pdata->irq_controller; 566 mcp->irq_controller = pdata->irq_controller;
@@ -646,51 +588,49 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
646 if (type == MCP_TYPE_S18) 588 if (type == MCP_TYPE_S18)
647 status |= IOCON_INTCC | (IOCON_INTCC << 8); 589 status |= IOCON_INTCC | (IOCON_INTCC << 8);
648 590
649 status = mcp->ops->write(mcp, MCP_IOCON, status); 591 ret = mcp_write(mcp, MCP_IOCON, status);
650 if (status < 0) 592 if (ret < 0)
651 goto fail; 593 goto fail;
652 } 594 }
653 595
654 /* configure ~100K pullups */ 596 /* configure ~100K pullups */
655 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups); 597 ret = mcp_write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
656 if (status < 0) 598 if (ret < 0)
657 goto fail; 599 goto fail;
658 600
659 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); 601 ret = mcp_update_cache(mcp);
660 if (status < 0) 602 if (ret < 0)
661 goto fail; 603 goto fail;
662 604
663 /* disable inverter on input */ 605 /* disable inverter on input */
664 if (mcp->cache[MCP_IPOL] != 0) { 606 if (mcp->cache[MCP_IPOL] != 0) {
665 mcp->cache[MCP_IPOL] = 0; 607 mcp->cache[MCP_IPOL] = 0;
666 status = mcp->ops->write(mcp, MCP_IPOL, 0); 608 ret = mcp_write(mcp, MCP_IPOL, 0);
667 if (status < 0) 609 if (ret < 0)
668 goto fail; 610 goto fail;
669 } 611 }
670 612
671 /* disable irqs */ 613 /* disable irqs */
672 if (mcp->cache[MCP_GPINTEN] != 0) { 614 if (mcp->cache[MCP_GPINTEN] != 0) {
673 mcp->cache[MCP_GPINTEN] = 0; 615 mcp->cache[MCP_GPINTEN] = 0;
674 status = mcp->ops->write(mcp, MCP_GPINTEN, 0); 616 ret = mcp_write(mcp, MCP_GPINTEN, 0);
675 if (status < 0) 617 if (ret < 0)
676 goto fail; 618 goto fail;
677 } 619 }
678 620
679 status = gpiochip_add_data(&mcp->chip, mcp); 621 ret = gpiochip_add_data(&mcp->chip, mcp);
680 if (status < 0) 622 if (ret < 0)
681 goto fail; 623 goto fail;
682 624
683 if (mcp->irq && mcp->irq_controller) { 625 if (mcp->irq && mcp->irq_controller) {
684 status = mcp23s08_irq_setup(mcp); 626 ret = mcp23s08_irq_setup(mcp);
685 if (status) { 627 if (ret)
686 goto fail; 628 goto fail;
687 }
688 } 629 }
689fail: 630fail:
690 if (status < 0) 631 if (ret < 0)
691 dev_dbg(dev, "can't setup chip %d, --> %d\n", 632 dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
692 addr, status); 633 return ret;
693 return status;
694} 634}
695 635
696/*----------------------------------------------------------------------*/ 636/*----------------------------------------------------------------------*/
diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c
index 54e5d8257d34..b1cf76dd84ba 100644
--- a/drivers/gpio/gpio-mm-lantiq.c
+++ b/drivers/gpio/gpio-mm-lantiq.c
@@ -3,7 +3,7 @@
3 * under the terms of the GNU General Public License version 2 as published 3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation. 4 * by the Free Software Foundation.
5 * 5 *
6 * Copyright (C) 2012 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2012 John Crispin <john@phrozen.org>
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
diff --git a/drivers/gpio/gpio-mockup.c b/drivers/gpio/gpio-mockup.c
index 1ef85b0c2b1f..06dac72cb69c 100644
--- a/drivers/gpio/gpio-mockup.c
+++ b/drivers/gpio/gpio-mockup.c
@@ -14,14 +14,23 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/gpio/driver.h> 16#include <linux/gpio/driver.h>
17#include <linux/gpio/consumer.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/interrupt.h>
21#include <linux/irq.h>
22#include <linux/irq_work.h>
23#include <linux/debugfs.h>
24#include <linux/uaccess.h>
18 25
19#define GPIO_NAME "gpio-mockup" 26#include "gpiolib.h"
20#define MAX_GC 10
21 27
22enum direction { 28#define GPIO_MOCKUP_NAME "gpio-mockup"
23 OUT, 29#define GPIO_MOCKUP_MAX_GC 10
24 IN 30
31enum {
32 DIR_IN = 0,
33 DIR_OUT,
25}; 34};
26 35
27/* 36/*
@@ -29,150 +38,360 @@ enum direction {
29 * @dir: Configures direction of gpio as "in" or "out", 0=in, 1=out 38 * @dir: Configures direction of gpio as "in" or "out", 0=in, 1=out
30 * @value: Configures status of the gpio as 0(low) or 1(high) 39 * @value: Configures status of the gpio as 0(low) or 1(high)
31 */ 40 */
32struct gpio_pin_status { 41struct gpio_mockup_line_status {
33 enum direction dir; 42 int dir;
34 bool value; 43 bool value;
35}; 44};
36 45
37struct mockup_gpio_controller { 46struct gpio_mockup_irq_context {
47 struct irq_work work;
48 int irq;
49};
50
51struct gpio_mockup_chip {
38 struct gpio_chip gc; 52 struct gpio_chip gc;
39 struct gpio_pin_status *stats; 53 struct gpio_mockup_line_status *lines;
54 struct gpio_mockup_irq_context irq_ctx;
55 struct dentry *dbg_dir;
40}; 56};
41 57
42static int gpio_mockup_ranges[MAX_GC << 1]; 58struct gpio_mockup_dbgfs_private {
59 struct gpio_mockup_chip *chip;
60 struct gpio_desc *desc;
61 int offset;
62};
63
64static int gpio_mockup_ranges[GPIO_MOCKUP_MAX_GC << 1];
43static int gpio_mockup_params_nr; 65static int gpio_mockup_params_nr;
44module_param_array(gpio_mockup_ranges, int, &gpio_mockup_params_nr, 0400); 66module_param_array(gpio_mockup_ranges, int, &gpio_mockup_params_nr, 0400);
45 67
46const char pins_name_start = 'A'; 68static bool gpio_mockup_named_lines;
69module_param_named(gpio_mockup_named_lines,
70 gpio_mockup_named_lines, bool, 0400);
71
72static const char gpio_mockup_name_start = 'A';
73static struct dentry *gpio_mockup_dbg_dir;
47 74
48static int mockup_gpio_get(struct gpio_chip *gc, unsigned int offset) 75static int gpio_mockup_get(struct gpio_chip *gc, unsigned int offset)
49{ 76{
50 struct mockup_gpio_controller *cntr = gpiochip_get_data(gc); 77 struct gpio_mockup_chip *chip = gpiochip_get_data(gc);
51 78
52 return cntr->stats[offset].value; 79 return chip->lines[offset].value;
53} 80}
54 81
55static void mockup_gpio_set(struct gpio_chip *gc, unsigned int offset, 82static void gpio_mockup_set(struct gpio_chip *gc, unsigned int offset,
56 int value) 83 int value)
57{ 84{
58 struct mockup_gpio_controller *cntr = gpiochip_get_data(gc); 85 struct gpio_mockup_chip *chip = gpiochip_get_data(gc);
59 86
60 cntr->stats[offset].value = !!value; 87 chip->lines[offset].value = !!value;
61} 88}
62 89
63static int mockup_gpio_dirout(struct gpio_chip *gc, unsigned int offset, 90static int gpio_mockup_dirout(struct gpio_chip *gc, unsigned int offset,
64 int value) 91 int value)
65{ 92{
66 struct mockup_gpio_controller *cntr = gpiochip_get_data(gc); 93 struct gpio_mockup_chip *chip = gpiochip_get_data(gc);
94
95 gpio_mockup_set(gc, offset, value);
96 chip->lines[offset].dir = DIR_OUT;
97
98 return 0;
99}
100
101static int gpio_mockup_dirin(struct gpio_chip *gc, unsigned int offset)
102{
103 struct gpio_mockup_chip *chip = gpiochip_get_data(gc);
104
105 chip->lines[offset].dir = DIR_IN;
106
107 return 0;
108}
109
110static int gpio_mockup_get_direction(struct gpio_chip *gc, unsigned int offset)
111{
112 struct gpio_mockup_chip *chip = gpiochip_get_data(gc);
113
114 return chip->lines[offset].dir;
115}
116
117static int gpio_mockup_name_lines(struct device *dev,
118 struct gpio_mockup_chip *chip)
119{
120 struct gpio_chip *gc = &chip->gc;
121 char **names;
122 int i;
123
124 names = devm_kzalloc(dev, sizeof(char *) * gc->ngpio, GFP_KERNEL);
125 if (!names)
126 return -ENOMEM;
127
128 for (i = 0; i < gc->ngpio; i++) {
129 names[i] = devm_kasprintf(dev, GFP_KERNEL,
130 "%s-%d", gc->label, i);
131 if (!names[i])
132 return -ENOMEM;
133 }
134
135 gc->names = (const char *const *)names;
67 136
68 mockup_gpio_set(gc, offset, value);
69 cntr->stats[offset].dir = OUT;
70 return 0; 137 return 0;
71} 138}
72 139
73static int mockup_gpio_dirin(struct gpio_chip *gc, unsigned int offset) 140static int gpio_mockup_to_irq(struct gpio_chip *chip, unsigned int offset)
74{ 141{
75 struct mockup_gpio_controller *cntr = gpiochip_get_data(gc); 142 return chip->irq_base + offset;
143}
144
145/*
146 * While we should generally support irqmask and irqunmask, this driver is
147 * for testing purposes only so we don't care.
148 */
149static void gpio_mockup_irqmask(struct irq_data *d) { }
150static void gpio_mockup_irqunmask(struct irq_data *d) { }
151
152static struct irq_chip gpio_mockup_irqchip = {
153 .name = GPIO_MOCKUP_NAME,
154 .irq_mask = gpio_mockup_irqmask,
155 .irq_unmask = gpio_mockup_irqunmask,
156};
157
158static void gpio_mockup_handle_irq(struct irq_work *work)
159{
160 struct gpio_mockup_irq_context *irq_ctx;
161
162 irq_ctx = container_of(work, struct gpio_mockup_irq_context, work);
163 handle_simple_irq(irq_to_desc(irq_ctx->irq));
164}
165
166static int gpio_mockup_irqchip_setup(struct device *dev,
167 struct gpio_mockup_chip *chip)
168{
169 struct gpio_chip *gc = &chip->gc;
170 int irq_base, i;
171
172 irq_base = irq_alloc_descs(-1, 0, gc->ngpio, 0);
173 if (irq_base < 0)
174 return irq_base;
175
176 gc->irq_base = irq_base;
177 gc->irqchip = &gpio_mockup_irqchip;
178
179 for (i = 0; i < gc->ngpio; i++) {
180 irq_set_chip(irq_base + i, gc->irqchip);
181 irq_set_handler(irq_base + i, &handle_simple_irq);
182 irq_modify_status(irq_base + i,
183 IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE);
184 }
185
186 init_irq_work(&chip->irq_ctx.work, gpio_mockup_handle_irq);
76 187
77 cntr->stats[offset].dir = IN;
78 return 0; 188 return 0;
79} 189}
80 190
81static int mockup_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) 191static ssize_t gpio_mockup_event_write(struct file *file,
192 const char __user *usr_buf,
193 size_t size, loff_t *ppos)
194{
195 struct gpio_mockup_dbgfs_private *priv;
196 struct gpio_mockup_chip *chip;
197 struct seq_file *sfile;
198 struct gpio_desc *desc;
199 struct gpio_chip *gc;
200 int status, val;
201 char buf;
202
203 sfile = file->private_data;
204 priv = sfile->private;
205 desc = priv->desc;
206 chip = priv->chip;
207 gc = &chip->gc;
208
209 status = copy_from_user(&buf, usr_buf, 1);
210 if (status)
211 return status;
212
213 if (buf == '0')
214 val = 0;
215 else if (buf == '1')
216 val = 1;
217 else
218 return -EINVAL;
219
220 gpiod_set_value_cansleep(desc, val);
221 priv->chip->irq_ctx.irq = gc->irq_base + priv->offset;
222 irq_work_queue(&priv->chip->irq_ctx.work);
223
224 return size;
225}
226
227static int gpio_mockup_event_open(struct inode *inode, struct file *file)
228{
229 return single_open(file, NULL, inode->i_private);
230}
231
232static const struct file_operations gpio_mockup_event_ops = {
233 .owner = THIS_MODULE,
234 .open = gpio_mockup_event_open,
235 .write = gpio_mockup_event_write,
236 .llseek = no_llseek,
237};
238
239static void gpio_mockup_debugfs_setup(struct device *dev,
240 struct gpio_mockup_chip *chip)
82{ 241{
83 struct mockup_gpio_controller *cntr = gpiochip_get_data(gc); 242 struct gpio_mockup_dbgfs_private *priv;
243 struct dentry *evfile;
244 struct gpio_chip *gc;
245 char *name;
246 int i;
247
248 gc = &chip->gc;
84 249
85 return cntr->stats[offset].dir; 250 chip->dbg_dir = debugfs_create_dir(gc->label, gpio_mockup_dbg_dir);
251 if (!chip->dbg_dir)
252 goto err;
253
254 for (i = 0; i < gc->ngpio; i++) {
255 name = devm_kasprintf(dev, GFP_KERNEL, "%d", i);
256 if (!name)
257 goto err;
258
259 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
260 if (!priv)
261 goto err;
262
263 priv->chip = chip;
264 priv->offset = i;
265 priv->desc = &gc->gpiodev->descs[i];
266
267 evfile = debugfs_create_file(name, 0200, chip->dbg_dir, priv,
268 &gpio_mockup_event_ops);
269 if (!evfile)
270 goto err;
271 }
272
273 return;
274
275err:
276 dev_err(dev, "error creating debugfs directory\n");
86} 277}
87 278
88static int mockup_gpio_add(struct device *dev, 279static int gpio_mockup_add(struct device *dev,
89 struct mockup_gpio_controller *cntr, 280 struct gpio_mockup_chip *chip,
90 const char *name, int base, int ngpio) 281 const char *name, int base, int ngpio)
91{ 282{
283 struct gpio_chip *gc = &chip->gc;
92 int ret; 284 int ret;
93 285
94 cntr->gc.base = base; 286 gc->base = base;
95 cntr->gc.ngpio = ngpio; 287 gc->ngpio = ngpio;
96 cntr->gc.label = name; 288 gc->label = name;
97 cntr->gc.owner = THIS_MODULE; 289 gc->owner = THIS_MODULE;
98 cntr->gc.parent = dev; 290 gc->parent = dev;
99 cntr->gc.get = mockup_gpio_get; 291 gc->get = gpio_mockup_get;
100 cntr->gc.set = mockup_gpio_set; 292 gc->set = gpio_mockup_set;
101 cntr->gc.direction_output = mockup_gpio_dirout; 293 gc->direction_output = gpio_mockup_dirout;
102 cntr->gc.direction_input = mockup_gpio_dirin; 294 gc->direction_input = gpio_mockup_dirin;
103 cntr->gc.get_direction = mockup_gpio_get_direction; 295 gc->get_direction = gpio_mockup_get_direction;
104 cntr->stats = devm_kzalloc(dev, sizeof(*cntr->stats) * cntr->gc.ngpio, 296 gc->to_irq = gpio_mockup_to_irq;
297
298 chip->lines = devm_kzalloc(dev, sizeof(*chip->lines) * gc->ngpio,
105 GFP_KERNEL); 299 GFP_KERNEL);
106 if (!cntr->stats) { 300 if (!chip->lines)
107 ret = -ENOMEM; 301 return -ENOMEM;
108 goto err; 302
303 if (gpio_mockup_named_lines) {
304 ret = gpio_mockup_name_lines(dev, chip);
305 if (ret)
306 return ret;
109 } 307 }
110 ret = devm_gpiochip_add_data(dev, &cntr->gc, cntr); 308
309 ret = gpio_mockup_irqchip_setup(dev, chip);
111 if (ret) 310 if (ret)
112 goto err; 311 return ret;
312
313 ret = devm_gpiochip_add_data(dev, &chip->gc, chip);
314 if (ret)
315 return ret;
316
317 if (gpio_mockup_dbg_dir)
318 gpio_mockup_debugfs_setup(dev, chip);
113 319
114 dev_info(dev, "gpio<%d..%d> add successful!", base, base + ngpio);
115 return 0; 320 return 0;
116err:
117 dev_err(dev, "gpio<%d..%d> add failed!", base, base + ngpio);
118 return ret;
119} 321}
120 322
121static int mockup_gpio_probe(struct platform_device *pdev) 323static int gpio_mockup_probe(struct platform_device *pdev)
122{ 324{
325 struct gpio_mockup_chip *chips;
123 struct device *dev = &pdev->dev; 326 struct device *dev = &pdev->dev;
124 struct mockup_gpio_controller *cntr; 327 int ret, i, base, ngpio;
125 int ret; 328 char *chip_name;
126 int i;
127 int base;
128 int ngpio;
129 char chip_name[sizeof(GPIO_NAME) + 3];
130 329
131 if (gpio_mockup_params_nr < 2) 330 if (gpio_mockup_params_nr < 2)
132 return -EINVAL; 331 return -EINVAL;
133 332
134 cntr = devm_kzalloc(dev, sizeof(*cntr) * (gpio_mockup_params_nr >> 1), 333 chips = devm_kzalloc(dev,
135 GFP_KERNEL); 334 sizeof(*chips) * (gpio_mockup_params_nr >> 1),
136 if (!cntr) 335 GFP_KERNEL);
336 if (!chips)
137 return -ENOMEM; 337 return -ENOMEM;
138 338
139 platform_set_drvdata(pdev, cntr); 339 platform_set_drvdata(pdev, chips);
140 340
141 for (i = 0; i < gpio_mockup_params_nr >> 1; i++) { 341 for (i = 0; i < gpio_mockup_params_nr >> 1; i++) {
142 base = gpio_mockup_ranges[i * 2]; 342 base = gpio_mockup_ranges[i * 2];
343
143 if (base == -1) 344 if (base == -1)
144 ngpio = gpio_mockup_ranges[i * 2 + 1]; 345 ngpio = gpio_mockup_ranges[i * 2 + 1];
145 else 346 else
146 ngpio = gpio_mockup_ranges[i * 2 + 1] - base; 347 ngpio = gpio_mockup_ranges[i * 2 + 1] - base;
147 348
148 if (ngpio >= 0) { 349 if (ngpio >= 0) {
149 sprintf(chip_name, "%s-%c", GPIO_NAME, 350 chip_name = devm_kasprintf(dev, GFP_KERNEL,
150 pins_name_start + i); 351 "%s-%c", GPIO_MOCKUP_NAME,
151 ret = mockup_gpio_add(dev, &cntr[i], 352 gpio_mockup_name_start + i);
353 if (!chip_name)
354 return -ENOMEM;
355
356 ret = gpio_mockup_add(dev, &chips[i],
152 chip_name, base, ngpio); 357 chip_name, base, ngpio);
153 } else { 358 } else {
154 ret = -1; 359 ret = -1;
155 } 360 }
361
156 if (ret) { 362 if (ret) {
157 if (base < 0) 363 dev_err(dev, "gpio<%d..%d> add failed\n",
158 dev_err(dev, "gpio<%d..%d> add failed\n", 364 base, base < 0 ? ngpio : base + ngpio);
159 base, ngpio);
160 else
161 dev_err(dev, "gpio<%d..%d> add failed\n",
162 base, base + ngpio);
163 365
164 return ret; 366 return ret;
165 } 367 }
368
369 dev_info(dev, "gpio<%d..%d> add successful!",
370 base, base + ngpio);
166 } 371 }
167 372
168 return 0; 373 return 0;
169} 374}
170 375
171static struct platform_driver mockup_gpio_driver = { 376static int gpio_mockup_remove(struct platform_device *pdev)
377{
378 struct gpio_mockup_chip *chips;
379 int i;
380
381 chips = platform_get_drvdata(pdev);
382
383 for (i = 0; i < gpio_mockup_params_nr >> 1; i++)
384 irq_free_descs(chips[i].gc.irq_base, chips[i].gc.ngpio);
385
386 return 0;
387}
388
389static struct platform_driver gpio_mockup_driver = {
172 .driver = { 390 .driver = {
173 .name = GPIO_NAME, 391 .name = GPIO_MOCKUP_NAME,
174 }, 392 },
175 .probe = mockup_gpio_probe, 393 .probe = gpio_mockup_probe,
394 .remove = gpio_mockup_remove,
176}; 395};
177 396
178static struct platform_device *pdev; 397static struct platform_device *pdev;
@@ -180,7 +399,12 @@ static int __init mock_device_init(void)
180{ 399{
181 int err; 400 int err;
182 401
183 pdev = platform_device_alloc(GPIO_NAME, -1); 402 gpio_mockup_dbg_dir = debugfs_create_dir("gpio-mockup-event", NULL);
403 if (!gpio_mockup_dbg_dir)
404 pr_err("%s: error creating debugfs directory\n",
405 GPIO_MOCKUP_NAME);
406
407 pdev = platform_device_alloc(GPIO_MOCKUP_NAME, -1);
184 if (!pdev) 408 if (!pdev)
185 return -ENOMEM; 409 return -ENOMEM;
186 410
@@ -190,7 +414,7 @@ static int __init mock_device_init(void)
190 return err; 414 return err;
191 } 415 }
192 416
193 err = platform_driver_register(&mockup_gpio_driver); 417 err = platform_driver_register(&gpio_mockup_driver);
194 if (err) { 418 if (err) {
195 platform_device_unregister(pdev); 419 platform_device_unregister(pdev);
196 return err; 420 return err;
@@ -201,7 +425,8 @@ static int __init mock_device_init(void)
201 425
202static void __exit mock_device_exit(void) 426static void __exit mock_device_exit(void)
203{ 427{
204 platform_driver_unregister(&mockup_gpio_driver); 428 debugfs_remove_recursive(gpio_mockup_dbg_dir);
429 platform_driver_unregister(&gpio_mockup_driver);
205 platform_device_unregister(pdev); 430 platform_device_unregister(pdev);
206} 431}
207 432
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 1ed6132b993c..a649556ac3ca 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -659,7 +659,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
659 659
660 match = of_match_device(mvebu_gpio_of_match, &pdev->dev); 660 match = of_match_device(mvebu_gpio_of_match, &pdev->dev);
661 if (match) 661 if (match)
662 soc_variant = (int) match->data; 662 soc_variant = (unsigned long) match->data;
663 else 663 else
664 soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION; 664 soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION;
665 665
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index d5d72d84b719..d44232aadb6c 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -14,6 +14,7 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/gpio/consumer.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
19#include <linux/platform_data/pca953x.h> 20#include <linux/platform_data/pca953x.h>
@@ -754,8 +755,16 @@ static int pca953x_probe(struct i2c_client *client,
754 invert = pdata->invert; 755 invert = pdata->invert;
755 chip->names = pdata->names; 756 chip->names = pdata->names;
756 } else { 757 } else {
758 struct gpio_desc *reset_gpio;
759
757 chip->gpio_start = -1; 760 chip->gpio_start = -1;
758 irq_base = 0; 761 irq_base = 0;
762
763 /* See if we need to de-assert a reset pin */
764 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
765 GPIOD_OUT_LOW);
766 if (IS_ERR(reset_gpio))
767 return PTR_ERR(reset_gpio);
759 } 768 }
760 769
761 chip->client = client; 770 chip->client = client;
diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c
new file mode 100644
index 000000000000..269ab628634b
--- /dev/null
+++ b/drivers/gpio/gpio-pci-idio-16.c
@@ -0,0 +1,349 @@
1/*
2 * GPIO driver for the ACCES PCI-IDIO-16
3 * Copyright (C) 2017 William Breathitt Gray
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 */
14#include <linux/bitops.h>
15#include <linux/device.h>
16#include <linux/errno.h>
17#include <linux/gpio/driver.h>
18#include <linux/interrupt.h>
19#include <linux/irqdesc.h>
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/spinlock.h>
24#include <linux/types.h>
25
26/**
27 * struct idio_16_gpio_reg - GPIO device registers structure
28 * @out0_7: Read: FET Drive Outputs 0-7
29 * Write: FET Drive Outputs 0-7
30 * @in0_7: Read: Isolated Inputs 0-7
31 * Write: Clear Interrupt
32 * @irq_ctl: Read: Enable IRQ
33 * Write: Disable IRQ
34 * @filter_ctl: Read: Activate Input Filters 0-15
35 * Write: Deactivate Input Filters 0-15
36 * @out8_15: Read: FET Drive Outputs 8-15
37 * Write: FET Drive Outputs 8-15
38 * @in8_15: Read: Isolated Inputs 8-15
39 * Write: Unused
40 * @irq_status: Read: Interrupt status
41 * Write: Unused
42 */
43struct idio_16_gpio_reg {
44 u8 out0_7;
45 u8 in0_7;
46 u8 irq_ctl;
47 u8 filter_ctl;
48 u8 out8_15;
49 u8 in8_15;
50 u8 irq_status;
51};
52
53/**
54 * struct idio_16_gpio - GPIO device private data structure
55 * @chip: instance of the gpio_chip
56 * @lock: synchronization lock to prevent I/O race conditions
57 * @reg: I/O address offset for the GPIO device registers
58 * @irq_mask: I/O bits affected by interrupts
59 */
60struct idio_16_gpio {
61 struct gpio_chip chip;
62 spinlock_t lock;
63 struct idio_16_gpio_reg __iomem *reg;
64 unsigned long irq_mask;
65};
66
67static int idio_16_gpio_get_direction(struct gpio_chip *chip,
68 unsigned int offset)
69{
70 if (offset > 15)
71 return 1;
72
73 return 0;
74}
75
76static int idio_16_gpio_direction_input(struct gpio_chip *chip,
77 unsigned int offset)
78{
79 return 0;
80}
81
82static int idio_16_gpio_direction_output(struct gpio_chip *chip,
83 unsigned int offset, int value)
84{
85 chip->set(chip, offset, value);
86 return 0;
87}
88
89static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset)
90{
91 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
92 unsigned long mask = BIT(offset);
93
94 if (offset < 8)
95 return !!(ioread8(&idio16gpio->reg->out0_7) & mask);
96
97 if (offset < 16)
98 return !!(ioread8(&idio16gpio->reg->out8_15) & (mask >> 8));
99
100 if (offset < 24)
101 return !!(ioread8(&idio16gpio->reg->in0_7) & (mask >> 16));
102
103 return !!(ioread8(&idio16gpio->reg->in8_15) & (mask >> 24));
104}
105
106static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset,
107 int value)
108{
109 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
110 unsigned int mask = BIT(offset);
111 void __iomem *base;
112 unsigned long flags;
113 unsigned int out_state;
114
115 if (offset > 15)
116 return;
117
118 if (offset > 7) {
119 mask >>= 8;
120 base = &idio16gpio->reg->out8_15;
121 } else
122 base = &idio16gpio->reg->out0_7;
123
124 spin_lock_irqsave(&idio16gpio->lock, flags);
125
126 if (value)
127 out_state = ioread8(base) | mask;
128 else
129 out_state = ioread8(base) & ~mask;
130
131 iowrite8(out_state, base);
132
133 spin_unlock_irqrestore(&idio16gpio->lock, flags);
134}
135
136static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
137 unsigned long *mask, unsigned long *bits)
138{
139 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
140 unsigned long flags;
141 unsigned int out_state;
142
143 spin_lock_irqsave(&idio16gpio->lock, flags);
144
145 /* process output lines 0-7 */
146 if (*mask & 0xFF) {
147 out_state = ioread8(&idio16gpio->reg->out0_7) & ~*mask;
148 out_state |= *mask & *bits;
149 iowrite8(out_state, &idio16gpio->reg->out0_7);
150 }
151
152 /* shift to next output line word */
153 *mask >>= 8;
154
155 /* process output lines 8-15 */
156 if (*mask & 0xFF) {
157 *bits >>= 8;
158 out_state = ioread8(&idio16gpio->reg->out8_15) & ~*mask;
159 out_state |= *mask & *bits;
160 iowrite8(out_state, &idio16gpio->reg->out8_15);
161 }
162
163 spin_unlock_irqrestore(&idio16gpio->lock, flags);
164}
165
166static void idio_16_irq_ack(struct irq_data *data)
167{
168}
169
170static void idio_16_irq_mask(struct irq_data *data)
171{
172 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
173 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
174 const unsigned long mask = BIT(irqd_to_hwirq(data));
175 unsigned long flags;
176
177 idio16gpio->irq_mask &= ~mask;
178
179 if (!idio16gpio->irq_mask) {
180 spin_lock_irqsave(&idio16gpio->lock, flags);
181
182 iowrite8(0, &idio16gpio->reg->irq_ctl);
183
184 spin_unlock_irqrestore(&idio16gpio->lock, flags);
185 }
186}
187
188static void idio_16_irq_unmask(struct irq_data *data)
189{
190 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
191 struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip);
192 const unsigned long mask = BIT(irqd_to_hwirq(data));
193 const unsigned long prev_irq_mask = idio16gpio->irq_mask;
194 unsigned long flags;
195
196 idio16gpio->irq_mask |= mask;
197
198 if (!prev_irq_mask) {
199 spin_lock_irqsave(&idio16gpio->lock, flags);
200
201 ioread8(&idio16gpio->reg->irq_ctl);
202
203 spin_unlock_irqrestore(&idio16gpio->lock, flags);
204 }
205}
206
207static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_type)
208{
209 /* The only valid irq types are none and both-edges */
210 if (flow_type != IRQ_TYPE_NONE &&
211 (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
212 return -EINVAL;
213
214 return 0;
215}
216
217static struct irq_chip idio_16_irqchip = {
218 .name = "pci-idio-16",
219 .irq_ack = idio_16_irq_ack,
220 .irq_mask = idio_16_irq_mask,
221 .irq_unmask = idio_16_irq_unmask,
222 .irq_set_type = idio_16_irq_set_type
223};
224
225static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
226{
227 struct idio_16_gpio *const idio16gpio = dev_id;
228 unsigned int irq_status;
229 struct gpio_chip *const chip = &idio16gpio->chip;
230 int gpio;
231
232 spin_lock(&idio16gpio->lock);
233
234 irq_status = ioread8(&idio16gpio->reg->irq_status);
235
236 spin_unlock(&idio16gpio->lock);
237
238 /* Make sure our device generated IRQ */
239 if (!(irq_status & 0x3) || !(irq_status & 0x4))
240 return IRQ_NONE;
241
242 for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
243 generic_handle_irq(irq_find_mapping(chip->irqdomain, gpio));
244
245 spin_lock(&idio16gpio->lock);
246
247 /* Clear interrupt */
248 iowrite8(0, &idio16gpio->reg->in0_7);
249
250 spin_unlock(&idio16gpio->lock);
251
252 return IRQ_HANDLED;
253}
254
255#define IDIO_16_NGPIO 32
256static const char *idio_16_names[IDIO_16_NGPIO] = {
257 "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7",
258 "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15",
259 "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7",
260 "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15"
261};
262
263static int idio_16_probe(struct pci_dev *pdev, const struct pci_device_id *id)
264{
265 struct device *const dev = &pdev->dev;
266 struct idio_16_gpio *idio16gpio;
267 int err;
268 const size_t pci_bar_index = 2;
269 const char *const name = pci_name(pdev);
270
271 idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL);
272 if (!idio16gpio)
273 return -ENOMEM;
274
275 err = pcim_enable_device(pdev);
276 if (err) {
277 dev_err(dev, "Failed to enable PCI device (%d)\n", err);
278 return err;
279 }
280
281 err = pcim_iomap_regions(pdev, BIT(pci_bar_index), name);
282 if (err) {
283 dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err);
284 return err;
285 }
286
287 idio16gpio->reg = pcim_iomap_table(pdev)[pci_bar_index];
288
289 /* Deactivate input filters */
290 iowrite8(0, &idio16gpio->reg->filter_ctl);
291
292 idio16gpio->chip.label = name;
293 idio16gpio->chip.parent = dev;
294 idio16gpio->chip.owner = THIS_MODULE;
295 idio16gpio->chip.base = -1;
296 idio16gpio->chip.ngpio = IDIO_16_NGPIO;
297 idio16gpio->chip.names = idio_16_names;
298 idio16gpio->chip.get_direction = idio_16_gpio_get_direction;
299 idio16gpio->chip.direction_input = idio_16_gpio_direction_input;
300 idio16gpio->chip.direction_output = idio_16_gpio_direction_output;
301 idio16gpio->chip.get = idio_16_gpio_get;
302 idio16gpio->chip.set = idio_16_gpio_set;
303 idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple;
304
305 spin_lock_init(&idio16gpio->lock);
306
307 err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio);
308 if (err) {
309 dev_err(dev, "GPIO registering failed (%d)\n", err);
310 return err;
311 }
312
313 /* Disable IRQ by default and clear any pending interrupt */
314 iowrite8(0, &idio16gpio->reg->irq_ctl);
315 iowrite8(0, &idio16gpio->reg->in0_7);
316
317 err = gpiochip_irqchip_add(&idio16gpio->chip, &idio_16_irqchip, 0,
318 handle_edge_irq, IRQ_TYPE_NONE);
319 if (err) {
320 dev_err(dev, "Could not add irqchip (%d)\n", err);
321 return err;
322 }
323
324 err = devm_request_irq(dev, pdev->irq, idio_16_irq_handler, IRQF_SHARED,
325 name, idio16gpio);
326 if (err) {
327 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
328 return err;
329 }
330
331 return 0;
332}
333
334static const struct pci_device_id idio_16_pci_dev_id[] = {
335 { PCI_DEVICE(0x494F, 0x0DC8) }, { 0 }
336};
337MODULE_DEVICE_TABLE(pci, idio_16_pci_dev_id);
338
339static struct pci_driver idio_16_driver = {
340 .name = "pci-idio-16",
341 .id_table = idio_16_pci_dev_id,
342 .probe = idio_16_probe
343};
344
345module_pci_driver(idio_16_driver);
346
347MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
348MODULE_DESCRIPTION("ACCES PCI-IDIO-16 GPIO driver");
349MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 2be48f5eba36..31ad288846af 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -242,11 +242,24 @@ static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
242 242
243static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) 243static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
244{ 244{
245 return pinctrl_request_gpio(chip->base + offset); 245 struct gpio_rcar_priv *p = gpiochip_get_data(chip);
246 int error;
247
248 error = pm_runtime_get_sync(&p->pdev->dev);
249 if (error < 0)
250 return error;
251
252 error = pinctrl_request_gpio(chip->base + offset);
253 if (error)
254 pm_runtime_put(&p->pdev->dev);
255
256 return error;
246} 257}
247 258
248static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) 259static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
249{ 260{
261 struct gpio_rcar_priv *p = gpiochip_get_data(chip);
262
250 pinctrl_free_gpio(chip->base + offset); 263 pinctrl_free_gpio(chip->base + offset);
251 264
252 /* 265 /*
@@ -254,6 +267,8 @@ static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
254 * drive the GPIO pin as an output. 267 * drive the GPIO pin as an output.
255 */ 268 */
256 gpio_rcar_config_general_input_output_mode(chip, offset, false); 269 gpio_rcar_config_general_input_output_mode(chip, offset, false);
270
271 pm_runtime_put(&p->pdev->dev);
257} 272}
258 273
259static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset) 274static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
@@ -426,7 +441,6 @@ static int gpio_rcar_probe(struct platform_device *pdev)
426 } 441 }
427 442
428 pm_runtime_enable(dev); 443 pm_runtime_enable(dev);
429 pm_runtime_get_sync(dev);
430 444
431 io = platform_get_resource(pdev, IORESOURCE_MEM, 0); 445 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
432 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 446 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -460,6 +474,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
460 474
461 irq_chip = &p->irq_chip; 475 irq_chip = &p->irq_chip;
462 irq_chip->name = name; 476 irq_chip->name = name;
477 irq_chip->parent_device = dev;
463 irq_chip->irq_mask = gpio_rcar_irq_disable; 478 irq_chip->irq_mask = gpio_rcar_irq_disable;
464 irq_chip->irq_unmask = gpio_rcar_irq_enable; 479 irq_chip->irq_unmask = gpio_rcar_irq_enable;
465 irq_chip->irq_set_type = gpio_rcar_irq_set_type; 480 irq_chip->irq_set_type = gpio_rcar_irq_set_type;
@@ -494,7 +509,6 @@ static int gpio_rcar_probe(struct platform_device *pdev)
494err1: 509err1:
495 gpiochip_remove(gpio_chip); 510 gpiochip_remove(gpio_chip);
496err0: 511err0:
497 pm_runtime_put(dev);
498 pm_runtime_disable(dev); 512 pm_runtime_disable(dev);
499 return ret; 513 return ret;
500} 514}
@@ -505,7 +519,6 @@ static int gpio_rcar_remove(struct platform_device *pdev)
505 519
506 gpiochip_remove(&p->gpio_chip); 520 gpiochip_remove(&p->gpio_chip);
507 521
508 pm_runtime_put(&pdev->dev);
509 pm_runtime_disable(&pdev->dev); 522 pm_runtime_disable(&pdev->dev);
510 return 0; 523 return 0;
511} 524}
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c
index 19e654f88b3a..c07385b71403 100644
--- a/drivers/gpio/gpio-stp-xway.c
+++ b/drivers/gpio/gpio-stp-xway.c
@@ -3,7 +3,7 @@
3 * under the terms of the GNU General Public License version 2 as published 3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation. 4 * by the Free Software Foundation.
5 * 5 *
6 * Copyright (C) 2012 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2012 John Crispin <john@phrozen.org>
7 * 7 *
8 */ 8 */
9 9
diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c
index eaa71d440ccf..901b5ccb032d 100644
--- a/drivers/gpio/gpio-ws16c48.c
+++ b/drivers/gpio/gpio-ws16c48.c
@@ -46,7 +46,6 @@ MODULE_PARM_DESC(irq, "WinSystems WS16C48 interrupt line numbers");
46 * @irq_mask: I/O bits affected by interrupts 46 * @irq_mask: I/O bits affected by interrupts
47 * @flow_mask: IRQ flow type mask for the respective I/O bits 47 * @flow_mask: IRQ flow type mask for the respective I/O bits
48 * @base: base port address of the GPIO device 48 * @base: base port address of the GPIO device
49 * @irq: Interrupt line number
50 */ 49 */
51struct ws16c48_gpio { 50struct ws16c48_gpio {
52 struct gpio_chip chip; 51 struct gpio_chip chip;
@@ -56,7 +55,6 @@ struct ws16c48_gpio {
56 unsigned long irq_mask; 55 unsigned long irq_mask;
57 unsigned long flow_mask; 56 unsigned long flow_mask;
58 unsigned base; 57 unsigned base;
59 unsigned irq;
60}; 58};
61 59
62static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) 60static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
@@ -155,6 +153,46 @@ static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
155 spin_unlock_irqrestore(&ws16c48gpio->lock, flags); 153 spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
156} 154}
157 155
156static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
157 unsigned long *mask, unsigned long *bits)
158{
159 struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
160 unsigned int i;
161 const unsigned int gpio_reg_size = 8;
162 unsigned int port;
163 unsigned int iomask;
164 unsigned int bitmask;
165 unsigned long flags;
166
167 /* set bits are evaluated a gpio register size at a time */
168 for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
169 /* no more set bits in this mask word; skip to the next word */
170 if (!mask[BIT_WORD(i)]) {
171 i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
172 continue;
173 }
174
175 port = i / gpio_reg_size;
176
177 /* mask out GPIO configured for input */
178 iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port];
179 bitmask = iomask & bits[BIT_WORD(i)];
180
181 spin_lock_irqsave(&ws16c48gpio->lock, flags);
182
183 /* update output state data and set device gpio register */
184 ws16c48gpio->out_state[port] &= ~iomask;
185 ws16c48gpio->out_state[port] |= bitmask;
186 outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
187
188 spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
189
190 /* prepare for next gpio register set */
191 mask[BIT_WORD(i)] >>= gpio_reg_size;
192 bits[BIT_WORD(i)] >>= gpio_reg_size;
193 }
194}
195
158static void ws16c48_irq_ack(struct irq_data *data) 196static void ws16c48_irq_ack(struct irq_data *data)
159{ 197{
160 struct gpio_chip *chip = irq_data_get_irq_chip_data(data); 198 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
@@ -303,6 +341,22 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)
303 return IRQ_HANDLED; 341 return IRQ_HANDLED;
304} 342}
305 343
344#define WS16C48_NGPIO 48
345static const char *ws16c48_names[WS16C48_NGPIO] = {
346 "Port 0 Bit 0", "Port 0 Bit 1", "Port 0 Bit 2", "Port 0 Bit 3",
347 "Port 0 Bit 4", "Port 0 Bit 5", "Port 0 Bit 6", "Port 0 Bit 7",
348 "Port 1 Bit 0", "Port 1 Bit 1", "Port 1 Bit 2", "Port 1 Bit 3",
349 "Port 1 Bit 4", "Port 1 Bit 5", "Port 1 Bit 6", "Port 1 Bit 7",
350 "Port 2 Bit 0", "Port 2 Bit 1", "Port 2 Bit 2", "Port 2 Bit 3",
351 "Port 2 Bit 4", "Port 2 Bit 5", "Port 2 Bit 6", "Port 2 Bit 7",
352 "Port 3 Bit 0", "Port 3 Bit 1", "Port 3 Bit 2", "Port 3 Bit 3",
353 "Port 3 Bit 4", "Port 3 Bit 5", "Port 3 Bit 6", "Port 3 Bit 7",
354 "Port 4 Bit 0", "Port 4 Bit 1", "Port 4 Bit 2", "Port 4 Bit 3",
355 "Port 4 Bit 4", "Port 4 Bit 5", "Port 4 Bit 6", "Port 4 Bit 7",
356 "Port 5 Bit 0", "Port 5 Bit 1", "Port 5 Bit 2", "Port 5 Bit 3",
357 "Port 5 Bit 4", "Port 5 Bit 5", "Port 5 Bit 6", "Port 5 Bit 7"
358};
359
306static int ws16c48_probe(struct device *dev, unsigned int id) 360static int ws16c48_probe(struct device *dev, unsigned int id)
307{ 361{
308 struct ws16c48_gpio *ws16c48gpio; 362 struct ws16c48_gpio *ws16c48gpio;
@@ -323,20 +377,19 @@ static int ws16c48_probe(struct device *dev, unsigned int id)
323 ws16c48gpio->chip.parent = dev; 377 ws16c48gpio->chip.parent = dev;
324 ws16c48gpio->chip.owner = THIS_MODULE; 378 ws16c48gpio->chip.owner = THIS_MODULE;
325 ws16c48gpio->chip.base = -1; 379 ws16c48gpio->chip.base = -1;
326 ws16c48gpio->chip.ngpio = 48; 380 ws16c48gpio->chip.ngpio = WS16C48_NGPIO;
381 ws16c48gpio->chip.names = ws16c48_names;
327 ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction; 382 ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction;
328 ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input; 383 ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input;
329 ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output; 384 ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output;
330 ws16c48gpio->chip.get = ws16c48_gpio_get; 385 ws16c48gpio->chip.get = ws16c48_gpio_get;
331 ws16c48gpio->chip.set = ws16c48_gpio_set; 386 ws16c48gpio->chip.set = ws16c48_gpio_set;
387 ws16c48gpio->chip.set_multiple = ws16c48_gpio_set_multiple;
332 ws16c48gpio->base = base[id]; 388 ws16c48gpio->base = base[id];
333 ws16c48gpio->irq = irq[id];
334 389
335 spin_lock_init(&ws16c48gpio->lock); 390 spin_lock_init(&ws16c48gpio->lock);
336 391
337 dev_set_drvdata(dev, ws16c48gpio); 392 err = devm_gpiochip_add_data(dev, &ws16c48gpio->chip, ws16c48gpio);
338
339 err = gpiochip_add_data(&ws16c48gpio->chip, ws16c48gpio);
340 if (err) { 393 if (err) {
341 dev_err(dev, "GPIO registering failed (%d)\n", err); 394 dev_err(dev, "GPIO registering failed (%d)\n", err);
342 return err; 395 return err;
@@ -353,31 +406,17 @@ static int ws16c48_probe(struct device *dev, unsigned int id)
353 handle_edge_irq, IRQ_TYPE_NONE); 406 handle_edge_irq, IRQ_TYPE_NONE);
354 if (err) { 407 if (err) {
355 dev_err(dev, "Could not add irqchip (%d)\n", err); 408 dev_err(dev, "Could not add irqchip (%d)\n", err);
356 goto err_gpiochip_remove; 409 return err;
357 } 410 }
358 411
359 err = request_irq(irq[id], ws16c48_irq_handler, IRQF_SHARED, name, 412 err = devm_request_irq(dev, irq[id], ws16c48_irq_handler, IRQF_SHARED,
360 ws16c48gpio); 413 name, ws16c48gpio);
361 if (err) { 414 if (err) {
362 dev_err(dev, "IRQ handler registering failed (%d)\n", err); 415 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
363 goto err_gpiochip_remove; 416 return err;
364 } 417 }
365 418
366 return 0; 419 return 0;
367
368err_gpiochip_remove:
369 gpiochip_remove(&ws16c48gpio->chip);
370 return err;
371}
372
373static int ws16c48_remove(struct device *dev, unsigned int id)
374{
375 struct ws16c48_gpio *const ws16c48gpio = dev_get_drvdata(dev);
376
377 free_irq(ws16c48gpio->irq, ws16c48gpio);
378 gpiochip_remove(&ws16c48gpio->chip);
379
380 return 0;
381} 420}
382 421
383static struct isa_driver ws16c48_driver = { 422static struct isa_driver ws16c48_driver = {
@@ -385,7 +424,6 @@ static struct isa_driver ws16c48_driver = {
385 .driver = { 424 .driver = {
386 .name = "ws16c48" 425 .name = "ws16c48"
387 }, 426 },
388 .remove = ws16c48_remove
389}; 427};
390 428
391module_isa_driver(ws16c48_driver, num_ws16c48); 429module_isa_driver(ws16c48_driver, num_ws16c48);
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index a3faefa44f68..9b37a3692b3f 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -416,9 +416,8 @@ static int acpi_populate_gpio_lookup(struct acpi_resource *ares, void *data)
416 agpio->connection_type == ACPI_RESOURCE_GPIO_TYPE_INT; 416 agpio->connection_type == ACPI_RESOURCE_GPIO_TYPE_INT;
417 417
418 /* 418 /*
419 * ActiveLow is only specified for GpioInt resource. If 419 * Polarity and triggering are only specified for GpioInt
420 * GpioIo is used then the only way to set the flag is 420 * resource.
421 * to use _DSD "gpios" property.
422 * Note: we expect here: 421 * Note: we expect here:
423 * - ACPI_ACTIVE_LOW == GPIO_ACTIVE_LOW 422 * - ACPI_ACTIVE_LOW == GPIO_ACTIVE_LOW
424 * - ACPI_ACTIVE_HIGH == GPIO_ACTIVE_HIGH 423 * - ACPI_ACTIVE_HIGH == GPIO_ACTIVE_HIGH
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 92b185f19232..975b9f6cf408 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -160,6 +160,7 @@ struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id,
160 * of_parse_own_gpio() - Get a GPIO hog descriptor, names and flags for GPIO API 160 * of_parse_own_gpio() - Get a GPIO hog descriptor, names and flags for GPIO API
161 * @np: device node to get GPIO from 161 * @np: device node to get GPIO from
162 * @chip: GPIO chip whose hog is parsed 162 * @chip: GPIO chip whose hog is parsed
163 * @idx: Index of the GPIO to parse
163 * @name: GPIO line name 164 * @name: GPIO line name
164 * @lflags: gpio_lookup_flags - returned from of_find_gpio() or 165 * @lflags: gpio_lookup_flags - returned from of_find_gpio() or
165 * of_parse_own_gpio() 166 * of_parse_own_gpio()
@@ -170,7 +171,7 @@ struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id,
170 */ 171 */
171static struct gpio_desc *of_parse_own_gpio(struct device_node *np, 172static struct gpio_desc *of_parse_own_gpio(struct device_node *np,
172 struct gpio_chip *chip, 173 struct gpio_chip *chip,
173 const char **name, 174 unsigned int idx, const char **name,
174 enum gpio_lookup_flags *lflags, 175 enum gpio_lookup_flags *lflags,
175 enum gpiod_flags *dflags) 176 enum gpiod_flags *dflags)
176{ 177{
@@ -178,6 +179,7 @@ static struct gpio_desc *of_parse_own_gpio(struct device_node *np,
178 enum of_gpio_flags xlate_flags; 179 enum of_gpio_flags xlate_flags;
179 struct of_phandle_args gpiospec; 180 struct of_phandle_args gpiospec;
180 struct gpio_desc *desc; 181 struct gpio_desc *desc;
182 unsigned int i;
181 u32 tmp; 183 u32 tmp;
182 int ret; 184 int ret;
183 185
@@ -196,9 +198,12 @@ static struct gpio_desc *of_parse_own_gpio(struct device_node *np,
196 gpiospec.np = chip_np; 198 gpiospec.np = chip_np;
197 gpiospec.args_count = tmp; 199 gpiospec.args_count = tmp;
198 200
199 ret = of_property_read_u32_array(np, "gpios", gpiospec.args, tmp); 201 for (i = 0; i < tmp; i++) {
200 if (ret) 202 ret = of_property_read_u32_index(np, "gpios", idx * tmp + i,
201 return ERR_PTR(ret); 203 &gpiospec.args[i]);
204 if (ret)
205 return ERR_PTR(ret);
206 }
202 207
203 desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, &xlate_flags); 208 desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, &xlate_flags);
204 if (IS_ERR(desc)) 209 if (IS_ERR(desc))
@@ -240,20 +245,24 @@ static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
240 const char *name; 245 const char *name;
241 enum gpio_lookup_flags lflags; 246 enum gpio_lookup_flags lflags;
242 enum gpiod_flags dflags; 247 enum gpiod_flags dflags;
248 unsigned int i;
243 int ret; 249 int ret;
244 250
245 for_each_available_child_of_node(chip->of_node, np) { 251 for_each_available_child_of_node(chip->of_node, np) {
246 if (!of_property_read_bool(np, "gpio-hog")) 252 if (!of_property_read_bool(np, "gpio-hog"))
247 continue; 253 continue;
248 254
249 desc = of_parse_own_gpio(np, chip, &name, &lflags, &dflags); 255 for (i = 0;; i++) {
250 if (IS_ERR(desc)) 256 desc = of_parse_own_gpio(np, chip, i, &name, &lflags,
251 continue; 257 &dflags);
258 if (IS_ERR(desc))
259 break;
252 260
253 ret = gpiod_hog(desc, name, lflags, dflags); 261 ret = gpiod_hog(desc, name, lflags, dflags);
254 if (ret < 0) { 262 if (ret < 0) {
255 of_node_put(np); 263 of_node_put(np);
256 return ret; 264 return ret;
265 }
257 } 266 }
258 } 267 }
259 268
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index d0478f1853db..8b4d721d6d63 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1,3 +1,4 @@
1#include <linux/bitops.h>
1#include <linux/kernel.h> 2#include <linux/kernel.h>
2#include <linux/module.h> 3#include <linux/module.h>
3#include <linux/interrupt.h> 4#include <linux/interrupt.h>
@@ -982,7 +983,7 @@ static int gpio_chrdev_open(struct inode *inode, struct file *filp)
982 struct gpio_device, chrdev); 983 struct gpio_device, chrdev);
983 984
984 /* Fail on open if the backing gpiochip is gone */ 985 /* Fail on open if the backing gpiochip is gone */
985 if (!gdev || !gdev->chip) 986 if (!gdev->chip)
986 return -ENODEV; 987 return -ENODEV;
987 get_device(&gdev->dev); 988 get_device(&gdev->dev);
988 filp->private_data = gdev; 989 filp->private_data = gdev;
@@ -1001,8 +1002,6 @@ static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1001 struct gpio_device *gdev = container_of(inode->i_cdev, 1002 struct gpio_device *gdev = container_of(inode->i_cdev,
1002 struct gpio_device, chrdev); 1003 struct gpio_device, chrdev);
1003 1004
1004 if (!gdev)
1005 return -ENODEV;
1006 put_device(&gdev->dev); 1005 put_device(&gdev->dev);
1007 return 0; 1006 return 0;
1008} 1007}
@@ -1423,8 +1422,7 @@ void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip)
1423 1422
1424 ret = devres_release(dev, devm_gpio_chip_release, 1423 ret = devres_release(dev, devm_gpio_chip_release,
1425 devm_gpio_chip_match, chip); 1424 devm_gpio_chip_match, chip);
1426 if (!ret) 1425 WARN_ON(ret);
1427 WARN_ON(ret);
1428} 1426}
1429EXPORT_SYMBOL_GPL(devm_gpiochip_remove); 1427EXPORT_SYMBOL_GPL(devm_gpiochip_remove);
1430 1428
@@ -2586,18 +2584,11 @@ static void gpio_chip_set_multiple(struct gpio_chip *chip,
2586 if (chip->set_multiple) { 2584 if (chip->set_multiple) {
2587 chip->set_multiple(chip, mask, bits); 2585 chip->set_multiple(chip, mask, bits);
2588 } else { 2586 } else {
2589 int i; 2587 unsigned int i;
2590 for (i = 0; i < chip->ngpio; i++) { 2588
2591 if (mask[BIT_WORD(i)] == 0) { 2589 /* set outputs if the corresponding mask bit is set */
2592 /* no more set bits in this mask word; 2590 for_each_set_bit(i, mask, chip->ngpio)
2593 * skip ahead to the next word */ 2591 chip->set(chip, i, test_bit(i, bits));
2594 i = (BIT_WORD(i) + 1) * BITS_PER_LONG - 1;
2595 continue;
2596 }
2597 /* set outputs if the corresponding mask bit is set */
2598 if (__test_and_clear_bit(i, mask))
2599 chip->set(chip, i, test_bit(i, bits));
2600 }
2601 } 2592 }
2602} 2593}
2603 2594
@@ -3325,6 +3316,8 @@ EXPORT_SYMBOL_GPL(gpiod_get_index);
3325 * fwnode_get_named_gpiod - obtain a GPIO from firmware node 3316 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
3326 * @fwnode: handle of the firmware node 3317 * @fwnode: handle of the firmware node
3327 * @propname: name of the firmware property representing the GPIO 3318 * @propname: name of the firmware property representing the GPIO
3319 * @index: index of the GPIO to obtain in the consumer
3320 * @dflags: GPIO initialization flags
3328 * 3321 *
3329 * This function can be used for drivers that get their configuration 3322 * This function can be used for drivers that get their configuration
3330 * from firmware. 3323 * from firmware.
@@ -3333,12 +3326,18 @@ EXPORT_SYMBOL_GPL(gpiod_get_index);
3333 * underlying firmware interface and then makes sure that the GPIO 3326 * underlying firmware interface and then makes sure that the GPIO
3334 * descriptor is requested before it is returned to the caller. 3327 * descriptor is requested before it is returned to the caller.
3335 * 3328 *
3329 * On successfull request the GPIO pin is configured in accordance with
3330 * provided @dflags.
3331 *
3336 * In case of error an ERR_PTR() is returned. 3332 * In case of error an ERR_PTR() is returned.
3337 */ 3333 */
3338struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, 3334struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
3339 const char *propname) 3335 const char *propname, int index,
3336 enum gpiod_flags dflags,
3337 const char *label)
3340{ 3338{
3341 struct gpio_desc *desc = ERR_PTR(-ENODEV); 3339 struct gpio_desc *desc = ERR_PTR(-ENODEV);
3340 unsigned long lflags = 0;
3342 bool active_low = false; 3341 bool active_low = false;
3343 bool single_ended = false; 3342 bool single_ended = false;
3344 int ret; 3343 int ret;
@@ -3349,8 +3348,8 @@ struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
3349 if (is_of_node(fwnode)) { 3348 if (is_of_node(fwnode)) {
3350 enum of_gpio_flags flags; 3349 enum of_gpio_flags flags;
3351 3350
3352 desc = of_get_named_gpiod_flags(to_of_node(fwnode), propname, 0, 3351 desc = of_get_named_gpiod_flags(to_of_node(fwnode), propname,
3353 &flags); 3352 index, &flags);
3354 if (!IS_ERR(desc)) { 3353 if (!IS_ERR(desc)) {
3355 active_low = flags & OF_GPIO_ACTIVE_LOW; 3354 active_low = flags & OF_GPIO_ACTIVE_LOW;
3356 single_ended = flags & OF_GPIO_SINGLE_ENDED; 3355 single_ended = flags & OF_GPIO_SINGLE_ENDED;
@@ -3358,7 +3357,7 @@ struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
3358 } else if (is_acpi_node(fwnode)) { 3357 } else if (is_acpi_node(fwnode)) {
3359 struct acpi_gpio_info info; 3358 struct acpi_gpio_info info;
3360 3359
3361 desc = acpi_node_get_gpiod(fwnode, propname, 0, &info); 3360 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
3362 if (!IS_ERR(desc)) 3361 if (!IS_ERR(desc))
3363 active_low = info.polarity == GPIO_ACTIVE_LOW; 3362 active_low = info.polarity == GPIO_ACTIVE_LOW;
3364 } 3363 }
@@ -3366,18 +3365,24 @@ struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
3366 if (IS_ERR(desc)) 3365 if (IS_ERR(desc))
3367 return desc; 3366 return desc;
3368 3367
3369 ret = gpiod_request(desc, NULL); 3368 ret = gpiod_request(desc, label);
3370 if (ret) 3369 if (ret)
3371 return ERR_PTR(ret); 3370 return ERR_PTR(ret);
3372 3371
3373 if (active_low) 3372 if (active_low)
3374 set_bit(FLAG_ACTIVE_LOW, &desc->flags); 3373 lflags |= GPIO_ACTIVE_LOW;
3375 3374
3376 if (single_ended) { 3375 if (single_ended) {
3377 if (active_low) 3376 if (active_low)
3378 set_bit(FLAG_OPEN_DRAIN, &desc->flags); 3377 lflags |= GPIO_OPEN_DRAIN;
3379 else 3378 else
3380 set_bit(FLAG_OPEN_SOURCE, &desc->flags); 3379 lflags |= GPIO_OPEN_SOURCE;
3380 }
3381
3382 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
3383 if (ret < 0) {
3384 gpiod_put(desc);
3385 return ERR_PTR(ret);
3381 } 3386 }
3382 3387
3383 return desc; 3388 return desc;
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index d10eaf520860..2495b7ee1b42 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -76,7 +76,8 @@ struct gpio_device {
76/** 76/**
77 * struct acpi_gpio_info - ACPI GPIO specific information 77 * struct acpi_gpio_info - ACPI GPIO specific information
78 * @gpioint: if %true this GPIO is of type GpioInt otherwise type is GpioIo 78 * @gpioint: if %true this GPIO is of type GpioInt otherwise type is GpioIo
79 * @active_low: in case of @gpioint, the pin is active low 79 * @polarity: interrupt polarity as provided by ACPI
80 * @triggering: triggering type as provided by ACPI
80 */ 81 */
81struct acpi_gpio_info { 82struct acpi_gpio_info {
82 bool gpioint; 83 bool gpioint;
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
index 9c92cdf196e3..da3d362f21b1 100644
--- a/drivers/input/keyboard/gpio_keys.c
+++ b/drivers/input/keyboard/gpio_keys.c
@@ -485,7 +485,10 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
485 spin_lock_init(&bdata->lock); 485 spin_lock_init(&bdata->lock);
486 486
487 if (child) { 487 if (child) {
488 bdata->gpiod = devm_get_gpiod_from_child(dev, NULL, child); 488 bdata->gpiod = devm_fwnode_get_gpiod_from_child(dev, NULL,
489 child,
490 GPIOD_IN,
491 desc);
489 if (IS_ERR(bdata->gpiod)) { 492 if (IS_ERR(bdata->gpiod)) {
490 error = PTR_ERR(bdata->gpiod); 493 error = PTR_ERR(bdata->gpiod);
491 if (error == -ENOENT) { 494 if (error == -ENOENT) {
@@ -500,13 +503,6 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
500 error); 503 error);
501 return error; 504 return error;
502 } 505 }
503 } else {
504 error = gpiod_direction_input(bdata->gpiod);
505 if (error) {
506 dev_err(dev, "Failed to configure GPIO %d as input: %d\n",
507 desc_to_gpio(bdata->gpiod), error);
508 return error;
509 }
510 } 506 }
511 } else if (gpio_is_valid(button->gpio)) { 507 } else if (gpio_is_valid(button->gpio)) {
512 /* 508 /*
diff --git a/drivers/input/keyboard/gpio_keys_polled.c b/drivers/input/keyboard/gpio_keys_polled.c
index 4fce43a6a0e0..edc7262103b9 100644
--- a/drivers/input/keyboard/gpio_keys_polled.c
+++ b/drivers/input/keyboard/gpio_keys_polled.c
@@ -303,8 +303,10 @@ static int gpio_keys_polled_probe(struct platform_device *pdev)
303 return -EINVAL; 303 return -EINVAL;
304 } 304 }
305 305
306 bdata->gpiod = devm_get_gpiod_from_child(dev, NULL, 306 bdata->gpiod = devm_fwnode_get_gpiod_from_child(dev,
307 child); 307 NULL, child,
308 GPIOD_IN,
309 button->desc);
308 if (IS_ERR(bdata->gpiod)) { 310 if (IS_ERR(bdata->gpiod)) {
309 error = PTR_ERR(bdata->gpiod); 311 error = PTR_ERR(bdata->gpiod);
310 if (error != -EPROBE_DEFER) 312 if (error != -EPROBE_DEFER)
@@ -314,14 +316,6 @@ static int gpio_keys_polled_probe(struct platform_device *pdev)
314 fwnode_handle_put(child); 316 fwnode_handle_put(child);
315 return error; 317 return error;
316 } 318 }
317
318 error = gpiod_direction_input(bdata->gpiod);
319 if (error) {
320 dev_err(dev, "Failed to configure GPIO %d as input: %d\n",
321 desc_to_gpio(bdata->gpiod), error);
322 fwnode_handle_put(child);
323 return error;
324 }
325 } else if (gpio_is_valid(button->gpio)) { 319 } else if (gpio_is_valid(button->gpio)) {
326 /* 320 /*
327 * Legacy GPIO number so request the GPIO here and 321 * Legacy GPIO number so request the GPIO here and
diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c
index d400dcaf4d29..066fc7590729 100644
--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
@@ -174,12 +174,6 @@ static struct gpio_leds_priv *gpio_leds_create(struct platform_device *pdev)
174 const char *state = NULL; 174 const char *state = NULL;
175 struct device_node *np = to_of_node(child); 175 struct device_node *np = to_of_node(child);
176 176
177 led.gpiod = devm_get_gpiod_from_child(dev, NULL, child);
178 if (IS_ERR(led.gpiod)) {
179 fwnode_handle_put(child);
180 return ERR_CAST(led.gpiod);
181 }
182
183 ret = fwnode_property_read_string(child, "label", &led.name); 177 ret = fwnode_property_read_string(child, "label", &led.name);
184 if (ret && IS_ENABLED(CONFIG_OF) && np) 178 if (ret && IS_ENABLED(CONFIG_OF) && np)
185 led.name = np->name; 179 led.name = np->name;
@@ -188,6 +182,14 @@ static struct gpio_leds_priv *gpio_leds_create(struct platform_device *pdev)
188 return ERR_PTR(-EINVAL); 182 return ERR_PTR(-EINVAL);
189 } 183 }
190 184
185 led.gpiod = devm_fwnode_get_gpiod_from_child(dev, NULL, child,
186 GPIOD_ASIS,
187 led.name);
188 if (IS_ERR(led.gpiod)) {
189 fwnode_handle_put(child);
190 return ERR_CAST(led.gpiod);
191 }
192
191 fwnode_property_read_string(child, "linux,default-trigger", 193 fwnode_property_read_string(child, "linux,default-trigger",
192 &led.default_trigger); 194 &led.default_trigger);
193 195
diff --git a/drivers/video/fbdev/amba-clcd-nomadik.c b/drivers/video/fbdev/amba-clcd-nomadik.c
index 0c06fcaaa6e8..476ff3f4d466 100644
--- a/drivers/video/fbdev/amba-clcd-nomadik.c
+++ b/drivers/video/fbdev/amba-clcd-nomadik.c
@@ -184,32 +184,31 @@ static void tpg110_init(struct device *dev, struct device_node *np,
184{ 184{
185 dev_info(dev, "TPG110 display init\n"); 185 dev_info(dev, "TPG110 display init\n");
186 186
187 grestb = devm_get_gpiod_from_child(dev, "grestb", &np->fwnode); 187 /* This asserts the GRESTB signal, putting the display into reset */
188 grestb = devm_fwnode_get_gpiod_from_child(dev, "grestb", &np->fwnode,
189 GPIOD_OUT_HIGH, "grestb");
188 if (IS_ERR(grestb)) { 190 if (IS_ERR(grestb)) {
189 dev_err(dev, "no GRESTB GPIO\n"); 191 dev_err(dev, "no GRESTB GPIO\n");
190 return; 192 return;
191 } 193 }
192 /* This asserts the GRESTB signal, putting the display into reset */ 194 scen = devm_fwnode_get_gpiod_from_child(dev, "scen", &np->fwnode,
193 gpiod_direction_output(grestb, 1); 195 GPIOD_OUT_LOW, "scen");
194
195 scen = devm_get_gpiod_from_child(dev, "scen", &np->fwnode);
196 if (IS_ERR(scen)) { 196 if (IS_ERR(scen)) {
197 dev_err(dev, "no SCEN GPIO\n"); 197 dev_err(dev, "no SCEN GPIO\n");
198 return; 198 return;
199 } 199 }
200 gpiod_direction_output(scen, 0); 200 scl = devm_fwnode_get_gpiod_from_child(dev, "scl", &np->fwnode,
201 scl = devm_get_gpiod_from_child(dev, "scl", &np->fwnode); 201 GPIOD_OUT_LOW, "scl");
202 if (IS_ERR(scl)) { 202 if (IS_ERR(scl)) {
203 dev_err(dev, "no SCL GPIO\n"); 203 dev_err(dev, "no SCL GPIO\n");
204 return; 204 return;
205 } 205 }
206 gpiod_direction_output(scl, 0); 206 sda = devm_fwnode_get_gpiod_from_child(dev, "sda", &np->fwnode,
207 sda = devm_get_gpiod_from_child(dev, "sda", &np->fwnode); 207 GPIOD_OUT_LOW, "sda");
208 if (IS_ERR(sda)) { 208 if (IS_ERR(sda)) {
209 dev_err(dev, "no SDA GPIO\n"); 209 dev_err(dev, "no SDA GPIO\n");
210 return; 210 return;
211 } 211 }
212 gpiod_direction_output(sda, 0);
213 board->enable = tpg110_enable; 212 board->enable = tpg110_enable;
214 board->disable = tpg110_disable; 213 board->disable = tpg110_disable;
215} 214}
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index fb0fde686cb1..2484b2fcc6eb 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -135,10 +135,24 @@ int desc_to_gpio(const struct gpio_desc *desc);
135struct fwnode_handle; 135struct fwnode_handle;
136 136
137struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, 137struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
138 const char *propname); 138 const char *propname, int index,
139struct gpio_desc *devm_get_gpiod_from_child(struct device *dev, 139 enum gpiod_flags dflags,
140 const char *con_id, 140 const char *label);
141 struct fwnode_handle *child); 141struct gpio_desc *devm_fwnode_get_index_gpiod_from_child(struct device *dev,
142 const char *con_id, int index,
143 struct fwnode_handle *child,
144 enum gpiod_flags flags,
145 const char *label);
146/* FIXME: delete this helper when users are switched over */
147static inline struct gpio_desc *devm_get_gpiod_from_child(struct device *dev,
148 const char *con_id, struct fwnode_handle *child)
149{
150 return devm_fwnode_get_index_gpiod_from_child(dev, con_id,
151 0, child,
152 GPIOD_ASIS,
153 "?");
154}
155
142#else /* CONFIG_GPIOLIB */ 156#else /* CONFIG_GPIOLIB */
143 157
144static inline int gpiod_count(struct device *dev, const char *con_id) 158static inline int gpiod_count(struct device *dev, const char *con_id)
@@ -411,20 +425,45 @@ static inline int desc_to_gpio(const struct gpio_desc *desc)
411/* Child properties interface */ 425/* Child properties interface */
412struct fwnode_handle; 426struct fwnode_handle;
413 427
414static inline struct gpio_desc *fwnode_get_named_gpiod( 428static inline
415 struct fwnode_handle *fwnode, const char *propname) 429struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
430 const char *propname, int index,
431 enum gpiod_flags dflags,
432 const char *label)
416{ 433{
417 return ERR_PTR(-ENOSYS); 434 return ERR_PTR(-ENOSYS);
418} 435}
419 436
420static inline struct gpio_desc *devm_get_gpiod_from_child( 437static inline
421 struct device *dev, const char *con_id, struct fwnode_handle *child) 438struct gpio_desc *devm_fwnode_get_index_gpiod_from_child(struct device *dev,
439 const char *con_id, int index,
440 struct fwnode_handle *child,
441 enum gpiod_flags flags,
442 const char *label)
443{
444 return ERR_PTR(-ENOSYS);
445}
446
447/* FIXME: delete this when all users are switched over */
448static inline struct gpio_desc *devm_get_gpiod_from_child(struct device *dev,
449 const char *con_id, struct fwnode_handle *child)
422{ 450{
423 return ERR_PTR(-ENOSYS); 451 return ERR_PTR(-ENOSYS);
424} 452}
425 453
426#endif /* CONFIG_GPIOLIB */ 454#endif /* CONFIG_GPIOLIB */
427 455
456static inline
457struct gpio_desc *devm_fwnode_get_gpiod_from_child(struct device *dev,
458 const char *con_id,
459 struct fwnode_handle *child,
460 enum gpiod_flags flags,
461 const char *label)
462{
463 return devm_fwnode_get_index_gpiod_from_child(dev, con_id, 0, child,
464 flags, label);
465}
466
428#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) 467#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
429 468
430int gpiod_export(struct gpio_desc *desc, bool direction_may_change); 469int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
diff --git a/include/linux/platform_data/gpio-davinci.h b/include/linux/platform_data/gpio-davinci.h
index 6ace3fd32b6a..90ae19ca828f 100644
--- a/include/linux/platform_data/gpio-davinci.h
+++ b/include/linux/platform_data/gpio-davinci.h
@@ -21,23 +21,28 @@
21 21
22#include <asm-generic/gpio.h> 22#include <asm-generic/gpio.h>
23 23
24#define MAX_REGS_BANKS 5
25
24struct davinci_gpio_platform_data { 26struct davinci_gpio_platform_data {
25 u32 ngpio; 27 u32 ngpio;
26 u32 gpio_unbanked; 28 u32 gpio_unbanked;
27}; 29};
28 30
31struct davinci_gpio_irq_data {
32 void __iomem *regs;
33 struct davinci_gpio_controller *chip;
34 int bank_num;
35};
29 36
30struct davinci_gpio_controller { 37struct davinci_gpio_controller {
31 struct gpio_chip chip; 38 struct gpio_chip chip;
32 struct irq_domain *irq_domain; 39 struct irq_domain *irq_domain;
33 /* Serialize access to GPIO registers */ 40 /* Serialize access to GPIO registers */
34 spinlock_t lock; 41 spinlock_t lock;
35 void __iomem *regs; 42 void __iomem *regs[MAX_REGS_BANKS];
36 void __iomem *set_data;
37 void __iomem *clr_data;
38 void __iomem *in_data;
39 int gpio_unbanked; 43 int gpio_unbanked;
40 unsigned gpio_irq; 44 unsigned int base_irq;
45 unsigned int base;
41}; 46};
42 47
43/* 48/*
diff --git a/tools/gpio/.gitignore b/tools/gpio/.gitignore
new file mode 100644
index 000000000000..9e9dd4b681b2
--- /dev/null
+++ b/tools/gpio/.gitignore
@@ -0,0 +1,4 @@
1gpio-event-mon
2gpio-hammer
3lsgpio
4
diff --git a/tools/gpio/gpio-hammer.c b/tools/gpio/gpio-hammer.c
index f1eab587dfea..4bcb234c0fca 100644
--- a/tools/gpio/gpio-hammer.c
+++ b/tools/gpio/gpio-hammer.c
@@ -38,7 +38,7 @@ int hammer_device(const char *device_name, unsigned int *lines, int nlines,
38 memset(&data.values, 0, sizeof(data.values)); 38 memset(&data.values, 0, sizeof(data.values));
39 ret = gpiotools_request_linehandle(device_name, lines, nlines, 39 ret = gpiotools_request_linehandle(device_name, lines, nlines,
40 GPIOHANDLE_REQUEST_OUTPUT, &data, 40 GPIOHANDLE_REQUEST_OUTPUT, &data,
41 "gpio-hammler"); 41 "gpio-hammer");
42 if (ret < 0) 42 if (ret < 0)
43 goto exit_error; 43 goto exit_error;
44 else 44 else
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-25 09:54:40 -0400