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authorXiangliang Yu <Xiangliang.Yu@amd.com>2017-01-12 01:53:08 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-01-27 11:13:23 -0500
commit1e9f1392795e63f20d109b2ee6d44a7ffc99b7ab (patch)
treea45daaa4d53242ae4ce759d3a0e9c806074dae7d
parentbc992ba5a3c19c79873fab46f17dcb20a9b84a85 (diff)
drm/amdgpu/virt: add high level interfaces for virt
Add high level interfaces that is not relate to specific asic. So asic files just need to implement the interfaces to support virtualization. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c67
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h23
2 files changed, 85 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 00583baab132..6e63e7f3025c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -149,3 +149,70 @@ void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
149 DRM_ERROR("wait for kiq fence error: %ld.\n", r); 149 DRM_ERROR("wait for kiq fence error: %ld.\n", r);
150 dma_fence_put(f); 150 dma_fence_put(f);
151} 151}
152
153/**
154 * amdgpu_virt_request_full_gpu() - request full gpu access
155 * @amdgpu: amdgpu device.
156 * @init: is driver init time.
157 * When start to init/fini driver, first need to request full gpu access.
158 * Return: Zero if request success, otherwise will return error.
159 */
160int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init)
161{
162 struct amdgpu_virt *virt = &adev->virt;
163 int r;
164
165 if (virt->ops && virt->ops->req_full_gpu) {
166 r = virt->ops->req_full_gpu(adev, init);
167 if (r)
168 return r;
169
170 adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;
171 }
172
173 return 0;
174}
175
176/**
177 * amdgpu_virt_release_full_gpu() - release full gpu access
178 * @amdgpu: amdgpu device.
179 * @init: is driver init time.
180 * When finishing driver init/fini, need to release full gpu access.
181 * Return: Zero if release success, otherwise will returen error.
182 */
183int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init)
184{
185 struct amdgpu_virt *virt = &adev->virt;
186 int r;
187
188 if (virt->ops && virt->ops->rel_full_gpu) {
189 r = virt->ops->rel_full_gpu(adev, init);
190 if (r)
191 return r;
192
193 adev->virt.caps |= AMDGPU_SRIOV_CAPS_RUNTIME;
194 }
195 return 0;
196}
197
198/**
199 * amdgpu_virt_reset_gpu() - reset gpu
200 * @amdgpu: amdgpu device.
201 * Send reset command to GPU hypervisor to reset GPU that VM is using
202 * Return: Zero if reset success, otherwise will return error.
203 */
204int amdgpu_virt_reset_gpu(struct amdgpu_device *adev)
205{
206 struct amdgpu_virt *virt = &adev->virt;
207 int r;
208
209 if (virt->ops && virt->ops->reset_gpu) {
210 r = virt->ops->reset_gpu(adev);
211 if (r)
212 return r;
213
214 adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME;
215 }
216
217 return 0;
218}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index 433f559bc4a1..d4605442026e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -30,13 +30,23 @@
30#define AMDGPU_PASSTHROUGH_MODE (1 << 3) /* thw whole GPU is pass through for VM */ 30#define AMDGPU_PASSTHROUGH_MODE (1 << 3) /* thw whole GPU is pass through for VM */
31#define AMDGPU_SRIOV_CAPS_RUNTIME (1 << 4) /* is out of full access mode */ 31#define AMDGPU_SRIOV_CAPS_RUNTIME (1 << 4) /* is out of full access mode */
32 32
33/**
34 * struct amdgpu_virt_ops - amdgpu device virt operations
35 */
36struct amdgpu_virt_ops {
37 int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
38 int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
39 int (*reset_gpu)(struct amdgpu_device *adev);
40};
41
33/* GPU virtualization */ 42/* GPU virtualization */
34struct amdgpu_virt { 43struct amdgpu_virt {
35 uint32_t caps; 44 uint32_t caps;
36 struct amdgpu_bo *csa_obj; 45 struct amdgpu_bo *csa_obj;
37 uint64_t csa_vmid0_addr; 46 uint64_t csa_vmid0_addr;
38 uint32_t reg_val_offs; 47 uint32_t reg_val_offs;
39 struct mutex lock; 48 struct mutex lock;
49 const struct amdgpu_virt_ops *ops;
40}; 50};
41 51
42#define AMDGPU_CSA_SIZE (8 * 1024) 52#define AMDGPU_CSA_SIZE (8 * 1024)
@@ -72,5 +82,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm);
72void amdgpu_virt_init_setting(struct amdgpu_device *adev); 82void amdgpu_virt_init_setting(struct amdgpu_device *adev);
73uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); 83uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
74void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 84void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
85int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);
86int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init);
87int amdgpu_virt_reset_gpu(struct amdgpu_device *adev);
75 88
76#endif 89#endif