diff options
author | Horia Geantă <horia.geanta@nxp.com> | 2016-08-04 13:02:46 -0400 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2016-08-08 11:43:49 -0400 |
commit | 1d2d87e81ea21f64c19b95ef228b865a6880e17e (patch) | |
tree | 0a0d36e51f1e0456d1f1f9cf4600eb9aa7bbb96d | |
parent | f743e70e8f8f3200dde1dcf50c14aa2900d65071 (diff) |
crypto: caam - fix echainiv(authenc) encrypt shared descriptor
There are a few things missed by the conversion to the
new AEAD interface:
1 - echainiv(authenc) encrypt shared descriptor
The shared descriptor is incorrect: due to the order of operations,
at some point in time MATH3 register is being overwritten.
2 - buffer used for echainiv(authenc) encrypt shared descriptor
Encrypt and givencrypt shared descriptors (for AEAD ops) are mutually
exclusive and thus use the same buffer in context state: sh_desc_enc.
However, there's one place missed by s/sh_desc_givenc/sh_desc_enc,
leading to errors when echainiv(authenc(...)) algorithms are used:
DECO: desc idx 14: Header Error. Invalid length or parity, or
certain other problems.
While here, also fix a typo: dma_mapping_error() is checking
for validity of sh_desc_givenc_dma instead of sh_desc_enc_dma.
Cc: <stable@vger.kernel.org> # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r-- | drivers/crypto/caam/caamalg.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c index ea8189f4b021..e356005a7212 100644 --- a/drivers/crypto/caam/caamalg.c +++ b/drivers/crypto/caam/caamalg.c | |||
@@ -614,7 +614,7 @@ skip_enc: | |||
614 | keys_fit_inline = true; | 614 | keys_fit_inline = true; |
615 | 615 | ||
616 | /* aead_givencrypt shared descriptor */ | 616 | /* aead_givencrypt shared descriptor */ |
617 | desc = ctx->sh_desc_givenc; | 617 | desc = ctx->sh_desc_enc; |
618 | 618 | ||
619 | /* Note: Context registers are saved. */ | 619 | /* Note: Context registers are saved. */ |
620 | init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686); | 620 | init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686); |
@@ -645,13 +645,13 @@ copy_iv: | |||
645 | append_operation(desc, ctx->class2_alg_type | | 645 | append_operation(desc, ctx->class2_alg_type | |
646 | OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT); | 646 | OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT); |
647 | 647 | ||
648 | /* ivsize + cryptlen = seqoutlen - authsize */ | ||
649 | append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize); | ||
650 | |||
651 | /* Read and write assoclen bytes */ | 648 | /* Read and write assoclen bytes */ |
652 | append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); | 649 | append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); |
653 | append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); | 650 | append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); |
654 | 651 | ||
652 | /* ivsize + cryptlen = seqoutlen - authsize */ | ||
653 | append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize); | ||
654 | |||
655 | /* Skip assoc data */ | 655 | /* Skip assoc data */ |
656 | append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); | 656 | append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); |
657 | 657 | ||
@@ -697,7 +697,7 @@ copy_iv: | |||
697 | ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc, | 697 | ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc, |
698 | desc_bytes(desc), | 698 | desc_bytes(desc), |
699 | DMA_TO_DEVICE); | 699 | DMA_TO_DEVICE); |
700 | if (dma_mapping_error(jrdev, ctx->sh_desc_givenc_dma)) { | 700 | if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) { |
701 | dev_err(jrdev, "unable to map shared descriptor\n"); | 701 | dev_err(jrdev, "unable to map shared descriptor\n"); |
702 | return -ENOMEM; | 702 | return -ENOMEM; |
703 | } | 703 | } |