ARM: dts: at91: sama5d2: add nodes for I2S controllers

This patch adds DT nodes for I2S0 and I2S1. It also adds an alias for
each I2S node.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[codrin.ciubotariu@microchip.com: removed unnecessary clock phandles]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

1 files changed, 38 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 8b5c18f2b848..ea5fb26ac74a 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -59,6 +59,8 @@
                 serial1 = &uart3;
                 tcb0 = &tcb0;
                 tcb1 = &tcb1;
+                i2s0 = &i2s0;
+                i2s1 = &i2s1;
         };
 
         cpus {
@@ -1314,6 +1316,24 @@
                                 clocks = <&clk32k>;
                         };
 
+                        i2s0: i2s@f8050000 {
+                                compatible = "atmel,sama5d2-i2s";
+                                reg = <0xf8050000 0x100>;
+                                interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
+                                dmas = <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                         AT91_XDMAC_DT_PERID(31))>,
+                                       <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                         AT91_XDMAC_DT_PERID(32))>;
+                                dma-names = "tx", "rx";
+                                clocks = <&i2s0_clk>, <&i2s0_gclk>;
+                                clock-names = "pclk", "gclk";
+                                assigned-clocks = <&i2s0muxck>;
+                                assigned-clock-parents = <&i2s0_gclk>;
+                                status = "disabled";
+                        };
+
                         can0: can@f8054000 {
                                 compatible = "bosch,m_can";
                                 reg = <0xf8054000 0x4000>, <0x210000 0x4000>;
@@ -1518,6 +1538,24 @@
                                 status = "disabled";
                         };
 
+                        i2s1: i2s@fc04c000 {
+                                compatible = "atmel,sama5d2-i2s";
+                                reg = <0xfc04c000 0x100>;
+                                interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>;
+                                dmas = <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                         AT91_XDMAC_DT_PERID(33))>,
+                                       <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                         AT91_XDMAC_DT_PERID(34))>;
+                                dma-names = "tx", "rx";
+                                clocks = <&i2s1_clk>, <&i2s1_gclk>;
+                                clock-names = "pclk", "gclk";
+                                assigned-clocks = <&i2s1muxck>;
+                                assigned-parrents = <&i2s1_gclk>;
+                                status = "disabled";
+                        };
+
                         can1: can@fc050000 {
                                 compatible = "bosch,m_can";
                                 reg = <0xfc050000 0x4000>, <0x210000 0x4000>;