ARM: dts: r8a7790: lager: Enable UHS-I SDR-50

Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}.

Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

1 files changed, 20 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 823a119cb1b4..749ba02b6a53 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -345,11 +345,25 @@
         sdhi0_pins: sd0 {
                 groups = "sdhi0_data4", "sdhi0_ctrl";
                 function = "sdhi0";
+                power-source = <3300>;
+        };
+
+        sdhi0_pins_uhs: sd0_uhs {
+                groups = "sdhi0_data4", "sdhi0_ctrl";
+                function = "sdhi0";
+                power-source = <1800>;
         };
 
         sdhi2_pins: sd2 {
                 groups = "sdhi2_data4", "sdhi2_ctrl";
                 function = "sdhi2";
+                power-source = <3300>;
+        };
+
+        sdhi2_pins_uhs: sd2_uhs {
+                groups = "sdhi2_data4", "sdhi2_ctrl";
+                function = "sdhi2";
+                power-source = <1800>;
         };
 
         mmc1_pins: mmc1 {
@@ -538,21 +552,25 @@
 
 &sdhi0 {
         pinctrl-0 = <&sdhi0_pins>;
-        pinctrl-names = "default";
+        pinctrl-1 = <&sdhi0_pins_uhs>;
+        pinctrl-names = "default", "state_uhs";
 
         vmmc-supply = <&vcc_sdhi0>;
         vqmmc-supply = <&vccq_sdhi0>;
         cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+        sd-uhs-sdr50;
         status = "okay";
 };
 
 &sdhi2 {
         pinctrl-0 = <&sdhi2_pins>;
-        pinctrl-names = "default";
+        pinctrl-1 = <&sdhi2_pins_uhs>;
+        pinctrl-names = "default", "state_uhs";
 
         vmmc-supply = <&vcc_sdhi2>;
         vqmmc-supply = <&vccq_sdhi2>;
         cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+        sd-uhs-sdr50;
         status = "okay";
 };