powerpc/powernv: Tell OPAL about our MMU mode on POWER9

That will allow OPAL to configure the CPU in an optimal way.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

3 files changed, 36 insertions, 3 deletions

diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h
index ef930ba500f9..3130a73652c7 100644
--- a/arch/powerpc/include/asm/opal-api.h
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -876,6 +876,15 @@ struct OpalIoPhb4ErrorData {
 enum {
         OPAL_REINIT_CPUS_HILE_BE        = (1 << 0),
         OPAL_REINIT_CPUS_HILE_LE        = (1 << 1),
+
+        /* These two define the base MMU mode of the host on P9
+         *
+         * On P9 Nimbus DD2.0 and Cumlus (and later), KVM can still
+         * create hash guests in "radix" mode with care (full core
+         * switch only).
+         */
+        OPAL_REINIT_CPUS_MMU_HASH       = (1 << 2),
+        OPAL_REINIT_CPUS_MMU_RADIX      = (1 << 3),
 };
 
 typedef struct oppanel_line {
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index 59684b4af4d1..9b87abb178f0 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -59,6 +59,8 @@ static struct task_struct *kopald_tsk;
 
 void opal_configure_cores(void)
 {
+        u64 reinit_flags = 0;
+
         /* Do the actual re-init, This will clobber all FPRs, VRs, etc...
          *
          * It will preserve non volatile GPRs and HSPRG0/1. It will
@@ -66,11 +68,24 @@ void opal_configure_cores(void)
          * but it might clobber a bunch.
          */
 #ifdef __BIG_ENDIAN__
-        opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE);
+        reinit_flags |= OPAL_REINIT_CPUS_HILE_BE;
 #else
-        opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_LE);
+        reinit_flags |= OPAL_REINIT_CPUS_HILE_LE;
 #endif
 
+        /*
+         * POWER9 always support running hash:
+         *  ie. Host hash  supports  hash guests
+         *      Host radix supports  hash/radix guests
+         */
+        if (cpu_has_feature(CPU_FTR_ARCH_300)) {
+                reinit_flags |= OPAL_REINIT_CPUS_MMU_HASH;
+                if (early_radix_enabled())
+                        reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX;
+        }
+
+        opal_reinit_cpus(reinit_flags);
+
         /* Restore some bits */
         if (cur_cpu_spec->cpu_restore)
                 cur_cpu_spec->cpu_restore();
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 2dc7e5fb86c3..897aa1400eb8 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -225,6 +225,8 @@ static void pnv_kexec_wait_secondaries_down(void)
 
 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 {
+        u64 reinit_flags;
+
         if (xive_enabled())
                 xive_kexec_teardown_cpu(secondary);
         else
@@ -254,8 +256,15 @@ static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
                  * We might be running as little-endian - now that interrupts
                  * are disabled, reset the HILE bit to big-endian so we don't
                  * take interrupts in the wrong endian later
+                 *
+                 * We reinit to enable both radix and hash on P9 to ensure
+                 * the mode used by the next kernel is always supported.
                  */
-                opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE);
+                reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
+                if (cpu_has_feature(CPU_FTR_ARCH_300))
+                        reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
+                                OPAL_REINIT_CPUS_MMU_HASH;
+                opal_reinit_cpus(reinit_flags);
         }
 }
 #endif /* CONFIG_KEXEC_CORE */