diff options
| author | Hai Li <hali@codeaurora.org> | 2015-08-13 17:45:53 -0400 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2015-08-15 18:27:29 -0400 |
| commit | 1bf4d7c5651a7cfcdcd77389b42d266441ecf444 (patch) | |
| tree | a717863d41f4db6597b51c6cf66c5ea67e7f0a48 | |
| parent | 5c8290284402bf7d2c12269402b3177b899c78b7 (diff) | |
drm/msm/dsi: Make each PHY type compilation independent
On a certain platform, only one type of DSI PHY is used.
This change allows the user to only compile the PHY type
which is being used.
Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
| -rw-r--r-- | drivers/gpu/drm/msm/Kconfig | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/Makefile | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/pll/dsi_pll.h | 8 |
4 files changed, 33 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 331b29152e2f..8e6c7c638e24 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig | |||
| @@ -54,3 +54,17 @@ config DRM_MSM_DSI_PLL | |||
| 54 | help | 54 | help |
| 55 | Choose this option to enable DSI PLL driver which provides DSI | 55 | Choose this option to enable DSI PLL driver which provides DSI |
| 56 | source clocks under common clock framework. | 56 | source clocks under common clock framework. |
| 57 | |||
| 58 | config DRM_MSM_DSI_28NM_PHY | ||
| 59 | bool "Enable DSI 28nm PHY driver in MSM DRM" | ||
| 60 | depends on DRM_MSM_DSI | ||
| 61 | default y | ||
| 62 | help | ||
| 63 | Choose this option if the 28nm DSI PHY is used on the platform. | ||
| 64 | |||
| 65 | config DRM_MSM_DSI_20NM_PHY | ||
| 66 | bool "Enable DSI 20nm PHY driver in MSM DRM" | ||
| 67 | depends on DRM_MSM_DSI | ||
| 68 | default y | ||
| 69 | help | ||
| 70 | Choose this option if the 20nm DSI PHY is used on the platform. | ||
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 30f998ad9471..89debc7f22b0 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile | |||
| @@ -57,11 +57,14 @@ msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ | |||
| 57 | dsi/dsi_host.o \ | 57 | dsi/dsi_host.o \ |
| 58 | dsi/dsi_manager.o \ | 58 | dsi/dsi_manager.o \ |
| 59 | dsi/phy/dsi_phy.o \ | 59 | dsi/phy/dsi_phy.o \ |
| 60 | dsi/phy/dsi_phy_20nm.o \ | ||
| 61 | dsi/phy/dsi_phy_28nm.o \ | ||
| 62 | mdp/mdp5/mdp5_cmd_encoder.o | 60 | mdp/mdp5/mdp5_cmd_encoder.o |
| 63 | 61 | ||
| 64 | msm-$(CONFIG_DRM_MSM_DSI_PLL) += dsi/pll/dsi_pll.o \ | 62 | msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o |
| 65 | dsi/pll/dsi_pll_28nm.o | 63 | msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o |
| 64 | |||
| 65 | ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y) | ||
| 66 | msm-y += dsi/pll/dsi_pll.o | ||
| 67 | msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o | ||
| 68 | endif | ||
| 66 | 69 | ||
| 67 | obj-$(CONFIG_DRM_MSM) += msm.o | 70 | obj-$(CONFIG_DRM_MSM) += msm.o |
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c index 828a94cc7f39..401ff58d6893 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | |||
| @@ -267,12 +267,16 @@ static void dsi_phy_disable_resource(struct msm_dsi_phy *phy) | |||
| 267 | } | 267 | } |
| 268 | 268 | ||
| 269 | static const struct of_device_id dsi_phy_dt_match[] = { | 269 | static const struct of_device_id dsi_phy_dt_match[] = { |
| 270 | #ifdef CONFIG_DRM_MSM_DSI_28NM_PHY | ||
| 270 | { .compatible = "qcom,dsi-phy-28nm-hpm", | 271 | { .compatible = "qcom,dsi-phy-28nm-hpm", |
| 271 | .data = &dsi_phy_28nm_hpm_cfgs }, | 272 | .data = &dsi_phy_28nm_hpm_cfgs }, |
| 272 | { .compatible = "qcom,dsi-phy-28nm-lp", | 273 | { .compatible = "qcom,dsi-phy-28nm-lp", |
| 273 | .data = &dsi_phy_28nm_lp_cfgs }, | 274 | .data = &dsi_phy_28nm_lp_cfgs }, |
| 275 | #endif | ||
| 276 | #ifdef CONFIG_DRM_MSM_DSI_20NM_PHY | ||
| 274 | { .compatible = "qcom,dsi-phy-20nm", | 277 | { .compatible = "qcom,dsi-phy-20nm", |
| 275 | .data = &dsi_phy_20nm_cfgs }, | 278 | .data = &dsi_phy_20nm_cfgs }, |
| 279 | #endif | ||
| 276 | {} | 280 | {} |
| 277 | }; | 281 | }; |
| 278 | 282 | ||
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h index b69df19f1fd4..063caa2c5740 100644 --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.h | |||
| @@ -83,8 +83,16 @@ void msm_dsi_pll_helper_unregister_clks(struct platform_device *pdev, | |||
| 83 | /* | 83 | /* |
| 84 | * Initialization for Each PLL Type | 84 | * Initialization for Each PLL Type |
| 85 | */ | 85 | */ |
| 86 | #ifdef CONFIG_DRM_MSM_DSI_28NM_PHY | ||
| 86 | struct msm_dsi_pll *msm_dsi_pll_28nm_init(struct platform_device *pdev, | 87 | struct msm_dsi_pll *msm_dsi_pll_28nm_init(struct platform_device *pdev, |
| 87 | enum msm_dsi_phy_type type, int id); | 88 | enum msm_dsi_phy_type type, int id); |
| 89 | #else | ||
| 90 | static inline struct msm_dsi_pll *msm_dsi_pll_28nm_init( | ||
| 91 | struct platform_device *pdev, enum msm_dsi_phy_type type, int id) | ||
| 92 | { | ||
| 93 | return ERR_PTR(-ENODEV); | ||
| 94 | } | ||
| 95 | #endif | ||
| 88 | 96 | ||
| 89 | #endif /* __DSI_PLL_H__ */ | 97 | #endif /* __DSI_PLL_H__ */ |
| 90 | 98 | ||
