arm64: dts: rockchip: add pd_sd power-domain node for rk3399

Add the sd power-domain, its qos area and assign it to the
sdmmc device node.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

1 files changed, 12 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cc4930a3e90a..fc30b57ac557 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -253,6 +253,7 @@
                          <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
                 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                 fifo-depth = <0x100>;
+                power-domains = <&power RK3399_PD_SD>;
                 status = "disabled";
         };
 
@@ -691,6 +692,11 @@
                 status = "disabled";
         };
 
+        qos_sd: qos@ffa74000 {
+                compatible = "syscon";
+                reg = <0x0 0xffa74000 0x0 0x20>;
+        };
+
         qos_emmc: qos@ffa58000 {
                 compatible = "syscon";
                 reg = <0x0 0xffa58000 0x0 0x20>;
@@ -840,6 +846,12 @@
                                          <&cru PCLK_GMAC>;
                                 pm_qos = <&qos_gmac>;
                         };
+                        pd_sd@RK3399_PD_SD {
+                                reg = <RK3399_PD_SD>;
+                                clocks = <&cru HCLK_SDMMC>,
+                                         <&cru SCLK_SDMMC>;
+                                pm_qos = <&qos_sd>;
+                        };
                         pd_vio@RK3399_PD_VIO {
                                 reg = <RK3399_PD_VIO>;
                                 #address-cells = <1>;