diff options
author | Bjorn Andersson <bjorn.andersson@sonymobile.com> | 2015-06-05 18:52:24 -0400 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 04:19:18 -0400 |
commit | 1bb6fad359b147645e47cf826bc20e6b5b4d66b2 (patch) | |
tree | 07e29b54c6ebb2dd5eb47ad8f2b216383d8a5660 | |
parent | 6955e6b4f32f57aa156f1048ed39a607b4093003 (diff) |
pinctrl: dt-binding: Add DT binding documentation for MSM8660
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt new file mode 100644 index 000000000000..77aa11790163 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt | |||
@@ -0,0 +1,90 @@ | |||
1 | Qualcomm MSM8660 TLMM block | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: "qcom,msm8660-pinctrl" | ||
5 | - reg: Should be the base address and length of the TLMM block. | ||
6 | - interrupts: Should be the parent IRQ of the TLMM block. | ||
7 | - interrupt-controller: Marks the device node as an interrupt controller. | ||
8 | - #interrupt-cells: Should be two. | ||
9 | - gpio-controller: Marks the device node as a GPIO controller. | ||
10 | - #gpio-cells : Should be two. | ||
11 | The first cell is the gpio pin number and the | ||
12 | second cell is used for optional parameters. | ||
13 | |||
14 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | ||
15 | a general description of GPIO and interrupt bindings. | ||
16 | |||
17 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
18 | common pinctrl bindings used by client devices, including the meaning of the | ||
19 | phrase "pin configuration node". | ||
20 | |||
21 | Qualcomm's pin configuration nodes act as a container for an arbitrary number of | ||
22 | subnodes. Each of these subnodes represents some desired configuration for a | ||
23 | pin, a group, or a list of pins or groups. This configuration can include the | ||
24 | mux function to select on those pin(s)/group(s), and various pin configuration | ||
25 | parameters, such as pull-up, drive strength, etc. | ||
26 | |||
27 | The name of each subnode is not important; all subnodes should be enumerated | ||
28 | and processed purely based on their content. | ||
29 | |||
30 | Each subnode only affects those parameters that are explicitly listed. In | ||
31 | other words, a subnode that lists a mux function but no pin configuration | ||
32 | parameters implies no information about any pin configuration parameters. | ||
33 | Similarly, a pin subnode that describes a pullup parameter implies no | ||
34 | information about e.g. the mux function. | ||
35 | |||
36 | |||
37 | The following generic properties as defined in pinctrl-bindings.txt are valid | ||
38 | to specify in a pin configuration subnode: | ||
39 | |||
40 | pins, function, bias-disable, bias-pull-down, bias-pull,up, drive-strength, | ||
41 | output-low, output-high. | ||
42 | |||
43 | Non-empty subnodes must specify the 'pins' property. | ||
44 | |||
45 | Valid values for pins are: | ||
46 | gpio0-gpio172, sdc3_clk, sdc3_cmd, sdc3_data sdc4_clk, sdc4_cmd, sdc4_data | ||
47 | |||
48 | Valid values for function are: | ||
49 | gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a, gp_clk_1b, | ||
50 | gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, | ||
51 | gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, | ||
52 | gsbi2_spi_cs3_n, gsbi3, gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n, | ||
53 | gsbi4, gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12, hdmi, i2s, | ||
54 | lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2, sdc5, tsif1, tsif2, usb_fs1, | ||
55 | usb_fs1_oe_n, usb_fs2, usb_fs2_oe_n, vfe, vsens_alarm, | ||
56 | |||
57 | Example: | ||
58 | |||
59 | msmgpio: pinctrl@800000 { | ||
60 | compatible = "qcom,msm8660-pinctrl"; | ||
61 | reg = <0x800000 0x4000>; | ||
62 | |||
63 | gpio-controller; | ||
64 | #gpio-cells = <2>; | ||
65 | interrupt-controller; | ||
66 | #interrupt-cells = <2>; | ||
67 | interrupts = <0 16 0x4>; | ||
68 | |||
69 | pinctrl-names = "default"; | ||
70 | pinctrl-0 = <&gsbi12_uart>; | ||
71 | |||
72 | gsbi12_uart: gsbi12-uart { | ||
73 | mux { | ||
74 | pins = "gpio117", "gpio118"; | ||
75 | function = "gsbi12"; | ||
76 | }; | ||
77 | |||
78 | tx { | ||
79 | pins = "gpio118"; | ||
80 | drive-strength = <8>; | ||
81 | bias-disable; | ||
82 | }; | ||
83 | |||
84 | rx { | ||
85 | pins = "gpio117"; | ||
86 | drive-strength = <2>; | ||
87 | bias-pull-up; | ||
88 | }; | ||
89 | }; | ||
90 | }; | ||