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authorPaul Burton <paul.burton@imgtec.com>2016-07-04 14:35:08 -0400
committerPaolo Bonzini <pbonzini@redhat.com>2016-07-05 10:09:07 -0400
commit1b492600068d5fbd033196ce2bdb28735a23747e (patch)
tree92a555be75e0e50c6c669413d7ac44e5ed7056e8
parent1c66b79bb3b11942a98085fd89295cf6cddae41a (diff)
MIPS: inst.h: Rename cbcond{0,1}_op to pop{1,3}0_op
The opcodes currently defined in inst.h as cbcond0_op & cbcond1_op are actually defined in the MIPS base instruction set manuals as pop10 & pop30 respectively. Rename them as such, for consistency with the documentation. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--arch/mips/include/uapi/asm/inst.h4
-rw-r--r--arch/mips/kernel/branch.c4
-rw-r--r--arch/mips/math-emu/cp1emu.c4
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 3fc00e7b33c4..77429d1622b3 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -21,11 +21,11 @@
21enum major_op { 21enum major_op {
22 spec_op, bcond_op, j_op, jal_op, 22 spec_op, bcond_op, j_op, jal_op,
23 beq_op, bne_op, blez_op, bgtz_op, 23 beq_op, bne_op, blez_op, bgtz_op,
24 addi_op, cbcond0_op = addi_op, addiu_op, slti_op, sltiu_op, 24 addi_op, pop10_op = addi_op, addiu_op, slti_op, sltiu_op,
25 andi_op, ori_op, xori_op, lui_op, 25 andi_op, ori_op, xori_op, lui_op,
26 cop0_op, cop1_op, cop2_op, cop1x_op, 26 cop0_op, cop1_op, cop2_op, cop1x_op,
27 beql_op, bnel_op, blezl_op, bgtzl_op, 27 beql_op, bnel_op, blezl_op, bgtzl_op,
28 daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op, 28 daddi_op, pop30_op = daddi_op, daddiu_op, ldl_op, ldr_op,
29 spec2_op, jalx_op, mdmx_op, msa_op = mdmx_op, spec3_op, 29 spec2_op, jalx_op, mdmx_op, msa_op = mdmx_op, spec3_op,
30 lb_op, lh_op, lwl_op, lw_op, 30 lb_op, lh_op, lwl_op, lw_op,
31 lbu_op, lhu_op, lwr_op, lwu_op, 31 lbu_op, lhu_op, lwr_op, lwu_op,
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index fb9ed96d7858..46c227fc98f5 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -809,8 +809,8 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
809 regs->cp0_epc += 8; 809 regs->cp0_epc += 8;
810 break; 810 break;
811#endif 811#endif
812 case cbcond0_op: 812 case pop10_op:
813 case cbcond1_op: 813 case pop30_op:
814 /* Only valid for MIPS R6 */ 814 /* Only valid for MIPS R6 */
815 if (!cpu_has_mips_r6) { 815 if (!cpu_has_mips_r6) {
816 ret = -SIGILL; 816 ret = -SIGILL;
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 1bbf16581f19..6dc07fba187f 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -627,8 +627,8 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
627 dec_insn.pc_inc + 627 dec_insn.pc_inc +
628 dec_insn.next_pc_inc; 628 dec_insn.next_pc_inc;
629 return 1; 629 return 1;
630 case cbcond0_op: 630 case pop10_op:
631 case cbcond1_op: 631 case pop30_op:
632 if (!cpu_has_mips_r6) 632 if (!cpu_has_mips_r6)
633 break; 633 break;
634 if (insn.i_format.rt && !insn.i_format.rs) 634 if (insn.i_format.rt && !insn.i_format.rs)