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authorLen Brown <len.brown@intel.com>2015-05-11 17:27:10 -0400
committerIngo Molnar <mingo@kernel.org>2015-05-12 02:54:33 -0400
commit1a744cb356c57303fc97eb15a298032170f841fa (patch)
tree4b53ce69c8ec5a9a7ce3fec39223f213055d1d41
parentd68921f9bd148359e6d01c84aaa2e32bfbd82970 (diff)
x86/smp/boot: Remove 10ms delay from cpu_up() on modern processors
Modern processor familes do not require the 10ms delay in cpu_up() to de-assert INIT. This speeds up boot and resume by 10ms per (application) processor. Signed-off-by: Len Brown <len.brown@intel.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jan H. Schönherr <jschoenh@amazon.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/021ce30c88f216ad39686646421194dc25671e55.1431379433.git.len.brown@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r--arch/x86/kernel/smpboot.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 0629a8e513af..85bd6aad8c74 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -521,6 +521,7 @@ void __inquire_remote_apic(int apicid)
521 * many cores and don't require that delay. 521 * many cores and don't require that delay.
522 * 522 *
523 * Cmdline "init_cpu_udelay=" is available to over-ride this delay. 523 * Cmdline "init_cpu_udelay=" is available to over-ride this delay.
524 * Modern processor families are quirked to remove the delay entirely.
524 */ 525 */
525#define UDELAY_10MS_DEFAULT 10000 526#define UDELAY_10MS_DEFAULT 10000
526 527
@@ -534,6 +535,18 @@ static int __init cpu_init_udelay(char *str)
534} 535}
535early_param("cpu_init_udelay", cpu_init_udelay); 536early_param("cpu_init_udelay", cpu_init_udelay);
536 537
538static void __init smp_quirk_init_udelay(void)
539{
540 /* if cmdline changed it from default, leave it alone */
541 if (init_udelay != UDELAY_10MS_DEFAULT)
542 return;
543
544 /* if modern processor, use no delay */
545 if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 6)) ||
546 ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 >= 0xF)))
547 init_udelay = 0;
548}
549
537/* 550/*
538 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal 551 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
539 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this 552 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
@@ -1210,6 +1223,8 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
1210 uv_system_init(); 1223 uv_system_init();
1211 1224
1212 set_mtrr_aps_delayed_init(); 1225 set_mtrr_aps_delayed_init();
1226
1227 smp_quirk_init_udelay();
1213} 1228}
1214 1229
1215void arch_enable_nonboot_cpus_begin(void) 1230void arch_enable_nonboot_cpus_begin(void)