Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "A total of 380 patches this time, mostly adding support for more
  hardware in the device tree descriptions. There is not much exciting
  here for 4.11, but I've tried my best to condense the information from
  the pull requests I got into a readable summary.

  Noteworthy changes to existing platforms include:

   - The GIC memory map was a bit wrong almost everywhere and now gets
     fixed up

   - The Allwinner platforms convert to the generic pinmux properties

   - The Marvell EBU platforms now use the new DSA binding

   - Samsung Exynos4212 was unused and gets removed

   - The Renesas power management got improved

  New production machines:

   - Lego Mindstorms EV3:
        https://www.lego.com/en-us/mindstorms/about-ev3

   - Beelink X2 Android media box:
        http://linux-sunxi.org/Beelink_X2

   - "Romulus" baseboard management controller for OpenPower

   - Axentia TSE-850 Data Radio Channel (DARC) encoder:
        http://www.axentia.se/db/equipment.html

   - Luxul XAP-1410 and XWR-1200 wireless access points:
        https://luxul.com/xap-1410

  New SoCs:

   - Allwinner H2+ and V3s, both minor variations of already supported
     chips:
        http://www.allwinnertech.com/index.php?c=product&a=index&id=38

   - Marvell Prestera DX packet processors based on Armada XP
     architecture:
        http://www.marvell.com/switching/prestera-dx/

   - Samsung Exynos4412 Prime gets added, a minor variation of
     Exynos4412

  New developer and reference boards:

   - Lichee Pi One, Lichee Pi Zero and Orange Pi Zero, all based on
     Allwinner SoCs:
        http://linux-sunxi.org/LicheePi_One
        http://www.orangepi.org/orangepizero/

   - SAMA5d36ek Reference platform:
        http://www.atmel.com/tools/sama5d36-ek.aspx

   - Beaglebone Green Wireless and Black Wireless:
        https://beagleboard.org/black-wireless
        https://beagleboard.org/green-wireless

   - phyCORE-AM335x System on Module:
        http://phytec.com/products/system-on-modules/phycore/am335x/

   - New revision of "vf610-zii" Zodiac Inflight Innovations board

   - Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam
     i.Core:
        http://www.opossom.com/english/index.html
        http://www.savageboard.org/
        http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul
        http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

   - Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is

   - Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas,
     qcom, rockchip, sti, stm32 and tegra

  New device supports added to some boards and SoCs, briefly by platform:

   - Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU

   - Aspeed: network, ipmi bt, gpio, pinmux

   - Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc

   - TI DaVinci: gpio, lcdc, usb, video-in, uart

   - TI Keystone 2: MSM RAM, power/reset, uart

   - Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal

   - Marvell EBU: ethernet switch on Turris Omnia

   - NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic, eeprom,
     mmc, nand

   - TI OMAP:

   - Qualcomm: coresight, gyro/accelerometer, hdmi

   - Renesas: pmic, soc-id

   - Rockchip: qos

   - Samsung: audio on Odroid-X

   - Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor

   - STi: video in/out

   - STM32: timer, pwm, i2c, rtc, add, i2s

   - NVIDIA Tegra: tpm

   - Uniphier: mmc/sd pinmux"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (380 commits)
  ARM: dts: armada-385-linksys: fix DSA compatible property
  ARM: dts: Fix typo in armada-xp-98dx4251
  ARM: DTS: Fix register map for virt-capable GIC
  dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
  ARM: dts: sun8i: sinlinx: Enable audio nodes
  ARM: dts: sun8i: parrot: Enable audio nodes
  ARM: dts: sun8i: Add audio codec, dai and card for A33
  ARM: dts: Add EMAC AXI settings for Arria10
  ARM: dts: am335x-chiliboard: Support charger
  ARM: dts: am335x-chiliboard: Support power button
  ARM: sun8i: dt: Add mali node
  dt-bindings: gpu: Add Mali Utgard bindings
  ARM: dts: stm32: Add I2C1 support for STM32429 eval board
  ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
  ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
  dt-bindings: mfd: stm32f4: Add missing binding definition
  dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
  ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
  ARM: dts: stm32: add Timers driver for stm32f429 MCU
  ARM: dts: add the AB8500 sysclk to the device trees
  ...

569 files changed, 17092 insertions, 5576 deletions

diff --git a/Documentation/devicetree/bindings/arm/axentia.txt b/Documentation/devicetree/bindings/arm/axentia.txt
new file mode 100644
index 000000000000..ea3fb96ae465
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/axentia.txt
@@ -0,0 +1,19 @@
+Device tree bindings for Axentia ARM devices
+============================================
+
+Linea CPU module
+----------------
+
+Required root node properties:
+compatible = "axentia,linea",
+             "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+and following the rules from atmel-at91.txt for a sama5d31 SoC.
+
+
+TSE-850 v3 board
+----------------
+
+Required root node properties:
+compatible = "axentia,tse850v3", "axentia,linea",
+             "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+and following the rules from above for the axentia,linea CPU module.
diff --git a/Documentation/devicetree/bindings/arm/davinci.txt b/Documentation/devicetree/bindings/arm/davinci.txt
index f0841ce725b5..715622c36260 100644
--- a/Documentation/devicetree/bindings/arm/davinci.txt
+++ b/Documentation/devicetree/bindings/arm/davinci.txt
@@ -13,6 +13,10 @@ EnBW AM1808 based CMC board
 Required root node properties:
     - compatible = "enbw,cmc", "ti,da850;
 
+LEGO MINDSTORMS EV3 (AM1808 based)
+Required root node properties:
+    - compatible = "lego,ev3", "ti,da850";
+
 Generic DaVinci Boards
 ----------------------
 
diff --git a/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt b/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt
new file mode 100644
index 000000000000..64e8c73fc5ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell/98dx3236.txt
@@ -0,0 +1,23 @@
+Marvell 98DX3236, 98DX3336 and 98DX4251 Platforms Device Tree Bindings
+----------------------------------------------------------------------
+
+Boards with a SoC of the Marvell 98DX3236, 98DX3336 and 98DX4251 families
+shall have the following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armadaxp-98dx3236"
+
+In addition, boards using the Marvell 98DX3336 SoC shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armadaxp-98dx3336"
+
+In addition, boards using the Marvell 98DX4251 SoC shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armadaxp-98dx4251"
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 05f95c3ed7d4..8219b2c6bb29 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -151,6 +151,9 @@ Boards:
 - AM335X SBC-T335 : single board computer, built around the Sitara AM3352/4
   compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx"
 
+- AM335X phyCORE-AM335x: Development kit
+  compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx"
+
 - OMAP5 EVM : Evaluation Module
   compatible = "ti,omap5-evm", "ti,omap5"
 
diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt b/Documentation/devicetree/bindings/ata/ahci-da850.txt
new file mode 100644
index 000000000000..5f8193417725
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/ahci-da850.txt
@@ -0,0 +1,18 @@
+Device tree binding for the TI DA850 AHCI SATA Controller
+---------------------------------------------------------
+
+Required properties:
+  - compatible: must be "ti,da850-ahci"
+  - reg: physical base addresses and sizes of the two register regions
+         used by the controller: the register map as defined by the
+         AHCI 1.1 standard and the Power Down Control Register (PWRDN)
+         for enabling/disabling the SATA clock receiver
+  - interrupts: interrupt specifier (refer to the interrupt binding)
+
+Example:
+
+        sata: sata@218000 {
+                compatible = "ti,da850-ahci";
+                reg = <0x218000 0x2000>, <0x22c018 0x4>;
+                interrupts = <67>;
+        };
diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt b/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
index 0532d815dae3..8f19d87cbf24 100644
--- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
+++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
@@ -17,6 +17,9 @@ Required properties:
   property, containing a phandle to the clock device node, an index selecting
   between gated clocks and other clocks and an index specifying the clock to
   use.
+- clocks: External oscillator clock phandle
+  - high speed external clock signal (HSE)
+  - external I2S clock (I2S_CKIN)
 
 Example:
 
@@ -25,6 +28,7 @@ Example:
                 #clock-cells = <2>
                 compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
                 reg = <0x40023800 0x400>;
+                clocks = <&clk_hse>, <&clk_i2s_ckin>;
         };
 
 Specifying gated clocks
@@ -66,6 +70,19 @@ The secondary index is bound with the following magic numbers:
 
         0       SYSTICK
         1       FCLK
+        2       CLK_LSI         (low-power clock source)
+        3       CLK_LSE         (generated from a 32.768 kHz low-speed external
+                                 crystal or ceramic resonator)
+        4       CLK_HSE_RTC     (HSE division factor for RTC clock)
+        5       CLK_RTC         (real-time clock)
+        6       PLL_VCO_I2S     (vco frequency of I2S pll)
+        7       PLL_VCO_SAI     (vco frequency of SAI pll)
+        8       CLK_LCD         (LCD-TFT)
+        9       CLK_I2S         (I2S clocks)
+        10      CLK_SAI1        (audio clocks)
+        11      CLK_SAI2
+        12      CLK_I2SQ_PDIV   (post divisor of pll i2s q divisor)
+        13      CLK_SAIQ_PDIV   (post divisor of pll sai q divisor)
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/eeprom/eeprom.txt b/Documentation/devicetree/bindings/eeprom/eeprom.txt
index 735bc94444bb..5696eb508e95 100644
--- a/Documentation/devicetree/bindings/eeprom/eeprom.txt
+++ b/Documentation/devicetree/bindings/eeprom/eeprom.txt
@@ -10,6 +10,8 @@ Required properties:
 
         "catalyst,24c32"
 
+        "microchip,24c128"
+
         "ramtron,24c64"
 
         "renesas,r1ex24002"
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
new file mode 100644
index 000000000000..476f5ea6c627
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
@@ -0,0 +1,81 @@
+ARM Mali Utgard GPU
+===================
+
+Required properties:
+  - compatible
+    * Must be one of the following:
+      + "arm,mali-300"
+      + "arm,mali-400"
+      + "arm,mali-450"
+    * And, optionally, one of the vendor specific compatible:
+      + allwinner,sun4i-a10-mali
+      + allwinner,sun7i-a20-mali
+      + amlogic,meson-gxbb-mali
+      + amlogic,meson-gxl-mali
+      + stericsson,db8500-mali
+
+  - reg: Physical base address and length of the GPU registers
+
+  - interrupts: an entry for each entry in interrupt-names.
+    See ../interrupt-controller/interrupts.txt for details.
+
+  - interrupt-names:
+    * ppX: Pixel Processor X interrupt (X from 0 to 7)
+    * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
+    * pp: Pixel Processor broadcast interrupt (mali-450 only)
+    * gp: Geometry Processor interrupt
+    * gpmmu: Geometry Processor MMU interrupt
+
+  - clocks: an entry for each entry in clock-names
+  - clock-names:
+    * bus: bus clock for the GPU
+    * core: clock driving the GPU itself
+
+Optional properties:
+  - interrupt-names and interrupts:
+    * pmu: Power Management Unit interrupt, if implemented in hardware
+
+Vendor-specific bindings
+------------------------
+
+The Mali GPU is integrated very differently from one SoC to
+another. In order to accomodate those differences, you have the option
+to specify one more vendor-specific compatible, among:
+
+  - allwinner,sun4i-a10-mali
+    Required properties:
+      * resets: phandle to the reset line for the GPU
+
+  - allwinner,sun7i-a20-mali
+    Required properties:
+      * resets: phandle to the reset line for the GPU
+
+  - stericsson,db8500-mali
+    Required properties:
+      * interrupt-names and interrupts:
+        + combined: combined interrupt of all of the above lines
+
+Example:
+
+mali: gpu@1c40000 {
+        compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
+        reg = <0x01c40000 0x10000>;
+        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "gp",
+                          "gpmmu",
+                          "pp0",
+                          "ppmmu0",
+                          "pp1",
+                          "ppmmu1",
+                          "pmu";
+        clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+        clock-names = "bus", "core";
+        resets = <&ccu RST_BUS_GPU>;
+};
+
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
index 5393e2a45a42..560d8a727b8f 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
@@ -111,7 +111,7 @@ Example:
                 #interrupt-cells = <3>;
                 interrupt-controller;
                 reg = <0x2c001000 0x1000>,
-                      <0x2c002000 0x1000>,
+                      <0x2c002000 0x2000>,
                       <0x2c004000 0x2000>,
                       <0x2c006000 0x2000>;
                 interrupts = <1 9 0xf04>;
diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.txt b/Documentation/devicetree/bindings/net/marvell,prestera.txt
new file mode 100644
index 000000000000..5fbab29718e8
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/marvell,prestera.txt
@@ -0,0 +1,50 @@
+Marvell Prestera Switch Chip bindings
+-------------------------------------
+
+Required properties:
+- compatible: one of the following
+        "marvell,prestera-98dx3236",
+        "marvell,prestera-98dx3336",
+        "marvell,prestera-98dx4251",
+- reg: address and length of the register set for the device.
+- interrupts: interrupt for the device
+
+Optional properties:
+- dfx: phandle reference to the "DFX Server" node
+
+Example:
+
+switch {
+        compatible = "simple-bus";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>;
+
+        packet-processor@0 {
+                compatible = "marvell,prestera-98dx3236";
+                reg = <0 0x4000000>;
+                interrupts = <33>, <34>, <35>;
+                dfx = <&dfx>;
+        };
+};
+
+DFX Server bindings
+-------------------
+
+Required properties:
+- compatible: must be "marvell,dfx-server"
+- reg: address and length of the register set for the device.
+
+Example:
+
+dfx-registers {
+        compatible = "simple-bus";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
+
+        dfx: dfx@0 {
+                compatible = "marvell,dfx-server";
+                reg = <0 0x100000>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index ebd46f2eef24..f6824fd8fb65 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -164,11 +164,14 @@ kosagi	Sutajio Ko-Usagi PTE Ltd.
 kyo     Kyocera Corporation
 lacie   LaCie
 lantiq  Lantiq Semiconductor
+lego    LEGO Systems A/S
 lenovo  Lenovo Group Ltd.
 lg      LG Corporation
+licheepi        Lichee Pi
 linux   Linux-specific binding
 lltc    Linear Technology Corporation
 lsi     LSI Corp. (LSI Logic)
+lwn     Liebherr-Werk Nenzing GmbH
 macnica Macnica Americas
 marvell Marvell Technology Group Ltd.
 maxim   Maxim Integrated Products
@@ -232,6 +235,7 @@ pine64	Pine64
 pixcir  PIXCIR MICROELECTRONICS Co., Ltd
 plathome        Plat'Home Co., Ltd.
 plda    PLDA
+poslab  Poslab Technology Co., Ltd.
 powervr PowerVR (deprecated, use img)
 pulsedlight     PulsedLight, Inc
 qca     Qualcomm Atheros, Inc.
@@ -333,6 +337,7 @@ x-powers	X-Powers
 xes     Extreme Engineering Solutions (X-ES)
 xillybus        Xillybus Ltd.
 xlnx    Xilinx
+xunlong Shenzhen Xunlong Software CO.,Limited
 zarlink Zarlink Semiconductor
 zeitec  ZEITEC Semiconductor Co., LTD.
 zii     Zodiac Inflight Innovations
diff --git a/MAINTAINERS b/MAINTAINERS
index acf8ae1748e1..3ac9346cf6a8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2351,6 +2351,14 @@ S:	Maintained
 F:      Documentation/devicetree/bindings/sound/axentia,*
 F:      sound/soc/atmel/tse850-pcm5142.c
 
+AXENTIA ARM DEVICES
+M:      Peter Rosin <peda@axentia.se>
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Maintained
+F:      Documentation/devicetree/bindings/arm/axentia.txt
+F:      arch/arm/boot/dts/at91-linea.dtsi
+F:      arch/arm/boot/dts/at91-tse850-3.dts
+
 AZ6007 DVB DRIVER
 M:      Mauro Carvalho Chehab <mchehab@s-opensource.com>
 M:      Mauro Carvalho Chehab <mchehab@kernel.org>
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 01d178a2009f..011808490fed 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -48,11 +48,13 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
         at91-kizbox2.dtb \
         at91-sama5d2_xplained.dtb \
         at91-sama5d3_xplained.dtb \
+        at91-tse850-3.dtb \
         sama5d31ek.dtb \
         sama5d33ek.dtb \
         sama5d34ek.dtb \
         sama5d35ek.dtb \
         sama5d36ek.dtb \
+        sama5d36ek_cmp.dtb \
         at91-sama5d4_ma5d4evk.dtb \
         at91-sama5d4_xplained.dtb \
         at91-sama5d4ek.dtb \
@@ -83,6 +85,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
         bcm47081-asus-rt-n18u.dtb \
         bcm47081-buffalo-wzr-600dhp2.dtb \
         bcm47081-buffalo-wzr-900dhp.dtb \
+        bcm47081-luxul-xap-1410.dtb \
+        bcm47081-luxul-xwr-1200.dtb \
         bcm4709-asus-rt-ac87u.dtb \
         bcm4709-buffalo-wxr-1900dhp.dtb \
         bcm4709-netgear-r7000.dtb \
@@ -128,7 +132,8 @@ dtb-$(CONFIG_ARCH_CLPS711X) += \
 dtb-$(CONFIG_ARCH_DAVINCI) += \
         da850-lcdk.dtb \
         da850-enbw-cmc.dtb \
-        da850-evm.dtb
+        da850-evm.dtb \
+        da850-lego-ev3.dtb
 dtb-$(CONFIG_ARCH_DIGICOLOR) += \
         cx92755_equinox.dtb
 dtb-$(CONFIG_ARCH_EFM32) += \
@@ -349,6 +354,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
         imx6dl-gw553x.dtb \
         imx6dl-hummingboard.dtb \
         imx6dl-icore.dtb \
+        imx6dl-icore-rqs.dtb \
         imx6dl-nit6xlite.dtb \
         imx6dl-nitrogen6x.dtb \
         imx6dl-phytec-pbab01.dtb \
@@ -357,6 +363,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
         imx6dl-sabreauto.dtb \
         imx6dl-sabrelite.dtb \
         imx6dl-sabresd.dtb \
+        imx6dl-savageboard.dtb \
         imx6dl-ts4900.dtb \
         imx6dl-tx6dl-comtft.dtb \
         imx6dl-tx6s-8034.dtb \
@@ -393,6 +400,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
         imx6q-icore.dtb \
         imx6q-icore-rqs.dtb \
         imx6q-marsboard.dtb \
+        imx6q-mccmon6.dtb \
         imx6q-nitrogen6x.dtb \
         imx6q-nitrogen6_max.dtb \
         imx6q-nitrogen6_som2.dtb \
@@ -402,6 +410,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
         imx6q-sabreauto.dtb \
         imx6q-sabrelite.dtb \
         imx6q-sabresd.dtb \
+        imx6q-savageboard.dtb \
         imx6q-sbc6x.dtb \
         imx6q-tbs2910.dtb \
         imx6q-ts4900.dtb \
@@ -434,7 +443,10 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
 dtb-$(CONFIG_SOC_IMX6UL) += \
         imx6ul-14x14-evk.dtb \
         imx6ul-geam-kit.dtb \
+        imx6ul-isiot-emmc.dtb \
+        imx6ul-isiot-nand.dtb \
         imx6ul-liteboard.dtb \
+        imx6ul-opos6uldev.dtb \
         imx6ul-pico-hobbit.dtb \
         imx6ul-tx6ul-0010.dtb \
         imx6ul-tx6ul-0011.dtb \
@@ -458,7 +470,8 @@ dtb-$(CONFIG_SOC_VF610) += \
         vf610-cosmic.dtb \
         vf610m4-cosmic.dtb \
         vf610-twr.dtb \
-        vf610-zii-dev-rev-b.dtb
+        vf610-zii-dev-rev-b.dtb \
+        vf610-zii-dev-rev-c.dtb
 dtb-$(CONFIG_ARCH_MXS) += \
         imx23-evk.dtb \
         imx23-olinuxino.dtb \
@@ -564,7 +577,9 @@ dtb-$(CONFIG_SOC_AM33XX) += \
         am335x-base0033.dtb \
         am335x-bone.dtb \
         am335x-boneblack.dtb \
+        am335x-boneblack-wireless.dtb \
         am335x-bonegreen.dtb \
+        am335x-bonegreen-wireless.dtb \
         am335x-chiliboard.dtb \
         am335x-cm-t335.dtb \
         am335x-evm.dtb \
@@ -573,6 +588,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
         am335x-lxm.dtb \
         am335x-nano.dtb \
         am335x-pepper.dtb \
+        am335x-phycore-rdk.dtb \
         am335x-shc.dtb \
         am335x-sbc-t335.dtb \
         am335x-sl50.dtb \
@@ -718,6 +734,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
         sh73a0-kzm9g.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
         socfpga_arria5_socdk.dtb \
+        socfpga_arria10_socdk_nand.dtb \
         socfpga_arria10_socdk_qspi.dtb \
         socfpga_arria10_socdk_sdmmc.dtb \
         socfpga_cyclone5_mcvevk.dtb \
@@ -782,6 +799,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
         sun5i-a13-empire-electronix-m712.dtb \
         sun5i-a13-hsg-h702.dtb \
         sun5i-a13-inet-98v-rev2.dtb \
+        sun5i-a13-licheepi-one.dtb \
         sun5i-a13-olinuxino.dtb \
         sun5i-a13-olinuxino-micro.dtb \
         sun5i-a13-q8-tablet.dtb \
@@ -845,7 +863,9 @@ dtb-$(CONFIG_MACH_SUN8I) += \
         sun8i-a33-sinlinx-sina33.dtb \
         sun8i-a83t-allwinner-h8homlet-v2.dtb \
         sun8i-a83t-cubietruck-plus.dtb \
+        sun8i-h2-plus-orangepi-zero.dtb \
         sun8i-h3-bananapi-m2-plus.dtb \
+        sun8i-h3-beelink-x2.dtb \
         sun8i-h3-nanopi-m1.dtb  \
         sun8i-h3-nanopi-neo.dtb \
         sun8i-h3-orangepi-2.dtb \
@@ -855,7 +875,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
         sun8i-h3-orangepi-pc-plus.dtb \
         sun8i-h3-orangepi-plus.dtb \
         sun8i-h3-orangepi-plus2e.dtb \
-        sun8i-r16-parrot.dtb
+        sun8i-r16-parrot.dtb \
+        sun8i-v3s-licheepi-zero.dtb
 dtb-$(CONFIG_MACH_SUN9I) += \
         sun9i-a80-optimus.dtb \
         sun9i-a80-cubieboard4.dtb
@@ -951,6 +972,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
         armada-385-linksys-cobra.dtb \
         armada-385-turris-omnia.dtb \
         armada-388-clearfog.dtb \
+        armada-388-clearfog-base.dtb \
+        armada-388-clearfog-pro.dtb \
         armada-388-db.dtb \
         armada-388-gp.dtb \
         armada-388-rd.dtb
@@ -959,6 +982,8 @@ dtb-$(CONFIG_MACH_ARMADA_39X) += \
 dtb-$(CONFIG_MACH_ARMADA_XP) += \
         armada-xp-axpwifiap.dtb \
         armada-xp-db.dtb \
+        armada-xp-db-dxbc2.dtb \
+        armada-xp-db-xc3-24g4xg.dtb \
         armada-xp-gp.dtb \
         armada-xp-lenovo-ix4-300d.dtb \
         armada-xp-linksys-mamba.dtb \
@@ -983,6 +1008,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
         mt8135-evbp1.dtb
 dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
 dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \
+        aspeed-bmc-opp-romulus.dtb \
         aspeed-ast2500-evb.dtb
 endif
 
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
index db8752fc480e..d0eefc3b886c 100644
--- a/arch/arm/boot/dts/alpine.dtsi
+++ b/arch/arm/boot/dts/alpine.dtsi
@@ -93,7 +93,7 @@
                         interrupt-controller;
                         reg = <0x0 0xfb001000 0x0 0x1000>,
                               <0x0 0xfb002000 0x0 0x2000>,
-                              <0x0 0xfb004000 0x0 0x1000>,
+                              <0x0 0xfb004000 0x0 0x2000>,
                               <0x0 0xfb006000 0x0 0x2000>;
                         interrupts =
                                 <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 3e32dd18fd25..bf6b26abe35b 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -207,6 +207,8 @@
 &usb0 {
         status = "okay";
         dr_mode = "peripheral";
+        interrupts-extended = <&intc 18 &tps 0>;
+        interrupt-names = "mc", "vbus";
 };
 
 &usb1 {
diff --git a/arch/arm/boot/dts/am335x-boneblack-common.dtsi b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
new file mode 100644
index 000000000000..325daae40278
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/display/tda998x.h>
+
+&ldo3_reg {
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
+
+&mmc1 {
+        vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+        vmmc-supply = <&vmmcsd_fixed>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&emmc_pins>;
+        bus-width = <8>;
+        status = "okay";
+};
+
+&am33xx_pinmux {
+        nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr0 */
+                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
+                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
+                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
+                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
+                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
+                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
+                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
+                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
+                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
+                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
+                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
+                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
+                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
+                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
+                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
+                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
+                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_vsync.lcd_vsync */
+                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_hsync.lcd_hsync */
+                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_pclk.lcd_pclk */
+                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_ac_bias_en.lcd_ac_bias_en */
+                >;
+        };
+
+        nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr0 */
+                >;
+        };
+
+        mcasp0_pins: mcasp0_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
+                        AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
+                        AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
+                        AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
+                        AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
+                >;
+        };
+};
+
+&lcdc {
+        status = "okay";
+
+        /* If you want to get 24 bit RGB and 16 BGR mode instead of
+         * current 16 bit RGB and 24 BGR modes, set the propety
+         * below to "crossed" and uncomment the video-ports -property
+         * in tda19988 node.
+         */
+        blue-and-red-wiring = "straight";
+
+        port {
+                lcdc_0: endpoint@0 {
+                        remote-endpoint = <&hdmi_0>;
+                };
+        };
+};
+
+&i2c0 {
+        tda19988: tda19988 {
+                compatible = "nxp,tda998x";
+                reg = <0x70>;
+
+                pinctrl-names = "default", "off";
+                pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+                pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+
+                /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+                /* video-ports = <0x234501>; */
+
+                #sound-dai-cells = <0>;
+                audio-ports = < TDA998x_I2S     0x03>;
+
+                ports {
+                        port@0 {
+                                hdmi_0: endpoint@0 {
+                                        remote-endpoint = <&lcdc_0>;
+                                };
+                        };
+                };
+        };
+};
+
+&rtc {
+        system-power-controller;
+};
+
+&mcasp0 {
+        #sound-dai-cells = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mcasp0_pins>;
+        status = "okay";
+        op-mode = <0>;  /* MCASP_IIS_MODE */
+        tdm-slots = <2>;
+        serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
+                        0 0 1 0
+                >;
+        tx-num-evt = <32>;
+        rx-num-evt = <32>;
+};
+
+/ {
+        clk_mcasp0_fixed: clk_mcasp0_fixed {
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <24576000>;
+        };
+
+        clk_mcasp0: clk_mcasp0 {
+                #clock-cells = <0>;
+                compatible = "gpio-gate-clock";
+                clocks = <&clk_mcasp0_fixed>;
+                enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
+        };
+
+        sound {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "TI BeagleBone Black";
+                simple-audio-card,format = "i2s";
+                simple-audio-card,bitclock-master = <&dailink0_master>;
+                simple-audio-card,frame-master = <&dailink0_master>;
+
+                dailink0_master: simple-audio-card,cpu {
+                        sound-dai = <&mcasp0>;
+                        clocks = <&clk_mcasp0>;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&tda19988>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
new file mode 100644
index 000000000000..105bd10655f7
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-boneblack-common.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+        model = "TI AM335x BeagleBone Black Wireless";
+        compatible = "ti,am335x-bone-black-wireless", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+
+        wlan_en_reg: fixedregulator@2 {
+                compatible = "regulator-fixed";
+                regulator-name = "wlan-en-regulator";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <1800000>;
+                startup-delay-us= <70000>;
+
+                /* WL_EN */
+                gpio = <&gpio3 9 0>;
+                enable-active-high;
+        };
+};
+
+&am33xx_pinmux {
+        bt_pins: pinmux_bt_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gmii1_txd0.gpio0_28 - BT_EN */
+                >;
+        };
+
+        mmc3_pins: pinmux_mmc3_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
+                        AM33XX_IOPAD(0x914, PIN_INPUT_PULLUP | MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
+                        AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
+                        AM33XX_IOPAD(0x91c, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
+                        AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
+                        AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
+                >;
+        };
+
+        uart3_pins: pinmux_uart3_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1)       /* gmii1_rxd3.uart3_rxd */
+                        AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* gmii1_rxd2.uart3_txd */
+                        AM33XX_IOPAD(0x948, PIN_INPUT | MUX_MODE3)              /* mdio_data.uart3_ctsn */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* mdio_clk.uart3_rtsn */
+                >;
+        };
+
+        wl18xx_pins: pinmux_wl18xx_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gmii1_txclk.gpio3_9 WL_EN */
+                        AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* rmii1_refclk.gpio0_29 WL_IRQ */
+                        AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gmii1_rxclk.gpio3_10 LS_BUF_EN */
+                >;
+        };
+};
+
+&mac {
+        status = "disabled";
+};
+
+&mmc3 {
+        dmas = <&edma_xbar 12 0 1
+                &edma_xbar 13 0 2>;
+        dma-names = "tx", "rx";
+        status = "okay";
+        vmmc-supply = <&wlan_en_reg>;
+        bus-width = <4>;
+        non-removable;
+        cap-power-off-card;
+        ti,needs-special-hs-handling;
+        keep-power-in-suspend;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+        wlcore: wlcore@2 {
+                compatible = "ti,wl1835";
+                reg = <2>;
+                interrupt-parent = <&gpio0>;
+                interrupts = <29 IRQ_TYPE_EDGE_RISING>;
+        };
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart3_pins &bt_pins>;
+        status = "okay";
+};
+
+&gpio3 {
+        ls_buf_en {
+                gpio-hog;
+                gpios = <10 GPIO_ACTIVE_HIGH>;
+                output-high;
+                line-name = "LS_BUF_EN";
+        };
+};
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index db00d8ef7b19..77273df1a028 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -9,162 +9,9 @@
 
 #include "am33xx.dtsi"
 #include "am335x-bone-common.dtsi"
-#include <dt-bindings/display/tda998x.h>
+#include "am335x-boneblack-common.dtsi"
 
 / {
         model = "TI AM335x BeagleBone Black";
         compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
 };
-
-&ldo3_reg {
-        regulator-min-microvolt = <1800000>;
-        regulator-max-microvolt = <1800000>;
-        regulator-always-on;
-};
-
-&mmc1 {
-        vmmc-supply = <&vmmcsd_fixed>;
-};
-
-&mmc2 {
-        vmmc-supply = <&vmmcsd_fixed>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&emmc_pins>;
-        bus-width = <8>;
-        status = "okay";
-};
-
-&am33xx_pinmux {
-        nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
-                pinctrl-single,pins = <
-                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr0 */
-                        AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
-                        AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
-                        AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
-                        AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
-                        AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
-                        AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
-                        AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
-                        AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
-                        AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
-                        AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
-                        AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
-                        AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
-                        AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
-                        AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
-                        AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
-                        AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
-                        AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_vsync.lcd_vsync */
-                        AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_hsync.lcd_hsync */
-                        AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_pclk.lcd_pclk */
-                        AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* lcd_ac_bias_en.lcd_ac_bias_en */
-                >;
-        };
-        nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
-                pinctrl-single,pins = <
-                        AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr0 */
-                >;
-        };
-
-        mcasp0_pins: mcasp0_pins {
-                pinctrl-single,pins = <
-                        AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
-                        AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
-                        AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
-                        AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
-                        AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
-                >;
-        };
-};
-
-&lcdc {
-        status = "okay";
-
-        /* If you want to get 24 bit RGB and 16 BGR mode instead of
-         * current 16 bit RGB and 24 BGR modes, set the propety
-         * below to "crossed" and uncomment the video-ports -property
-         * in tda19988 node.
-         */
-        blue-and-red-wiring = "straight";
-
-        port {
-                lcdc_0: endpoint@0 {
-                        remote-endpoint = <&hdmi_0>;
-                };
-        };
-};
-
-&i2c0 {
-        tda19988: tda19988 {
-                compatible = "nxp,tda998x";
-                reg = <0x70>;
-
-                pinctrl-names = "default", "off";
-                pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
-                pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
-
-                /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
-                /* video-ports = <0x234501>; */
-
-                #sound-dai-cells = <0>;
-                audio-ports = < TDA998x_I2S     0x03>;
-
-                ports {
-                        port@0 {
-                                hdmi_0: endpoint@0 {
-                                        remote-endpoint = <&lcdc_0>;
-                                };
-                        };
-                };
-        };
-};
-
-&rtc {
-        system-power-controller;
-};
-
-&mcasp0 {
-        #sound-dai-cells = <0>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&mcasp0_pins>;
-        status = "okay";
-        op-mode = <0>;  /* MCASP_IIS_MODE */
-        tdm-slots = <2>;
-        serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
-                        0 0 1 0
-                >;
-        tx-num-evt = <32>;
-        rx-num-evt = <32>;
-};
-
-/ {
-        clk_mcasp0_fixed: clk_mcasp0_fixed {
-                #clock-cells = <0>;
-                compatible = "fixed-clock";
-                clock-frequency = <24576000>;
-        };
-
-        clk_mcasp0: clk_mcasp0 {
-                #clock-cells = <0>;
-                compatible = "gpio-gate-clock";
-                clocks = <&clk_mcasp0_fixed>;
-                enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
-        };
-
-        sound {
-                compatible = "simple-audio-card";
-                simple-audio-card,name = "TI BeagleBone Black";
-                simple-audio-card,format = "i2s";
-                simple-audio-card,bitclock-master = <&dailink0_master>;
-                simple-audio-card,frame-master = <&dailink0_master>;
-
-                dailink0_master: simple-audio-card,cpu {
-                        sound-dai = <&mcasp0>;
-                        clocks = <&clk_mcasp0>;
-                };
-
-                simple-audio-card,codec {
-                        sound-dai = <&tda19988>;
-                };
-        };
-};
diff --git a/arch/arm/boot/dts/am335x-bonegreen-common.dtsi b/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
new file mode 100644
index 000000000000..853e6d3a028d
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen-common.dtsi
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&ldo3_reg {
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
+
+&mmc1 {
+        vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+        vmmc-supply = <&vmmcsd_fixed>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&emmc_pins>;
+        bus-width = <8>;
+        status = "okay";
+};
+
+&am33xx_pinmux {
+        uart2_pins: uart2_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd */
+                        AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)     /* spi0_d0.uart2_txd */
+                >;
+        };
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_pins>;
+        status = "okay";
+};
+
+&rtc {
+        system-power-controller;
+};
diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
new file mode 100644
index 000000000000..9d1a0fd555f3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bonegreen-common.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+        model = "TI AM335x BeagleBone Green Wireless";
+        compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+
+        wlan_en_reg: fixedregulator@2 {
+                compatible = "regulator-fixed";
+                regulator-name = "wlan-en-regulator";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <1800000>;
+                startup-delay-us= <70000>;
+
+                /* WL_EN */
+                gpio = <&gpio0 26 0>;
+                enable-active-high;
+        };
+};
+
+&am33xx_pinmux {
+        bt_pins: pinmux_bt_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_ad12.gpio1_28 BT_EN */
+                >;
+        };
+
+        mmc3_pins: pinmux_mmc3_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ad12.mmc2_dat0 */
+                        AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ad13.mmc2_dat1 */
+                        AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ad14.mmc2_dat2 */
+                        AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ad15.mmc2_dat3 */
+                        AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_csn3.mmc2_cmd */
+                        AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_clk.mmc2_clk */
+                >;
+        };
+
+        uart3_pins: pinmux_uart3_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1)       /* gmii1_rxd3.uart3_rxd */
+                        AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* gmii1_rxd2.uart3_txd */
+                        AM33XX_IOPAD(0x948, PIN_INPUT | MUX_MODE3)              /* mdio_data.uart3_ctsn */
+                        AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* mdio_clk.uart3_rtsn */
+                >;
+        };
+
+        wl18xx_pins: pinmux_wl18xx_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_ad10.gpio0_26 WL_EN */
+                        AM33XX_IOPAD(0x82C, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_ad11.gpio0_27 WL_IRQ */
+                        AM33XX_IOPAD(0x87C, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_csn0.gpio1_29 LS_BUF_EN */
+                >;
+        };
+};
+
+&mac {
+        status = "disabled";
+};
+
+&mmc3 {
+        dmas = <&edma_xbar 12 0 1
+                &edma_xbar 13 0 2>;
+        dma-names = "tx", "rx";
+        status = "okay";
+        vmmc-supply = <&wlan_en_reg>;
+        bus-width = <4>;
+        non-removable;
+        cap-power-off-card;
+        ti,needs-special-hs-handling;
+        keep-power-in-suspend;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+        wlcore: wlcore@2 {
+                compatible = "ti,wl1835";
+                reg = <2>;
+                interrupt-parent = <&gpio0>;
+                interrupts = <27 IRQ_TYPE_EDGE_RISING>;
+        };
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart3_pins &bt_pins>;
+        status = "okay";
+};
+
+&gpio1 {
+        ls_buf_en {
+                gpio-hog;
+                gpios = <29 GPIO_ACTIVE_HIGH>;
+                output-high;
+                line-name = "LS_BUF_EN";
+        };
+};
+
+/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/
+/* in case it isn't, wilink8 ends up in one of the test modes that     */
+/* intruces various issues (elp wkaeup timeouts etc.)                  */
+/* On the BBGW this pin is routed through the level shifter (U21) that */
+/* introduces a pullup on the line and wilink8 ends up in a bad state. */
+/* use a gpio hog to force this pin low. An alternative may be adding  */
+/* an external pulldown on U21 pin 4.                                  */
+
+&gpio3 {
+        bt_aud_in {
+                gpio-hog;
+                gpios = <16 GPIO_ACTIVE_HIGH>;
+                output-low;
+                line-name = "MCASP0_AHCLKR";
+        };
+};
diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
index dce3c8657e04..a8b4d969ce2a 100644
--- a/arch/arm/boot/dts/am335x-bonegreen.dts
+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
@@ -9,45 +9,9 @@
 
 #include "am33xx.dtsi"
 #include "am335x-bone-common.dtsi"
+#include "am335x-bonegreen-common.dtsi"
 
 / {
         model = "TI AM335x BeagleBone Green";
         compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
 };
-
-&ldo3_reg {
-        regulator-min-microvolt = <1800000>;
-        regulator-max-microvolt = <1800000>;
-        regulator-always-on;
-};
-
-&mmc1 {
-        vmmc-supply = <&vmmcsd_fixed>;
-};
-
-&mmc2 {
-        vmmc-supply = <&vmmcsd_fixed>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&emmc_pins>;
-        bus-width = <8>;
-        status = "okay";
-};
-
-&am33xx_pinmux {
-        uart2_pins: uart2_pins {
-                pinctrl-single,pins = <
-                        AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)      /* spi0_sclk.uart2_rxd */
-                        AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)     /* spi0_d0.uart2_txd */
-                >;
-        };
-};
-
-&uart2 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&uart2_pins>;
-        status = "okay";
-};
-
-&rtc {
-        system-power-controller;
-};
diff --git a/arch/arm/boot/dts/am335x-chiliboard.dts b/arch/arm/boot/dts/am335x-chiliboard.dts
index 2a624b3c9258..d8769799772e 100644
--- a/arch/arm/boot/dts/am335x-chiliboard.dts
+++ b/arch/arm/boot/dts/am335x-chiliboard.dts
@@ -185,3 +185,19 @@
         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
         status = "okay";
 };
+
+&tps {
+        interrupt-parent = <&intc>;
+        interrupts = <7>; /* NNMI */
+
+        charger {
+                interrupts = <0>, <1>;
+                interrupt-names = "USB", "AC";
+                status = "okay";
+        };
+
+        pwrbutton {
+                interrupts = <2>;
+                status = "okay";
+        };
+};
diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi
index f9ee5859c154..1b43ebd08b38 100644
--- a/arch/arm/boot/dts/am335x-chilisom.dtsi
+++ b/arch/arm/boot/dts/am335x-chilisom.dtsi
@@ -124,6 +124,14 @@
 
 &rtc {
         system-power-controller;
+
+        pinctrl-0 = <&ext_wakeup>;
+        pinctrl-names = "default";
+
+        ext_wakeup: ext-wakeup {
+                pins = "ext_wakeup0";
+                input-enable;
+        };
 };
 
 /* NAND Flash */
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index c2186ec2834b..1c37a7c1ea17 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -25,6 +25,10 @@
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        chosen {
+                stdout-path = &uart0;
+        };
+
         vbat: fixedregulator0 {
                 compatible = "regulator-fixed";
                 regulator-name = "vbat";
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index e2548d1ce753..9e43c443738a 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -32,6 +32,10 @@
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        chosen {
+                stdout-path = &uart0;
+        };
+
         vbat: fixedregulator0 {
                 compatible = "regulator-fixed";
                 regulator-name = "vbat";
diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts
index 8ed46f9d79b7..a2ad076822db 100644
--- a/arch/arm/boot/dts/am335x-icev2.dts
+++ b/arch/arm/boot/dts/am335x-icev2.dts
@@ -24,6 +24,10 @@
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        chosen {
+                stdout-path = &uart3;
+        };
+
         vbat: fixedregulator0 {
                 compatible = "regulator-fixed";
                 regulator-name = "vbat";
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index 483d585c8908..807494bc722b 100644
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -249,7 +249,8 @@
 
         #address-cells = <2>;
         #size-cells = <1>;
-        ranges = <0 0 0x08000000 0x08000000>;   /* CS0: NOR 128M */
+        ranges = <0 0 0x08000000 0x08000000>,   /* CS0: NOR 128M */
+                 <1 0 0x1c000000 0x01000000>;   /* CS1: FRAM 16M */
 
         nor@0,0 {
                 reg = <0 0x00000000 0x08000000>;
@@ -342,6 +343,34 @@
                         reg = <0x04000000 0x04000000>; /* 64MB */
                 };
         };
+
+        fram@1,0 {
+                reg = <1 0x00000000 0x01000000>;
+                bank-width = <2>;
+
+                gpmc,mux-add-data = <2>;
+
+                gpmc,sync-clk-ps = <0>;
+                gpmc,cs-on-ns = <0>;
+                gpmc,cs-rd-off-ns = <160>;
+                gpmc,cs-wr-off-ns = <160>;
+                gpmc,adv-on-ns = <10>;
+                gpmc,adv-rd-off-ns = <20>;
+                gpmc,adv-wr-off-ns = <20>;
+                gpmc,oe-on-ns = <30>;
+                gpmc,oe-off-ns = <150>;
+                gpmc,we-on-ns = <30>;
+                gpmc,we-off-ns = <150>;
+                gpmc,rd-cycle-ns = <160>;
+                gpmc,wr-cycle-ns = <160>;
+                gpmc,access-ns = <130>;
+                gpmc,page-burst-access-ns = <10>;
+                gpmc,cycle2cycle-samecsen;
+                gpmc,cycle2cycle-diffcsen;
+                gpmc,cycle2cycle-delay-ns = <10>;
+                gpmc,wr-data-mux-bus-ns = <30>;
+                gpmc,wr-access-ns = <0>;
+        };
 };
 
 &mac {
diff --git a/arch/arm/boot/dts/am335x-pcm-953.dtsi b/arch/arm/boot/dts/am335x-pcm-953.dtsi
new file mode 100644
index 000000000000..02981eae96b9
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-pcm-953.dtsi
@@ -0,0 +1,288 @@
+/*
+ * Copyright (C) 2014-2017 Phytec Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *         Teresa Remmet <t.remmet@phytec.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/input/input.h>
+
+/ {
+        model = "Phytec AM335x PCM-953";
+        compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";
+
+        /* Power */
+        regulators {
+                vcc3v3: fixedregulator@1 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "vcc3v3";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-boot-on;
+                };
+
+                vcc1v8: fixedregulator@2 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "vcc1v8";
+                        regulator-min-microvolt = <1800000>;
+                        regulator-max-microvolt = <1800000>;
+                        regulator-boot-on;
+                };
+        };
+
+        /* User IO */
+        user_leds: user_leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_leds_pins>;
+
+                green {
+                        label = "green:user";
+                        gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "gpio";
+                        default-state = "on";
+                };
+
+                yellow {
+                        label = "yellow:user";
+                        gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "gpio";
+                        default-state = "on";
+                };
+        };
+
+        user_buttons: user_buttons {
+                compatible = "gpio-keys";
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_buttons_pins>;
+
+                button@0 {
+                        label = "home";
+                        linux,code = <KEY_HOME>;
+                        gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
+                        gpio-key,wakeup;
+                };
+
+                button@1 {
+                        label = "menu";
+                        linux,code = <KEY_MENU>;
+                        gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
+                        gpio-key,wakeup;
+                };
+
+        };
+};
+
+&am33xx_pinmux {
+        user_buttons_pins: pinmux_user_buttons {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x9e4, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* emu0.gpio3_7 */
+                        AM33XX_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* emu1.gpio3_8 */
+                >;
+        };
+
+        user_leds_pins: pinmux_user_leds {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x880, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_csn1.gpio1_30 */
+                        AM33XX_IOPAD(0x884, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_csn2.gpio1_31 */
+                >;
+        };
+};
+
+/* CAN */
+&am33xx_pinmux {
+        dcan1_pins: pinmux_dcan1 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x980, PIN_OUTPUT_PULLUP | MUX_MODE2)      /* uart1_rxd.dcan1_tx_mux2 */
+                        AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_txd.dcan1_rx_mux2 */
+                >;
+        };
+};
+
+&dcan1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&dcan1_pins>;
+        status = "okay";
+};
+
+/* Ethernet */
+&am33xx_pinmux {
+        ethernet1_pins: pinmux_ethernet1 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a0.rgmii2_tctl */
+                        AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a1.rgmii2_rctl */
+                        AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a2.rgmii2_td3 */
+                        AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a3.rgmii2_td2 */
+                        AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a4.rgmii2_td1 */
+                        AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a5.rgmii2_td0 */
+                        AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* gpmc_a6.rgmii2_tclk */
+                        AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a7.rgmii2_rclk */
+                        AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a8.rgmii2_rd3 */
+                        AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a9.rgmii2_rd2 */
+                        AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a10.rgmii2_rd1 */
+                        AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* gpmc_a11.rgmii2_rd0 */
+                >;
+        };
+};
+
+&cpsw_emac1 {
+        phy-handle = <&phy1>;
+        phy-mode = "rgmii-id";
+        dual_emac_res_vlan = <2>;
+        status = "okay";
+};
+
+&davinci_mdio {
+        phy1: ethernet-phy@2 {
+                reg = <2>;
+
+                /* Register 260 (104h) – RGMII Clock and Control Pad Skew */
+                rxc-skew-ps = <1400>;
+                rxdv-skew-ps = <0>;
+                txc-skew-ps = <1400>;
+                txen-skew-ps = <0>;
+                /* Register 261 (105h) – RGMII RX Data Pad Skew */
+                rxd3-skew-ps = <0>;
+                rxd2-skew-ps = <0>;
+                rxd1-skew-ps = <0>;
+                rxd0-skew-ps = <0>;
+                /* Register 262 (106h) – RGMII TX Data Pad Skew */
+                txd3-skew-ps = <0>;
+                txd2-skew-ps = <0>;
+                txd1-skew-ps = <0>;
+                txd0-skew-ps = <0>;
+        };
+};
+
+&mac {
+        slaves = <2>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
+        dual_emac;
+};
+
+/* Misc */
+&am33xx_pinmux {
+        pinctrl-names = "default";
+        pinctrl-0 = <&cb_gpio_pins>;
+
+        cb_gpio_pins: pinmux_cb_gpio {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* uart0_ctsn.gpio1_8 */
+                        AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* uart0_rtsn.gpio1_9 */
+                >;
+        };
+};
+
+/* MMC */
+&am33xx_pinmux {
+        mmc1_pins: pinmux_mmc1_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3.mmc0_dat3 */
+                        AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2.mmc0_dat2 */
+                        AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1.mmc0_dat1 */
+                        AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0.mmc0_dat0 */
+                        AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk.mmc0_clk */
+                        AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd.mmc0_cmd */
+                        AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7)       /* spi0_cs1.mmc0_sdcd */
+                >;
+        };
+};
+
+&mmc1 {
+        vmmc-supply = <&vcc3v3>;
+        bus-width = <4>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins>;
+        cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
+
+/* UARTs */
+&am33xx_pinmux {
+        uart0_pins: pinmux_uart0 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
+                        AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
+                >;
+        };
+
+        uart1_pins: pinmux_uart1 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
+                        AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)              /* uart1_ctsn.uart1_ctsn */
+                        AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
+                >;
+        };
+
+        uart2_pins: pinmux_uart2 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)       /* mii1_tx_clk.uart2_rxd */
+                        AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_rx_clk.uart2_txd */
+                >;
+        };
+
+        uart3_pins: pinmux_uart3 {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1)       /* mii1_rxd3.uart3_rxd */
+                        AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_rxd2.uart3_txd */
+                >;
+        };
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins>;
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_pins>;
+        status = "okay";
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart3_pins>;
+        status = "okay";
+};
+
+/* USB */
+&cppi41dma {
+        status = "okay";
+};
+
+&usb_ctrl_mod {
+        status = "okay";
+};
+
+&usb {
+        status = "okay";
+};
+
+&usb0 {
+        status = "okay";
+};
+
+&usb0_phy {
+        status = "okay";
+};
+
+&usb1 {
+        status = "okay";
+        dr_mode = "host";
+};
+
+&usb1_phy {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-phycore-rdk.dts b/arch/arm/boot/dts/am335x-phycore-rdk.dts
new file mode 100644
index 000000000000..305f0b35d6ea
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-phycore-rdk.dts
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2014 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "am335x-phycore-som.dtsi"
+#include "am335x-pcm-953.dtsi"
+
+/* SoM */
+&i2c_eeprom {
+        status = "okay";
+};
+
+&i2c_rtc {
+        status = "okay";
+};
+
+&serial_flash {
+        status = "okay";
+
+};
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
index 75e24add3f13..14533ff6d0ad 100644
--- a/arch/arm/boot/dts/am335x-phycore-som.dtsi
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -78,7 +78,7 @@
 };
 
 &cpsw_emac0 {
-        phy_id = <&davinci_mdio>, <0>;
+        phy-handle = <&phy0>;
         phy-mode = "rmii";
         dual_emac_res_vlan = <1>;
 };
@@ -87,6 +87,10 @@
         pinctrl-names = "default";
         pinctrl-0 = <&mdio_pins>;
         status = "okay";
+
+        phy0: ethernet-phy@0 {
+                reg = <0>;
+        };
 };
 
 &mac {
@@ -120,6 +124,12 @@
                 reg = <0x2d>;
         };
 
+        i2c_tmp102: temp@4b {
+                compatible = "ti,tmp102";
+                reg = <0x4b>;
+                status = "disabled";
+        };
+
         i2c_eeprom: eeprom@52 {
                 compatible = "atmel,24c32";
                 pagesize = <32>;
@@ -201,43 +211,6 @@
 
                 #address-cells = <1>;
                 #size-cells = <1>;
-
-                partition@0 {
-                        label = "xload";
-                        reg = <0x0 0x20000>;
-                };
-                partition@1 {
-                        label = "xload_backup1";
-                        reg = <0x20000 0x20000>;
-                };
-                partition@2 {
-                        label = "xload_backup2";
-                        reg = <0x40000 0x20000>;
-                };
-                partition@3 {
-                        label = "xload_backup3";
-                        reg = <0x60000 0x20000>;
-                };
-                partition@4 {
-                        label = "barebox";
-                        reg = <0x80000 0x80000>;
-                };
-                partition@5 {
-                        label = "bareboxenv";
-                        reg = <0x100000 0x40000>;
-                };
-                partition@6 {
-                        label = "oftree";
-                        reg = <0x140000 0x40000>;
-                };
-                partition@7 {
-                        label = "kernel";
-                        reg = <0x180000 0x800000>;
-                };
-                partition@8 {
-                        label = "root";
-                        reg = <0x980000 0x0>;
-                };
         };
 };
 
@@ -341,33 +314,12 @@
         status = "okay";
 
         serial_flash: m25p80@0 {
-                compatible = "m25p80";
+                compatible = "jedec,spi-nor";
                 spi-max-frequency = <48000000>;
                 reg = <0x0>;
                 m25p,fast-read;
                 status = "disabled";
                 #address-cells = <1>;
                 #size-cells = <1>;
-
-                partition@0 {
-                        label = "xload";
-                        reg = <0x0 0x20000>;
-                };
-                partition@1 {
-                        label = "barebox";
-                        reg = <0x20000 0x80000>;
-                };
-                partition@2 {
-                        label = "bareboxenv";
-                        reg = <0xa0000 0x20000>;
-                };
-                partition@3 {
-                        label = "oftree";
-                        reg = <0xc0000 0x20000>;
-                };
-                partition@4 {
-                        label = "kernel";
-                        reg = <0xe0000 0x0>;
-                };
         };
 };
diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts
index b0dfa6f14cd5..c5d2589c55fc 100644
--- a/arch/arm/boot/dts/am335x-sl50.dts
+++ b/arch/arm/boot/dts/am335x-sl50.dts
@@ -136,6 +136,13 @@
                 >;
         };
 
+        uart1_pins: pinmux_uart1_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
+                        AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
+                >;
+        };
+
         uart4_pins: pinmux_uart4_pins {
                 pinctrl-single,pins = <
                         AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)       /* gpmc_wait0.uart4_rxd */
@@ -150,13 +157,6 @@
                 >;
         };
 
-        i2c1_pins: pinmux_i2c1_pins {
-                pinctrl-single,pins = <
-                        AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_rxd.i2c1_sda */
-                        AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_txdi2c1_scl */
-                >;
-        };
-
         i2c2_pins: pinmux_i2c2_pins {
                 pinctrl-single,pins = <
                         AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)       /* uart1_ctsn.i2c2_sda */
@@ -262,6 +262,16 @@
                 >;
         };
 
+        spi0_pins: pinmux_spi0_pins {
+                pinctrl-single,pins = <
+                        AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_MOSI - spi0_d0.spi0_d0 */
+                        AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_MISO - spi0_d1.spi0_d1 */
+                        AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CLK  - spi0_clk.spi0_clk */
+                        AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
+                        AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0)       /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */
+                >;
+        };
+
         lwb_pins: pinmux_lwb_pins {
                 pinctrl-single,pins = <
                         AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)     /* SoundPA_en - mcasp0_fsr.gpio3_19 */
@@ -292,16 +302,22 @@
                 reg = <0x24>;
         };
 
+        bq32000: rtc@68 {
+                compatible = "ti,bq32000";
+                trickle-resistor-ohms = <1120>;
+                reg = <0x68>;
+        };
+
         eeprom: eeprom@50 {
                 compatible = "at,24c256";
                 reg = <0x50>;
         };
-};
 
-&i2c1 {
-        status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&i2c1_pins>;
+        gpio_exp: mcp23017@20 {
+                compatible = "microchip,mcp23017";
+                reg = <0x20>;
+        };
+
 };
 
 &i2c2 {
@@ -321,6 +337,16 @@
                 DRVDD-supply = <&ldo4_reg>;
                 DVDD-supply = <&ldo3_reg>;
         };
+
+        /* Ambient Light Sensor */
+        als: isl29023@44 {
+                compatible = "isil,isl29023";
+                reg = <0x44>;
+        };
+};
+
+&rtc {
+        status = "disabled";
 };
 
 &usb {
@@ -394,12 +420,32 @@
         pinctrl-0 = <&uart0_pins>;
 };
 
+&uart1 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins>;
+};
+
 &uart4 {
         status = "okay";
         pinctrl-names = "default";
         pinctrl-0 = <&uart4_pins>;
 };
 
+&spi0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi0_pins>;
+
+        flash: n25q032@1 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "micron,n25q032";
+                reg = <1>;
+                spi-max-frequency = <5000000>;
+        };
+};
+
 #include "tps65217.dtsi"
 
 &tps {
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi b/arch/arm/boot/dts/am335x-wega.dtsi
index 02c67365c4e1..8ce541739b24 100644
--- a/arch/arm/boot/dts/am335x-wega.dtsi
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -119,11 +119,17 @@
 };
 
 &cpsw_emac1 {
-        phy_id = <&davinci_mdio>, <1>;
+        phy-handle = <&phy1>;
         phy-mode = "mii";
         dual_emac_res_vlan = <2>;
 };
 
+&davinci_mdio {
+        phy1: ethernet-phy@1 {
+                reg = <1>;
+        };
+};
+
 &mac {
         slaves = <2>;
         pinctrl-names = "default";
@@ -206,7 +212,6 @@
 };
 
 &usb0 {
-        dr_mode = "peripheral";
         status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 957840cc7b78..a4f31739057f 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -23,6 +23,10 @@
                 display0 = &lcd0;
         };
 
+        chosen {
+                stdout-path = &uart0;
+        };
+
         evm_v3_3d: fixedregulator-v3_3d {
                 compatible = "regulator-fixed";
                 regulator-name = "evm_v3_3d";
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index b76a7c0264a5..c1f7f9336e64 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -18,6 +18,10 @@
         model = "TI AM437x Industrial Development Kit";
         compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
 
+        chosen {
+                stdout-path = &uart0;
+        };
+
         v24_0d: fixed-regulator-v24_0d {
                 compatible = "regulator-fixed";
                 regulator-name = "V24_0D";
diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 319d94205350..4dc54bee2f36 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -24,6 +24,10 @@
                 display0 = &lcd0;
         };
 
+        chosen {
+                stdout-path = &uart0;
+        };
+
         /* fixed 32k external oscillator clock */
         clk_32k_rtc: clk_32k_rtc {
                 #clock-cells = <0>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 9d35c3f07cad..9acd4ccdec4e 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -24,6 +24,10 @@
                 display0 = &lcd0;
         };
 
+        chosen {
+                stdout-path = &uart0;
+        };
+
         vmmcsd_fixed: fixedregulator-sd {
                 compatible = "regulator-fixed";
                 regulator-name = "vmmcsd_fixed";
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
index 78bee26361f1..585d792a8fdd 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -22,6 +22,10 @@
                 display0 = &hdmi0;
         };
 
+        chosen {
+                stdout-path = &uart3;
+        };
+
         memory@0 {
                 device_type = "memory";
                 reg = <0x0 0x80000000 0x0 0x80000000>;
@@ -421,19 +425,29 @@
                               <&dra7_pmx_core 0x3f8>;
 };
 
+&davinci_mdio {
+        phy0: ethernet-phy@1 {
+                reg = <1>;
+        };
+
+        phy1: ethernet-phy@2 {
+                reg = <2>;
+        };
+};
+
 &mac {
         status = "okay";
         dual_emac;
 };
 
 &cpsw_emac0 {
-        phy_id = <&davinci_mdio>, <1>;
+        phy-handle = <&phy0>;
         phy-mode = "rgmii";
         dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-        phy_id = <&davinci_mdio>, <2>;
+        phy-handle = <&phy1>;
         phy-mode = "rgmii";
         dual_emac_res_vlan = <2>;
 };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
index ca85570629fd..39a92aff0a0d 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts
@@ -22,3 +22,8 @@
         vmmc-supply = <&vdd_3v3>;
         vmmc-aux-supply = <&ldo1_reg>;
 };
+
+/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
+&phy1 {
+        max-speed = <100>;
+};
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 8c66f2efd283..19a60a11c198 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -22,3 +22,8 @@
 &mmc1 {
         vmmc-supply = <&ldo1_reg>;
 };
+
+/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
+&phy1 {
+        max-speed = <100>;
+};
diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi
index 814a720d5c3d..0d341c545b01 100644
--- a/arch/arm/boot/dts/am57xx-idk-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi
@@ -14,6 +14,10 @@
                 rtc1 = &rtc;
         };
 
+        chosen {
+                stdout-path = &uart3;
+        };
+
         vmain: fixedregulator-vmain {
                 compatible = "regulator-fixed";
                 regulator-name = "VMAIN";
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index a9419f8e17e8..c4eef7323367 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -18,17 +18,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -37,11 +37,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
index aeedc463daa6..db7f3aa38670 100644
--- a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
+++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index a1425409e570..702f58c9642d 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index 6bd9265f1062..b1a96e95e921 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index c84ab5bf1e18..d67e7aa42b54 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index c3fd6e49212f..8b2fa9a49967 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -16,17 +16,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -35,11 +35,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -173,6 +173,8 @@
         };
 
         dsa {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <2>;
                 #size-cells = <0>;
@@ -235,6 +237,48 @@
         phy0: ethernet-phy@0 {
                 reg = <0>;
         };
+
+        switch: switch@10 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x10>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan0";
+                        };
+
+                        port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                        };
+
+                        port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                        };
+
+                        port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth1>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
+        };
 };
 
 
diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
index 99f9de229ea8..4978011df5bd 100644
--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts
+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index b0520bdeea27..09495e87b038 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -18,17 +18,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -37,11 +37,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index b704bcc597f7..cc011c8bc36b 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts
index ef45cbeb3e7d..bcdbb8ba1d65 100644
--- a/arch/arm/boot/dts/armada-375-db.dts
+++ b/arch/arm/boot/dts/armada-375-db.dts
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index f515591e8733..50c5e8417802 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -16,17 +16,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -35,11 +35,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 5102d19cc8f4..e392f6036f39 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi
index 8f0e508f64ae..df47bf1ea5eb 100644
--- a/arch/arm/boot/dts/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
@@ -103,8 +103,56 @@
                                 };
                         };
 
-                        mdio {
+                        mdio@72004 {
                                 status = "okay";
+
+                                switch@0 {
+                                        compatible = "marvell,mv88e6085";
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+                                        reg = <0>;
+
+                                        ports {
+                                                #address-cells = <1>;
+                                                #size-cells = <0>;
+
+                                                port@0 {
+                                                        reg = <0>;
+                                                        label = "lan4";
+                                                };
+
+                                                port@1 {
+                                                        reg = <1>;
+                                                        label = "lan3";
+                                                };
+
+                                                port@2 {
+                                                        reg = <2>;
+                                                        label = "lan2";
+                                                };
+
+                                                port@3 {
+                                                        reg = <3>;
+                                                        label = "lan1";
+                                                };
+
+                                                port@4 {
+                                                        reg = <4>;
+                                                        label = "wan";
+                                                };
+
+                                                port@5 {
+                                                        reg = <5>;
+                                                        label = "cpu";
+                                                        ethernet = <&eth2>;
+
+                                                        fixed-link {
+                                                                speed = <1000>;
+                                                                full-duplex;
+                                                        };
+                                                };
+                                        };
+                                };
                         };
 
                         sata@a8000 {
@@ -261,6 +309,8 @@
         };
 
         dsa@0 {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <2>;
                 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts
index ab49acb2d452..28eede180e4f 100644
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -122,7 +122,7 @@
         pinctrl-names = "default";
         pinctrl-0 = <&ge0_rgmii_pins>;
         status = "okay";
-        phy-mode = "rgmii-id";
+        phy-mode = "rgmii";
 
         fixed-link {
                 speed = <1000>;
@@ -135,7 +135,7 @@
         pinctrl-names = "default";
         pinctrl-0 = <&ge1_rgmii_pins>;
         status = "okay";
-        phy-mode = "rgmii-id";
+        phy-mode = "rgmii";
 
         fixed-link {
                 speed = <1000>;
@@ -273,7 +273,59 @@
                 /* irq is connected to &pcawan pin 7 */
         };
 
-        /* Switch MV88E7176 at address 0x10 */
+        /* Switch MV88E6176 at address 0x10 */
+        switch@10 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                dsa,member = <0 0>;
+
+                reg = <0x10>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        ports@0 {
+                                reg = <0>;
+                                label = "lan0";
+                        };
+
+                        ports@1 {
+                                reg = <1>;
+                                label = "lan1";
+                        };
+
+                        ports@2 {
+                                reg = <2>;
+                                label = "lan2";
+                        };
+
+                        ports@3 {
+                                reg = <3>;
+                                label = "lan3";
+                        };
+
+                        ports@4 {
+                                reg = <4>;
+                                label = "lan4";
+                        };
+
+                        ports@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth1>;
+                                phy-mode = "rgmii-id";
+
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+
+                        /* port 6 is connected to eth0 */
+                };
+        };
 };
 
 &pinctrl {
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index 8e67d2c083dd..8e63be33472e 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-388-clearfog-base.dts b/arch/arm/boot/dts/armada-388-clearfog-base.dts
new file mode 100644
index 000000000000..22ed07fc2979
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts
@@ -0,0 +1,109 @@
+/*
+ * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
+ *
+ *  Copyright (C) 2015 Russell King
+ *
+ * This board is in development; the contents of this file work with
+ * the A1 rev 2.0 of the board, which does not represent final
+ * production board.  Things will change, don't expect this file to
+ * remain compatible info the future.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-388-clearfog.dtsi"
+
+/ {
+        model = "SolidRun Clearfog Base A1";
+        compatible = "solidrun,clearfog-base-a1",
+                "solidrun,clearfog-a1", "marvell,armada388",
+                "marvell,armada385", "marvell,armada380";
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-0 = <&rear_button_pins>;
+                pinctrl-names = "default";
+
+                button_0 {
+                        /* The rear SW3 button */
+                        label = "Rear Button";
+                        gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+                        linux,can-disable;
+                        linux,code = <BTN_0>;
+                };
+        };
+};
+
+&eth1 {
+        phy = <&phy1>;
+};
+
+&gpio0 {
+        phy1_reset {
+                gpio-hog;
+                gpios = <19 GPIO_ACTIVE_LOW>;
+                output-low;
+                line-name = "phy1-reset";
+        };
+};
+
+&mdio {
+        pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins &clearfog_phy_pins>;
+        phy1: ethernet-phy@1 {
+                /*
+                 * Annoyingly, the marvell phy driver configures the LED
+                 * register, rather than preserving reset-loaded setting.
+                 * We undo that rubbish here.
+                 */
+                marvell,reg-init = <3 16 0 0x101e>;
+                reg = <1>;
+        };
+};
+
+&pinctrl {
+        /* phy1 reset */
+        clearfog_phy_pins: clearfog-phy-pins {
+                marvell,pins = "mpp19";
+                marvell,function = "gpio";
+        };
+        rear_button_pins: rear-button-pins {
+                marvell,pins = "mpp44";
+                marvell,function = "gpio";
+        };
+};
diff --git a/arch/arm/boot/dts/armada-388-clearfog-pro.dts b/arch/arm/boot/dts/armada-388-clearfog-pro.dts
new file mode 100644
index 000000000000..bd85870bbdbb
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388-clearfog-pro.dts
@@ -0,0 +1,55 @@
+/*
+ * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
+ *
+ *  Copyright (C) 2015 Russell King
+ *
+ * This board is in development; the contents of this file work with
+ * the A1 rev 2.0 of the board, which does not represent final
+ * production board.  Things will change, don't expect this file to
+ * remain compatible info the future.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "armada-388-clearfog.dts"
+
+/ {
+        model = "SolidRun Clearfog Pro A1";
+        compatible = "solidrun,clearfog-pro-a1",
+                "solidrun,clearfog-a1", "marvell,armada388",
+                "marvell,armada385", "marvell,armada380";
+};
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts
index 71ce201c903e..2745b7416313 100644
--- a/arch/arm/boot/dts/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/armada-388-clearfog.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree file for SolidRun Clearfog revision A1 rev 2.0 (88F6828)
+ * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
  *
  *  Copyright (C) 2015 Russell King
  *
@@ -17,17 +17,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,312 +36,33 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /dts-v1/;
-#include "armada-388.dtsi"
-#include "armada-38x-solidrun-microsom.dtsi"
+#include "armada-388-clearfog.dtsi"
 
 / {
         model = "SolidRun Clearfog A1";
         compatible = "solidrun,clearfog-a1", "marvell,armada388",
                 "marvell,armada385", "marvell,armada380";
 
-        aliases {
-                /* So that mvebu u-boot can update the MAC addresses */
-                ethernet1 = &eth0;
-                ethernet2 = &eth1;
-                ethernet3 = &eth2;
-        };
-
-        chosen {
-                stdout-path = "serial0:115200n8";
-        };
-
-        reg_3p3v: regulator-3p3v {
-                compatible = "regulator-fixed";
-                regulator-name = "3P3V";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                regulator-always-on;
-        };
-
         soc {
                 internal-regs {
-                        ethernet@30000 {
-                                phy-mode = "sgmii";
-                                buffer-manager = <&bm>;
-                                bm,pool-long = <2>;
-                                bm,pool-short = <1>;
-                                status = "okay";
-
-                                fixed-link {
-                                        speed = <1000>;
-                                        full-duplex;
-                                };
-                        };
-
-                        ethernet@34000 {
-                                phy-mode = "sgmii";
-                                buffer-manager = <&bm>;
-                                bm,pool-long = <3>;
-                                bm,pool-short = <1>;
-                                status = "okay";
-
-                                fixed-link {
-                                        speed = <1000>;
-                                        full-duplex;
-                                };
-                        };
-
-                        i2c@11000 {
-                                /* Is there anything on this? */
-                                clock-frequency = <100000>;
-                                pinctrl-0 = <&i2c0_pins>;
-                                pinctrl-names = "default";
-                                status = "okay";
-
-                                /*
-                                 * PCA9655 GPIO expander, up to 1MHz clock.
-                                 *  0-CON3 CLKREQ#
-                                 *  1-CON3 PERST#
-                                 *  2-CON2 PERST#
-                                 *  3-CON3 W_DISABLE
-                                 *  4-CON2 CLKREQ#
-                                 *  5-USB3 overcurrent
-                                 *  6-USB3 power
-                                 *  7-CON2 W_DISABLE
-                                 *  8-JP4 P1
-                                 *  9-JP4 P4
-                                 * 10-JP4 P5
-                                 * 11-m.2 DEVSLP
-                                 * 12-SFP_LOS
-                                 * 13-SFP_TX_FAULT
-                                 * 14-SFP_TX_DISABLE
-                                 * 15-SFP_MOD_DEF0
-                                 */
-                                expander0: gpio-expander@20 {
-                                        /*
-                                         * This is how it should be:
-                                         * compatible = "onnn,pca9655",
-                                         *       "nxp,pca9555";
-                                         * but you can't do this because of
-                                         * the way I2C works.
-                                         */
-                                        compatible = "nxp,pca9555";
-                                        gpio-controller;
-                                        #gpio-cells = <2>;
-                                        reg = <0x20>;
-
-                                        pcie1_0_clkreq {
-                                                gpio-hog;
-                                                gpios = <0 GPIO_ACTIVE_LOW>;
-                                                input;
-                                                line-name = "pcie1.0-clkreq";
-                                        };
-                                        pcie1_0_w_disable {
-                                                gpio-hog;
-                                                gpios = <3 GPIO_ACTIVE_LOW>;
-                                                output-low;
-                                                line-name = "pcie1.0-w-disable";
-                                        };
-                                        pcie2_0_clkreq {
-                                                gpio-hog;
-                                                gpios = <4 GPIO_ACTIVE_LOW>;
-                                                input;
-                                                line-name = "pcie2.0-clkreq";
-                                        };
-                                        pcie2_0_w_disable {
-                                                gpio-hog;
-                                                gpios = <7 GPIO_ACTIVE_LOW>;
-                                                output-low;
-                                                line-name = "pcie2.0-w-disable";
-                                        };
-                                        usb3_ilimit {
-                                                gpio-hog;
-                                                gpios = <5 GPIO_ACTIVE_LOW>;
-                                                input;
-                                                line-name = "usb3-current-limit";
-                                        };
-                                        usb3_power {
-                                                gpio-hog;
-                                                gpios = <6 GPIO_ACTIVE_HIGH>;
-                                                output-high;
-                                                line-name = "usb3-power";
-                                        };
-                                        m2_devslp {
-                                                gpio-hog;
-                                                gpios = <11 GPIO_ACTIVE_HIGH>;
-                                                output-low;
-                                                line-name = "m.2 devslp";
-                                        };
-                                        sfp_los {
-                                                /* SFP loss of signal */
-                                                gpio-hog;
-                                                gpios = <12 GPIO_ACTIVE_HIGH>;
-                                                input;
-                                                line-name = "sfp-los";
-                                        };
-                                        sfp_tx_fault {
-                                                /* SFP laser fault */
-                                                gpio-hog;
-                                                gpios = <13 GPIO_ACTIVE_HIGH>;
-                                                input;
-                                                line-name = "sfp-tx-fault";
-                                        };
-                                        sfp_tx_disable {
-                                                /* SFP transmit disable */
-                                                gpio-hog;
-                                                gpios = <14 GPIO_ACTIVE_HIGH>;
-                                                output-low;
-                                                line-name = "sfp-tx-disable";
-                                        };
-                                        sfp_mod_def0 {
-                                                /* SFP module present */
-                                                gpio-hog;
-                                                gpios = <15 GPIO_ACTIVE_LOW>;
-                                                input;
-                                                line-name = "sfp-mod-def0";
-                                        };
-                                };
-
-                                /* The MCP3021 is 100kHz clock only */
-                                mikrobus_adc: mcp3021@4c {
-                                        compatible = "microchip,mcp3021";
-                                        reg = <0x4c>;
-                                };
-
-                                /* Also something at 0x64 */
-                        };
-
-                        i2c@11100 {
-                                /*
-                                 * Routed to SFP, mikrobus, and PCIe.
-                                 * SFP limits this to 100kHz, and requires
-                                 *  an AT24C01A/02/04 with address pins tied
-                                 *  low, which takes addresses 0x50 and 0x51.
-                                 * Mikrobus doesn't specify beyond an I2C
-                                 *  bus being present.
-                                 * PCIe uses ARP to assign addresses, or
-                                 *  0x63-0x64.
-                                 */
-                                clock-frequency = <100000>;
-                                pinctrl-0 = <&clearfog_i2c1_pins>;
-                                pinctrl-names = "default";
-                                status = "okay";
-                        };
-
-                        pinctrl@18000 {
-                                clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
-                                        marvell,pins = "mpp46";
-                                        marvell,function = "ref";
-                                };
-                                clearfog_dsa0_pins: clearfog-dsa0-pins {
-                                        marvell,pins = "mpp23", "mpp41";
-                                        marvell,function = "gpio";
-                                };
-                                clearfog_i2c1_pins: i2c1-pins {
-                                        /* SFP, PCIe, mSATA, mikrobus */
-                                        marvell,pins = "mpp26", "mpp27";
-                                        marvell,function = "i2c1";
-                                };
-                                clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
-                                        marvell,pins = "mpp20";
-                                        marvell,function = "gpio";
-                                };
-                                clearfog_sdhci_pins: clearfog-sdhci-pins {
-                                        marvell,pins = "mpp21", "mpp28",
-                                                       "mpp37", "mpp38",
-                                                       "mpp39", "mpp40";
-                                        marvell,function = "sd0";
-                                };
-                                clearfog_spi1_cs_pins: spi1-cs-pins {
-                                        marvell,pins = "mpp55";
-                                        marvell,function = "spi1";
-                                };
-                                mikro_pins: mikro-pins {
-                                        /* int: mpp22 rst: mpp29 */
-                                        marvell,pins = "mpp22", "mpp29";
-                                        marvell,function = "gpio";
-                                };
-                                mikro_spi_pins: mikro-spi-pins {
-                                        marvell,pins = "mpp43";
-                                        marvell,function = "spi1";
-                                };
-                                mikro_uart_pins: mikro-uart-pins {
-                                        marvell,pins = "mpp24", "mpp25";
-                                        marvell,function = "ua1";
-                                };
-                                rear_button_pins: rear-button-pins {
-                                        marvell,pins = "mpp34";
-                                        marvell,function = "gpio";
-                                };
-                        };
-
-                        sata@a8000 {
-                                /* pinctrl? */
-                                status = "okay";
-                        };
-
-                        sata@e0000 {
-                                /* pinctrl? */
-                                status = "okay";
-                        };
-
-                        sdhci@d8000 {
-                                bus-width = <4>;
-                                cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
-                                no-1-8-v;
-                                pinctrl-0 = <&clearfog_sdhci_pins
-                                             &clearfog_sdhci_cd_pins>;
-                                pinctrl-names = "default";
-                                status = "okay";
-                                vmmc = <&reg_3p3v>;
-                                wp-inverted;
-                        };
-
-                        serial@12100 {
-                                /* mikrobus uart */
-                                pinctrl-0 = <&mikro_uart_pins>;
-                                pinctrl-names = "default";
-                                status = "okay";
-                        };
-
-                        usb@58000 {
-                                /* CON3, nearest  power. */
-                                status = "okay";
-                        };
-
                         usb3@f0000 {
                                 /* CON2, nearest CPU, USB2 only. */
                                 status = "okay";
                         };
-
-                        usb3@f8000 {
-                                /* CON7 */
-                                status = "okay";
-                        };
                 };
 
                 pcie-controller {
-                        status = "okay";
-                        /*
-                         * The two PCIe units are accessible through
-                         * the mini-PCIe connectors on the board.
-                         */
-                        pcie@2,0 {
-                                /* Port 1, Lane 0. CON3, nearest power. */
-                                reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
-                                status = "okay";
-                        };
                         pcie@3,0 {
                                 /* Port 2, Lane 0. CON2, nearest CPU. */
                                 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
@@ -351,6 +72,8 @@
         };
 
         dsa@0 {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 dsa,ethernet = <&eth1>;
                 dsa,mii-bus = <&mdio>;
@@ -421,26 +144,136 @@
         };
 };
 
-&spi1 {
+&eth1 {
+        /* ethernet@30000 */
+        fixed-link {
+                speed = <1000>;
+                full-duplex;
+        };
+};
+
+&expander0 {
         /*
-         * We don't seem to have the W25Q32 on the
-         * A1 Rev 2.0 boards, so disable SPI.
-         * CS0: W25Q32 (doesn't appear to be present)
-         * CS1:
-         * CS2: mikrobus
+         * PCA9655 GPIO expander:
+         *  0-CON3 CLKREQ#
+         *  1-CON3 PERST#
+         *  2-CON2 PERST#
+         *  3-CON3 W_DISABLE
+         *  4-CON2 CLKREQ#
+         *  5-USB3 overcurrent
+         *  6-USB3 power
+         *  7-CON2 W_DISABLE
+         *  8-JP4 P1
+         *  9-JP4 P4
+         * 10-JP4 P5
+         * 11-m.2 DEVSLP
+         * 12-SFP_LOS
+         * 13-SFP_TX_FAULT
+         * 14-SFP_TX_DISABLE
+         * 15-SFP_MOD_DEF0
          */
-        pinctrl-0 = <&spi1_pins
-                     &clearfog_spi1_cs_pins
-                     &mikro_spi_pins>;
-        pinctrl-names = "default";
+        pcie2_0_clkreq {
+                gpio-hog;
+                gpios = <4 GPIO_ACTIVE_LOW>;
+                input;
+                line-name = "pcie2.0-clkreq";
+        };
+        pcie2_0_w_disable {
+                gpio-hog;
+                gpios = <7 GPIO_ACTIVE_LOW>;
+                output-low;
+                line-name = "pcie2.0-w-disable";
+        };
+};
+
+&pinctrl {
+        clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
+                marvell,pins = "mpp46";
+                marvell,function = "ref";
+        };
+        clearfog_dsa0_pins: clearfog-dsa0-pins {
+                marvell,pins = "mpp23", "mpp41";
+                marvell,function = "gpio";
+        };
+        clearfog_spi1_cs_pins: spi1-cs-pins {
+                marvell,pins = "mpp55";
+                marvell,function = "spi1";
+        };
+        rear_button_pins: rear-button-pins {
+                marvell,pins = "mpp34";
+                marvell,function = "gpio";
+        };
+};
+
+&mdio {
         status = "okay";
 
-        spi-flash@0 {
+        switch@4 {
+                compatible = "marvell,mv88e6085";
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "w25q32", "jedec,spi-nor";
-                reg = <0>; /* Chip select 0 */
-                spi-max-frequency = <3000000>;
-                status = "disabled";
+                reg = <4>;
+                pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
+                pinctrl-names = "default";
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan5";
+                        };
+
+                        port@1 {
+                                reg = <1>;
+                                label = "lan4";
+                        };
+
+                        port@2 {
+                                reg = <2>;
+                                label = "lan3";
+                        };
+
+                        port@3 {
+                                reg = <3>;
+                                label = "lan2";
+                        };
+
+                        port@4 {
+                                reg = <4>;
+                                label = "lan1";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth1>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+
+                        port@6 {
+                                /* 88E1512 external phy */
+                                reg = <6>;
+                                label = "lan6";
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
         };
 };
+
+&spi1 {
+        /*
+         * Add SPI CS pins for clearfog:
+         * CS0: W25Q32 (not populated on uSOM)
+         * CS1:
+         * CS2: mikrobus
+         */
+        pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
+};
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi
new file mode 100644
index 000000000000..0f5938bede53
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
@@ -0,0 +1,307 @@
+/*
+ * Device Tree include file for SolidRun Clearfog 88F6828 based boards
+ *
+ *  Copyright (C) 2015 Russell King
+ *
+ * This board is in development; the contents of this file work with
+ * the A1 rev 2.0 of the board, which does not represent final
+ * production board.  Things will change, don't expect this file to
+ * remain compatible info the future.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armada-388.dtsi"
+#include "armada-38x-solidrun-microsom.dtsi"
+
+/ {
+        aliases {
+                /* So that mvebu u-boot can update the MAC addresses */
+                ethernet1 = &eth0;
+                ethernet2 = &eth1;
+                ethernet3 = &eth2;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
+
+        soc {
+                internal-regs {
+                        sata@a8000 {
+                                /* pinctrl? */
+                                status = "okay";
+                        };
+
+                        sata@e0000 {
+                                /* pinctrl? */
+                                status = "okay";
+                        };
+
+                        sdhci@d8000 {
+                                bus-width = <4>;
+                                cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+                                no-1-8-v;
+                                pinctrl-0 = <&microsom_sdhci_pins
+                                             &clearfog_sdhci_cd_pins>;
+                                pinctrl-names = "default";
+                                status = "okay";
+                                vmmc = <&reg_3p3v>;
+                                wp-inverted;
+                        };
+
+                        usb@58000 {
+                                /* CON3, nearest  power. */
+                                status = "okay";
+                        };
+
+                        usb3@f8000 {
+                                /* CON7 */
+                                status = "okay";
+                        };
+                };
+
+                pcie-controller {
+                        status = "okay";
+                        /*
+                         * The two PCIe units are accessible through
+                         * the mini-PCIe connectors on the board.
+                         */
+                        pcie@2,0 {
+                                /* Port 1, Lane 0. CON3, nearest power. */
+                                reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
+                                status = "okay";
+                        };
+                };
+        };
+};
+
+&eth1 {
+        /* ethernet@30000 */
+        bm,pool-long = <2>;
+        bm,pool-short = <1>;
+        buffer-manager = <&bm>;
+        phy-mode = "sgmii";
+        status = "okay";
+};
+
+&eth2 {
+        /* ethernet@34000 */
+        bm,pool-long = <3>;
+        bm,pool-short = <1>;
+        buffer-manager = <&bm>;
+        phy-mode = "sgmii";
+        status = "okay";
+
+        fixed-link {
+                speed = <1000>;
+                full-duplex;
+        };
+};
+
+&i2c0 {
+        /* Is there anything on this? */
+        clock-frequency = <100000>;
+        pinctrl-0 = <&i2c0_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+
+        /*
+         * PCA9655 GPIO expander, up to 1MHz clock.
+         *  0-CON3 CLKREQ#
+         *  1-CON3 PERST#
+         *  2-
+         *  3-CON3 W_DISABLE
+         *  4-
+         *  5-USB3 overcurrent
+         *  6-USB3 power
+         *  7-
+         *  8-JP4 P1
+         *  9-JP4 P4
+         * 10-JP4 P5
+         * 11-m.2 DEVSLP
+         * 12-SFP_LOS
+         * 13-SFP_TX_FAULT
+         * 14-SFP_TX_DISABLE
+         * 15-SFP_MOD_DEF0
+         */
+        expander0: gpio-expander@20 {
+                /*
+                 * This is how it should be:
+                 * compatible = "onnn,pca9655", "nxp,pca9555";
+                 * but you can't do this because of the way I2C works.
+                 */
+                compatible = "nxp,pca9555";
+                gpio-controller;
+                #gpio-cells = <2>;
+                reg = <0x20>;
+
+                pcie1_0_clkreq {
+                        gpio-hog;
+                        gpios = <0 GPIO_ACTIVE_LOW>;
+                        input;
+                        line-name = "pcie1.0-clkreq";
+                };
+                pcie1_0_w_disable {
+                        gpio-hog;
+                        gpios = <3 GPIO_ACTIVE_LOW>;
+                        output-low;
+                        line-name = "pcie1.0-w-disable";
+                };
+                usb3_ilimit {
+                        gpio-hog;
+                        gpios = <5 GPIO_ACTIVE_LOW>;
+                        input;
+                        line-name = "usb3-current-limit";
+                };
+                usb3_power {
+                        gpio-hog;
+                        gpios = <6 GPIO_ACTIVE_HIGH>;
+                        output-high;
+                        line-name = "usb3-power";
+                };
+                m2_devslp {
+                        gpio-hog;
+                        gpios = <11 GPIO_ACTIVE_HIGH>;
+                        output-low;
+                        line-name = "m.2 devslp";
+                };
+                sfp_los {
+                        /* SFP loss of signal */
+                        gpio-hog;
+                        gpios = <12 GPIO_ACTIVE_HIGH>;
+                        input;
+                        line-name = "sfp-los";
+                };
+                sfp_tx_fault {
+                        /* SFP laser fault */
+                        gpio-hog;
+                        gpios = <13 GPIO_ACTIVE_HIGH>;
+                        input;
+                        line-name = "sfp-tx-fault";
+                };
+                sfp_tx_disable {
+                        /* SFP transmit disable */
+                        gpio-hog;
+                        gpios = <14 GPIO_ACTIVE_HIGH>;
+                        output-low;
+                        line-name = "sfp-tx-disable";
+                };
+                sfp_mod_def0 {
+                        /* SFP module present */
+                        gpio-hog;
+                        gpios = <15 GPIO_ACTIVE_LOW>;
+                        input;
+                        line-name = "sfp-mod-def0";
+                };
+        };
+
+        /* The MCP3021 is 100kHz clock only */
+        mikrobus_adc: mcp3021@4c {
+                compatible = "microchip,mcp3021";
+                reg = <0x4c>;
+        };
+
+        /* Also something at 0x64 */
+};
+
+&i2c1 {
+        /*
+         * Routed to SFP, mikrobus, and PCIe.
+         * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
+         *  address pins tied low, which takes addresses 0x50 and 0x51.
+         * Mikrobus doesn't specify beyond an I2C bus being present.
+         * PCIe uses ARP to assign addresses, or 0x63-0x64.
+         */
+        clock-frequency = <100000>;
+        pinctrl-0 = <&clearfog_i2c1_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
+
+&pinctrl {
+        clearfog_i2c1_pins: i2c1-pins {
+                /* SFP, PCIe, mSATA, mikrobus */
+                marvell,pins = "mpp26", "mpp27";
+                marvell,function = "i2c1";
+        };
+        clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins {
+                marvell,pins = "mpp20";
+                marvell,function = "gpio";
+        };
+        mikro_pins: mikro-pins {
+                /* int: mpp22 rst: mpp29 */
+                marvell,pins = "mpp22", "mpp29";
+                marvell,function = "gpio";
+        };
+        mikro_spi_pins: mikro-spi-pins {
+                marvell,pins = "mpp43";
+                marvell,function = "spi1";
+        };
+        mikro_uart_pins: mikro-uart-pins {
+                marvell,pins = "mpp24", "mpp25";
+                marvell,function = "ua1";
+        };
+};
+
+&spi1 {
+        /*
+         * Add SPI CS pins for clearfog:
+         * CS0: W25Q32 (not populated on uSOM)
+         * CS1: PIC microcontroller (Pro models)
+         * CS2: mikrobus
+         */
+        pinctrl-0 = <&spi1_pins &mikro_spi_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
+
+&uart1 {
+        /* mikrobus uart */
+        pinctrl-0 = <&mikro_uart_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts
index de26c762239c..1ac923826445 100644
--- a/arch/arm/boot/dts/armada-388-db.dts
+++ b/arch/arm/boot/dts/armada-388-db.dts
@@ -16,17 +16,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -35,11 +35,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts
index dd3462ddb6b9..af82f275eac2 100644
--- a/arch/arm/boot/dts/armada-388-rd.dts
+++ b/arch/arm/boot/dts/armada-388-rd.dts
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
index 8c9842237b60..9b508a8161f5 100644
--- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi
@@ -17,17 +17,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -62,45 +62,6 @@
                           MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
 
                 internal-regs {
-                        ethernet@70000 {
-                                pinctrl-0 = <&ge0_rgmii_pins>;
-                                pinctrl-names = "default";
-                                phy = <&phy_dedicated>;
-                                phy-mode = "rgmii-id";
-                                buffer-manager = <&bm>;
-                                bm,pool-long = <0>;
-                                bm,pool-short = <1>;
-                                status = "okay";
-                        };
-
-                        mdio@72004 {
-                                /*
-                                 * Add the phy clock here, so the phy can be
-                                 * accessed to read its IDs prior to binding
-                                 * with the driver.
-                                 */
-                                pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins>;
-                                pinctrl-names = "default";
-
-                                phy_dedicated: ethernet-phy@0 {
-                                        /*
-                                         * Annoyingly, the marvell phy driver
-                                         * configures the LED register, rather
-                                         * than preserving reset-loaded setting.
-                                         * We undo that rubbish here.
-                                         */
-                                        marvell,reg-init = <3 16 0 0x101e>;
-                                        reg = <0>;
-                                };
-                        };
-
-                        pinctrl@18000 {
-                                microsom_phy_clk_pins: microsom-phy-clk-pins {
-                                        marvell,pins = "mpp45";
-                                        marvell,function = "ref";
-                                };
-                        };
-
                         rtc@a3800 {
                                 /*
                                  * If the rtc doesn't work, run "date reset"
@@ -108,21 +69,78 @@
                                  */
                                 status = "okay";
                         };
+                };
+        };
+};
 
-                        serial@12000 {
-                                pinctrl-0 = <&uart0_pins>;
-                                pinctrl-names = "default";
-                                status = "okay";
-                        };
+&bm {
+        status = "okay";
+};
 
-                        bm@c8000 {
-                                status = "okay";
-                        };
-                };
+&bm_bppi {
+        status = "okay";
+};
 
-                bm-bppi {
-                        status = "okay";
-                };
+&eth0 {
+        /* ethernet@70000 */
+        pinctrl-0 = <&ge0_rgmii_pins>;
+        pinctrl-names = "default";
+        phy = <&phy_dedicated>;
+        phy-mode = "rgmii-id";
+        buffer-manager = <&bm>;
+        bm,pool-long = <0>;
+        bm,pool-short = <1>;
+        status = "okay";
+};
+
+&mdio {
+        /*
+         * Add the phy clock here, so the phy can be accessed to read its
+         * IDs prior to binding with the driver.
+         */
+        pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins>;
+        pinctrl-names = "default";
+
+        phy_dedicated: ethernet-phy@0 {
+                /*
+                 * Annoyingly, the marvell phy driver configures the LED
+                 * register, rather than preserving reset-loaded setting.
+                 * We undo that rubbish here.
+                 */
+                marvell,reg-init = <3 16 0 0x101e>;
+                reg = <0>;
+        };
+};
+
+&pinctrl {
+        microsom_phy_clk_pins: microsom-phy-clk-pins {
+                marvell,pins = "mpp45";
+                marvell,function = "ref";
+        };
+        /* Optional eMMC */
+        microsom_sdhci_pins: microsom-sdhci-pins {
+                marvell,pins = "mpp21", "mpp28", "mpp37",
+                               "mpp38", "mpp39", "mpp40";
+                marvell,function = "sd0";
+        };
+};
+
+&spi1 {
+        /* The microsom has an optional W25Q32 on board, connected to CS0 */
+        pinctrl-0 = <&spi1_pins>;
 
+        w25q32: spi-flash@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "w25q32", "jedec,spi-nor";
+                reg = <0>; /* Chip select 0 */
+                spi-max-frequency = <3000000>;
+                status = "disabled";
         };
 };
+
+&uart0 {
+        pinctrl-0 = <&uart0_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 7450e9fea45d..79b767507eab 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts
index 34e279d973c8..2afed2ce4741 100644
--- a/arch/arm/boot/dts/armada-390-db.dts
+++ b/arch/arm/boot/dts/armada-390-db.dts
@@ -16,17 +16,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -35,11 +35,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-390.dtsi b/arch/arm/boot/dts/armada-390.dtsi
index 6cd18d8aaac7..0d8a54ad007c 100644
--- a/arch/arm/boot/dts/armada-390.dtsi
+++ b/arch/arm/boot/dts/armada-390.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-395.dtsi b/arch/arm/boot/dts/armada-395.dtsi
index ab5dc49f2bff..bf7e4335e36a 100644
--- a/arch/arm/boot/dts/armada-395.dtsi
+++ b/arch/arm/boot/dts/armada-395.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts
index 268c8349c884..e8604281c3c9 100644
--- a/arch/arm/boot/dts/armada-398-db.dts
+++ b/arch/arm/boot/dts/armada-398-db.dts
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-398.dtsi b/arch/arm/boot/dts/armada-398.dtsi
index 234a99891a29..1f4e113fc821 100644
--- a/arch/arm/boot/dts/armada-398.dtsi
+++ b/arch/arm/boot/dts/armada-398.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index de171baffcf6..60fbfd5907c7 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
new file mode 100644
index 000000000000..f6a03dcee5ef
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
@@ -0,0 +1,254 @@
+/*
+ * Device Tree Include file for Marvell 98dx3236 family SoC
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Contains definitions specific to the 98dx3236 SoC that are not
+ * common to all Armada XP SoCs.
+ */
+
+#include "armada-xp.dtsi"
+
+/ {
+        model = "Marvell 98DX3236 SoC";
+        compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp", "marvell,armada-370-xp";
+
+        aliases {
+                gpio0 = &gpio0;
+                gpio1 = &gpio1;
+                gpio2 = &gpio2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                enable-method = "marvell,98dx3236-smp";
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "marvell,sheeva-v7";
+                        reg = <0>;
+                        clocks = <&cpuclk 0>;
+                        clock-latency = <1000000>;
+                };
+        };
+
+        soc {
+                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
+                          MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
+                          MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
+                          MBUS_ID(0x03, 0x00) 0 0 0xa8000000 0x4000000
+                          MBUS_ID(0x08, 0x00) 0 0 0xac000000 0x100000>;
+
+                /*
+                 * 98DX3236 has 1 x1 PCIe unit Gen2.0
+                 */
+                pciec: pcie-controller@82000000 {
+                        compatible = "marvell,armada-xp-pcie";
+                        status = "disabled";
+                        device_type = "pci";
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+
+                        msi-parent = <&mpic>;
+                        bus-range = <0x00 0xff>;
+
+                        ranges =
+                               <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
+                                0x82000000 0x1 0       MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
+                                0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
+                                0x82000000 0x2 0       MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */>;
+
+                        pcie1: pcie@1,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
+                                reg = <0x0800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
+                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 58>;
+                                marvell,pcie-port = <0>;
+                                marvell,pcie-lane = <0>;
+                                clocks = <&gateclk 5>;
+                                status = "disabled";
+                        };
+                };
+
+                internal-regs {
+                        coreclk: mvebu-sar@18230 {
+                                compatible = "marvell,mv98dx3236-core-clock";
+                        };
+
+                        cpuclk: clock-complex@18700 {
+                                compatible = "marvell,mv98dx3236-cpu-clock";
+                        };
+
+                        corediv-clock@18740 {
+                                status = "disabled";
+                        };
+
+                        xor@60900 {
+                                status = "disabled";
+                        };
+
+                        crypto@90000 {
+                                status = "disabled";
+                        };
+
+                        xor@f0900 {
+                                status = "disabled";
+                        };
+
+                        xor@f0800 {
+                                compatible = "marvell,orion-xor";
+                                reg = <0xf0800 0x100
+                                       0xf0a00 0x100>;
+                                clocks = <&gateclk 22>;
+                                status = "okay";
+
+                                xor10 {
+                                        interrupts = <51>;
+                                        dmacap,memcpy;
+                                        dmacap,xor;
+                                };
+                                xor11 {
+                                        interrupts = <52>;
+                                        dmacap,memcpy;
+                                        dmacap,xor;
+                                        dmacap,memset;
+                                };
+                        };
+
+                        gpio0: gpio@18100 {
+                                compatible = "marvell,orion-gpio";
+                                reg = <0x18100 0x40>;
+                                ngpios = <32>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <82>, <83>, <84>, <85>;
+                        };
+
+                        /* does not exist */
+                        gpio1: gpio@18140 {
+                                compatible = "marvell,orion-gpio";
+                                reg = <0x18140 0x40>;
+                                status = "disabled";
+                        };
+
+                        gpio2: gpio@18180 { /* rework some properties */
+                                compatible = "marvell,orion-gpio";
+                                reg = <0x18180 0x40>;
+                                ngpios = <1>; /* only gpio #32 */
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                                interrupts = <87>;
+                        };
+
+                        nand: nand@d0000 {
+                                clocks = <&dfx_coredivclk 0>;
+                        };
+                };
+
+                dfxr: dfx-registers@ac000000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
+
+                        dfx_coredivclk: corediv-clock@f8268 {
+                                compatible = "marvell,mv98dx3236-corediv-clock";
+                                reg = <0xf8268 0xc>;
+                                #clock-cells = <1>;
+                                clocks = <&mainpll>;
+                                clock-output-names = "nand";
+                        };
+
+                        dfx: dfx@0 {
+                                compatible = "marvell,dfx-server";
+                                reg = <0 0x100000>;
+                        };
+                };
+
+                switch: switch@a8000000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>;
+
+                        pp0: packet-processor@0 {
+                                compatible = "marvell,prestera-98dx3236";
+                                reg = <0 0x4000000>;
+                                interrupts = <33>, <34>, <35>;
+                                dfx = <&dfx>;
+                        };
+                };
+        };
+};
+
+&pinctrl {
+        compatible = "marvell,98dx3236-pinctrl";
+
+        spi0_pins: spi0-pins {
+                marvell,pins = "mpp0", "mpp1",
+                               "mpp2", "mpp3";
+                marvell,function = "spi0";
+        };
+};
+
+&sdio {
+        status = "disabled";
+};
+
+&crypto_sram0 {
+        status = "disabled";
+};
+
+&crypto_sram1 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/armada-xp-98dx3336.dtsi b/arch/arm/boot/dts/armada-xp-98dx3336.dtsi
new file mode 100644
index 000000000000..e1580afdc260
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-98dx3336.dtsi
@@ -0,0 +1,76 @@
+/*
+ * Device Tree Include file for Marvell 98dx3336 family SoC
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Contains definitions specific to the 98dx3236 SoC that are not
+ * common to all Armada XP SoCs.
+ */
+
+#include "armada-xp-98dx3236.dtsi"
+
+/ {
+        model = "Marvell 98DX3336 SoC";
+        compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-98dx3236", "marvell,armadaxp", "marvell,armada-370-xp";
+
+        cpus {
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "marvell,sheeva-v7";
+                        reg = <1>;
+                        clocks = <&cpuclk 1>;
+                        clock-latency = <1000000>;
+                };
+        };
+
+        soc {
+                internal-regs {
+                        resume@20980 {
+                                compatible = "marvell,98dx3336-resume-ctrl";
+                                reg = <0x20980 0x10>;
+                        };
+                };
+        };
+};
+
+&pp0 {
+        compatible = "marvell,prestera-98dx3336";
+};
diff --git a/arch/arm/boot/dts/armada-xp-98dx4251.dtsi b/arch/arm/boot/dts/armada-xp-98dx4251.dtsi
new file mode 100644
index 000000000000..b9d9b269efb4
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-98dx4251.dtsi
@@ -0,0 +1,90 @@
+/*
+ * Device Tree Include file for Marvell 98dx4521 family SoC
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Contains definitions specific to the 98dx4521 SoC that are not
+ * common to all Armada XP SoCs.
+ */
+
+#include "armada-xp-98dx3236.dtsi"
+
+/ {
+        model = "Marvell 98DX4251 SoC";
+        compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armadaxp", "marvell,armada-370-xp";
+
+        cpus {
+                cpu@1 {
+                        device_type = "cpu";
+                        compatible = "marvell,sheeva-v7";
+                        reg = <1>;
+                        clocks = <&cpuclk 1>;
+                        clock-latency = <1000000>;
+                };
+        };
+
+        soc {
+                internal-regs {
+                        resume@20980 {
+                                compatible = "marvell,98dx3336-resume-ctrl";
+                                reg = <0x20980 0x10>;
+                        };
+                };
+        };
+};
+
+&sdio {
+        status = "okay";
+};
+
+&pinctrl {
+        compatible = "marvell,98dx4251-pinctrl";
+
+        sdio_pins: sdio-pins {
+                marvell,pins = "mpp5", "mpp6", "mpp7",
+                               "mpp8", "mpp9", "mpp10";
+                marvell,function = "sd0";
+        };
+};
+
+&pp0 {
+        compatible = "marvell,prestera-98dx4251";
+};
diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
index 1e1fc4fccbad..d0c6a01f48a6 100644
--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -20,17 +20,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -39,11 +39,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-db-dxbc2.dts b/arch/arm/boot/dts/armada-xp-db-dxbc2.dts
new file mode 100644
index 000000000000..a8130805074e
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-db-dxbc2.dts
@@ -0,0 +1,151 @@
+/*
+ * Device Tree file for DB-DXBC2 board
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ *
+ * Based on armada-xp-db.dts
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include "armada-xp-98dx4251.dtsi"
+
+/ {
+        model = "Marvell Bobcat2 Evaluation Board";
+        compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armadaxp", "marvell,armada-370-xp";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
+        };
+
+};
+
+&devbus_bootcs {
+        status = "okay";
+
+        /* Device Bus parameters are required */
+
+        /* Read parameters */
+        devbus,bus-width    = <16>;
+        devbus,turn-off-ps  = <60000>;
+        devbus,badr-skew-ps = <0>;
+        devbus,acc-first-ps = <124000>;
+        devbus,acc-next-ps  = <248000>;
+        devbus,rd-setup-ps  = <0>;
+        devbus,rd-hold-ps   = <0>;
+
+        /* Write parameters */
+        devbus,sync-enable = <0>;
+        devbus,wr-high-ps  = <60000>;
+        devbus,wr-low-ps   = <60000>;
+        devbus,ale-wr-ps   = <60000>;
+};
+
+&i2c0 {
+        clock-frequency = <100000>;
+        status = "okay";
+};
+
+&uart0 {
+        status = "okay";
+};
+
+&uart1 {
+        status = "okay";
+};
+
+&nand {
+        status = "okay";
+        num-cs = <1>;
+        marvell,nand-keep-config;
+        marvell,nand-enable-arbiter;
+        nand-on-flash-bbt;
+        nand-ecc-strength = <4>;
+        nand-ecc-step-size = <512>;
+};
+
+&sdio {
+        pinctrl-0 = <&sdio_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+        /* No CD or WP GPIOs */
+        broken-cd;
+};
+
+&spi0 {
+        status = "okay";
+
+        spi-flash@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p64";
+                reg = <0>; /* Chip select 0 */
+                spi-max-frequency = <20000000>;
+                m25p,fast-read;
+
+                partition@u-boot {
+                        reg = <0x00000000 0x00100000>;
+                        label = "u-boot";
+                };
+                partition@u-boot-env {
+                        reg = <0x00100000 0x00040000>;
+                        label = "u-boot-env";
+                };
+                partition@unused {
+                        reg = <0x00140000 0x00ec0000>;
+                        label = "unused";
+                };
+
+        };
+};
diff --git a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
new file mode 100644
index 000000000000..4e07cb6ed800
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
@@ -0,0 +1,142 @@
+/*
+ * Device Tree file for DB-XC3-24G4XG board
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ *
+ * Based on armada-xp-db.dts
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include "armada-xp-98dx3336.dtsi"
+
+/ {
+        model = "DB-XC3-24G4XG";
+        compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armadaxp", "marvell,armada-370-xp";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
+        };
+};
+
+&devbus_bootcs {
+        status = "okay";
+
+        /* Device Bus parameters are required */
+
+        /* Read parameters */
+        devbus,bus-width    = <16>;
+        devbus,turn-off-ps  = <60000>;
+        devbus,badr-skew-ps = <0>;
+        devbus,acc-first-ps = <124000>;
+        devbus,acc-next-ps  = <248000>;
+        devbus,rd-setup-ps  = <0>;
+        devbus,rd-hold-ps   = <0>;
+
+        /* Write parameters */
+        devbus,sync-enable = <0>;
+        devbus,wr-high-ps  = <60000>;
+        devbus,wr-low-ps   = <60000>;
+        devbus,ale-wr-ps   = <60000>;
+};
+
+&uart0 {
+        status = "okay";
+};
+
+&uart1 {
+        status = "okay";
+};
+
+&i2c0 {
+        clock-frequency = <100000>;
+        status = "okay";
+};
+
+&nand {
+        status = "okay";
+        num-cs = <1>;
+        marvell,nand-keep-config;
+        marvell,nand-enable-arbiter;
+        nand-on-flash-bbt;
+        nand-ecc-strength = <4>;
+        nand-ecc-step-size = <512>;
+};
+
+&spi0 {
+        status = "okay";
+
+        spi-flash@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p64";
+                reg = <0>; /* Chip select 0 */
+                spi-max-frequency = <20000000>;
+                m25p,fast-read;
+
+                partition@u-boot {
+                        reg = <0x00000000 0x00100000>;
+                        label = "u-boot";
+                };
+                partition@u-boot-env {
+                        reg = <0x00100000 0x00040000>;
+                        label = "u-boot-env";
+                };
+                partition@unused {
+                        reg = <0x00140000 0x00ec0000>;
+                        label = "unused";
+                };
+
+        };
+};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 44a724d39dbe..a33974254d8c 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -18,17 +18,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -37,11 +37,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 72cb8fa377e3..d62bf7bea1df 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -18,17 +18,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -37,11 +37,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index d848ae9007db..ce0afba1ce58 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
index 83ac884c0f8a..42ea8764814c 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -302,6 +302,8 @@
         };
 
         dsa {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <2>;
                 #size-cells = <0>;
@@ -398,3 +400,54 @@
                 spi-max-frequency = <40000000>;
         };
 };
+
+&mdio {
+        status = "okay";
+
+        switch@0 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan4";
+                        };
+
+                        port@1 {
+                                reg = <1>;
+                                label = "lan3";
+                        };
+
+                        port@2 {
+                                reg = <2>;
+                                label = "lan2";
+                        };
+
+                        port@3 {
+                                reg = <3>;
+                                label = "lan1";
+                        };
+
+                        port@4 {
+                                reg = <4>;
+                                label = "internet";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth0>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts
index 16277380e714..977f6b3fc1f8 100644
--- a/arch/arm/boot/dts/armada-xp-matrix.dts
+++ b/arch/arm/boot/dts/armada-xp-matrix.dts
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 05c164b5786d..07c5090ecd29 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 07894b0d3e59..64e936ae7b22 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 775bee53ce86..d1383dde43eb 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
index a2f0e789465d..40c6fe21e720 100644
--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index b577c9fb03a4..66b78131a038 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
index e803da03146a..d8e05bab0cee 100644
--- a/arch/arm/boot/dts/armada-xp-synology-ds414.dts
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 5274e4ff5d62..fa1e881266ac 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -18,17 +18,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -37,11 +37,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
index 1b7a5ff0e533..d967603dade8 100644
--- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -23,3 +23,17 @@
 &uart5 {
         status = "okay";
 };
+
+&mac0 {
+        status = "okay";
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
+};
+
+&mac1 {
+        status = "okay";
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index cc5fcf2940bf..1d2fc1e1dc29 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -12,14 +12,34 @@
 
         chosen {
                 stdout-path = &uart5;
-                bootargs = "console=ttyS4,38400 earlyprintk";
+                bootargs = "console=ttyS4,115200 earlyprintk";
         };
 
         memory {
-                reg = <0x40000000 0x10000000>;
+                reg = <0x40000000 0x20000000>;
+        };
+
+        reserved-memory {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                vga_memory: framebuffer@5f000000 {
+                        no-map;
+                        reg = <0x5f000000 0x01000000>; /* 16M */
+                };
         };
 };
 
 &uart5 {
         status = "okay";
 };
+
+&mac0 {
+        status = "okay";
+
+        use-ncsi;
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_rmii1_default>;
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
new file mode 100644
index 000000000000..7a3b2b50c884
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
@@ -0,0 +1,45 @@
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+
+/ {
+        model = "Romulus BMC";
+        compatible = "ibm,romulus-bmc", "aspeed,ast2500";
+
+        aliases {
+                serial4 = &uart5;
+        };
+
+        chosen {
+                stdout-path = &uart5;
+                bootargs = "console=ttyS4,115200 earlyprintk";
+        };
+
+        memory {
+                reg = <0x80000000 0x40000000>;
+        };
+
+        reserved-memory {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                vga_memory: framebuffer@bf000000 {
+                        no-map;
+                        reg = <0xbf000000 0x01000000>; /* 16M */
+                };
+        };
+};
+
+&uart5 {
+        status = "okay";
+};
+
+&mac0 {
+        status = "okay";
+
+        use-ncsi;
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_rmii1_default>;
+};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 22dee5937d5c..0b4932cc02a8 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -41,6 +41,22 @@
                         reg = <0x1e6c0080 0x80>;
                 };
 
+                mac0: ethernet@1e660000 {
+                        compatible = "faraday,ftgmac100";
+                        reg = <0x1e660000 0x180>;
+                        interrupts = <2>;
+                        no-hw-checksum;
+                        status = "disabled";
+                };
+
+                mac1: ethernet@1e680000 {
+                        compatible = "faraday,ftgmac100";
+                        reg = <0x1e680000 0x180>;
+                        interrupts = <3>;
+                        no-hw-checksum;
+                        status = "disabled";
+                };
+
                 apb {
                         compatible = "simple-bus";
                         #address-cells = <1>;
@@ -54,6 +70,756 @@
                                 clocks = <&clk_clkin>;
                         };
 
+                        syscon: syscon@1e6e2000 {
+                                compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
+                                reg = <0x1e6e2000 0x1a8>;
+
+                                pinctrl: pinctrl {
+                                        compatible = "aspeed,g4-pinctrl";
+
+                                        pinctrl_acpi_default: acpi_default {
+                                                function = "ACPI";
+                                                groups = "ACPI";
+                                        };
+
+                                        pinctrl_adc0_default: adc0_default {
+                                                function = "ADC0";
+                                                groups = "ADC0";
+                                        };
+
+                                        pinctrl_adc1_default: adc1_default {
+                                                function = "ADC1";
+                                                groups = "ADC1";
+                                        };
+
+                                        pinctrl_adc10_default: adc10_default {
+                                                function = "ADC10";
+                                                groups = "ADC10";
+                                        };
+
+                                        pinctrl_adc11_default: adc11_default {
+                                                function = "ADC11";
+                                                groups = "ADC11";
+                                        };
+
+                                        pinctrl_adc12_default: adc12_default {
+                                                function = "ADC12";
+                                                groups = "ADC12";
+                                        };
+
+                                        pinctrl_adc13_default: adc13_default {
+                                                function = "ADC13";
+                                                groups = "ADC13";
+                                        };
+
+                                        pinctrl_adc14_default: adc14_default {
+                                                function = "ADC14";
+                                                groups = "ADC14";
+                                        };
+
+                                        pinctrl_adc15_default: adc15_default {
+                                                function = "ADC15";
+                                                groups = "ADC15";
+                                        };
+
+                                        pinctrl_adc2_default: adc2_default {
+                                                function = "ADC2";
+                                                groups = "ADC2";
+                                        };
+
+                                        pinctrl_adc3_default: adc3_default {
+                                                function = "ADC3";
+                                                groups = "ADC3";
+                                        };
+
+                                        pinctrl_adc4_default: adc4_default {
+                                                function = "ADC4";
+                                                groups = "ADC4";
+                                        };
+
+                                        pinctrl_adc5_default: adc5_default {
+                                                function = "ADC5";
+                                                groups = "ADC5";
+                                        };
+
+                                        pinctrl_adc6_default: adc6_default {
+                                                function = "ADC6";
+                                                groups = "ADC6";
+                                        };
+
+                                        pinctrl_adc7_default: adc7_default {
+                                                function = "ADC7";
+                                                groups = "ADC7";
+                                        };
+
+                                        pinctrl_adc8_default: adc8_default {
+                                                function = "ADC8";
+                                                groups = "ADC8";
+                                        };
+
+                                        pinctrl_adc9_default: adc9_default {
+                                                function = "ADC9";
+                                                groups = "ADC9";
+                                        };
+
+                                        pinctrl_bmcint_default: bmcint_default {
+                                                function = "BMCINT";
+                                                groups = "BMCINT";
+                                        };
+
+                                        pinctrl_ddcclk_default: ddcclk_default {
+                                                function = "DDCCLK";
+                                                groups = "DDCCLK";
+                                        };
+
+                                        pinctrl_ddcdat_default: ddcdat_default {
+                                                function = "DDCDAT";
+                                                groups = "DDCDAT";
+                                        };
+
+                                        pinctrl_extrst_default: extrst_default {
+                                                function = "EXTRST";
+                                                groups = "EXTRST";
+                                        };
+
+                                        pinctrl_flack_default: flack_default {
+                                                function = "FLACK";
+                                                groups = "FLACK";
+                                        };
+
+                                        pinctrl_flbusy_default: flbusy_default {
+                                                function = "FLBUSY";
+                                                groups = "FLBUSY";
+                                        };
+
+                                        pinctrl_flwp_default: flwp_default {
+                                                function = "FLWP";
+                                                groups = "FLWP";
+                                        };
+
+                                        pinctrl_gpid_default: gpid_default {
+                                                function = "GPID";
+                                                groups = "GPID";
+                                        };
+
+                                        pinctrl_gpid0_default: gpid0_default {
+                                                function = "GPID0";
+                                                groups = "GPID0";
+                                        };
+
+                                        pinctrl_gpid2_default: gpid2_default {
+                                                function = "GPID2";
+                                                groups = "GPID2";
+                                        };
+
+                                        pinctrl_gpid4_default: gpid4_default {
+                                                function = "GPID4";
+                                                groups = "GPID4";
+                                        };
+
+                                        pinctrl_gpid6_default: gpid6_default {
+                                                function = "GPID6";
+                                                groups = "GPID6";
+                                        };
+
+                                        pinctrl_gpie0_default: gpie0_default {
+                                                function = "GPIE0";
+                                                groups = "GPIE0";
+                                        };
+
+                                        pinctrl_gpie2_default: gpie2_default {
+                                                function = "GPIE2";
+                                                groups = "GPIE2";
+                                        };
+
+                                        pinctrl_gpie4_default: gpie4_default {
+                                                function = "GPIE4";
+                                                groups = "GPIE4";
+                                        };
+
+                                        pinctrl_gpie6_default: gpie6_default {
+                                                function = "GPIE6";
+                                                groups = "GPIE6";
+                                        };
+
+                                        pinctrl_i2c10_default: i2c10_default {
+                                                function = "I2C10";
+                                                groups = "I2C10";
+                                        };
+
+                                        pinctrl_i2c11_default: i2c11_default {
+                                                function = "I2C11";
+                                                groups = "I2C11";
+                                        };
+
+                                        pinctrl_i2c12_default: i2c12_default {
+                                                function = "I2C12";
+                                                groups = "I2C12";
+                                        };
+
+                                        pinctrl_i2c13_default: i2c13_default {
+                                                function = "I2C13";
+                                                groups = "I2C13";
+                                        };
+
+                                        pinctrl_i2c14_default: i2c14_default {
+                                                function = "I2C14";
+                                                groups = "I2C14";
+                                        };
+
+                                        pinctrl_i2c3_default: i2c3_default {
+                                                function = "I2C3";
+                                                groups = "I2C3";
+                                        };
+
+                                        pinctrl_i2c4_default: i2c4_default {
+                                                function = "I2C4";
+                                                groups = "I2C4";
+                                        };
+
+                                        pinctrl_i2c5_default: i2c5_default {
+                                                function = "I2C5";
+                                                groups = "I2C5";
+                                        };
+
+                                        pinctrl_i2c6_default: i2c6_default {
+                                                function = "I2C6";
+                                                groups = "I2C6";
+                                        };
+
+                                        pinctrl_i2c7_default: i2c7_default {
+                                                function = "I2C7";
+                                                groups = "I2C7";
+                                        };
+
+                                        pinctrl_i2c8_default: i2c8_default {
+                                                function = "I2C8";
+                                                groups = "I2C8";
+                                        };
+
+                                        pinctrl_i2c9_default: i2c9_default {
+                                                function = "I2C9";
+                                                groups = "I2C9";
+                                        };
+
+                                        pinctrl_lpcpd_default: lpcpd_default {
+                                                function = "LPCPD";
+                                                groups = "LPCPD";
+                                        };
+
+                                        pinctrl_lpcpme_default: lpcpme_default {
+                                                function = "LPCPME";
+                                                groups = "LPCPME";
+                                        };
+
+                                        pinctrl_lpcrst_default: lpcrst_default {
+                                                function = "LPCRST";
+                                                groups = "LPCRST";
+                                        };
+
+                                        pinctrl_lpcsmi_default: lpcsmi_default {
+                                                function = "LPCSMI";
+                                                groups = "LPCSMI";
+                                        };
+
+                                        pinctrl_mac1link_default: mac1link_default {
+                                                function = "MAC1LINK";
+                                                groups = "MAC1LINK";
+                                        };
+
+                                        pinctrl_mac2link_default: mac2link_default {
+                                                function = "MAC2LINK";
+                                                groups = "MAC2LINK";
+                                        };
+
+                                        pinctrl_mdio1_default: mdio1_default {
+                                                function = "MDIO1";
+                                                groups = "MDIO1";
+                                        };
+
+                                        pinctrl_mdio2_default: mdio2_default {
+                                                function = "MDIO2";
+                                                groups = "MDIO2";
+                                        };
+
+                                        pinctrl_ncts1_default: ncts1_default {
+                                                function = "NCTS1";
+                                                groups = "NCTS1";
+                                        };
+
+                                        pinctrl_ncts2_default: ncts2_default {
+                                                function = "NCTS2";
+                                                groups = "NCTS2";
+                                        };
+
+                                        pinctrl_ncts3_default: ncts3_default {
+                                                function = "NCTS3";
+                                                groups = "NCTS3";
+                                        };
+
+                                        pinctrl_ncts4_default: ncts4_default {
+                                                function = "NCTS4";
+                                                groups = "NCTS4";
+                                        };
+
+                                        pinctrl_ndcd1_default: ndcd1_default {
+                                                function = "NDCD1";
+                                                groups = "NDCD1";
+                                        };
+
+                                        pinctrl_ndcd2_default: ndcd2_default {
+                                                function = "NDCD2";
+                                                groups = "NDCD2";
+                                        };
+
+                                        pinctrl_ndcd3_default: ndcd3_default {
+                                                function = "NDCD3";
+                                                groups = "NDCD3";
+                                        };
+
+                                        pinctrl_ndcd4_default: ndcd4_default {
+                                                function = "NDCD4";
+                                                groups = "NDCD4";
+                                        };
+
+                                        pinctrl_ndsr1_default: ndsr1_default {
+                                                function = "NDSR1";
+                                                groups = "NDSR1";
+                                        };
+
+                                        pinctrl_ndsr2_default: ndsr2_default {
+                                                function = "NDSR2";
+                                                groups = "NDSR2";
+                                        };
+
+                                        pinctrl_ndsr3_default: ndsr3_default {
+                                                function = "NDSR3";
+                                                groups = "NDSR3";
+                                        };
+
+                                        pinctrl_ndsr4_default: ndsr4_default {
+                                                function = "NDSR4";
+                                                groups = "NDSR4";
+                                        };
+
+                                        pinctrl_ndtr1_default: ndtr1_default {
+                                                function = "NDTR1";
+                                                groups = "NDTR1";
+                                        };
+
+                                        pinctrl_ndtr2_default: ndtr2_default {
+                                                function = "NDTR2";
+                                                groups = "NDTR2";
+                                        };
+
+                                        pinctrl_ndtr3_default: ndtr3_default {
+                                                function = "NDTR3";
+                                                groups = "NDTR3";
+                                        };
+
+                                        pinctrl_ndtr4_default: ndtr4_default {
+                                                function = "NDTR4";
+                                                groups = "NDTR4";
+                                        };
+
+                                        pinctrl_ndts4_default: ndts4_default {
+                                                function = "NDTS4";
+                                                groups = "NDTS4";
+                                        };
+
+                                        pinctrl_nri1_default: nri1_default {
+                                                function = "NRI1";
+                                                groups = "NRI1";
+                                        };
+
+                                        pinctrl_nri2_default: nri2_default {
+                                                function = "NRI2";
+                                                groups = "NRI2";
+                                        };
+
+                                        pinctrl_nri3_default: nri3_default {
+                                                function = "NRI3";
+                                                groups = "NRI3";
+                                        };
+
+                                        pinctrl_nri4_default: nri4_default {
+                                                function = "NRI4";
+                                                groups = "NRI4";
+                                        };
+
+                                        pinctrl_nrts1_default: nrts1_default {
+                                                function = "NRTS1";
+                                                groups = "NRTS1";
+                                        };
+
+                                        pinctrl_nrts2_default: nrts2_default {
+                                                function = "NRTS2";
+                                                groups = "NRTS2";
+                                        };
+
+                                        pinctrl_nrts3_default: nrts3_default {
+                                                function = "NRTS3";
+                                                groups = "NRTS3";
+                                        };
+
+                                        pinctrl_oscclk_default: oscclk_default {
+                                                function = "OSCCLK";
+                                                groups = "OSCCLK";
+                                        };
+
+                                        pinctrl_pwm0_default: pwm0_default {
+                                                function = "PWM0";
+                                                groups = "PWM0";
+                                        };
+
+                                        pinctrl_pwm1_default: pwm1_default {
+                                                function = "PWM1";
+                                                groups = "PWM1";
+                                        };
+
+                                        pinctrl_pwm2_default: pwm2_default {
+                                                function = "PWM2";
+                                                groups = "PWM2";
+                                        };
+
+                                        pinctrl_pwm3_default: pwm3_default {
+                                                function = "PWM3";
+                                                groups = "PWM3";
+                                        };
+
+                                        pinctrl_pwm4_default: pwm4_default {
+                                                function = "PWM4";
+                                                groups = "PWM4";
+                                        };
+
+                                        pinctrl_pwm5_default: pwm5_default {
+                                                function = "PWM5";
+                                                groups = "PWM5";
+                                        };
+
+                                        pinctrl_pwm6_default: pwm6_default {
+                                                function = "PWM6";
+                                                groups = "PWM6";
+                                        };
+
+                                        pinctrl_pwm7_default: pwm7_default {
+                                                function = "PWM7";
+                                                groups = "PWM7";
+                                        };
+
+                                        pinctrl_rgmii1_default: rgmii1_default {
+                                                function = "RGMII1";
+                                                groups = "RGMII1";
+                                        };
+
+                                        pinctrl_rgmii2_default: rgmii2_default {
+                                                function = "RGMII2";
+                                                groups = "RGMII2";
+                                        };
+
+                                        pinctrl_rmii1_default: rmii1_default {
+                                                function = "RMII1";
+                                                groups = "RMII1";
+                                        };
+
+                                        pinctrl_rmii2_default: rmii2_default {
+                                                function = "RMII2";
+                                                groups = "RMII2";
+                                        };
+
+                                        pinctrl_rom16_default: rom16_default {
+                                                function = "ROM16";
+                                                groups = "ROM16";
+                                        };
+
+                                        pinctrl_rom8_default: rom8_default {
+                                                function = "ROM8";
+                                                groups = "ROM8";
+                                        };
+
+                                        pinctrl_romcs1_default: romcs1_default {
+                                                function = "ROMCS1";
+                                                groups = "ROMCS1";
+                                        };
+
+                                        pinctrl_romcs2_default: romcs2_default {
+                                                function = "ROMCS2";
+                                                groups = "ROMCS2";
+                                        };
+
+                                        pinctrl_romcs3_default: romcs3_default {
+                                                function = "ROMCS3";
+                                                groups = "ROMCS3";
+                                        };
+
+                                        pinctrl_romcs4_default: romcs4_default {
+                                                function = "ROMCS4";
+                                                groups = "ROMCS4";
+                                        };
+
+                                        pinctrl_rxd1_default: rxd1_default {
+                                                function = "RXD1";
+                                                groups = "RXD1";
+                                        };
+
+                                        pinctrl_rxd2_default: rxd2_default {
+                                                function = "RXD2";
+                                                groups = "RXD2";
+                                        };
+
+                                        pinctrl_rxd3_default: rxd3_default {
+                                                function = "RXD3";
+                                                groups = "RXD3";
+                                        };
+
+                                        pinctrl_rxd4_default: rxd4_default {
+                                                function = "RXD4";
+                                                groups = "RXD4";
+                                        };
+
+                                        pinctrl_salt1_default: salt1_default {
+                                                function = "SALT1";
+                                                groups = "SALT1";
+                                        };
+
+                                        pinctrl_salt2_default: salt2_default {
+                                                function = "SALT2";
+                                                groups = "SALT2";
+                                        };
+
+                                        pinctrl_salt3_default: salt3_default {
+                                                function = "SALT3";
+                                                groups = "SALT3";
+                                        };
+
+                                        pinctrl_salt4_default: salt4_default {
+                                                function = "SALT4";
+                                                groups = "SALT4";
+                                        };
+
+                                        pinctrl_sd1_default: sd1_default {
+                                                function = "SD1";
+                                                groups = "SD1";
+                                        };
+
+                                        pinctrl_sd2_default: sd2_default {
+                                                function = "SD2";
+                                                groups = "SD2";
+                                        };
+
+                                        pinctrl_sgpmck_default: sgpmck_default {
+                                                function = "SGPMCK";
+                                                groups = "SGPMCK";
+                                        };
+
+                                        pinctrl_sgpmi_default: sgpmi_default {
+                                                function = "SGPMI";
+                                                groups = "SGPMI";
+                                        };
+
+                                        pinctrl_sgpmld_default: sgpmld_default {
+                                                function = "SGPMLD";
+                                                groups = "SGPMLD";
+                                        };
+
+                                        pinctrl_sgpmo_default: sgpmo_default {
+                                                function = "SGPMO";
+                                                groups = "SGPMO";
+                                        };
+
+                                        pinctrl_sgpsck_default: sgpsck_default {
+                                                function = "SGPSCK";
+                                                groups = "SGPSCK";
+                                        };
+
+                                        pinctrl_sgpsi0_default: sgpsi0_default {
+                                                function = "SGPSI0";
+                                                groups = "SGPSI0";
+                                        };
+
+                                        pinctrl_sgpsi1_default: sgpsi1_default {
+                                                function = "SGPSI1";
+                                                groups = "SGPSI1";
+                                        };
+
+                                        pinctrl_sgpsld_default: sgpsld_default {
+                                                function = "SGPSLD";
+                                                groups = "SGPSLD";
+                                        };
+
+                                        pinctrl_sioonctrl_default: sioonctrl_default {
+                                                function = "SIOONCTRL";
+                                                groups = "SIOONCTRL";
+                                        };
+
+                                        pinctrl_siopbi_default: siopbi_default {
+                                                function = "SIOPBI";
+                                                groups = "SIOPBI";
+                                        };
+
+                                        pinctrl_siopbo_default: siopbo_default {
+                                                function = "SIOPBO";
+                                                groups = "SIOPBO";
+                                        };
+
+                                        pinctrl_siopwreq_default: siopwreq_default {
+                                                function = "SIOPWREQ";
+                                                groups = "SIOPWREQ";
+                                        };
+
+                                        pinctrl_siopwrgd_default: siopwrgd_default {
+                                                function = "SIOPWRGD";
+                                                groups = "SIOPWRGD";
+                                        };
+
+                                        pinctrl_sios3_default: sios3_default {
+                                                function = "SIOS3";
+                                                groups = "SIOS3";
+                                        };
+
+                                        pinctrl_sios5_default: sios5_default {
+                                                function = "SIOS5";
+                                                groups = "SIOS5";
+                                        };
+
+                                        pinctrl_siosci_default: siosci_default {
+                                                function = "SIOSCI";
+                                                groups = "SIOSCI";
+                                        };
+
+                                        pinctrl_spi1_default: spi1_default {
+                                                function = "SPI1";
+                                                groups = "SPI1";
+                                        };
+
+                                        pinctrl_spi1debug_default: spi1debug_default {
+                                                function = "SPI1DEBUG";
+                                                groups = "SPI1DEBUG";
+                                        };
+
+                                        pinctrl_spi1passthru_default: spi1passthru_default {
+                                                function = "SPI1PASSTHRU";
+                                                groups = "SPI1PASSTHRU";
+                                        };
+
+                                        pinctrl_spics1_default: spics1_default {
+                                                function = "SPICS1";
+                                                groups = "SPICS1";
+                                        };
+
+                                        pinctrl_timer3_default: timer3_default {
+                                                function = "TIMER3";
+                                                groups = "TIMER3";
+                                        };
+
+                                        pinctrl_timer4_default: timer4_default {
+                                                function = "TIMER4";
+                                                groups = "TIMER4";
+                                        };
+
+                                        pinctrl_timer5_default: timer5_default {
+                                                function = "TIMER5";
+                                                groups = "TIMER5";
+                                        };
+
+                                        pinctrl_timer6_default: timer6_default {
+                                                function = "TIMER6";
+                                                groups = "TIMER6";
+                                        };
+
+                                        pinctrl_timer7_default: timer7_default {
+                                                function = "TIMER7";
+                                                groups = "TIMER7";
+                                        };
+
+                                        pinctrl_timer8_default: timer8_default {
+                                                function = "TIMER8";
+                                                groups = "TIMER8";
+                                        };
+
+                                        pinctrl_txd1_default: txd1_default {
+                                                function = "TXD1";
+                                                groups = "TXD1";
+                                        };
+
+                                        pinctrl_txd2_default: txd2_default {
+                                                function = "TXD2";
+                                                groups = "TXD2";
+                                        };
+
+                                        pinctrl_txd3_default: txd3_default {
+                                                function = "TXD3";
+                                                groups = "TXD3";
+                                        };
+
+                                        pinctrl_txd4_default: txd4_default {
+                                                function = "TXD4";
+                                                groups = "TXD4";
+                                        };
+
+                                        pinctrl_uart6_default: uart6_default {
+                                                function = "UART6";
+                                                groups = "UART6";
+                                        };
+
+                                        pinctrl_usbcki_default: usbcki_default {
+                                                function = "USBCKI";
+                                                groups = "USBCKI";
+                                        };
+
+                                        pinctrl_vgabios_rom_default: vgabios_rom_default {
+                                                function = "VGABIOS_ROM";
+                                                groups = "VGABIOS_ROM";
+                                        };
+
+                                        pinctrl_vgahs_default: vgahs_default {
+                                                function = "VGAHS";
+                                                groups = "VGAHS";
+                                        };
+
+                                        pinctrl_vgavs_default: vgavs_default {
+                                                function = "VGAVS";
+                                                groups = "VGAVS";
+                                        };
+
+                                        pinctrl_vpi18_default: vpi18_default {
+                                                function = "VPI18";
+                                                groups = "VPI18";
+                                        };
+
+                                        pinctrl_vpi24_default: vpi24_default {
+                                                function = "VPI24";
+                                                groups = "VPI24";
+                                        };
+
+                                        pinctrl_vpi30_default: vpi30_default {
+                                                function = "VPI30";
+                                                groups = "VPI30";
+                                        };
+
+                                        pinctrl_vpo12_default: vpo12_default {
+                                                function = "VPO12";
+                                                groups = "VPO12";
+                                        };
+
+                                        pinctrl_vpo24_default: vpo24_default {
+                                                function = "VPO24";
+                                                groups = "VPO24";
+                                        };
+
+                                        pinctrl_wdtrst1_default: wdtrst1_default {
+                                                function = "WDTRST1";
+                                                groups = "WDTRST1";
+                                        };
+
+                                        pinctrl_wdtrst2_default: wdtrst2_default {
+                                                function = "WDTRST2";
+                                                groups = "WDTRST2";
+                                        };
+
+                                };
+                        };
+
                         clk_apb: clk_apb@1e6e2008 {
                                 #clock-cells = <0>;
                                 compatible = "aspeed,g4-apb-clock";
@@ -72,6 +838,16 @@
                                 reg = <0x1e720000 0x8000>;      // 32K
                         };
 
+                        gpio: gpio@1e780000 {
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                compatible = "aspeed,ast2400-gpio";
+                                reg = <0x1e780000 0x1000>;
+                                interrupts = <20>;
+                                gpio-ranges = <&pinctrl 0 0 220>;
+                                interrupt-controller;
+                        };
+
                         timer: timer@1e782000 {
                                 compatible = "aspeed,ast2400-timer";
                                 reg = <0x1e782000 0x90>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index dd94d9361fda..b664fe380936 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -32,6 +32,22 @@
                         reg = <0x1e6c0080 0x80>;
                 };
 
+                mac0: ethernet@1e660000 {
+                        compatible = "faraday,ftgmac100";
+                        reg = <0x1e660000 0x180>;
+                        interrupts = <2>;
+                        no-hw-checksum;
+                        status = "disabled";
+                };
+
+                mac1: ethernet@1e680000 {
+                        compatible = "faraday,ftgmac100";
+                        reg = <0x1e680000 0x180>;
+                        interrupts = <3>;
+                        no-hw-checksum;
+                        status = "disabled";
+                };
+
                 apb {
                         compatible = "simple-bus";
                         #address-cells = <1>;
@@ -44,6 +60,822 @@
                                 reg = <0x1e6e2070 0x04>;
                         };
 
+                        syscon: syscon@1e6e2000 {
+                                compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
+                                reg = <0x1e6e2000 0x1a8>;
+
+                                pinctrl: pinctrl {
+                                        compatible = "aspeed,g5-pinctrl";
+                                        aspeed,external-nodes = <&gfx &lhc>;
+
+                                        pinctrl_acpi_default: acpi_default {
+                                                function = "ACPI";
+                                                groups = "ACPI";
+                                        };
+
+                                        pinctrl_adc0_default: adc0_default {
+                                                function = "ADC0";
+                                                groups = "ADC0";
+                                        };
+
+                                        pinctrl_adc1_default: adc1_default {
+                                                function = "ADC1";
+                                                groups = "ADC1";
+                                        };
+
+                                        pinctrl_adc10_default: adc10_default {
+                                                function = "ADC10";
+                                                groups = "ADC10";
+                                        };
+
+                                        pinctrl_adc11_default: adc11_default {
+                                                function = "ADC11";
+                                                groups = "ADC11";
+                                        };
+
+                                        pinctrl_adc12_default: adc12_default {
+                                                function = "ADC12";
+                                                groups = "ADC12";
+                                        };
+
+                                        pinctrl_adc13_default: adc13_default {
+                                                function = "ADC13";
+                                                groups = "ADC13";
+                                        };
+
+                                        pinctrl_adc14_default: adc14_default {
+                                                function = "ADC14";
+                                                groups = "ADC14";
+                                        };
+
+                                        pinctrl_adc15_default: adc15_default {
+                                                function = "ADC15";
+                                                groups = "ADC15";
+                                        };
+
+                                        pinctrl_adc2_default: adc2_default {
+                                                function = "ADC2";
+                                                groups = "ADC2";
+                                        };
+
+                                        pinctrl_adc3_default: adc3_default {
+                                                function = "ADC3";
+                                                groups = "ADC3";
+                                        };
+
+                                        pinctrl_adc4_default: adc4_default {
+                                                function = "ADC4";
+                                                groups = "ADC4";
+                                        };
+
+                                        pinctrl_adc5_default: adc5_default {
+                                                function = "ADC5";
+                                                groups = "ADC5";
+                                        };
+
+                                        pinctrl_adc6_default: adc6_default {
+                                                function = "ADC6";
+                                                groups = "ADC6";
+                                        };
+
+                                        pinctrl_adc7_default: adc7_default {
+                                                function = "ADC7";
+                                                groups = "ADC7";
+                                        };
+
+                                        pinctrl_adc8_default: adc8_default {
+                                                function = "ADC8";
+                                                groups = "ADC8";
+                                        };
+
+                                        pinctrl_adc9_default: adc9_default {
+                                                function = "ADC9";
+                                                groups = "ADC9";
+                                        };
+
+                                        pinctrl_bmcint_default: bmcint_default {
+                                                function = "BMCINT";
+                                                groups = "BMCINT";
+                                        };
+
+                                        pinctrl_ddcclk_default: ddcclk_default {
+                                                function = "DDCCLK";
+                                                groups = "DDCCLK";
+                                        };
+
+                                        pinctrl_ddcdat_default: ddcdat_default {
+                                                function = "DDCDAT";
+                                                groups = "DDCDAT";
+                                        };
+
+                                        pinctrl_espi_default: espi_default {
+                                                function = "ESPI";
+                                                groups = "ESPI";
+                                        };
+
+                                        pinctrl_fwspics1_default: fwspics1_default {
+                                                function = "FWSPICS1";
+                                                groups = "FWSPICS1";
+                                        };
+
+                                        pinctrl_fwspics2_default: fwspics2_default {
+                                                function = "FWSPICS2";
+                                                groups = "FWSPICS2";
+                                        };
+
+                                        pinctrl_gpid0_default: gpid0_default {
+                                                function = "GPID0";
+                                                groups = "GPID0";
+                                        };
+
+                                        pinctrl_gpid2_default: gpid2_default {
+                                                function = "GPID2";
+                                                groups = "GPID2";
+                                        };
+
+                                        pinctrl_gpid4_default: gpid4_default {
+                                                function = "GPID4";
+                                                groups = "GPID4";
+                                        };
+
+                                        pinctrl_gpid6_default: gpid6_default {
+                                                function = "GPID6";
+                                                groups = "GPID6";
+                                        };
+
+                                        pinctrl_gpie0_default: gpie0_default {
+                                                function = "GPIE0";
+                                                groups = "GPIE0";
+                                        };
+
+                                        pinctrl_gpie2_default: gpie2_default {
+                                                function = "GPIE2";
+                                                groups = "GPIE2";
+                                        };
+
+                                        pinctrl_gpie4_default: gpie4_default {
+                                                function = "GPIE4";
+                                                groups = "GPIE4";
+                                        };
+
+                                        pinctrl_gpie6_default: gpie6_default {
+                                                function = "GPIE6";
+                                                groups = "GPIE6";
+                                        };
+
+                                        pinctrl_i2c10_default: i2c10_default {
+                                                function = "I2C10";
+                                                groups = "I2C10";
+                                        };
+
+                                        pinctrl_i2c11_default: i2c11_default {
+                                                function = "I2C11";
+                                                groups = "I2C11";
+                                        };
+
+                                        pinctrl_i2c12_default: i2c12_default {
+                                                function = "I2C12";
+                                                groups = "I2C12";
+                                        };
+
+                                        pinctrl_i2c13_default: i2c13_default {
+                                                function = "I2C13";
+                                                groups = "I2C13";
+                                        };
+
+                                        pinctrl_i2c14_default: i2c14_default {
+                                                function = "I2C14";
+                                                groups = "I2C14";
+                                        };
+
+                                        pinctrl_i2c3_default: i2c3_default {
+                                                function = "I2C3";
+                                                groups = "I2C3";
+                                        };
+
+                                        pinctrl_i2c4_default: i2c4_default {
+                                                function = "I2C4";
+                                                groups = "I2C4";
+                                        };
+
+                                        pinctrl_i2c5_default: i2c5_default {
+                                                function = "I2C5";
+                                                groups = "I2C5";
+                                        };
+
+                                        pinctrl_i2c6_default: i2c6_default {
+                                                function = "I2C6";
+                                                groups = "I2C6";
+                                        };
+
+                                        pinctrl_i2c7_default: i2c7_default {
+                                                function = "I2C7";
+                                                groups = "I2C7";
+                                        };
+
+                                        pinctrl_i2c8_default: i2c8_default {
+                                                function = "I2C8";
+                                                groups = "I2C8";
+                                        };
+
+                                        pinctrl_i2c9_default: i2c9_default {
+                                                function = "I2C9";
+                                                groups = "I2C9";
+                                        };
+
+                                        pinctrl_lad0_default: lad0_default {
+                                                function = "LAD0";
+                                                groups = "LAD0";
+                                        };
+
+                                        pinctrl_lad1_default: lad1_default {
+                                                function = "LAD1";
+                                                groups = "LAD1";
+                                        };
+
+                                        pinctrl_lad2_default: lad2_default {
+                                                function = "LAD2";
+                                                groups = "LAD2";
+                                        };
+
+                                        pinctrl_lad3_default: lad3_default {
+                                                function = "LAD3";
+                                                groups = "LAD3";
+                                        };
+
+                                        pinctrl_lclk_default: lclk_default {
+                                                function = "LCLK";
+                                                groups = "LCLK";
+                                        };
+
+                                        pinctrl_lframe_default: lframe_default {
+                                                function = "LFRAME";
+                                                groups = "LFRAME";
+                                        };
+
+                                        pinctrl_lpchc_default: lpchc_default {
+                                                function = "LPCHC";
+                                                groups = "LPCHC";
+                                        };
+
+                                        pinctrl_lpcpd_default: lpcpd_default {
+                                                function = "LPCPD";
+                                                groups = "LPCPD";
+                                        };
+
+                                        pinctrl_lpcplus_default: lpcplus_default {
+                                                function = "LPCPLUS";
+                                                groups = "LPCPLUS";
+                                        };
+
+                                        pinctrl_lpcpme_default: lpcpme_default {
+                                                function = "LPCPME";
+                                                groups = "LPCPME";
+                                        };
+
+                                        pinctrl_lpcrst_default: lpcrst_default {
+                                                function = "LPCRST";
+                                                groups = "LPCRST";
+                                        };
+
+                                        pinctrl_lpcsmi_default: lpcsmi_default {
+                                                function = "LPCSMI";
+                                                groups = "LPCSMI";
+                                        };
+
+                                        pinctrl_lsirq_default: lsirq_default {
+                                                function = "LSIRQ";
+                                                groups = "LSIRQ";
+                                        };
+
+                                        pinctrl_mac1link_default: mac1link_default {
+                                                function = "MAC1LINK";
+                                                groups = "MAC1LINK";
+                                        };
+
+                                        pinctrl_mac2link_default: mac2link_default {
+                                                function = "MAC2LINK";
+                                                groups = "MAC2LINK";
+                                        };
+
+                                        pinctrl_mdio1_default: mdio1_default {
+                                                function = "MDIO1";
+                                                groups = "MDIO1";
+                                        };
+
+                                        pinctrl_mdio2_default: mdio2_default {
+                                                function = "MDIO2";
+                                                groups = "MDIO2";
+                                        };
+
+                                        pinctrl_ncts1_default: ncts1_default {
+                                                function = "NCTS1";
+                                                groups = "NCTS1";
+                                        };
+
+                                        pinctrl_ncts2_default: ncts2_default {
+                                                function = "NCTS2";
+                                                groups = "NCTS2";
+                                        };
+
+                                        pinctrl_ncts3_default: ncts3_default {
+                                                function = "NCTS3";
+                                                groups = "NCTS3";
+                                        };
+
+                                        pinctrl_ncts4_default: ncts4_default {
+                                                function = "NCTS4";
+                                                groups = "NCTS4";
+                                        };
+
+                                        pinctrl_ndcd1_default: ndcd1_default {
+                                                function = "NDCD1";
+                                                groups = "NDCD1";
+                                        };
+
+                                        pinctrl_ndcd2_default: ndcd2_default {
+                                                function = "NDCD2";
+                                                groups = "NDCD2";
+                                        };
+
+                                        pinctrl_ndcd3_default: ndcd3_default {
+                                                function = "NDCD3";
+                                                groups = "NDCD3";
+                                        };
+
+                                        pinctrl_ndcd4_default: ndcd4_default {
+                                                function = "NDCD4";
+                                                groups = "NDCD4";
+                                        };
+
+                                        pinctrl_ndsr1_default: ndsr1_default {
+                                                function = "NDSR1";
+                                                groups = "NDSR1";
+                                        };
+
+                                        pinctrl_ndsr2_default: ndsr2_default {
+                                                function = "NDSR2";
+                                                groups = "NDSR2";
+                                        };
+
+                                        pinctrl_ndsr3_default: ndsr3_default {
+                                                function = "NDSR3";
+                                                groups = "NDSR3";
+                                        };
+
+                                        pinctrl_ndsr4_default: ndsr4_default {
+                                                function = "NDSR4";
+                                                groups = "NDSR4";
+                                        };
+
+                                        pinctrl_ndtr1_default: ndtr1_default {
+                                                function = "NDTR1";
+                                                groups = "NDTR1";
+                                        };
+
+                                        pinctrl_ndtr2_default: ndtr2_default {
+                                                function = "NDTR2";
+                                                groups = "NDTR2";
+                                        };
+
+                                        pinctrl_ndtr3_default: ndtr3_default {
+                                                function = "NDTR3";
+                                                groups = "NDTR3";
+                                        };
+
+                                        pinctrl_ndtr4_default: ndtr4_default {
+                                                function = "NDTR4";
+                                                groups = "NDTR4";
+                                        };
+
+                                        pinctrl_nri1_default: nri1_default {
+                                                function = "NRI1";
+                                                groups = "NRI1";
+                                        };
+
+                                        pinctrl_nri2_default: nri2_default {
+                                                function = "NRI2";
+                                                groups = "NRI2";
+                                        };
+
+                                        pinctrl_nri3_default: nri3_default {
+                                                function = "NRI3";
+                                                groups = "NRI3";
+                                        };
+
+                                        pinctrl_nri4_default: nri4_default {
+                                                function = "NRI4";
+                                                groups = "NRI4";
+                                        };
+
+                                        pinctrl_nrts1_default: nrts1_default {
+                                                function = "NRTS1";
+                                                groups = "NRTS1";
+                                        };
+
+                                        pinctrl_nrts2_default: nrts2_default {
+                                                function = "NRTS2";
+                                                groups = "NRTS2";
+                                        };
+
+                                        pinctrl_nrts3_default: nrts3_default {
+                                                function = "NRTS3";
+                                                groups = "NRTS3";
+                                        };
+
+                                        pinctrl_nrts4_default: nrts4_default {
+                                                function = "NRTS4";
+                                                groups = "NRTS4";
+                                        };
+
+                                        pinctrl_oscclk_default: oscclk_default {
+                                                function = "OSCCLK";
+                                                groups = "OSCCLK";
+                                        };
+
+                                        pinctrl_pewake_default: pewake_default {
+                                                function = "PEWAKE";
+                                                groups = "PEWAKE";
+                                        };
+
+                                        pinctrl_pnor_default: pnor_default {
+                                                function = "PNOR";
+                                                groups = "PNOR";
+                                        };
+
+                                        pinctrl_pwm0_default: pwm0_default {
+                                                function = "PWM0";
+                                                groups = "PWM0";
+                                        };
+
+                                        pinctrl_pwm1_default: pwm1_default {
+                                                function = "PWM1";
+                                                groups = "PWM1";
+                                        };
+
+                                        pinctrl_pwm2_default: pwm2_default {
+                                                function = "PWM2";
+                                                groups = "PWM2";
+                                        };
+
+                                        pinctrl_pwm3_default: pwm3_default {
+                                                function = "PWM3";
+                                                groups = "PWM3";
+                                        };
+
+                                        pinctrl_pwm4_default: pwm4_default {
+                                                function = "PWM4";
+                                                groups = "PWM4";
+                                        };
+
+                                        pinctrl_pwm5_default: pwm5_default {
+                                                function = "PWM5";
+                                                groups = "PWM5";
+                                        };
+
+                                        pinctrl_pwm6_default: pwm6_default {
+                                                function = "PWM6";
+                                                groups = "PWM6";
+                                        };
+
+                                        pinctrl_pwm7_default: pwm7_default {
+                                                function = "PWM7";
+                                                groups = "PWM7";
+                                        };
+
+                                        pinctrl_rgmii1_default: rgmii1_default {
+                                                function = "RGMII1";
+                                                groups = "RGMII1";
+                                        };
+
+                                        pinctrl_rgmii2_default: rgmii2_default {
+                                                function = "RGMII2";
+                                                groups = "RGMII2";
+                                        };
+
+                                        pinctrl_rmii1_default: rmii1_default {
+                                                function = "RMII1";
+                                                groups = "RMII1";
+                                        };
+
+                                        pinctrl_rmii2_default: rmii2_default {
+                                                function = "RMII2";
+                                                groups = "RMII2";
+                                        };
+
+                                        pinctrl_rxd1_default: rxd1_default {
+                                                function = "RXD1";
+                                                groups = "RXD1";
+                                        };
+
+                                        pinctrl_rxd2_default: rxd2_default {
+                                                function = "RXD2";
+                                                groups = "RXD2";
+                                        };
+
+                                        pinctrl_rxd3_default: rxd3_default {
+                                                function = "RXD3";
+                                                groups = "RXD3";
+                                        };
+
+                                        pinctrl_rxd4_default: rxd4_default {
+                                                function = "RXD4";
+                                                groups = "RXD4";
+                                        };
+
+                                        pinctrl_salt1_default: salt1_default {
+                                                function = "SALT1";
+                                                groups = "SALT1";
+                                        };
+
+                                        pinctrl_salt10_default: salt10_default {
+                                                function = "SALT10";
+                                                groups = "SALT10";
+                                        };
+
+                                        pinctrl_salt11_default: salt11_default {
+                                                function = "SALT11";
+                                                groups = "SALT11";
+                                        };
+
+                                        pinctrl_salt12_default: salt12_default {
+                                                function = "SALT12";
+                                                groups = "SALT12";
+                                        };
+
+                                        pinctrl_salt13_default: salt13_default {
+                                                function = "SALT13";
+                                                groups = "SALT13";
+                                        };
+
+                                        pinctrl_salt14_default: salt14_default {
+                                                function = "SALT14";
+                                                groups = "SALT14";
+                                        };
+
+                                        pinctrl_salt2_default: salt2_default {
+                                                function = "SALT2";
+                                                groups = "SALT2";
+                                        };
+
+                                        pinctrl_salt3_default: salt3_default {
+                                                function = "SALT3";
+                                                groups = "SALT3";
+                                        };
+
+                                        pinctrl_salt4_default: salt4_default {
+                                                function = "SALT4";
+                                                groups = "SALT4";
+                                        };
+
+                                        pinctrl_salt5_default: salt5_default {
+                                                function = "SALT5";
+                                                groups = "SALT5";
+                                        };
+
+                                        pinctrl_salt6_default: salt6_default {
+                                                function = "SALT6";
+                                                groups = "SALT6";
+                                        };
+
+                                        pinctrl_salt7_default: salt7_default {
+                                                function = "SALT7";
+                                                groups = "SALT7";
+                                        };
+
+                                        pinctrl_salt8_default: salt8_default {
+                                                function = "SALT8";
+                                                groups = "SALT8";
+                                        };
+
+                                        pinctrl_salt9_default: salt9_default {
+                                                function = "SALT9";
+                                                groups = "SALT9";
+                                        };
+
+                                        pinctrl_scl1_default: scl1_default {
+                                                function = "SCL1";
+                                                groups = "SCL1";
+                                        };
+
+                                        pinctrl_scl2_default: scl2_default {
+                                                function = "SCL2";
+                                                groups = "SCL2";
+                                        };
+
+                                        pinctrl_sd1_default: sd1_default {
+                                                function = "SD1";
+                                                groups = "SD1";
+                                        };
+
+                                        pinctrl_sd2_default: sd2_default {
+                                                function = "SD2";
+                                                groups = "SD2";
+                                        };
+
+                                        pinctrl_sda1_default: sda1_default {
+                                                function = "SDA1";
+                                                groups = "SDA1";
+                                        };
+
+                                        pinctrl_sda2_default: sda2_default {
+                                                function = "SDA2";
+                                                groups = "SDA2";
+                                        };
+
+                                        pinctrl_sgps1_default: sgps1_default {
+                                                function = "SGPS1";
+                                                groups = "SGPS1";
+                                        };
+
+                                        pinctrl_sgps2_default: sgps2_default {
+                                                function = "SGPS2";
+                                                groups = "SGPS2";
+                                        };
+
+                                        pinctrl_sioonctrl_default: sioonctrl_default {
+                                                function = "SIOONCTRL";
+                                                groups = "SIOONCTRL";
+                                        };
+
+                                        pinctrl_siopbi_default: siopbi_default {
+                                                function = "SIOPBI";
+                                                groups = "SIOPBI";
+                                        };
+
+                                        pinctrl_siopbo_default: siopbo_default {
+                                                function = "SIOPBO";
+                                                groups = "SIOPBO";
+                                        };
+
+                                        pinctrl_siopwreq_default: siopwreq_default {
+                                                function = "SIOPWREQ";
+                                                groups = "SIOPWREQ";
+                                        };
+
+                                        pinctrl_siopwrgd_default: siopwrgd_default {
+                                                function = "SIOPWRGD";
+                                                groups = "SIOPWRGD";
+                                        };
+
+                                        pinctrl_sios3_default: sios3_default {
+                                                function = "SIOS3";
+                                                groups = "SIOS3";
+                                        };
+
+                                        pinctrl_sios5_default: sios5_default {
+                                                function = "SIOS5";
+                                                groups = "SIOS5";
+                                        };
+
+                                        pinctrl_siosci_default: siosci_default {
+                                                function = "SIOSCI";
+                                                groups = "SIOSCI";
+                                        };
+
+                                        pinctrl_spi1_default: spi1_default {
+                                                function = "SPI1";
+                                                groups = "SPI1";
+                                        };
+
+                                        pinctrl_spi1cs1_default: spi1cs1_default {
+                                                function = "SPI1CS1";
+                                                groups = "SPI1CS1";
+                                        };
+
+                                        pinctrl_spi1debug_default: spi1debug_default {
+                                                function = "SPI1DEBUG";
+                                                groups = "SPI1DEBUG";
+                                        };
+
+                                        pinctrl_spi1passthru_default: spi1passthru_default {
+                                                function = "SPI1PASSTHRU";
+                                                groups = "SPI1PASSTHRU";
+                                        };
+
+                                        pinctrl_spi2ck_default: spi2ck_default {
+                                                function = "SPI2CK";
+                                                groups = "SPI2CK";
+                                        };
+
+                                        pinctrl_spi2cs0_default: spi2cs0_default {
+                                                function = "SPI2CS0";
+                                                groups = "SPI2CS0";
+                                        };
+
+                                        pinctrl_spi2cs1_default: spi2cs1_default {
+                                                function = "SPI2CS1";
+                                                groups = "SPI2CS1";
+                                        };
+
+                                        pinctrl_spi2miso_default: spi2miso_default {
+                                                function = "SPI2MISO";
+                                                groups = "SPI2MISO";
+                                        };
+
+                                        pinctrl_spi2mosi_default: spi2mosi_default {
+                                                function = "SPI2MOSI";
+                                                groups = "SPI2MOSI";
+                                        };
+
+                                        pinctrl_timer3_default: timer3_default {
+                                                function = "TIMER3";
+                                                groups = "TIMER3";
+                                        };
+
+                                        pinctrl_timer4_default: timer4_default {
+                                                function = "TIMER4";
+                                                groups = "TIMER4";
+                                        };
+
+                                        pinctrl_timer5_default: timer5_default {
+                                                function = "TIMER5";
+                                                groups = "TIMER5";
+                                        };
+
+                                        pinctrl_timer6_default: timer6_default {
+                                                function = "TIMER6";
+                                                groups = "TIMER6";
+                                        };
+
+                                        pinctrl_timer7_default: timer7_default {
+                                                function = "TIMER7";
+                                                groups = "TIMER7";
+                                        };
+
+                                        pinctrl_timer8_default: timer8_default {
+                                                function = "TIMER8";
+                                                groups = "TIMER8";
+                                        };
+
+                                        pinctrl_txd1_default: txd1_default {
+                                                function = "TXD1";
+                                                groups = "TXD1";
+                                        };
+
+                                        pinctrl_txd2_default: txd2_default {
+                                                function = "TXD2";
+                                                groups = "TXD2";
+                                        };
+
+                                        pinctrl_txd3_default: txd3_default {
+                                                function = "TXD3";
+                                                groups = "TXD3";
+                                        };
+
+                                        pinctrl_txd4_default: txd4_default {
+                                                function = "TXD4";
+                                                groups = "TXD4";
+                                        };
+
+                                        pinctrl_uart6_default: uart6_default {
+                                                function = "UART6";
+                                                groups = "UART6";
+                                        };
+
+                                        pinctrl_usbcki_default: usbcki_default {
+                                                function = "USBCKI";
+                                                groups = "USBCKI";
+                                        };
+
+                                        pinctrl_vgabiosrom_default: vgabiosrom_default {
+                                                function = "VGABIOSROM";
+                                                groups = "VGABIOSROM";
+                                        };
+
+                                        pinctrl_vgahs_default: vgahs_default {
+                                                function = "VGAHS";
+                                                groups = "VGAHS";
+                                        };
+
+                                        pinctrl_vgavs_default: vgavs_default {
+                                                function = "VGAVS";
+                                                groups = "VGAVS";
+                                        };
+
+                                        pinctrl_vpi24_default: vpi24_default {
+                                                function = "VPI24";
+                                                groups = "VPI24";
+                                        };
+
+                                        pinctrl_vpo_default: vpo_default {
+                                                function = "VPO";
+                                                groups = "VPO";
+                                        };
+
+                                        pinctrl_wdtrst1_default: wdtrst1_default {
+                                                function = "WDTRST1";
+                                                groups = "WDTRST1";
+                                        };
+
+                                        pinctrl_wdtrst2_default: wdtrst2_default {
+                                                function = "WDTRST2";
+                                                groups = "WDTRST2";
+                                        };
+
+                                };
+                        };
+
                         clk_hpll: clk_hpll@1e6e2024 {
                                 #clock-cells = <0>;
                                 compatible = "aspeed,g5-hpll-clock";
@@ -71,11 +903,27 @@
                                 reg = <0x1e6e202c 0x4>;
                         };
 
+                        gfx: display@1e6e6000 {
+                                compatible = "aspeed,ast2500-gfx", "syscon";
+                                reg = <0x1e6e6000 0x1000>;
+                                reg-io-width = <4>;
+                        };
+
                         sram@1e720000 {
                                 compatible = "mmio-sram";
                                 reg = <0x1e720000 0x9000>;      // 36K
                         };
 
+                        gpio: gpio@1e780000 {
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                compatible = "aspeed,ast2500-gpio";
+                                reg = <0x1e780000 0x1000>;
+                                interrupts = <20>;
+                                gpio-ranges = <&pinctrl 0 0 220>;
+                                interrupt-controller;
+                        };
+
                         timer: timer@1e782000 {
                                 compatible = "aspeed,ast2400-timer";
                                 reg = <0x1e782000 0x90>;
@@ -86,6 +934,7 @@
                                 clocks = <&clk_apb>;
                         };
 
+
                         wdt1: wdt@1e785000 {
                                 compatible = "aspeed,wdt";
                                 reg = <0x1e785000 0x1c>;
@@ -115,6 +964,36 @@
                                 status = "disabled";
                         };
 
+                        lpc: lpc@1e789000 {
+                                compatible = "aspeed,ast2500-lpc", "simple-mfd";
+                                reg = <0x1e789000 0x1000>;
+
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                ranges = <0 0x1e789000 0x1000>;
+
+                                lpc_bmc: lpc-bmc@0 {
+                                        compatible = "aspeed,ast2500-lpc-bmc";
+                                        reg = <0x0 0x80>;
+                                };
+
+                                lpc_host: lpc-host@80 {
+                                        compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
+                                        reg = <0x80 0x1e0>;
+
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        ranges = <0 0x80 0x1e0>;
+
+                                        reg-io-width = <4>;
+
+                                        lhc: lhc@20 {
+                                                compatible = "aspeed,ast2500-lhc";
+                                                reg = <0x20 0x24 0x48 0x8>;
+                                        };
+                                };
+                        };
+
                         uart2: serial@1e78d000 {
                                 compatible = "ns16550a";
                                 reg = <0x1e78d000 0x1000>;
diff --git a/arch/arm/boot/dts/at91-linea.dtsi b/arch/arm/boot/dts/at91-linea.dtsi
new file mode 100644
index 000000000000..0721c8472509
--- /dev/null
+++ b/arch/arm/boot/dts/at91-linea.dtsi
@@ -0,0 +1,49 @@
+/*
+ * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
+ *
+ * Copyright (C) 2017 Axentia Technologies AB
+ *
+ * Author: Peter Rosin <peda@axentia.se>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include "sama5d31.dtsi"
+
+/ {
+        compatible = "axentia,linea",
+                     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+        memory {
+                reg = <0x20000000 0x4000000>;
+        };
+};
+
+&slow_xtal {
+        clock-frequency = <32768>;
+};
+
+&main_xtal {
+        clock-frequency = <12000000>;
+};
+
+&i2c0 {
+        status = "okay";
+
+        eeprom@51 {
+                compatible = "st,24c64";
+                reg = <0x51>;
+                pagesize = <32>;
+        };
+};
+
+&nand0 {
+        status = "okay";
+
+        nand-bus-width = <8>;
+        nand-ecc-mode = "hw";
+        atmel,has-pmecc;
+        atmel,pmecc-cap = <4>;
+        atmel,pmecc-sector-size = <512>;
+        nand-on-flash-bbt;
+};
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 0b9a59d5fdac..9f7f8a7d8ff9 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -148,6 +148,8 @@
                         uart1: serial@f8020000 {
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart1_default>;
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
                                 status = "okay";
                         };
 
@@ -256,6 +258,8 @@
                         };
 
                         uart3: serial@fc008000 {
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart3_default>;
                                 status = "okay";
diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
index ed7fce297738..5ab14cedb1db 100644
--- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
@@ -69,6 +69,12 @@
 
         ahb {
                 apb {
+                        uart0: serial@f8004000 {
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
+                                status = "okay";
+                        };
+
                         spi0: spi@f8010000 {
                                 cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
                                 status = "okay";
@@ -110,6 +116,8 @@
                         };
 
                         usart3: serial@fc00c000 {
+                                atmel,use-dma-rx;
+                                atmel,use-dma-tx;
                                 status = "okay";
                         };
 
diff --git a/arch/arm/boot/dts/at91-tse850-3.dts b/arch/arm/boot/dts/at91-tse850-3.dts
new file mode 100644
index 000000000000..669a2c6bdefc
--- /dev/null
+++ b/arch/arm/boot/dts/at91-tse850-3.dts
@@ -0,0 +1,274 @@
+/*
+ * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
+ *
+ * Copyright (C) 2017 Axentia Technologies AB
+ *
+ * Author: Peter Rosin <peda@axentia.se>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+#include <dt-bindings/pwm/pwm.h>
+#include "at91-linea.dtsi"
+
+/ {
+        model = "Axentia TSE-850 3.0";
+        compatible = "axentia,tse850v3", "axentia,linea",
+                     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+        ahb {
+                apb {
+                        pinctrl@fffff200 {
+                                tse850 {
+                                        pinctrl_usba_vbus: usba-vbus {
+                                                atmel,pins =
+                                                        <AT91_PIOC 31
+                                                         AT91_PERIPH_GPIO
+                                                         AT91_PINCTRL_DEGLITCH>;
+                                        };
+                                };
+                        };
+
+                        watchdog@fffffe40 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        sck: oscillator {
+                compatible = "fixed-clock";
+
+                #clock-cells = <0>;
+                clock-frequency = <16000000>;
+                clock-output-names = "sck";
+        };
+
+        reg_3v3: regulator {
+                compatible = "regulator-fixed";
+
+                regulator-name = "3v3-supply";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+
+        ana: reg-ana {
+                compatible = "pwm-regulator";
+
+                regulator-name = "ANA";
+
+                pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>;
+                pwm-dutycycle-unit = <1000>;
+                pwm-dutycycle-range = <100 1000>;
+
+                regulator-min-microvolt = <2000000>;
+                regulator-max-microvolt = <20000000>;
+                regulator-ramp-delay = <1000>;
+        };
+
+        sound {
+                compatible = "axentia,tse850-pcm5142";
+
+                axentia,cpu-dai = <&ssc0>;
+                axentia,audio-codec = <&pcm5142>;
+
+                axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>;
+                axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
+                axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>;
+
+                axentia,ana-supply = <&ana>;
+        };
+
+        dac: dpot-dac {
+                compatible = "dpot-dac";
+                vref-supply = <&reg_3v3>;
+                io-channels = <&dpot 0>;
+                io-channel-names = "dpot";
+                #io-channel-cells = <1>;
+        };
+
+        envelope-detector {
+                compatible = "axentia,tse850-envelope-detector";
+                io-channels = <&dac 0>;
+                io-channel-names = "dac";
+
+                interrupt-parent = <&pioA>;
+                interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+                interrupt-names = "comp";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                ch1-red {
+                        label = "ch-1:red";
+                        gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
+                };
+                ch1-green {
+                        label = "ch-1:green";
+                        gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
+                };
+                ch2-red {
+                        label = "ch-2:red";
+                        gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
+                };
+                ch2-green {
+                        label = "ch-2:green";
+                        gpios = <&pioA 20 GPIO_ACTIVE_LOW>;
+                };
+                data-red {
+                        label = "data:red";
+                        gpios = <&pioA 19 GPIO_ACTIVE_LOW>;
+                };
+                data-green {
+                        label = "data:green";
+                        gpios = <&pioA 18 GPIO_ACTIVE_LOW>;
+                };
+                alarm-red {
+                        label = "alarm:red";
+                        gpios = <&pioA 17 GPIO_ACTIVE_LOW>;
+                };
+                alarm-green {
+                        label = "alarm:green";
+                        gpios = <&pioA 16 GPIO_ACTIVE_LOW>;
+                };
+        };
+};
+
+&nand0 {
+        at91bootstrap@0 {
+                label = "at91bootstrap";
+                reg = <0x0 0x40000>;
+        };
+
+        barebox@40000 {
+                label = "bootloader";
+                reg = <0x40000 0x60000>;
+        };
+
+        bareboxenv@c0000 {
+                label = "bareboxenv";
+                reg = <0xc0000 0x40000>;
+        };
+
+        bareboxenv2@100000 {
+                label = "bareboxenv2";
+                reg = <0x100000 0x40000>;
+        };
+
+        oftree@180000 {
+                label = "oftree";
+                reg = <0x180000 0x20000>;
+        };
+
+        kernel@200000 {
+                label = "kernel";
+                reg = <0x200000 0x500000>;
+        };
+
+        rootfs@800000 {
+                label = "rootfs";
+                reg = <0x800000 0x0f800000>;
+        };
+
+        ovlfs@10000000 {
+                label = "ovlfs";
+                reg = <0x10000000 0x10000000>;
+        };
+};
+
+&ssc0 {
+        #sound-dai-cells = <0>;
+
+        status = "okay";
+};
+
+&i2c0 {
+        status = "okay";
+
+        jc42@18 {
+                compatible = "nxp,se97b", "jedec,jc-42.4-temp";
+                reg = <0x18>;
+        };
+
+        dpot: mcp4651-104@28 {
+                compatible = "microchip,mcp4651-104";
+                reg = <0x28>;
+                #io-channel-cells = <1>;
+        };
+
+        pcm5142: pcm5142@4c {
+                compatible = "ti,pcm5142";
+
+                reg = <0x4c>;
+
+                AVDD-supply = <&reg_3v3>;
+                DVDD-supply = <&reg_3v3>;
+                CPVDD-supply = <&reg_3v3>;
+
+                clocks = <&sck>;
+
+                pll-in = <3>;
+                pll-out = <6>;
+        };
+
+        eeprom@50 {
+                compatible = "nxp,24c02";
+                reg = <0x50>;
+                pagesize = <16>;
+        };
+};
+
+&usart0 {
+        status = "okay";
+
+        atmel,use-dma-rx;
+};
+
+&pwm0 {
+        status = "okay";
+
+        pinctrl-0 = <&pinctrl_pwm0_pwml2_1>;
+        pinctrl-names = "default";
+};
+
+&macb1 {
+        status = "okay";
+
+        phy-mode = "rgmii";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        phy0: ethernet-phy@3 {
+                reg = <3>;
+
+                interrupt-parent = <&pioE>;
+                interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
+        };
+};
+
+&usb0 {
+        status = "okay";
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usba_vbus>;
+        atmel,vbus-gpio = <&pioC 31 GPIO_ACTIVE_HIGH>;
+};
+
+&usb1 {
+        status = "okay";
+
+        num-ports = <1>;
+        atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
+        atmel,oc-gpio = <&pioC 15 GPIO_ACTIVE_LOW>;
+};
+
+&usb2 {
+        status = "okay";
+};
+
+&dbgu {
+        status = "okay";
+
+        dmas = <0>, <0>;        /*  Do not use DMA for dbgu */
+};
diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
index a9d6d593fc8a..47799f59faa5 100644
--- a/arch/arm/boot/dts/axm55xx.dtsi
+++ b/arch/arm/boot/dts/axm55xx.dtsi
@@ -62,7 +62,7 @@
                 #address-cells = <0>;
                 interrupt-controller;
                 reg = <0x20 0x01001000 0 0x1000>,
-                      <0x20 0x01002000 0 0x1000>,
+                      <0x20 0x01002000 0 0x2000>,
                       <0x20 0x01004000 0 0x2000>,
                       <0x20 0x01006000 0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
diff --git a/arch/arm/boot/dts/axp223.dtsi b/arch/arm/boot/dts/axp223.dtsi
new file mode 100644
index 000000000000..b91b6c1278c7
--- /dev/null
+++ b/arch/arm/boot/dts/axp223.dtsi
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2016 Free Electrons
+ *
+ * Quentin Schulz <quentin.schulz@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * AXP223 Integrated Power Management Chip
+ * http://www.x-powers.com/product/AXP22X.php
+ * http://dl.linux-sunxi.org/AXP/AXP223-en.pdf
+ *
+ * The AXP223 shares most of its logic with the AXP221 but it has some
+ * differences, for the VBUS driver for example.
+ */
+
+#include "axp22x.dtsi"
+
+&usb_power_supply {
+        compatible = "x-powers,axp223-usb-power-supply";
+};
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 15f07f9af3b3..832795b0fd0f 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -209,6 +209,15 @@
                         #dma-cells = <1>;
                 };
 
+                sdio: sdhci@21000 {
+                        compatible = "brcm,sdhci-iproc-cygnus";
+                        reg = <0x21000 0x100>;
+                        interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+                        sdhci,auto-cmd12;
+                        clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
+                        status = "disabled";
+                };
+
                 amac0: ethernet@22000 {
                         compatible = "brcm,nsp-amac";
                         reg = <0x022000 0x1000>,
@@ -227,6 +236,15 @@
                         status = "disabled";
                 };
 
+                amac2: ethernet@24000 {
+                        compatible = "brcm,nsp-amac";
+                        reg = <0x024000 0x1000>,
+                              <0x112000 0x1000>;
+                        reg-names = "amac_base", "idm_base";
+                        interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                };
+
                 nand: nand@26000 {
                         compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
                         reg = <0x026000 0x600>,
@@ -241,29 +259,6 @@
                         brcm,nand-has-wp;
                 };
 
-                gpiob: gpio@30000 {
-                        compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
-                        reg = <0x30000 0x50>;
-                        #gpio-cells = <2>;
-                        gpio-controller;
-                        ngpios = <4>;
-                        interrupt-controller;
-                        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-                };
-
-                pwm: pwm@31000 {
-                        compatible = "brcm,iproc-pwm";
-                        reg = <0x31000 0x28>;
-                        clocks = <&osc>;
-                        #pwm-cells = <3>;
-                        status = "disabled";
-                };
-
-                rng: rng@33000 {
-                        compatible = "brcm,bcm-nsp-rng";
-                        reg = <0x33000 0x14>;
-                };
-
                 qspi: qspi@27200 {
                         compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
                         reg = <0x027200 0x184>,
@@ -293,6 +288,29 @@
                         #size-cells = <0>;
                 };
 
+                gpiob: gpio@30000 {
+                        compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
+                        reg = <0x30000 0x50>;
+                        #gpio-cells = <2>;
+                        gpio-controller;
+                        ngpios = <4>;
+                        interrupt-controller;
+                        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                pwm: pwm@31000 {
+                        compatible = "brcm,iproc-pwm";
+                        reg = <0x31000 0x28>;
+                        clocks = <&osc>;
+                        #pwm-cells = <3>;
+                        status = "disabled";
+                };
+
+                rng: rng@33000 {
+                        compatible = "brcm,bcm-nsp-rng";
+                        reg = <0x33000 0x14>;
+                };
+
                 ccbtimer0: timer@34000 {
                         compatible = "arm,sp804";
                         reg = <0x34000 0x1000>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 6ddf7dfe3f72..38e6050035bc 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -87,3 +87,8 @@
         power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
         status = "okay";
 };
+
+&vec {
+        power-domains = <&power RPI_POWER_DOMAIN_VEC>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 9a44da190897..a3106aa446c6 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -476,6 +476,14 @@
                         status = "disabled";
                 };
 
+                vec: vec@7e806000 {
+                        compatible = "brcm,bcm2835-vec";
+                        reg = <0x7e806000 0x1000>;
+                        clocks = <&clocks BCM2835_CLOCK_VEC>;
+                        interrupts = <2 27>;
+                        status = "disabled";
+                };
+
                 pixelvalve@7e807000 {
                         compatible = "brcm,bcm2835-pixelvalve2";
                         reg = <0x7e807000 0x100>;
diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
index 112a5a834ddc..d241cee4bfcc 100644
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
index 3600f56f46f4..b0e62042f62f 100644
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
index 9cb186ea2e97..c9ba6b964b38 100644
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x18000000>;
         };
 
         spi {
@@ -136,10 +137,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &usb2 {
         vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
 };
diff --git a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
index 35e6ed6a3ef7..f591b0f256d8 100644
--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
@@ -55,10 +55,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &spi_nor {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
index 1c7e53d60aa4..50d65d8fbd9a 100644
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -56,10 +56,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &spi_nor {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
index 8ce39d58eeb8..b9f66c0fae27 100644
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
@@ -83,10 +84,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &usb3 {
         vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
 };
diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
index 6229ef283c41..ae0199f6c7a2 100644
--- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
index 70f4bb9d864a..36b628b190d7 100644
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
@@ -119,10 +120,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &spi_nor {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm4708.dtsi b/arch/arm/boot/dts/bcm4708.dtsi
index eed4dd159995..d0eec099f1f8 100644
--- a/arch/arm/boot/dts/bcm4708.dtsi
+++ b/arch/arm/boot/dts/bcm4708.dtsi
@@ -34,3 +34,7 @@
         };
 
 };
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
index 71b98cfaf944..db8608be0ee7 100644
--- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
index a9c8defed4d3..d51586d95b9a 100644
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         spi {
@@ -122,7 +123,3 @@
                 };
         };
 };
-
-&uart0 {
-        status = "okay";
-};
diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
index 184fd9214110..de041b8c3342 100644
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         gpio-keys {
diff --git a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
new file mode 100644
index 000000000000..9b5759849983
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2017 Luxul Inc.
+ *
+ * Licensed under the ISC license.
+ */
+
+/dts-v1/;
+
+#include "bcm47081.dtsi"
+
+/ {
+        compatible = "luxul,xap-1410v1", "brcm,bcm47081", "brcm,bcm4708";
+        model = "Luxul XAP-1410 V1";
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+        };
+
+        memory {
+                reg = <0x00000000 0x08000000>;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                5ghz {
+                        label = "bcm53xx:blue:5ghz";
+                        gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                2ghz {
+                        label = "bcm53xx:blue:2ghz";
+                        gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                status {
+                        label = "bcm53xx:green:status";
+                        gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "timer";
+                };
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                restart {
+                        label = "Reset";
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
+                };
+        };
+};
+
+&spi_nor {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
new file mode 100644
index 000000000000..c544ab302012
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -0,0 +1,107 @@
+/*
+ * Copyright 2017 Luxul Inc.
+ *
+ * Licensed under the ISC license.
+ */
+
+/dts-v1/;
+
+#include "bcm47081.dtsi"
+#include "bcm5301x-nand-cs0-bch4.dtsi"
+
+/ {
+        compatible = "luxul,xwr-1200v1", "brcm,bcm47081", "brcm,bcm4708";
+        model = "Luxul XWR-1200 V1";
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+        };
+
+        memory {
+                reg = <0x00000000 0x08000000>;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                power {
+                        label = "bcm53xx:green:power";
+                        gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "default-on";
+                };
+
+                lan3 {
+                        label = "bcm53xx:green:lan3";
+                        gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                lan4 {
+                        label = "bcm53xx:green:lan4";
+                        gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                wan {
+                        label = "bcm53xx:green:wan";
+                        gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                lan2 {
+                        label = "bcm53xx:green:lan2";
+                        gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                usb {
+                        label = "bcm53xx:green:usb";
+                        gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                status {
+                        label = "bcm53xx:green:status";
+                        gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "timer";
+                };
+
+                2ghz {
+                        label = "bcm53xx:green:2ghz";
+                        gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                5ghz {
+                        label = "bcm53xx:green:5ghz";
+                        gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+
+                lan1 {
+                        label = "bcm53xx:green:lan1";
+                        gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "none";
+                };
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                restart {
+                        label = "Reset";
+                        linux,code = <KEY_RESTART>;
+                        gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
+                };
+        };
+};
+
+&usb2 {
+        vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
+};
+
+&spi_nor {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm47081.dtsi b/arch/arm/boot/dts/bcm47081.dtsi
index f720012ee5ed..c5f7619af4a6 100644
--- a/arch/arm/boot/dts/bcm47081.dtsi
+++ b/arch/arm/boot/dts/bcm47081.dtsi
@@ -24,3 +24,7 @@
                 };
         };
 };
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
index eac0f52e5ebd..eaca6876db0f 100644
--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
diff --git a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
index aab39c9864da..b32957ca9443 100644
--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x18000000>;
         };
 
         leds {
diff --git a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
index fd38d2aa3521..f459a98a72c6 100644
--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
@@ -101,6 +102,10 @@
         };
 };
 
-&uart0 {
-        status = "okay";
+&usb2 {
+        vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
+};
+
+&usb3 {
+        vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
 };
diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
index 92f8a7219e98..8e39a84e5bf9 100644
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
@@ -107,8 +108,52 @@
         };
 };
 
-&uart0 {
-        status = "okay";
+&pcie0 {
+        #address-cells = <3>;
+        #size-cells = <2>;
+
+        bridge@0,0,0 {
+                reg = <0x0000 0 0 0 0>;
+
+                #address-cells = <3>;
+                #size-cells = <2>;
+
+                wifi@0,1,0 {
+                        reg = <0x0000 0 0 0 0>;
+                        ieee80211-freq-limit = <5735000 5835000>;
+                };
+        };
+};
+
+&pcie1 {
+        #address-cells = <3>;
+        #size-cells = <2>;
+
+        bridge@1,0,0 {
+                reg = <0x0000 0 0 0 0>;
+
+                #address-cells = <3>;
+                #size-cells = <2>;
+
+                bridge@1,1,0 {
+                        reg = <0x0000 0 0 0 0>;
+
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+
+                        bridge@1,2,2 {
+                                reg = <0x1000 0 0 0 0>;
+
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+
+                                wifi@1,4,0 {
+                                        reg = <0x0000 0 0 0 0>;
+                                        ieee80211-freq-limit = <5170000 5730000>;
+                                };
+                        };
+                };
+        };
 };
 
 &usb2 {
diff --git a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
index 9a92c24ac2d8..c67bfaa0c8e8 100644
--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
@@ -97,10 +97,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &usb2 {
         vcc-gpio = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
 };
diff --git a/arch/arm/boot/dts/bcm4709.dtsi b/arch/arm/boot/dts/bcm4709.dtsi
index f03976597a6d..c645fea2b7f7 100644
--- a/arch/arm/boot/dts/bcm4709.dtsi
+++ b/arch/arm/boot/dts/bcm4709.dtsi
@@ -8,4 +8,5 @@
 
 &uart0 {
         clock-frequency = <125000000>;
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
index 661348dbb7ce..64ded7643e9f 100644
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
@@ -21,7 +21,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         nand: nand@18028000 {
@@ -105,10 +106,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &usb3 {
         vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
 };
diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
index 169b35fe5651..5cf4ab1ebe85 100644
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -18,7 +18,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x08000000>;
         };
 
         leds {
@@ -31,13 +32,13 @@
                 };
 
                 lan3    {
-                        label = "bcm53xx:green:lan1";
+                        label = "bcm53xx:green:lan3";
                         gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
                         linux,default-trigger = "default-off";
                 };
 
                 lan4    {
-                        label = "bcm53xx:green:lan0";
+                        label = "bcm53xx:green:lan4";
                         gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
                         linux,default-trigger = "default-off";
                 };
@@ -49,7 +50,7 @@
                 };
 
                 lan1    {
-                        label = "bcm53xx:green:lan3";
+                        label = "bcm53xx:green:lan1";
                         gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
                         linux,default-trigger = "default-off";
                 };
@@ -98,10 +99,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &usb3 {
         vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
 };
diff --git a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
index 521b4155de60..600795ee1aed 100644
--- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
@@ -18,7 +18,8 @@
         };
 
         memory {
-                reg = <0x00000000 0x08000000>;
+                reg = <0x00000000 0x08000000
+                       0x88000000 0x18000000>;
         };
 
         leds {
@@ -97,7 +98,3 @@
                 };
         };
 };
-
-&uart0 {
-        status = "okay";
-};
diff --git a/arch/arm/boot/dts/bcm47094.dtsi b/arch/arm/boot/dts/bcm47094.dtsi
index 4f09aa0114e6..4840a782fc05 100644
--- a/arch/arm/boot/dts/bcm47094.dtsi
+++ b/arch/arm/boot/dts/bcm47094.dtsi
@@ -14,4 +14,5 @@
 
 &uart0 {
         clock-frequency = <125000000>;
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index f09a2bb08979..4fbb089cf5ad 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -243,13 +243,39 @@
                         #gpio-cells = <2>;
                 };
 
+                pcie0: pcie@12000 {
+                        reg = <0x00012000 0x1000>;
+                };
+
+                pcie1: pcie@13000 {
+                        reg = <0x00013000 0x1000>;
+                };
+
                 usb2: usb2@21000 {
                         reg = <0x00021000 0x1000>;
 
                         #address-cells = <1>;
                         #size-cells = <1>;
+                        ranges;
+
+                        interrupt-parent = <&gic>;
+
+                        ehci: ehci@21000 {
+                                #usb-cells = <0>;
+
+                                compatible = "generic-ehci";
+                                reg = <0x00021000 0x1000>;
+                                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+                                phys = <&usb2_phy>;
+                        };
+
+                        ohci: ohci@22000 {
+                                #usb-cells = <0>;
 
-                        phys = <&usb2_phy>;
+                                compatible = "generic-ohci";
+                                reg = <0x00022000 0x1000>;
+                                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+                        };
                 };
 
                 usb3: usb3@23000 {
@@ -257,6 +283,19 @@
 
                         #address-cells = <1>;
                         #size-cells = <1>;
+                        ranges;
+
+                        interrupt-parent = <&gic>;
+
+                        xhci: xhci@23000 {
+                                #usb-cells = <0>;
+
+                                compatible = "generic-xhci";
+                                reg = <0x00023000 0x1000>;
+                                interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+                                phys = <&usb3_phy>;
+                                phy-names = "usb";
+                        };
                 };
 
                 spi@29000 {
diff --git a/arch/arm/boot/dts/bcm53573.dtsi b/arch/arm/boot/dts/bcm53573.dtsi
index e2c496a96c32..2da04d0a7348 100644
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -124,6 +124,17 @@
                                 reg = <0x4000 0x1000>;
                                 interrupt-parent = <&gic>;
                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                ehci_port1: port@1 {
+                                        reg = <1>;
+                                };
+
+                                ehci_port2: port@2 {
+                                        reg = <2>;
+                                };
                         };
 
                         ohci: ohci@d000 {
@@ -133,6 +144,17 @@
                                 reg = <0xd000 0x1000>;
                                 interrupt-parent = <&gic>;
                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                ohci_port1: port@1 {
+                                        reg = <1>;
+                                };
+
+                                ohci_port2: port@2 {
+                                        reg = <2>;
+                                };
                         };
                 };
 
diff --git a/arch/arm/boot/dts/bcm94708.dts b/arch/arm/boot/dts/bcm94708.dts
index 251a486f2da6..42855a7c1bfa 100644
--- a/arch/arm/boot/dts/bcm94708.dts
+++ b/arch/arm/boot/dts/bcm94708.dts
@@ -50,7 +50,3 @@
                 reg = <0x00000000 0x08000000>;
         };
 };
-
-&uart0 {
-        status = "okay";
-};
diff --git a/arch/arm/boot/dts/bcm94709.dts b/arch/arm/boot/dts/bcm94709.dts
index b16cac92904f..95e8be65f2f1 100644
--- a/arch/arm/boot/dts/bcm94709.dts
+++ b/arch/arm/boot/dts/bcm94709.dts
@@ -50,7 +50,3 @@
                 reg = <0x00000000 0x08000000>;
         };
 };
-
-&uart0 {
-        status = "okay";
-};
diff --git a/arch/arm/boot/dts/bcm953012er.dts b/arch/arm/boot/dts/bcm953012er.dts
index 0a9abecf9423..decd86bae901 100644
--- a/arch/arm/boot/dts/bcm953012er.dts
+++ b/arch/arm/boot/dts/bcm953012er.dts
@@ -70,10 +70,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &spi_nor {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm953012k.dts b/arch/arm/boot/dts/bcm953012k.dts
index 05a985a20378..bfd923096a8c 100644
--- a/arch/arm/boot/dts/bcm953012k.dts
+++ b/arch/arm/boot/dts/bcm953012k.dts
@@ -54,7 +54,6 @@
 
 &uart0 {
         clock-frequency = <62499840>;
-        status = "okay";
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index a21b0fd21f4e..3f04a40eb90c 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -65,7 +65,6 @@
         status = "okay";
 };
 
-
 &amac1 {
         status = "okay";
 };
@@ -125,6 +124,40 @@
         };
 };
 
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
 &uart0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index be7f2f8ecf39..9fd542200d3d 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -65,7 +65,6 @@
         status = "okay";
 };
 
-
 &amac1 {
         status = "okay";
 };
@@ -125,6 +124,40 @@
         };
 };
 
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
 &sata_phy0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 959cde911c3c..41e7fd350fcd 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -59,6 +59,12 @@
         };
 };
 
+/* XHCI support needed to be complete */
+
+&amac0 {
+        status = "okay";
+};
+
 &i2c0 {
         temperature-sensor@4c {
                 compatible = "adi,adt7461a";
@@ -115,12 +121,6 @@
         };
 };
 
-/* XHCI, MMC, and Ethernet support needed to be complete */
-
-&uart0 {
-        status = "okay";
-};
-
 &pcie0 {
         status = "okay";
 };
@@ -129,6 +129,49 @@
         status = "okay";
 };
 
+&pinctrl {
+        pinctrl-names = "default";
+        pinctrl-0 = <&nand_sel>;
+        nand_sel: nand_sel {
+                function = "nand";
+                groups = "nand_grp";
+        };
+};
+
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
 &sata_phy0 {
         status = "okay";
 };
@@ -141,11 +184,10 @@
         status = "okay";
 };
 
-&pinctrl {
-        pinctrl-names = "default";
-        pinctrl-0 = <&nand_sel>;
-        nand_sel: nand_sel {
-                function = "nand";
-                groups = "nand_grp";
-        };
+&sdio {
+        status = "ok";
+};
+
+&uart0 {
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index ad2aa87dd15a..477c4860db52 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -65,6 +65,14 @@
         status = "okay";
 };
 
+&amac1 {
+        status = "okay";
+};
+
+&amac2 {
+        status = "okay";
+};
+
 &nand {
         nandcs@0 {
                 compatible = "brcm,nandcs";
@@ -120,6 +128,40 @@
         };
 };
 
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
 &srab {
         compatible = "brcm,bcm58622-srab", "brcm,nsp-srab";
         status = "okay";
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 4ceb8fef8041..c0a499d5ba44 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -65,6 +65,14 @@
         status = "okay";
 };
 
+&amac1 {
+        status = "okay";
+};
+
+&amac2 {
+        status = "okay";
+};
+
 &nand {
         nandcs@0 {
                 compatible = "brcm,nandcs";
@@ -120,6 +128,48 @@
         };
 };
 
+&sata_phy0 {
+        status = "okay";
+};
+
+&sata {
+        status = "okay";
+};
+
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
 &srab {
         compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
         status = "okay";
@@ -165,14 +215,6 @@
         };
 };
 
-&sata_phy0 {
-        status = "okay";
-};
-
-&sata {
-        status = "okay";
-};
-
 &uart0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 442002597063..f7eb5854a224 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -1,7 +1,7 @@
 /*
  *  BSD LICENSE
  *
- *  Copyright (c) 2016 Broadcom.  All rights reserved.
+ *  Copyright(c) 2016 Broadcom.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -59,6 +59,18 @@
         };
 };
 
+&amac0 {
+        status = "okay";
+};
+
+&amac1 {
+        status = "okay";
+};
+
+&amac2 {
+        status = "okay";
+};
+
 &nand {
         nandcs@0 {
                 compatible = "brcm,nandcs";
@@ -97,10 +109,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
 &pcie0 {
         status = "okay";
 };
@@ -118,7 +126,49 @@
         };
 };
 
-&amac0 {
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
+&sata_phy0 {
+        status = "okay";
+};
+
+&sata_phy1 {
+        status = "okay";
+};
+
+&sata {
         status = "okay";
 };
 
@@ -167,14 +217,6 @@
         };
 };
 
-&sata_phy0 {
-        status = "okay";
-};
-
-&sata_phy1 {
-        status = "okay";
-};
-
-&sata {
+&uart0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 59d96fb91583..f8d47e517e18 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -53,14 +53,6 @@
         };
 };
 
-&uart0 {
-        status = "okay";
-};
-
-&uart1 {
-        status = "okay";
-};
-
 &amac0 {
         status = "okay";
 };
@@ -69,27 +61,7 @@
         status = "okay";
 };
 
-&pcie0 {
-        status = "okay";
-};
-
-&pcie1 {
-        status = "okay";
-};
-
-&pcie2 {
-        status = "okay";
-};
-
-&sata_phy0 {
-        status = "okay";
-};
-
-&sata_phy1 {
-        status = "okay";
-};
-
-&sata {
+&amac2 {
         status = "okay";
 };
 
@@ -112,32 +84,65 @@
                         reg = <0x00000000 0x00200000>;
                         read-only;
                 };
-                partition@1 {
+                partition@200000 {
                         label = "nenv";
                         reg = <0x00200000 0x00400000>;
                 };
-                partition@2 {
+                partition@600000 {
                         label = "nsystem";
                         reg = <0x00600000 0x00a00000>;
                 };
-                partition@3 {
+                partition@1000000 {
                         label = "nrootfs";
                         reg = <0x01000000 0x03000000>;
                 };
-                partition@4 {
+                partition@4000000 {
                         label = "ncustfs";
                         reg = <0x04000000 0x3c000000>;
                 };
         };
 };
 
+&pcie0 {
+        status = "okay";
+};
+
+&pcie1 {
+        status = "okay";
+};
+
+&pcie2 {
+        status = "okay";
+};
+
 &pinctrl {
         pinctrl-names = "default";
-        pinctrl-0 = <&nand_sel>;
+        pinctrl-0 = <&nand_sel>, <&gpiobs>, <&pwmc>;
+
         nand_sel: nand_sel {
                 function = "nand";
                 groups = "nand_grp";
         };
+
+        gpiobs: gpiobs {
+                function = "gpio_b";
+                groups = "gpio_b_0_grp", "gpio_b_1_grp", "gpio_b_2_grp",
+                         "gpio_b_3_grp";
+        };
+
+        pwmc: pwmc {
+                function = "pwm";
+                groups = "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp";
+        };
+
+        emmc_sel: emmc_sel {
+                function = "emmc";
+                groups = "emmc_grp";
+        };
+};
+
+&pwm {
+        status = "okay";
 };
 
 &qspi {
@@ -173,3 +178,81 @@
                 };
         };
 };
+
+&sata_phy0 {
+        status = "okay";
+};
+
+&sata_phy1 {
+        status = "okay";
+};
+
+&sata {
+        status = "okay";
+};
+
+/*
+ * By default the sd slot is functional. For emmc to work add "<&emmc_sel>"
+ * and delete "<&nand_sel>" in "pinctrl-0" property of pinctrl node. Remove the
+ * bus-width property here and disable the nand node with status = "disabled";.
+ *
+ * Ex: pinctrl-0 = <&emmc_sel>, <&gpiobs>, <&pwmc>;
+ */
+&sdio {
+        bus-width = <4>;
+        no-1-8-v;
+        status = "ok";
+};
+
+&srab {
+        compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+        status = "okay";
+
+        ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                        label = "port0";
+                        reg = <0>;
+                };
+
+                port@1 {
+                        label = "port1";
+                        reg = <1>;
+                };
+
+                port@2 {
+                        label = "port2";
+                        reg = <2>;
+                };
+
+                port@3 {
+                        label = "port3";
+                        reg = <3>;
+                };
+
+                port@4 {
+                        label = "port4";
+                        reg = <4>;
+                };
+
+                port@5 {
+                        ethernet = <&amac0>;
+                        label = "cpu";
+                        reg = <5>;
+                        fixed-link {
+                                speed = <1000>;
+                                full-duplex;
+                        };
+                };
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
+
+&uart1 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts
index 104afe98a43b..16666324fda8 100644
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -65,6 +65,14 @@
         status = "okay";
 };
 
+&amac1 {
+        status = "okay";
+};
+
+&amac2 {
+        status = "okay";
+};
+
 &nand {
         nandcs@0 {
                 compatible = "brcm,nandcs";
@@ -120,6 +128,40 @@
         };
 };
 
+&qspi {
+        bspi-sel = <0>;
+        flash: m25p80@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "m25p80";
+                reg = <0x0>;
+                spi-max-frequency = <12500000>;
+                m25p,fast-read;
+                spi-cpol;
+                spi-cpha;
+
+                partition@0 {
+                        label = "boot";
+                        reg = <0x00000000 0x000a0000>;
+                };
+
+                partition@a0000 {
+                        label = "env";
+                        reg = <0x000a0000 0x00060000>;
+                };
+
+                partition@100000 {
+                        label = "system";
+                        reg = <0x00100000 0x00600000>;
+                };
+
+                partition@700000 {
+                        label = "rootfs";
+                        reg = <0x00700000 0x01900000>;
+                };
+        };
+};
+
 &sata_phy0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 78492a0bbbab..d15107cba765 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -290,3 +290,23 @@
                 };
         };
 };
+
+&vpif {
+        pinctrl-names = "default";
+        pinctrl-0 = <&vpif_capture_pins>;
+        status = "okay";
+
+        /* VPIF capture port */
+        port {
+                vpif_ch0: endpoint@0 {
+                          reg = <0>;
+                          bus-width = <8>;
+                };
+
+                vpif_ch1: endpoint@1 {
+                          reg = <1>;
+                          bus-width = <8>;
+                          data-shift = <8>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index afcb4821deb1..b837fec70eec 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 #include "da850.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
         model = "DA850/AM1808/OMAP-L138 LCDK";
@@ -51,6 +52,62 @@
                         system-clock-frequency = <24576000>;
                 };
         };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                autorepeat;
+
+                user1 {
+                        label = "GPIO Key USER1";
+                        linux,code = <BTN_0>;
+                        gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+                };
+
+                user2 {
+                        label = "GPIO Key USER2";
+                        linux,code = <BTN_1>;
+                        gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+                };
+        };
+
+        vga-bridge {
+                compatible = "ti,ths8135";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+
+                                vga_bridge_in: endpoint {
+                                        remote-endpoint = <&lcdc_out_vga>;
+                                };
+                        };
+
+                        port@1 {
+                                reg = <1>;
+
+                                vga_bridge_out: endpoint {
+                                        remote-endpoint = <&vga_con_in>;
+                                };
+                        };
+                };
+        };
+
+        vga {
+                compatible = "vga-connector";
+
+                ddc-i2c-bus = <&i2c0>;
+
+                port {
+                        vga_con_in: endpoint {
+                                remote-endpoint = <&vga_bridge_out>;
+                        };
+                };
+        };
 };
 
 &pmx_core {
@@ -105,6 +162,10 @@
         status = "okay";
 };
 
+&sata {
+        status = "okay";
+};
+
 &mdio {
         pinctrl-names = "default";
         pinctrl-0 = <&mdio_pins>;
@@ -167,6 +228,10 @@
         status = "okay";
 };
 
+&usb1 {
+        status = "okay";
+};
+
 &aemif {
         pinctrl-names = "default";
         pinctrl-0 = <&nand_pins>;
@@ -236,3 +301,28 @@
 &memctrl {
         status = "okay";
 };
+
+&lcdc {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&lcd_pins>;
+
+        port {
+                lcdc_out_vga: endpoint {
+                        remote-endpoint = <&vga_bridge_in>;
+                };
+        };
+};
+
+&vpif {
+        pinctrl-names = "default";
+        pinctrl-0 = <&vpif_capture_pins>;
+        status = "okay";
+
+        /* VPIF capture port */
+        port {
+                vpif_ch0: endpoint {
+                          bus-width = <8>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/da850-lego-ev3.dts b/arch/arm/boot/dts/da850-lego-ev3.dts
new file mode 100644
index 000000000000..112ec92064ce
--- /dev/null
+++ b/arch/arm/boot/dts/da850-lego-ev3.dts
@@ -0,0 +1,313 @@
+/*
+ * Device tree for LEGO MINDSTORMS EV3
+ *
+ * Copyright (C) 2017 David Lechner <david@lechnology.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation, version 2.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/pwm/pwm.h>
+
+#include "da850.dtsi"
+
+/ {
+        compatible = "lego,ev3", "ti,da850";
+        model = "LEGO MINDSTORMS EV3";
+
+        aliases {
+                serial1 = &serial1;
+        };
+
+        memory@c0000000 {
+                device_type = "memory";
+                reg = <0xc0000000 0x04000000>;
+        };
+
+        /*
+         * The buttons on the EV3 are mapped to keyboard keys.
+         */
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                label = "EV3 Brick Buttons";
+                pinctrl-names = "default";
+                pinctrl-0 = <&button_pins>, <&button_bias>;
+
+                center {
+                        label = "Center";
+                        linux,code = <KEY_ENTER>;
+                        gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+                };
+
+                left {
+                        label = "Left";
+                        linux,code = <KEY_LEFT>;
+                        gpios = <&gpio 102 GPIO_ACTIVE_HIGH>;
+                };
+
+                back {
+                        label = "Back";
+                        linux,code = <KEY_BACKSPACE>;
+                        gpios = <&gpio 106 GPIO_ACTIVE_HIGH>;
+                };
+
+                right {
+                        label = "Right";
+                        linux,code = <KEY_RIGHT>;
+                        gpios = <&gpio 124 GPIO_ACTIVE_HIGH>;
+                };
+
+                down {
+                        label = "Down";
+                        linux,code = <KEY_DOWN>;
+                        gpios = <&gpio 126 GPIO_ACTIVE_HIGH>;
+                };
+
+                up {
+                        label = "Up";
+                        linux,code = <KEY_UP>;
+                        gpios = <&gpio 127 GPIO_ACTIVE_HIGH>;
+                };
+        };
+
+        /*
+         * The EV3 has two built-in bi-color LEDs behind the buttons.
+         */
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-names = "default";
+                pinctrl-0 = <&led_pins>;
+
+                left_green {
+                        label = "led0:green:brick-status";
+                        /* GP6[13] */
+                        gpios = <&gpio 103 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-on";
+                };
+
+                right_red {
+                        label = "led1:red:brick-status";
+                        /* GP6[7] */
+                        gpios = <&gpio 108 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-on";
+                };
+
+                left_red {
+                        label = "led0:red:brick-status";
+                        /* GP6[12] */
+                        gpios = <&gpio 109 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-on";
+                };
+
+                right_green {
+                        label = "led1:green:brick-status";
+                        /* GP6[14] */
+                        gpios = <&gpio 110 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "default-on";
+                };
+        };
+
+        /*
+         * The EV3 is powered down by turning off the main 5V supply.
+         */
+        gpio-poweroff {
+                compatible = "gpio-poweroff";
+                gpios = <&gpio 107 GPIO_ACTIVE_LOW>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&system_power_pin>;
+        };
+
+        /*
+         * This is a 5V current limiting regulator that is shared by USB,
+         * the sensor (input) ports, the motor (output) ports and the A/DC.
+         */
+        vcc5v: regulator1 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&vcc5v_pins>;
+                compatible = "regulator-fixed";
+                regulator-name = "vcc5v";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio 101 0>;
+                over-current-gpios = <&gpio 99 GPIO_ACTIVE_LOW>;
+                enable-active-high;
+                regulator-boot-on;
+        };
+};
+
+&pmx_core {
+        status = "okay";
+
+        spi0_cs3_pin: pinmux_spi0_cs3_pin {
+                pinctrl-single,bits = <
+                        /* CS3 */
+                        0xc 0x01000000 0x0f000000
+                >;
+        };
+
+        mmc0_cd_pin: pinmux_mmc0_cd {
+                pinctrl-single,bits = <
+                        /* GP5[14] */
+                        0x2C 0x00000080 0x000000f0
+                >;
+        };
+
+        button_pins: pinmux_button_pins {
+                pinctrl-single,bits = <
+                        /* GP1[13] */
+                        0x8 0x00000800 0x00000f00
+                        /* GP6[10] */
+                        0x34 0x00800000 0x00f00000
+                        /* GP6[6] */
+                        0x38 0x00000080 0x000000f0
+                        /* GP7[12], GP7[14], GP7[15] */
+                        0x40 0x00808800 0x00f0ff00
+                >;
+        };
+
+        led_pins: pinmux_led_pins {
+                pinctrl-single,bits = <
+                        /* GP6[12], GP6[13], GP6[14] */
+                        0x34 0x00008880 0x0000fff0
+                        /* GP6[7] */
+                        0x38 0x00000008 0x0000000f
+                >;
+        };
+
+        system_power_pin: pinmux_system_power {
+                pinctrl-single,bits = <
+                        /* GP6[11] */
+                        0x34 0x00080000 0x000f0000
+                >;
+        };
+
+        vcc5v_pins: pinmux_vcc5v {
+                pinctrl-single,bits = <
+                        /* GP6[5] */
+                        0x40 0x00000080 0x000000f0
+                        /* GP6[3] */
+                        0x4c 0x00008000 0x0000f000
+                >;
+        };
+};
+
+&pinconf {
+        status = "okay";
+
+        /* Buttons have external pulldown resistors */
+        button_bias: button-bias-groups {
+                disable {
+                        groups = "cp5", "cp24", "cp25", "cp28";
+                        bias-disable;
+                };
+        };
+};
+
+/* Input port 1 */
+&serial1 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&serial1_rxtx_pins>;
+};
+
+&rtc0 {
+        status = "okay";
+};
+
+&i2c0 {
+        status = "okay";
+        clock-frequency = <400000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins>;
+
+        /*
+         * EEPROM contains the first stage bootloader, HW ID and Bluetooth MAC.
+         */
+        eeprom@50 {
+                compatible = "microchip,24c128";
+                pagesize = <64>;
+                read-only;
+                reg = <0x50>;
+        };
+};
+
+&wdt {
+        status = "okay";
+};
+
+&mmc0 {
+        status = "okay";
+        max-frequency = <50000000>;
+        bus-width = <4>;
+        cd-gpios = <&gpio 94 GPIO_ACTIVE_LOW>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin>;
+};
+
+&spi0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>, <&spi0_cs3_pin>;
+
+        flash@0 {
+                compatible = "n25q128a13", "jedec,spi-nor";
+                reg = <0>;
+                spi-max-frequency = <50000000>;
+                ti,spi-wdelay = <8>;
+
+                /* Partitions are based on the official firmware from LEGO */
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        partition@0 {
+                                label = "U-Boot";
+                                reg = <0 0x40000>;
+                        };
+
+                        partition@40000 {
+                                label = "U-Boot Env";
+                                reg = <0x40000 0x10000>;
+                        };
+
+                        partition@50000 {
+                                label = "Kernel";
+                                reg = <0x50000 0x200000>;
+                        };
+
+                        partition@250000 {
+                                label = "Filesystem";
+                                reg = <0x250000 0xa50000>;
+                        };
+
+                        partition@cb0000 {
+                                label = "Storage";
+                                reg = <0xcb0000 0x2f0000>;
+                        };
+                };
+        };
+};
+
+&gpio {
+        status = "okay";
+};
+
+&usb_phy {
+        status = "okay";
+};
+
+&usb0 {
+        status = "okay";
+};
+
+&usb1 {
+        status = "okay";
+        vbus-supply = <&vcc5v>;
+};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 104155d12c2f..92d633d1da68 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -208,7 +208,18 @@
                                         0x4c 0x02000022 0x0f0000ff
                                 >;
                         };
-
+                        vpif_capture_pins: vpif_capture_pins {
+                                pinctrl-single,bits = <
+                                        /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
+                                        0x38 0x11111111 0xffffffff
+                                        /* VP_DIN[10..15,0..1] */
+                                        0x3c 0x11111111 0xffffffff
+                                        /* VP_DIN[8..9] */
+                                        0x40 0x00000011 0x000000ff
+                                        /* VP_CLKIN3, VP_CLKIN2 */
+                                        0x4c 0x00010100 0x000f0f00
+                                >;
+                        };
                 };
                 prictrl: priority-controller@14110 {
                         compatible = "ti,da850-mstpri";
@@ -266,22 +277,25 @@
                         interrupt-names = "edm3_tcerrint";
                 };
                 serial0: serial@42000 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         reg = <0x42000 0x100>;
+                        reg-io-width = <4>;
                         reg-shift = <2>;
                         interrupts = <25>;
                         status = "disabled";
                 };
                 serial1: serial@10c000 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         reg = <0x10c000 0x100>;
+                        reg-io-width = <4>;
                         reg-shift = <2>;
                         interrupts = <53>;
                         status = "disabled";
                 };
                 serial2: serial@10d000 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         reg = <0x10d000 0x100>;
+                        reg-io-width = <4>;
                         reg-shift = <2>;
                         interrupts = <61>;
                         status = "disabled";
@@ -324,6 +338,18 @@
                         dma-names = "rx", "tx";
                         status = "disabled";
                 };
+                vpif: video@217000 {
+                        compatible = "ti,da850-vpif";
+                        reg = <0x217000 0x1000>;
+                        interrupts = <92>;
+                        status = "disabled";
+
+                        /* VPIF capture port */
+                        port {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+                };
                 mmc1: mmc@21b000 {
                         compatible = "ti,da830-mmc";
                         reg = <0x21b000 0x1000>;
@@ -403,6 +429,12 @@
                         phy-names = "usb-phy";
                         status = "disabled";
                 };
+                sata: sata@218000 {
+                        compatible = "ti,da850-ahci";
+                        reg = <0x218000 0x2000>, <0x22c018 0x4>;
+                        interrupts = <67>;
+                        status = "disabled";
+                };
                 mdio: mdio@224000 {
                         compatible = "ti,davinci_mdio";
                         #address-cells = <1>;
@@ -425,6 +457,14 @@
                                         >;
                         status = "disabled";
                 };
+                usb1: usb@225000 {
+                        compatible = "ti,da830-ohci";
+                        reg = <0x225000 0x1000>;
+                        interrupts = <59>;
+                        phys = <&usb_phy 1>;
+                        phy-names = "usb-phy";
+                        status = "disabled";
+                };
                 gpio: gpio@226000 {
                         compatible = "ti,dm6441-gpio";
                         gpio-controller;
@@ -458,10 +498,11 @@
                         dma-names = "tx", "rx";
                 };
 
-                display: display@213000 {
+                lcdc: display@213000 {
                         compatible = "ti,da850-tilcdc";
                         reg = <0x213000 0x1000>;
                         interrupts = <52>;
+                        max-pixelclock = <37500>;
                         status = "disabled";
                 };
         };
diff --git a/arch/arm/boot/dts/dove-cm-a510.dtsi b/arch/arm/boot/dts/dove-cm-a510.dtsi
index 59b4056b478f..9b9dfbe07be4 100644
--- a/arch/arm/boot/dts/dove-cm-a510.dtsi
+++ b/arch/arm/boot/dts/dove-cm-a510.dtsi
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; version 2 of the
  *     License.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/dove-sbc-a510.dts b/arch/arm/boot/dts/dove-sbc-a510.dts
index 288e707dea99..2bb85a9b7614 100644
--- a/arch/arm/boot/dts/dove-sbc-a510.dts
+++ b/arch/arm/boot/dts/dove-sbc-a510.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; version 2 of the
  *     License.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 132f2be10889..4bc4b575c99b 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -21,6 +21,10 @@
                 reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
         };
 
+        chosen {
+                stdout-path = &uart1;
+        };
+
         evm_3v3_sd: fixedregulator-sd {
                 compatible = "regulator-fixed";
                 regulator-name = "evm_3v3_sd";
@@ -151,204 +155,6 @@
 };
 
 &dra7_pmx_core {
-        pinctrl-names = "default";
-        pinctrl-0 = <&vtt_pin>;
-
-        vtt_pin: pinmux_vtt_pin {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x37b4, PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-                >;
-        };
-
-        i2c1_pins: pinmux_i2c1_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
-                        DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
-                >;
-        };
-
-        i2c2_pins: pinmux_i2c2_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
-                        DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
-                >;
-        };
-
-        i2c3_pins: pinmux_i2c3_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
-                        DRA7XX_CORE_IOPAD(0x368c, PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
-                >;
-        };
-
-        mcspi1_pins: pinmux_mcspi1_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x37a4, PIN_INPUT | MUX_MODE0) /* spi1_sclk */
-                        DRA7XX_CORE_IOPAD(0x37a8, PIN_INPUT | MUX_MODE0) /* spi1_d1 */
-                        DRA7XX_CORE_IOPAD(0x37ac, PIN_INPUT | MUX_MODE0) /* spi1_d0 */
-                        DRA7XX_CORE_IOPAD(0x37b0, PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
-                        DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
-                        DRA7XX_CORE_IOPAD(0x37bc, PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
-                >;
-        };
-
-        mcspi2_pins: pinmux_mcspi2_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x37c0, PIN_INPUT | MUX_MODE0) /* spi2_sclk */
-                        DRA7XX_CORE_IOPAD(0x37c4, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
-                        DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
-                        DRA7XX_CORE_IOPAD(0x37cc, PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
-                >;
-        };
-
-        uart1_pins: pinmux_uart1_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x37e0, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
-                        DRA7XX_CORE_IOPAD(0x37e4, PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
-                        DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
-                        DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
-                >;
-        };
-
-        uart2_pins: pinmux_uart2_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT | MUX_MODE0) /* uart2_rxd */
-                        DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT | MUX_MODE0) /* uart2_txd */
-                        DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
-                        DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
-                >;
-        };
-
-        uart3_pins: pinmux_uart3_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
-                        DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
-                >;
-        };
-
-        usb1_pins: pinmux_usb1_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
-                >;
-        };
-
-        usb2_pins: pinmux_usb2_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
-                >;
-        };
-
-        nand_flash_x16: nand_flash_x16 {
-                /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
-                 * So NAND flash requires following switch settings:
-                 * SW5.1 (NAND_BOOTn) = ON (LOW)
-                 * SW5.9 (GPMC_WPN) = OFF (HIGH)
-                 */
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad0     */
-                        DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad1     */
-                        DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad2     */
-                        DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad3     */
-                        DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad4     */
-                        DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad5     */
-                        DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad6     */
-                        DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad7     */
-                        DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad8     */
-                        DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad9     */
-                        DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad10    */
-                        DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad11    */
-                        DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad12    */
-                        DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad13    */
-                        DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad14    */
-                        DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT  | MUX_MODE0)       /* gpmc_ad15    */
-                        DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT_PULLUP  | MUX_MODE0)        /* gpmc_wait0   */
-                        DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0)       /* gpmc_wen     */
-                        DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* gpmc_csn0    */
-                        DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0)       /* gpmc_advn_ale */
-                        DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0)       /* gpmc_oen_ren  */
-                        DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_be0n_cle */
-                >;
-        };
-
-        cpsw_default: cpsw_default {
-                pinctrl-single,pins = <
-                        /* Slave 1 */
-                        DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txc.rgmii0_txc */
-                        DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txctl.rgmii0_txctl */
-                        DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_td3.rgmii0_txd3 */
-                        DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txd2.rgmii0_txd2 */
-                        DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txd1.rgmii0_txd1 */
-                        DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0)       /* rgmii0_txd0.rgmii0_txd0 */
-                        DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxc.rgmii0_rxc */
-                        DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxctl.rgmii0_rxctl */
-                        DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd3.rgmii0_rxd3 */
-                        DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd2.rgmii0_rxd2 */
-                        DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd1.rgmii0_rxd1 */
-                        DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0)        /* rgmii0_rxd0.rgmii0_rxd0 */
-
-                        /* Slave 2 */
-                        DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d12.rgmii1_txc */
-                        DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d13.rgmii1_tctl */
-                        DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d14.rgmii1_td3 */
-                        DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d15.rgmii1_td2 */
-                        DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d16.rgmii1_td1 */
-                        DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3)       /* vin2a_d17.rgmii1_td0 */
-                        DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3)        /* vin2a_d18.rgmii1_rclk */
-                        DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3)        /* vin2a_d19.rgmii1_rctl */
-                        DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3)        /* vin2a_d20.rgmii1_rd3 */
-                        DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3)        /* vin2a_d21.rgmii1_rd2 */
-                        DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3)        /* vin2a_d22.rgmii1_rd1 */
-                        DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3)        /* vin2a_d23.rgmii1_rd0 */
-                >;
-
-        };
-
-        cpsw_sleep: cpsw_sleep {
-                pinctrl-single,pins = <
-                        /* Slave 1 */
-                        DRA7XX_CORE_IOPAD(0x3650, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3654, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3658, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x365c, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3660, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3664, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3668, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x366c, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3670, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3674, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3678, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x367c, MUX_MODE15)
-
-                        /* Slave 2 */
-                        DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15)
-                >;
-        };
-
-        davinci_mdio_default: davinci_mdio_default {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* mdio_d.mdio_d */
-                        DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
-                >;
-        };
-
-        davinci_mdio_sleep: davinci_mdio_sleep {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15)
-                >;
-        };
-
         dcan1_pins_default: dcan1_pins_default {
                 pinctrl-single,pins = <
                         DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
@@ -363,36 +169,36 @@
                 >;
         };
 
-        atl_pins: pinmux_atl_pins {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5)       /* xref_clk1.atl_clk1 */
-                        DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5)       /* xref_clk2.atl_clk2 */
-                >;
-        };
-
-        mcasp3_pins: pinmux_mcasp3_pins {
+        mmc1_pins_default: mmc1_pins_default {
                 pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_aclkx */
-                        DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_fsx */
-                        DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)      /* mcasp3_axr0 */
-                        DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* mcasp3_axr1 */
+                        DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)       /* mmc1sdcd.gpio219 */
+                        DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+                        DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+                        DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+                        DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+                        DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+                        DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
                 >;
         };
 
-        mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins {
+        mmc2_pins_default: mmc2_pins_default {
                 pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x3724, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3728, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x372c, MUX_MODE15)
-                        DRA7XX_CORE_IOPAD(0x3730, MUX_MODE15)
+                        DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
+                        DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
+                        DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
+                        DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
+                        DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
+                        DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
+                        DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
+                        DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
+                        DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
+                        DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
                 >;
         };
 };
 
 &i2c1 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&i2c1_pins>;
         clock-frequency = <400000>;
 
         tps659038: tps659038@58 {
@@ -581,8 +387,6 @@
 
 &i2c2 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&i2c2_pins>;
         clock-frequency = <400000>;
 
         pcf_hdmi: gpio@26 {
@@ -602,45 +406,35 @@
 
 &i2c3 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&i2c3_pins>;
         clock-frequency = <400000>;
 };
 
 &mcspi1 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&mcspi1_pins>;
 };
 
 &mcspi2 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&mcspi2_pins>;
 };
 
 &uart1 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&uart1_pins>;
         interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
                               <&dra7_pmx_core 0x3e0>;
 };
 
 &uart2 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&uart2_pins>;
 };
 
 &uart3 {
         status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&uart3_pins>;
 };
 
 &mmc1 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins_default>;
         vmmc-supply = <&evm_3v3_sd>;
         vmmc_aux-supply = <&ldo1_reg>;
         bus-width = <4>;
@@ -653,6 +447,8 @@
 
 &mmc2 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins_default>;
         vmmc-supply = <&evm_3v3_sw>;
         bus-width = <8>;
 };
@@ -732,14 +528,10 @@
 
 &usb1 {
         dr_mode = "peripheral";
-        pinctrl-names = "default";
-        pinctrl-0 = <&usb1_pins>;
 };
 
 &usb2 {
         dr_mode = "host";
-        pinctrl-names = "default";
-        pinctrl-0 = <&usb2_pins>;
 };
 
 &elm {
@@ -747,9 +539,12 @@
 };
 
 &gpmc {
-        status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&nand_flash_x16>;
+        /*
+        * For the existing IOdelay configuration via U-Boot we don't
+        * support NAND on dra7-evm. Keep it disabled. Enabling it
+        * requires a different configuration by U-Boot.
+        */
+        status = "disabled";
         ranges = <0 0 0x08000000 0x01000000>;   /* minimum GPMC partition = 16MB */
         nand@0,0 {
                 compatible = "ti,omap2-nand";
@@ -845,9 +640,6 @@
 
 &mac {
         status = "okay";
-        pinctrl-names = "default", "sleep";
-        pinctrl-0 = <&cpsw_default>;
-        pinctrl-1 = <&cpsw_sleep>;
         dual_emac;
 };
 
@@ -863,12 +655,6 @@
         dual_emac_res_vlan = <2>;
 };
 
-&davinci_mdio {
-        pinctrl-names = "default", "sleep";
-        pinctrl-0 = <&davinci_mdio_default>;
-        pinctrl-1 = <&davinci_mdio_sleep>;
-};
-
 &dcan1 {
         status = "ok";
         pinctrl-names = "default", "sleep", "active";
@@ -878,9 +664,6 @@
 };
 
 &atl {
-        pinctrl-names = "default";
-        pinctrl-0 = <&atl_pins>;
-
         assigned-clocks = <&abe_dpll_sys_clk_mux>,
                           <&atl_gfclk_mux>,
                           <&dpll_abe_ck>,
@@ -899,9 +682,6 @@
 
 &mcasp3 {
         #sound-dai-cells = <0>;
-        pinctrl-names = "default", "sleep";
-        pinctrl-0 = <&mcasp3_pins>;
-        pinctrl-1 = <&mcasp3_sleep_pins>;
 
         assigned-clocks = <&mcasp3_ahclkx_mux>;
         assigned-clock-parents = <&atl_clkin2_ck>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 3e1f75026eac..2c9e56f4aac5 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -57,7 +57,7 @@
                 interrupt-controller;
                 #interrupt-cells = <3>;
                 reg = <0x0 0x48211000 0x0 0x1000>,
-                      <0x0 0x48212000 0x0 0x1000>,
+                      <0x0 0x48212000 0x0 0x2000>,
                       <0x0 0x48214000 0x0 0x2000>,
                       <0x0 0x48216000 0x0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts
index 2b9a5a8d69ad..4d57a55473af 100644
--- a/arch/arm/boot/dts/dra71-evm.dts
+++ b/arch/arm/boot/dts/dra71-evm.dts
@@ -138,6 +138,11 @@
         };
 };
 
+&pcf_lcd {
+        interrupt-parent = <&gpio7>;
+        interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
+};
+
 &pcf_gpio_21 {
         interrupt-parent = <&gpio7>;
         interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi
index e50fbeea96e0..ad24544adf0f 100644
--- a/arch/arm/boot/dts/dra72-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra72-evm-common.dtsi
@@ -18,6 +18,10 @@
                 display0 = &hdmi0;
         };
 
+        chosen {
+                stdout-path = &uart1;
+        };
+
         evm_12v0: fixedregulator-evm12v0 {
                 /* main supply */
                 compatible = "regulator-fixed";
@@ -216,6 +220,15 @@
         status = "okay";
         clock-frequency = <400000>;
 
+        pcf_lcd: gpio@20 {
+                compatible = "nxp,pcf8575";
+                reg = <0x20>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+
         pcf_gpio_21: gpio@21 {
                 compatible = "ti,pcf8575", "nxp,pcf8575";
                 reg = <0x21>;
@@ -280,7 +293,12 @@
 };
 
 &gpmc {
-        status = "okay";
+        /*
+         * For the existing IOdelay configuration via U-Boot we don't
+         * support NAND on dra72-evm. Keep it disabled. Enabling it
+         * requires a different configuration by U-Boot.
+         */
+        status = "disabled";
         ranges = <0 0 0x08000000 0x01000000>;   /* minimum GPMC partition = 16MB */
         nand@0,0 {
                 /* To use NAND, DIP switch SW5 must be set like so:
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
index 3f808a47df03..3ecac56bf504 100644
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -68,6 +68,8 @@
                 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
                 ti,min-output-impedance;
+                interrupt-parent = <&gpio6>;
+                interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
         };
 
         dp83867_1: ethernet-phy@3 {
@@ -76,5 +78,7 @@
                 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
                 ti,min-output-impedance;
+                interrupt-parent = <&gpio6>;
+                interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
         };
 };
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 2ccbb57fbfa8..c15e7e0c7e08 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -99,7 +99,7 @@
                         interrupt-controller;
                         interrupts = <1 9 0xf04>;
                         reg = <0xfff11000 0x1000>,
-                              <0xfff12000 0x1000>,
+                              <0xfff12000 0x2000>,
                               <0xfff14000 0x2000>,
                               <0xfff16000 0x2000>;
                 };
diff --git a/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi b/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi
index f78c14c82e17..25186ac4188d 100644
--- a/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi
+++ b/arch/arm/boot/dts/exynos-mfc-reserved-memory.dtsi
@@ -17,7 +17,7 @@
                 mfc_left: region_mfc_left {
                         compatible = "shared-dma-pool";
                         no-map;
-                        size = <0x1000000>;
+                        size = <0x2400000>;
                         alignment = <0x100000>;
                 };
 
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index ba17ee1eb749..9c28ef4508e0 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -234,7 +234,7 @@
                         #interrupt-cells = <3>;
                         interrupt-controller;
                         reg = <0x10481000 0x1000>,
-                              <0x10482000 0x1000>,
+                              <0x10482000 0x2000>,
                               <0x10484000 0x2000>,
                               <0x10486000 0x2000>;
                         interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index c64737baa45e..18def1c774d5 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -64,8 +64,10 @@
         i2s0: i2s@03830000 {
                 compatible = "samsung,s5pv210-i2s";
                 reg = <0x03830000 0x100>;
-                clocks = <&clock_audss EXYNOS_I2S_BUS>;
-                clock-names = "iis";
+                clocks = <&clock_audss EXYNOS_I2S_BUS>,
+                         <&clock_audss EXYNOS_DOUT_AUD_BUS>,
+                         <&clock_audss EXYNOS_SCLK_I2S>;
+                clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
                 #clock-cells = <1>;
                 clock-output-names = "i2s_cdclk0";
                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
@@ -100,18 +102,21 @@
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023C40 0x20>;
                 #power-domain-cells = <0>;
+                label = "MFC";
         };
 
         pd_g3d: g3d-power-domain@10023C60 {
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023C60 0x20>;
                 #power-domain-cells = <0>;
+                label = "G3D";
         };
 
         pd_lcd0: lcd0-power-domain@10023C80 {
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023C80 0x20>;
                 #power-domain-cells = <0>;
+                label = "LCD0";
         };
 
         pd_tv: tv-power-domain@10023C20 {
@@ -119,24 +124,28 @@
                 reg = <0x10023C20 0x20>;
                 #power-domain-cells = <0>;
                 power-domains = <&pd_lcd0>;
+                label = "TV";
         };
 
         pd_cam: cam-power-domain@10023C00 {
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023C00 0x20>;
                 #power-domain-cells = <0>;
+                label = "CAM";
         };
 
         pd_gps: gps-power-domain@10023CE0 {
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023CE0 0x20>;
                 #power-domain-cells = <0>;
+                label = "GPS";
         };
 
         pd_gps_alive: gps-alive-power-domain@10023D00 {
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023D00 0x20>;
                 #power-domain-cells = <0>;
+                label = "GPS alive";
         };
 
         gic: interrupt-controller@10490000 {
@@ -370,19 +379,19 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 port@0 {
-                    reg = <0>;
-                    phys = <&exynos_usbphy 1>;
-                    status = "disabled";
+                        reg = <0>;
+                        phys = <&exynos_usbphy 1>;
+                        status = "disabled";
                 };
                 port@1 {
-                    reg = <1>;
-                    phys = <&exynos_usbphy 2>;
-                    status = "disabled";
+                        reg = <1>;
+                        phys = <&exynos_usbphy 2>;
+                        status = "disabled";
                 };
                 port@2 {
-                    reg = <2>;
-                    phys = <&exynos_usbphy 3>;
-                    status = "disabled";
+                        reg = <2>;
+                        phys = <&exynos_usbphy 3>;
+                        status = "disabled";
                 };
         };
 
@@ -396,9 +405,9 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 port@0 {
-                    reg = <0>;
-                    phys = <&exynos_usbphy 1>;
-                    status = "disabled";
+                        reg = <0>;
+                        phys = <&exynos_usbphy 1>;
+                        status = "disabled";
                 };
         };
 
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 7f3a18c8f60f..f9408188f97f 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -86,6 +86,7 @@
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10023CA0 0x20>;
                 #power-domain-cells = <0>;
+                label = "LCD1";
         };
 
         l2c: l2-cache-controller@10502000 {
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
deleted file mode 100644
index 538901123d37..000000000000
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Samsung's Exynos4212 SoC device tree source
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
- * based board files can include this file and provide values for board specfic
- * bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
- * nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include "exynos4x12.dtsi"
-
-/ {
-        compatible = "samsung,exynos4212", "samsung,exynos4";
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: cpu@A00 {
-                        device_type = "cpu";
-                        compatible = "arm,cortex-a9";
-                        reg = <0xA00>;
-                        clocks = <&clock CLK_ARM_CLK>;
-                        clock-names = "cpu";
-                        operating-points-v2 = <&cpu0_opp_table>;
-                        cooling-min-level = <13>;
-                        cooling-max-level = <7>;
-                        #cooling-cells = <2>; /* min followed by max */
-                };
-
-                cpu@A01 {
-                        device_type = "cpu";
-                        compatible = "arm,cortex-a9";
-                        reg = <0xA01>;
-                        operating-points-v2 = <&cpu0_opp_table>;
-                };
-        };
-
-        cpu0_opp_table: opp_table0 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp00 {
-                        opp-hz = /bits/ 64 <200000000>;
-                        opp-microvolt = <900000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp01 {
-                        opp-hz = /bits/ 64 <300000000>;
-                        opp-microvolt = <900000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp02 {
-                        opp-hz = /bits/ 64 <400000000>;
-                        opp-microvolt = <925000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp03 {
-                        opp-hz = /bits/ 64 <500000000>;
-                        opp-microvolt = <950000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp04 {
-                        opp-hz = /bits/ 64 <600000000>;
-                        opp-microvolt = <975000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp05 {
-                        opp-hz = /bits/ 64 <700000000>;
-                        opp-microvolt = <987500>;
-                        clock-latency-ns = <200000>;
-                };
-                opp06 {
-                        opp-hz = /bits/ 64 <800000000>;
-                        opp-microvolt = <1000000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp07 {
-                        opp-hz = /bits/ 64 <900000000>;
-                        opp-microvolt = <1037500>;
-                        clock-latency-ns = <200000>;
-                };
-                opp08 {
-                        opp-hz = /bits/ 64 <1000000000>;
-                        opp-microvolt = <1087500>;
-                        clock-latency-ns = <200000>;
-                };
-                opp09 {
-                        opp-hz = /bits/ 64 <1100000000>;
-                        opp-microvolt = <1137500>;
-                        clock-latency-ns = <200000>;
-                };
-                opp10 {
-                        opp-hz = /bits/ 64 <1200000000>;
-                        opp-microvolt = <1187500>;
-                        clock-latency-ns = <200000>;
-                };
-                opp11 {
-                        opp-hz = /bits/ 64 <1300000000>;
-                        opp-microvolt = <1250000>;
-                        clock-latency-ns = <200000>;
-                };
-                opp12 {
-                        opp-hz = /bits/ 64 <1400000000>;
-                        opp-microvolt = <1287500>;
-                        clock-latency-ns = <200000>;
-                };
-                opp13 {
-                        opp-hz = /bits/ 64 <1500000000>;
-                        opp-microvolt = <1350000>;
-                        clock-latency-ns = <200000>;
-                        turbo-mode;
-                };
-        };
-};
-
-&combiner {
-        samsung,combiner-nr = <18>;
-};
-
-&gic {
-        cpu-offset = <0x8000>;
-};
diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts
index 76d87f397178..d66093084dbb 100644
--- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
+++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
@@ -82,17 +82,6 @@
                 compatible = "simple-audio-card";
                 simple-audio-card,name = "wm-sound";
 
-                assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
-                                <&clock_audss EXYNOS_MOUT_I2S>,
-                                <&clock_audss EXYNOS_DOUT_SRP>,
-                                <&clock_audss EXYNOS_DOUT_AUD_BUS>;
-                assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
-                                <&clock_audss EXYNOS_MOUT_AUDSS>;
-                assigned-clock-rates = <0>,
-                                <0>,
-                                <112896000>,
-                                <11289600>;
-
                 simple-audio-card,format = "i2s";
                 simple-audio-card,bitclock-master = <&link0_codec>;
                 simple-audio-card,frame-master = <&link0_codec>;
@@ -145,6 +134,16 @@
         status = "okay";
 };
 
+&clock_audss {
+        assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+                        <&clock_audss EXYNOS_MOUT_I2S>,
+                        <&clock_audss EXYNOS_DOUT_SRP>,
+                        <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+        assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
+                        <&clock_audss EXYNOS_MOUT_AUDSS>;
+        assigned-clock-rates = <0>, <0>, <112896000>, <11289600>;
+};
+
 &ehci {
         status = "okay";
         /* In order to reset USB ethernet */
@@ -198,10 +197,6 @@
         pinctrl-0 = <&i2s0_bus>;
         pinctrl-names = "default";
         status = "okay";
-        clocks = <&clock_audss EXYNOS_I2S_BUS>,
-                 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
-                 <&clock_audss EXYNOS_SCLK_I2S>;
-        clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 };
 
 &pinctrl_1 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 8aa19ba14436..78f118cb73d4 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -43,16 +43,6 @@
 
         sound: sound {
                 compatible = "simple-audio-card";
-                assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
-                                <&clock_audss EXYNOS_MOUT_I2S>,
-                                <&clock_audss EXYNOS_DOUT_SRP>,
-                                <&clock_audss EXYNOS_DOUT_AUD_BUS>;
-                assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
-                                <&clock_audss EXYNOS_MOUT_AUDSS>;
-                assigned-clock-rates = <0>,
-                                <0>,
-                                <192000000>,
-                                <19200000>;
 
                 simple-audio-card,format = "i2s";
                 simple-audio-card,bitclock-master = <&link0_codec>;
@@ -97,11 +87,11 @@
         thermal-zones {
                 cpu_thermal: cpu-thermal {
                         cooling-maps {
-                                map0 {
+                                cooling_map0: map0 {
                                      /* Corresponds to 800MHz at freq_table */
                                      cooling-device = <&cpu0 7 7>;
                                 };
-                                map1 {
+                                cooling_map1: map1 {
                                      /* Corresponds to 200MHz at freq_table */
                                      cooling-device = <&cpu0 13 13>;
                                };
@@ -157,6 +147,16 @@
         status = "okay";
 };
 
+&clock_audss {
+        assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+                        <&clock_audss EXYNOS_MOUT_I2S>,
+                        <&clock_audss EXYNOS_DOUT_SRP>,
+                        <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+        assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
+                        <&clock_audss EXYNOS_MOUT_AUDSS>;
+        assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
+};
+
 &cpu0 {
         cpu0-supply = <&buck2_reg>;
 };
@@ -503,10 +503,6 @@
         pinctrl-0 = <&i2s0_bus>;
         pinctrl-names = "default";
         status = "okay";
-        clocks = <&clock_audss EXYNOS_I2S_BUS>,
-                 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
-                 <&clock_audss EXYNOS_SCLK_I2S>;
-        clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 };
 
 &mixer {
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 99634c54dca9..7504a5aa538e 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 #include "exynos4412-odroid-common.dtsi"
+#include "exynos4412-prime.dtsi"
 
 / {
         model = "Hardkernel ODROID-U3 board based on Exynos4412";
@@ -47,11 +48,11 @@
                         cooling-maps {
                                 map0 {
                                      trip = <&cpu_alert1>;
-                                     cooling-device = <&cpu0 7 7>;
+                                     cooling-device = <&cpu0 9 9>;
                                 };
                                 map1 {
                                      trip = <&cpu_alert2>;
-                                     cooling-device = <&cpu0 13 13>;
+                                     cooling-device = <&cpu0 15 15>;
                                 };
                                 map2 {
                                      trip = <&cpu_alert0>;
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 153a75fe6e24..46b931eec228 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -100,3 +100,16 @@
 &serial_3 {
         status = "okay";
 };
+
+&sound {
+        simple-audio-card,name = "Odroid-X";
+        simple-audio-card,widgets =
+                "Headphone", "Headphone Jack",
+                "Microphone", "Mic Jack",
+                "Microphone", "DMIC";
+        simple-audio-card,routing =
+                "Headphone Jack", "HPL",
+                "Headphone Jack", "HPR",
+                "IN1", "Mic Jack",
+                "Mic Jack", "MICBIAS";
+};
diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts
index 4d228858f172..d867b2ee95ca 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx2.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts
@@ -12,6 +12,7 @@
 */
 
 #include "exynos4412-odroidx.dts"
+#include "exynos4412-prime.dtsi"
 
 / {
         model = "Hardkernel ODROID-X2 board based on Exynos4412";
@@ -22,27 +23,3 @@
                 reg = <0x40000000 0x7FF00000>;
         };
 };
-
-/* VDDQ for MSHC (eMMC card) */
-&buck8_reg {
-        regulator-name = "BUCK8_VDDQ_MMC4_2.8V";
-        regulator-min-microvolt = <2800000>;
-        regulator-max-microvolt = <2800000>;
-};
-
-&mshc_0 {
-        vqmmc-supply = <&buck8_reg>;
-};
-
-&sound {
-        simple-audio-card,name = "Odroid-X2";
-        simple-audio-card,widgets =
-                "Headphone", "Headphone Jack",
-                "Microphone", "Mic Jack",
-                "Microphone", "DMIC";
-        simple-audio-card,routing =
-                "Headphone Jack", "HPL",
-                "Headphone Jack", "HPR",
-                "IN1", "Mic Jack",
-                "Mic Jack", "MICBIAS";
-};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
index 2f866f6e5838..1d27c28564e4 100644
--- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
@@ -1,10 +1,10 @@
 /*
- * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
+ * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
  *
  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
- * Samsung's Exynos4x12 SoCs pin-mux and pin-config optiosn are listed as device
+ * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
  * tree nodes are listed in this file.
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/arch/arm/boot/dts/exynos4412-prime.dtsi b/arch/arm/boot/dts/exynos4412-prime.dtsi
new file mode 100644
index 000000000000..e75bc170c89c
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-prime.dtsi
@@ -0,0 +1,41 @@
+/*
+ * Samsung's Exynos4412 Prime SoC device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Exynos4412 Prime SoC revision supports higher CPU frequencies than
+ * non-Prime version.  Therefore we need to update OPPs table and
+ * thermal maps accordingly.
+ */
+
+&cpu0_opp_1500 {
+        /delete-property/turbo-mode;
+};
+
+&cpu0_opp_table {
+        opp@1600000000 {
+                opp-hz = /bits/ 64 <1600000000>;
+                opp-microvolt = <1350000>;
+                clock-latency-ns = <200000>;
+        };
+        opp@1704000000 {
+                opp-hz = /bits/ 64 <1704000000>;
+                opp-microvolt = <1350000>;
+                clock-latency-ns = <200000>;
+        };
+};
+
+&cooling_map0 {
+        cooling-device = <&cpu0 9 9>;
+};
+
+&cooling_map1 {
+        cooling-device = <&cpu0 15 15>;
+};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 40beede46e55..235bbb69ad7c 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -17,11 +17,23 @@
  * published by the Free Software Foundation.
 */
 
-#include "exynos4x12.dtsi"
+#include "exynos4.dtsi"
+#include "exynos4412-pinctrl.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
 
 / {
         compatible = "samsung,exynos4412", "samsung,exynos4";
 
+        aliases {
+                pinctrl0 = &pinctrl_0;
+                pinctrl1 = &pinctrl_1;
+                pinctrl2 = &pinctrl_2;
+                pinctrl3 = &pinctrl_3;
+                fimc-lite0 = &fimc_lite_0;
+                fimc-lite1 = &fimc_lite_1;
+                mshc0 = &mshc_0;
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -130,7 +142,7 @@
                         opp-microvolt = <1287500>;
                         clock-latency-ns = <200000>;
                 };
-                opp@1500000000 {
+                cpu0_opp_1500: opp@1500000000 {
                         opp-hz = /bits/ 64 <1500000000>;
                         opp-microvolt = <1350000>;
                         clock-latency-ns = <200000>;
@@ -138,19 +150,573 @@
                 };
         };
 
+        sysram@02020000 {
+                compatible = "mmio-sram";
+                reg = <0x02020000 0x40000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges = <0 0x02020000 0x40000>;
+
+                smp-sysram@0 {
+                        compatible = "samsung,exynos4210-sysram";
+                        reg = <0x0 0x1000>;
+                };
+
+                smp-sysram@2f000 {
+                        compatible = "samsung,exynos4210-sysram-ns";
+                        reg = <0x2f000 0x1000>;
+                };
+        };
+
+        pd_isp: isp-power-domain@10023CA0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CA0 0x20>;
+                #power-domain-cells = <0>;
+                label = "ISP";
+        };
+
+        l2c: l2-cache-controller@10502000 {
+                compatible = "arm,pl310-cache";
+                reg = <0x10502000 0x1000>;
+                cache-unified;
+                cache-level = <2>;
+                arm,tag-latency = <2 2 1>;
+                arm,data-latency = <3 2 1>;
+                arm,double-linefill = <1>;
+                arm,double-linefill-incr = <0>;
+                arm,double-linefill-wrap = <1>;
+                arm,prefetch-drop = <1>;
+                arm,prefetch-offset = <7>;
+        };
+
+        clock: clock-controller@10030000 {
+                compatible = "samsung,exynos4412-clock";
+                reg = <0x10030000 0x20000>;
+                #clock-cells = <1>;
+        };
+
+        mct@10050000 {
+                compatible = "samsung,exynos4412-mct";
+                reg = <0x10050000 0x800>;
+                interrupt-parent = <&mct_map>;
+                interrupts = <0>, <1>, <2>, <3>, <4>;
+                clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
+                clock-names = "fin_pll", "mct";
+
+                mct_map: mct-map {
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+                                        <1 &combiner 12 5>,
+                                        <2 &combiner 12 6>,
+                                        <3 &combiner 12 7>,
+                                        <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
+                };
+        };
+
+        adc: adc@126C0000 {
+                compatible = "samsung,exynos-adc-v1";
+                reg = <0x126C0000 0x100>;
+                interrupt-parent = <&combiner>;
+                interrupts = <10 3>;
+                clocks = <&clock CLK_TSADC>;
+                clock-names = "adc";
+                #io-channel-cells = <1>;
+                io-channel-ranges;
+                samsung,syscon-phandle = <&pmu_system_controller>;
+                status = "disabled";
+        };
+
+        g2d: g2d@10800000 {
+                compatible = "samsung,exynos4212-g2d";
+                reg = <0x10800000 0x1000>;
+                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
+                clock-names = "sclk_fimg2d", "fimg2d";
+                iommus = <&sysmmu_g2d>;
+        };
+
+        camera {
+                clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
+                         <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
+                clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
+
+                /* fimc_[0-3] are configured outside, under phandles */
+                fimc_lite_0: fimc-lite@12390000 {
+                        compatible = "samsung,exynos4212-fimc-lite";
+                        reg = <0x12390000 0x1000>;
+                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                        power-domains = <&pd_isp>;
+                        clocks = <&clock CLK_FIMC_LITE0>;
+                        clock-names = "flite";
+                        iommus = <&sysmmu_fimc_lite0>;
+                        status = "disabled";
+                };
+
+                fimc_lite_1: fimc-lite@123A0000 {
+                        compatible = "samsung,exynos4212-fimc-lite";
+                        reg = <0x123A0000 0x1000>;
+                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                        power-domains = <&pd_isp>;
+                        clocks = <&clock CLK_FIMC_LITE1>;
+                        clock-names = "flite";
+                        iommus = <&sysmmu_fimc_lite1>;
+                        status = "disabled";
+                };
+
+                fimc_is: fimc-is@12000000 {
+                        compatible = "samsung,exynos4212-fimc-is";
+                        reg = <0x12000000 0x260000>;
+                        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+                        power-domains = <&pd_isp>;
+                        clocks = <&clock CLK_FIMC_LITE0>,
+                                 <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
+                                 <&clock CLK_PPMUISPMX>,
+                                 <&clock CLK_MOUT_MPLL_USER_T>,
+                                 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
+                                 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
+                                 <&clock CLK_GICISP>, <&clock CLK_MCUCTL_ISP>,
+                                 <&clock CLK_PWM_ISP>,
+                                 <&clock CLK_DIV_ISP0>, <&clock CLK_DIV_ISP1>,
+                                 <&clock CLK_DIV_MCUISP0>,
+                                 <&clock CLK_DIV_MCUISP1>,
+                                 <&clock CLK_UART_ISP_SCLK>,
+                                 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
+                                 <&clock CLK_ACLK400_MCUISP>,
+                                 <&clock CLK_DIV_ACLK400_MCUISP>;
+                        clock-names = "lite0", "lite1", "ppmuispx",
+                                      "ppmuispmx", "mpll", "isp",
+                                      "drc", "fd", "mcuisp",
+                                      "gicisp", "mcuctl_isp", "pwm_isp",
+                                      "ispdiv0", "ispdiv1", "mcuispdiv0",
+                                      "mcuispdiv1", "uart", "aclk200",
+                                      "div_aclk200", "aclk400mcuisp",
+                                      "div_aclk400mcuisp";
+                        iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
+                                 <&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
+                        iommu-names = "isp", "drc", "fd", "mcuctl";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+                        status = "disabled";
+
+                        pmu@10020000 {
+                                reg = <0x10020000 0x3000>;
+                        };
+
+                        i2c1_isp: i2c-isp@12140000 {
+                                compatible = "samsung,exynos4212-i2c-isp";
+                                reg = <0x12140000 0x100>;
+                                clocks = <&clock CLK_I2C1_ISP>;
+                                clock-names = "i2c_isp";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+                };
+        };
+
+        mshc_0: mmc@12550000 {
+                compatible = "samsung,exynos4412-dw-mshc";
+                reg = <0x12550000 0x1000>;
+                interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                fifo-depth = <0x80>;
+                clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
+                clock-names = "biu", "ciu";
+                status = "disabled";
+        };
+
+        sysmmu_g2d: sysmmu@10A40000{
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x10A40000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <4 7>;
+                clock-names = "sysmmu", "master";
+                clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
+                #iommu-cells = <0>;
+        };
+
+        sysmmu_fimc_isp: sysmmu@12260000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x12260000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <16 2>;
+                power-domains = <&pd_isp>;
+                clock-names = "sysmmu";
+                clocks = <&clock CLK_SMMU_ISP>;
+                #iommu-cells = <0>;
+        };
+
+        sysmmu_fimc_drc: sysmmu@12270000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x12270000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <16 3>;
+                power-domains = <&pd_isp>;
+                clock-names = "sysmmu";
+                clocks = <&clock CLK_SMMU_DRC>;
+                #iommu-cells = <0>;
+        };
+
+        sysmmu_fimc_fd: sysmmu@122A0000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x122A0000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <16 4>;
+                power-domains = <&pd_isp>;
+                clock-names = "sysmmu";
+                clocks = <&clock CLK_SMMU_FD>;
+                #iommu-cells = <0>;
+        };
+
+        sysmmu_fimc_mcuctl: sysmmu@122B0000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x122B0000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <16 5>;
+                power-domains = <&pd_isp>;
+                clock-names = "sysmmu";
+                clocks = <&clock CLK_SMMU_ISPCX>;
+                #iommu-cells = <0>;
+        };
+
+        sysmmu_fimc_lite0: sysmmu@123B0000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x123B0000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <16 0>;
+                power-domains = <&pd_isp>;
+                clock-names = "sysmmu", "master";
+                clocks = <&clock CLK_SMMU_LITE0>, <&clock CLK_FIMC_LITE0>;
+                #iommu-cells = <0>;
+        };
+
+        sysmmu_fimc_lite1: sysmmu@123C0000 {
+                compatible = "samsung,exynos-sysmmu";
+                reg = <0x123C0000 0x1000>;
+                interrupt-parent = <&combiner>;
+                interrupts = <16 1>;
+                power-domains = <&pd_isp>;
+                clock-names = "sysmmu", "master";
+                clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
+                #iommu-cells = <0>;
+        };
+
+        bus_dmc: bus_dmc {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_DIV_DMC>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_dmc_opp_table>;
+                status = "disabled";
+        };
+
+        bus_acp: bus_acp {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_DIV_ACP>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_acp_opp_table>;
+                status = "disabled";
+        };
+
+        bus_c2c: bus_c2c {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_DIV_C2C>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_dmc_opp_table>;
+                status = "disabled";
+        };
+
+        bus_dmc_opp_table: opp_table1 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@100000000 {
+                        opp-hz = /bits/ 64 <100000000>;
+                        opp-microvolt = <900000>;
+                };
+                opp@134000000 {
+                        opp-hz = /bits/ 64 <134000000>;
+                        opp-microvolt = <900000>;
+                };
+                opp@160000000 {
+                        opp-hz = /bits/ 64 <160000000>;
+                        opp-microvolt = <900000>;
+                };
+                opp@267000000 {
+                        opp-hz = /bits/ 64 <267000000>;
+                        opp-microvolt = <950000>;
+                };
+                opp@400000000 {
+                        opp-hz = /bits/ 64 <400000000>;
+                        opp-microvolt = <1050000>;
+                };
+        };
+
+        bus_acp_opp_table: opp_table2 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@100000000 {
+                        opp-hz = /bits/ 64 <100000000>;
+                };
+                opp@134000000 {
+                        opp-hz = /bits/ 64 <134000000>;
+                };
+                opp@160000000 {
+                        opp-hz = /bits/ 64 <160000000>;
+                };
+                opp@267000000 {
+                        opp-hz = /bits/ 64 <267000000>;
+                };
+        };
+
+        bus_leftbus: bus_leftbus {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_DIV_GDL>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_leftbus_opp_table>;
+                status = "disabled";
+        };
+
+        bus_rightbus: bus_rightbus {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_DIV_GDR>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_leftbus_opp_table>;
+                status = "disabled";
+        };
+
+        bus_display: bus_display {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_ACLK160>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_display_opp_table>;
+                status = "disabled";
+        };
+
+        bus_fsys: bus_fsys {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_ACLK133>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_fsys_opp_table>;
+                status = "disabled";
+        };
+
+        bus_peri: bus_peri {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_ACLK100>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_peri_opp_table>;
+                status = "disabled";
+        };
+
+        bus_mfc: bus_mfc {
+                compatible = "samsung,exynos-bus";
+                clocks = <&clock CLK_SCLK_MFC>;
+                clock-names = "bus";
+                operating-points-v2 = <&bus_leftbus_opp_table>;
+                status = "disabled";
+        };
+
+        bus_leftbus_opp_table: opp_table3 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@100000000 {
+                        opp-hz = /bits/ 64 <100000000>;
+                        opp-microvolt = <900000>;
+                };
+                opp@134000000 {
+                        opp-hz = /bits/ 64 <134000000>;
+                        opp-microvolt = <925000>;
+                };
+                opp@160000000 {
+                        opp-hz = /bits/ 64 <160000000>;
+                        opp-microvolt = <950000>;
+                };
+                opp@200000000 {
+                        opp-hz = /bits/ 64 <200000000>;
+                        opp-microvolt = <1000000>;
+                };
+        };
+
+        bus_display_opp_table: opp_table4 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@160000000 {
+                        opp-hz = /bits/ 64 <160000000>;
+                };
+                opp@200000000 {
+                        opp-hz = /bits/ 64 <200000000>;
+                };
+        };
+
+        bus_fsys_opp_table: opp_table5 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@100000000 {
+                        opp-hz = /bits/ 64 <100000000>;
+                };
+                opp@134000000 {
+                        opp-hz = /bits/ 64 <134000000>;
+                };
+        };
+
+        bus_peri_opp_table: opp_table6 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@50000000 {
+                        opp-hz = /bits/ 64 <50000000>;
+                };
+                opp@100000000 {
+                        opp-hz = /bits/ 64 <100000000>;
+                };
+        };
+
         pmu {
                 interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
         };
 };
 
-&pmu_system_controller {
-        compatible = "samsung,exynos4412-pmu", "syscon";
-};
-
 &combiner {
         samsung,combiner-nr = <20>;
+        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&exynos_usbphy {
+        compatible = "samsung,exynos4x12-usb2-phy";
+        samsung,sysreg-phandle = <&sys_reg>;
+};
+
+&fimc_0 {
+        compatible = "samsung,exynos4212-fimc";
+        samsung,pix-limits = <4224 8192 1920 4224>;
+        samsung,mainscaler-ext;
+        samsung,isp-wb;
+        samsung,cam-if;
+};
+
+&fimc_1 {
+        compatible = "samsung,exynos4212-fimc";
+        samsung,pix-limits = <4224 8192 1920 4224>;
+        samsung,mainscaler-ext;
+        samsung,isp-wb;
+        samsung,cam-if;
+};
+
+&fimc_2 {
+        compatible = "samsung,exynos4212-fimc";
+        samsung,pix-limits = <4224 8192 1920 4224>;
+        samsung,mainscaler-ext;
+        samsung,isp-wb;
+        samsung,lcd-wb;
+        samsung,cam-if;
+};
+
+&fimc_3 {
+        compatible = "samsung,exynos4212-fimc";
+        samsung,pix-limits = <1920 8192 1366 1920>;
+        samsung,rotators = <0>;
+        samsung,mainscaler-ext;
+        samsung,isp-wb;
+        samsung,lcd-wb;
 };
 
 &gic {
         cpu-offset = <0x4000>;
 };
+
+&hdmi {
+        compatible = "samsung,exynos4212-hdmi";
+};
+
+&jpeg_codec {
+        compatible = "samsung,exynos4212-jpeg";
+};
+
+&rotator {
+        compatible = "samsung,exynos4212-rotator";
+};
+
+&mixer {
+        compatible = "samsung,exynos4212-mixer";
+        clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
+        clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
+                 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
+};
+
+&pinctrl_0 {
+        compatible = "samsung,exynos4x12-pinctrl";
+        reg = <0x11400000 0x1000>;
+        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&pinctrl_1 {
+        compatible = "samsung,exynos4x12-pinctrl";
+        reg = <0x11000000 0x1000>;
+        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+
+        wakup_eint: wakeup-interrupt-controller {
+                compatible = "samsung,exynos4210-wakeup-eint";
+                interrupt-parent = <&gic>;
+                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+        };
+};
+
+&pinctrl_2 {
+        compatible = "samsung,exynos4x12-pinctrl";
+        reg = <0x03860000 0x1000>;
+        interrupt-parent = <&combiner>;
+        interrupts = <10 0>;
+};
+
+&pinctrl_3 {
+        compatible = "samsung,exynos4x12-pinctrl";
+        reg = <0x106E0000 0x1000>;
+        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&pmu_system_controller {
+        compatible = "samsung,exynos4412-pmu", "syscon";
+        clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
+                        "clkout4", "clkout8", "clkout9";
+        clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
+                <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
+                <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
+        #clock-cells = <1>;
+};
+
+&tmu {
+        compatible = "samsung,exynos4412-tmu";
+        interrupt-parent = <&combiner>;
+        interrupts = <2 4>;
+        reg = <0x100C0000 0x100>;
+        clocks = <&clock 383>;
+        clock-names = "tmu_apbif";
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
deleted file mode 100644
index 85a7122658f1..000000000000
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ /dev/null
@@ -1,594 +0,0 @@
-/*
- * Samsung's Exynos4x12 SoCs device tree source
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
- * based board files can include this file and provide values for board specfic
- * bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
- * nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include "exynos4.dtsi"
-#include "exynos4x12-pinctrl.dtsi"
-#include "exynos4-cpu-thermal.dtsi"
-
-/ {
-        aliases {
-                pinctrl0 = &pinctrl_0;
-                pinctrl1 = &pinctrl_1;
-                pinctrl2 = &pinctrl_2;
-                pinctrl3 = &pinctrl_3;
-                fimc-lite0 = &fimc_lite_0;
-                fimc-lite1 = &fimc_lite_1;
-                mshc0 = &mshc_0;
-        };
-
-        sysram@02020000 {
-                compatible = "mmio-sram";
-                reg = <0x02020000 0x40000>;
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges = <0 0x02020000 0x40000>;
-
-                smp-sysram@0 {
-                        compatible = "samsung,exynos4210-sysram";
-                        reg = <0x0 0x1000>;
-                };
-
-                smp-sysram@2f000 {
-                        compatible = "samsung,exynos4210-sysram-ns";
-                        reg = <0x2f000 0x1000>;
-                };
-        };
-
-        pd_isp: isp-power-domain@10023CA0 {
-                compatible = "samsung,exynos4210-pd";
-                reg = <0x10023CA0 0x20>;
-                #power-domain-cells = <0>;
-        };
-
-        l2c: l2-cache-controller@10502000 {
-                compatible = "arm,pl310-cache";
-                reg = <0x10502000 0x1000>;
-                cache-unified;
-                cache-level = <2>;
-                arm,tag-latency = <2 2 1>;
-                arm,data-latency = <3 2 1>;
-                arm,double-linefill = <1>;
-                arm,double-linefill-incr = <0>;
-                arm,double-linefill-wrap = <1>;
-                arm,prefetch-drop = <1>;
-                arm,prefetch-offset = <7>;
-        };
-
-        clock: clock-controller@10030000 {
-                compatible = "samsung,exynos4412-clock";
-                reg = <0x10030000 0x20000>;
-                #clock-cells = <1>;
-        };
-
-        mct@10050000 {
-                compatible = "samsung,exynos4412-mct";
-                reg = <0x10050000 0x800>;
-                interrupt-parent = <&mct_map>;
-                interrupts = <0>, <1>, <2>, <3>, <4>;
-                clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
-                clock-names = "fin_pll", "mct";
-
-                mct_map: mct-map {
-                        #interrupt-cells = <1>;
-                        #address-cells = <0>;
-                        #size-cells = <0>;
-                        interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
-                                        <1 &combiner 12 5>,
-                                        <2 &combiner 12 6>,
-                                        <3 &combiner 12 7>,
-                                        <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
-                };
-        };
-
-        adc: adc@126C0000 {
-                compatible = "samsung,exynos-adc-v1";
-                reg = <0x126C0000 0x100>;
-                interrupt-parent = <&combiner>;
-                interrupts = <10 3>;
-                clocks = <&clock CLK_TSADC>;
-                clock-names = "adc";
-                #io-channel-cells = <1>;
-                io-channel-ranges;
-                samsung,syscon-phandle = <&pmu_system_controller>;
-                status = "disabled";
-        };
-
-        g2d: g2d@10800000 {
-                compatible = "samsung,exynos4212-g2d";
-                reg = <0x10800000 0x1000>;
-                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
-                clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
-                clock-names = "sclk_fimg2d", "fimg2d";
-                iommus = <&sysmmu_g2d>;
-        };
-
-        camera {
-                clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
-                         <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
-                clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
-
-                /* fimc_[0-3] are configured outside, under phandles */
-                fimc_lite_0: fimc-lite@12390000 {
-                        compatible = "samsung,exynos4212-fimc-lite";
-                        reg = <0x12390000 0x1000>;
-                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
-                        power-domains = <&pd_isp>;
-                        clocks = <&clock CLK_FIMC_LITE0>;
-                        clock-names = "flite";
-                        iommus = <&sysmmu_fimc_lite0>;
-                        status = "disabled";
-                };
-
-                fimc_lite_1: fimc-lite@123A0000 {
-                        compatible = "samsung,exynos4212-fimc-lite";
-                        reg = <0x123A0000 0x1000>;
-                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
-                        power-domains = <&pd_isp>;
-                        clocks = <&clock CLK_FIMC_LITE1>;
-                        clock-names = "flite";
-                        iommus = <&sysmmu_fimc_lite1>;
-                        status = "disabled";
-                };
-
-                fimc_is: fimc-is@12000000 {
-                        compatible = "samsung,exynos4212-fimc-is";
-                        reg = <0x12000000 0x260000>;
-                        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
-                                     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
-                        power-domains = <&pd_isp>;
-                        clocks = <&clock CLK_FIMC_LITE0>,
-                                 <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
-                                 <&clock CLK_PPMUISPMX>,
-                                 <&clock CLK_MOUT_MPLL_USER_T>,
-                                 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
-                                 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
-                                 <&clock CLK_GICISP>, <&clock CLK_MCUCTL_ISP>,
-                                 <&clock CLK_PWM_ISP>,
-                                 <&clock CLK_DIV_ISP0>, <&clock CLK_DIV_ISP1>,
-                                 <&clock CLK_DIV_MCUISP0>,
-                                 <&clock CLK_DIV_MCUISP1>,
-                                 <&clock CLK_UART_ISP_SCLK>,
-                                 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
-                                 <&clock CLK_ACLK400_MCUISP>,
-                                 <&clock CLK_DIV_ACLK400_MCUISP>;
-                        clock-names = "lite0", "lite1", "ppmuispx",
-                                      "ppmuispmx", "mpll", "isp",
-                                      "drc", "fd", "mcuisp",
-                                      "gicisp", "mcuctl_isp", "pwm_isp",
-                                      "ispdiv0", "ispdiv1", "mcuispdiv0",
-                                      "mcuispdiv1", "uart", "aclk200",
-                                      "div_aclk200", "aclk400mcuisp",
-                                      "div_aclk400mcuisp";
-                        iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
-                                 <&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
-                        iommu-names = "isp", "drc", "fd", "mcuctl";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        ranges;
-                        status = "disabled";
-
-                        pmu@10020000 {
-                                reg = <0x10020000 0x3000>;
-                        };
-
-                        i2c1_isp: i2c-isp@12140000 {
-                                compatible = "samsung,exynos4212-i2c-isp";
-                                reg = <0x12140000 0x100>;
-                                clocks = <&clock CLK_I2C1_ISP>;
-                                clock-names = "i2c_isp";
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                        };
-                };
-        };
-
-        mshc_0: mmc@12550000 {
-                compatible = "samsung,exynos4412-dw-mshc";
-                reg = <0x12550000 0x1000>;
-                interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
-                #address-cells = <1>;
-                #size-cells = <0>;
-                fifo-depth = <0x80>;
-                clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
-                clock-names = "biu", "ciu";
-                status = "disabled";
-        };
-
-        sysmmu_g2d: sysmmu@10A40000{
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x10A40000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <4 7>;
-                clock-names = "sysmmu", "master";
-                clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
-                #iommu-cells = <0>;
-        };
-
-        sysmmu_fimc_isp: sysmmu@12260000 {
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x12260000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <16 2>;
-                power-domains = <&pd_isp>;
-                clock-names = "sysmmu";
-                clocks = <&clock CLK_SMMU_ISP>;
-                #iommu-cells = <0>;
-        };
-
-        sysmmu_fimc_drc: sysmmu@12270000 {
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x12270000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <16 3>;
-                power-domains = <&pd_isp>;
-                clock-names = "sysmmu";
-                clocks = <&clock CLK_SMMU_DRC>;
-                #iommu-cells = <0>;
-        };
-
-        sysmmu_fimc_fd: sysmmu@122A0000 {
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x122A0000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <16 4>;
-                power-domains = <&pd_isp>;
-                clock-names = "sysmmu";
-                clocks = <&clock CLK_SMMU_FD>;
-                #iommu-cells = <0>;
-        };
-
-        sysmmu_fimc_mcuctl: sysmmu@122B0000 {
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x122B0000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <16 5>;
-                power-domains = <&pd_isp>;
-                clock-names = "sysmmu";
-                clocks = <&clock CLK_SMMU_ISPCX>;
-                #iommu-cells = <0>;
-        };
-
-        sysmmu_fimc_lite0: sysmmu@123B0000 {
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x123B0000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <16 0>;
-                power-domains = <&pd_isp>;
-                clock-names = "sysmmu", "master";
-                clocks = <&clock CLK_SMMU_LITE0>, <&clock CLK_FIMC_LITE0>;
-                #iommu-cells = <0>;
-        };
-
-        sysmmu_fimc_lite1: sysmmu@123C0000 {
-                compatible = "samsung,exynos-sysmmu";
-                reg = <0x123C0000 0x1000>;
-                interrupt-parent = <&combiner>;
-                interrupts = <16 1>;
-                power-domains = <&pd_isp>;
-                clock-names = "sysmmu", "master";
-                clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
-                #iommu-cells = <0>;
-        };
-
-        bus_dmc: bus_dmc {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_DIV_DMC>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_dmc_opp_table>;
-                status = "disabled";
-        };
-
-        bus_acp: bus_acp {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_DIV_ACP>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_acp_opp_table>;
-                status = "disabled";
-        };
-
-        bus_c2c: bus_c2c {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_DIV_C2C>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_dmc_opp_table>;
-                status = "disabled";
-        };
-
-        bus_dmc_opp_table: opp_table1 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp@100000000 {
-                        opp-hz = /bits/ 64 <100000000>;
-                        opp-microvolt = <900000>;
-                };
-                opp@134000000 {
-                        opp-hz = /bits/ 64 <134000000>;
-                        opp-microvolt = <900000>;
-                };
-                opp@160000000 {
-                        opp-hz = /bits/ 64 <160000000>;
-                        opp-microvolt = <900000>;
-                };
-                opp@267000000 {
-                        opp-hz = /bits/ 64 <267000000>;
-                        opp-microvolt = <950000>;
-                };
-                opp@400000000 {
-                        opp-hz = /bits/ 64 <400000000>;
-                        opp-microvolt = <1050000>;
-                };
-        };
-
-        bus_acp_opp_table: opp_table2 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp@100000000 {
-                        opp-hz = /bits/ 64 <100000000>;
-                };
-                opp@134000000 {
-                        opp-hz = /bits/ 64 <134000000>;
-                };
-                opp@160000000 {
-                        opp-hz = /bits/ 64 <160000000>;
-                };
-                opp@267000000 {
-                        opp-hz = /bits/ 64 <267000000>;
-                };
-        };
-
-        bus_leftbus: bus_leftbus {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_DIV_GDL>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_leftbus_opp_table>;
-                status = "disabled";
-        };
-
-        bus_rightbus: bus_rightbus {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_DIV_GDR>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_leftbus_opp_table>;
-                status = "disabled";
-        };
-
-        bus_display: bus_display {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_ACLK160>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_display_opp_table>;
-                status = "disabled";
-        };
-
-        bus_fsys: bus_fsys {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_ACLK133>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_fsys_opp_table>;
-                status = "disabled";
-        };
-
-        bus_peri: bus_peri {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_ACLK100>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_peri_opp_table>;
-                status = "disabled";
-        };
-
-        bus_mfc: bus_mfc {
-                compatible = "samsung,exynos-bus";
-                clocks = <&clock CLK_SCLK_MFC>;
-                clock-names = "bus";
-                operating-points-v2 = <&bus_leftbus_opp_table>;
-                status = "disabled";
-        };
-
-        bus_leftbus_opp_table: opp_table3 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp@100000000 {
-                        opp-hz = /bits/ 64 <100000000>;
-                        opp-microvolt = <900000>;
-                };
-                opp@134000000 {
-                        opp-hz = /bits/ 64 <134000000>;
-                        opp-microvolt = <925000>;
-                };
-                opp@160000000 {
-                        opp-hz = /bits/ 64 <160000000>;
-                        opp-microvolt = <950000>;
-                };
-                opp@200000000 {
-                        opp-hz = /bits/ 64 <200000000>;
-                        opp-microvolt = <1000000>;
-                };
-        };
-
-        bus_display_opp_table: opp_table4 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp@160000000 {
-                        opp-hz = /bits/ 64 <160000000>;
-                };
-                opp@200000000 {
-                        opp-hz = /bits/ 64 <200000000>;
-                };
-        };
-
-        bus_fsys_opp_table: opp_table5 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp@100000000 {
-                        opp-hz = /bits/ 64 <100000000>;
-                };
-                opp@134000000 {
-                        opp-hz = /bits/ 64 <134000000>;
-                };
-        };
-
-        bus_peri_opp_table: opp_table6 {
-                compatible = "operating-points-v2";
-                opp-shared;
-
-                opp@50000000 {
-                        opp-hz = /bits/ 64 <50000000>;
-                };
-                opp@100000000 {
-                        opp-hz = /bits/ 64 <100000000>;
-                };
-        };
-};
-
-&combiner {
-        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
-                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-};
-
-&exynos_usbphy {
-        compatible = "samsung,exynos4x12-usb2-phy";
-        samsung,sysreg-phandle = <&sys_reg>;
-};
-
-&fimc_0 {
-        compatible = "samsung,exynos4212-fimc";
-        samsung,pix-limits = <4224 8192 1920 4224>;
-        samsung,mainscaler-ext;
-        samsung,isp-wb;
-        samsung,cam-if;
-};
-
-&fimc_1 {
-        compatible = "samsung,exynos4212-fimc";
-        samsung,pix-limits = <4224 8192 1920 4224>;
-        samsung,mainscaler-ext;
-        samsung,isp-wb;
-        samsung,cam-if;
-};
-
-&fimc_2 {
-        compatible = "samsung,exynos4212-fimc";
-        samsung,pix-limits = <4224 8192 1920 4224>;
-        samsung,mainscaler-ext;
-        samsung,isp-wb;
-        samsung,lcd-wb;
-        samsung,cam-if;
-};
-
-&fimc_3 {
-        compatible = "samsung,exynos4212-fimc";
-        samsung,pix-limits = <1920 8192 1366 1920>;
-        samsung,rotators = <0>;
-        samsung,mainscaler-ext;
-        samsung,isp-wb;
-        samsung,lcd-wb;
-};
-
-&hdmi {
-        compatible = "samsung,exynos4212-hdmi";
-};
-
-&jpeg_codec {
-        compatible = "samsung,exynos4212-jpeg";
-};
-
-&rotator {
-        compatible = "samsung,exynos4212-rotator";
-};
-
-&mixer {
-        compatible = "samsung,exynos4212-mixer";
-        clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
-        clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
-                 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
-};
-
-&pinctrl_0 {
-        compatible = "samsung,exynos4x12-pinctrl";
-        reg = <0x11400000 0x1000>;
-        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-};
-
-&pinctrl_1 {
-        compatible = "samsung,exynos4x12-pinctrl";
-        reg = <0x11000000 0x1000>;
-        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-
-        wakup_eint: wakeup-interrupt-controller {
-                compatible = "samsung,exynos4210-wakeup-eint";
-                interrupt-parent = <&gic>;
-                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-        };
-};
-
-&pinctrl_2 {
-        compatible = "samsung,exynos4x12-pinctrl";
-        reg = <0x03860000 0x1000>;
-        interrupt-parent = <&combiner>;
-        interrupts = <10 0>;
-};
-
-&pinctrl_3 {
-        compatible = "samsung,exynos4x12-pinctrl";
-        reg = <0x106E0000 0x1000>;
-        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-};
-
-&pmu_system_controller {
-        compatible = "samsung,exynos4212-pmu", "syscon";
-        clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
-                        "clkout4", "clkout8", "clkout9";
-        clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
-                <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
-                <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
-        #clock-cells = <1>;
-};
-
-&tmu {
-        compatible = "samsung,exynos4412-tmu";
-        interrupt-parent = <&combiner>;
-        interrupts = <2 4>;
-        reg = <0x100C0000 0x100>;
-        clocks = <&clock 383>;
-        clock-names = "tmu_apbif";
-        status = "disabled";
-};
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 7fd870ee5093..b74c5379ca26 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -90,11 +90,11 @@
                 };
 
                 gic: interrupt-controller@10481000 {
-                        compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+                        compatible = "arm,gic-400", "arm,cortex-a15-gic", "arm,cortex-a9-gic";
                         #interrupt-cells = <3>;
                         interrupt-controller;
                         reg =   <0x10481000 0x1000>,
-                                <0x10482000 0x1000>,
+                                <0x10482000 0x2000>,
                                 <0x10484000 0x2000>,
                                 <0x10486000 0x2000>;
                         interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b6d7444d8585..79c9c885613a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -115,18 +115,21 @@
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x10044000 0x20>;
                         #power-domain-cells = <0>;
+                        label = "GSC";
                 };
 
                 pd_mfc: mfc-power-domain@10044040 {
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x10044040 0x20>;
                         #power-domain-cells = <0>;
+                        label = "MFC";
                 };
 
                 pd_disp1: disp1-power-domain@100440A0 {
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x100440A0 0x20>;
                         #power-domain-cells = <0>;
+                        label = "DISP1";
                         clocks = <&clock CLK_FIN_PLL>,
                                  <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
                                  <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
@@ -1043,21 +1046,29 @@
 &serial_0 {
         clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma0 13>, <&pdma0 14>;
+        dma-names = "rx", "tx";
 };
 
 &serial_1 {
         clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma1 15>, <&pdma1 16>;
+        dma-names = "rx", "tx";
 };
 
 &serial_2 {
         clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma0 15>, <&pdma0 16>;
+        dma-names = "rx", "tx";
 };
 
 &serial_3 {
         clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma1 17>, <&pdma1 18>;
+        dma-names = "rx", "tx";
 };
 
 #include "exynos5250-pinctrl.dtsi"
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 5818718618b1..5e88c9645975 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -167,7 +167,7 @@
                         #size-cells = <0>;
                         interrupt-controller;
                         reg = <0x10481000 0x1000>,
-                                <0x10482000 0x1000>,
+                                <0x10482000 0x2000>,
                                 <0x10484000 0x2000>,
                                 <0x10486000 0x2000>;
                         interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 2b6adafe18e2..7eab4bc07cec 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -340,21 +340,29 @@
 &serial_0 {
         clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma0 13>, <&pdma0 14>;
+        dma-names = "rx", "tx";
 };
 
 &serial_1 {
         clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma1 15>, <&pdma1 16>;
+        dma-names = "rx", "tx";
 };
 
 &serial_2 {
         clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma0 15>, <&pdma0 16>;
+        dma-names = "rx", "tx";
 };
 
 &serial_3 {
         clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma1 17>, <&pdma1 18>;
+        dma-names = "rx", "tx";
 };
 
 &sss {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 906a1a42a7ea..7dc9dc82afd8 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -277,6 +277,7 @@
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x10044000 0x20>;
                         #power-domain-cells = <0>;
+                        label = "GSC";
                         clocks = <&clock CLK_FIN_PLL>,
                                  <&clock CLK_MOUT_USER_ACLK300_GSCL>,
                                  <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
@@ -287,6 +288,7 @@
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x10044020 0x20>;
                         #power-domain-cells = <0>;
+                        label = "ISP";
                 };
 
                 mfc_pd: power-domain@10044060 {
@@ -297,18 +299,21 @@
                                  <&clock CLK_ACLK333>;
                         clock-names = "oscclk", "clk0","asb0";
                         #power-domain-cells = <0>;
+                        label = "MFC";
                 };
 
                 msc_pd: power-domain@10044120 {
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x10044120 0x20>;
                         #power-domain-cells = <0>;
+                        label = "MSC";
                 };
 
                 disp_pd: power-domain@100440C0 {
                         compatible = "samsung,exynos4210-pd";
                         reg = <0x100440C0 0x20>;
                         #power-domain-cells = <0>;
+                        label = "DISP";
                         clocks = <&clock CLK_FIN_PLL>,
                                  <&clock CLK_MOUT_USER_ACLK200_DISP1>,
                                  <&clock CLK_MOUT_USER_ACLK300_DISP1>,
@@ -1406,21 +1411,29 @@
 &serial_0 {
         clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma0 13>, <&pdma0 14>;
+        dma-names = "rx", "tx";
 };
 
 &serial_1 {
         clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma1 15>, <&pdma1 16>;
+        dma-names = "rx", "tx";
 };
 
 &serial_2 {
         clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma0 15>, <&pdma0 16>;
+        dma-names = "rx", "tx";
 };
 
 &serial_3 {
         clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
         clock-names = "uart", "clk_uart_baud0";
+        dmas = <&pdma1 17>, <&pdma1 18>;
+        dma-names = "rx", "tx";
 };
 
 &sss {
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 2a2e570bbee6..77d35bb92950 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -40,7 +40,7 @@
                 #interrupt-cells = <3>;
                 interrupt-controller;
                 reg =   <0x2E1000 0x1000>,
-                        <0x2E2000 0x1000>,
+                        <0x2E2000 0x2000>,
                         <0x2E4000 0x2000>,
                         <0x2E6000 0x2000>;
                 interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/imx1-ads.dts b/arch/arm/boot/dts/imx1-ads.dts
index f50498659cc3..5ea28ee07cf4 100644
--- a/arch/arm/boot/dts/imx1-ads.dts
+++ b/arch/arm/boot/dts/imx1-ads.dts
@@ -38,7 +38,6 @@
 
 &cspi1 {
         pinctrl-0 = <&pinctrl_cspi1>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx1.dtsi b/arch/arm/boot/dts/imx1.dtsi
index 2ee40bc9ec21..38d712be5685 100644
--- a/arch/arm/boot/dts/imx1.dtsi
+++ b/arch/arm/boot/dts/imx1.dtsi
@@ -51,8 +51,9 @@
                 #size-cells = <0>;
                 #address-cells = <1>;
 
-                cpu: cpu@0 {
+                cpu@0 {
                         device_type = "cpu";
+                        reg = <0>;
                         compatible = "arm,arm920t";
                         operating-points = <200000 1900000>;
                         clock-latency = <62500>;
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 43ccbbf754a3..10d57f9cbb42 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -37,12 +37,13 @@
         };
 
         cpus {
-                #address-cells = <0>;
+                #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu {
+                cpu@0 {
                         compatible = "arm,arm926ej-s";
                         device_type = "cpu";
+                        reg = <0>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index acd475659156..e0ba55016a04 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -51,12 +51,13 @@
         };
 
         cpus {
-                #address-cells = <0>;
+                #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu {
+                cpu@0 {
                         compatible = "arm,arm926ej-s";
                         device_type = "cpu";
+                        reg = <0>;
                 };
         };
 
@@ -568,7 +569,7 @@
                                 reg = <0x53ffc000 0x4000>;
                                 clocks = <&clks 81>;
                                 clock-names = "ipg";
-                                interrupts = <25>;
+                                interrupts = <25 56>;
                         };
                 };
 
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts
index bba3f41b89ef..5f84b598e0d0 100644
--- a/arch/arm/boot/dts/imx27-apf27dev.dts
+++ b/arch/arm/boot/dts/imx27-apf27dev.dts
@@ -77,7 +77,6 @@
 };
 
 &cspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
@@ -95,7 +94,6 @@
 };
 
 &cspi2 {
-        fsl,spi-num-chipselects = <3>;
         cs-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>,
                    <&gpio4 27 GPIO_ACTIVE_LOW>,
                    <&gpio2 17 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts b/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts
index 27846ff9bb0d..f56535768ee8 100644
--- a/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts
+++ b/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts
@@ -81,7 +81,6 @@
 
 &cspi1 {
         pinctrl-0 = <&pinctrl_cspi1>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts
index d0ef496a1af8..96f442ba6d22 100644
--- a/arch/arm/boot/dts/imx27-pdk.dts
+++ b/arch/arm/boot/dts/imx27-pdk.dts
@@ -37,7 +37,6 @@
 &cspi2 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_cspi2>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
index 1b6248079682..4f3e0f473581 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
@@ -23,7 +23,6 @@
 };
 
 &cspi1 {
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
                    <&gpio4 27 GPIO_ACTIVE_HIGH>;
         status = "okay";
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index cf09e72aeb06..2a9198f99a8d 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -69,7 +69,6 @@
 
 &cspi1 {
         pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
                    <&gpio4 27 GPIO_ACTIVE_LOW>;
 };
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index b4e955e3be8d..82fec935ce83 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -75,7 +75,6 @@
 &cspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_cspi1>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index b397384248f4..15d85f1f85fd 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -73,6 +73,7 @@
 
                 cpu: cpu@0 {
                         device_type = "cpu";
+                        reg = <0>;
                         compatible = "arm,arm926ej-s";
                         operating-points = <
                                 /* kHz uV */
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index d6a2190b60ef..148fcf4d3b98 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -48,12 +48,13 @@
         };
 
         cpus {
-                #address-cells = <0>;
+                #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu {
+                cpu@0 {
                         compatible = "arm,arm926ej-s";
                         device_type = "cpu";
+                        reg = <0>;
                 };
         };
 
@@ -1078,6 +1079,7 @@
                         };
 
                         saif0: saif@80042000 {
+                                #sound-dai-cells = <0>;
                                 compatible = "fsl,imx28-saif";
                                 reg = <0x80042000 0x2000>;
                                 interrupts = <59>;
@@ -1094,6 +1096,7 @@
                         };
 
                         saif1: saif@80046000 {
+                                #sound-dai-cells = <0>;
                                 compatible = "fsl,imx28-saif";
                                 reg = <0x80046000 0x2000>;
                                 interrupts = <58>;
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
index 23b0d2cf9acd..a72031407ebd 100644
--- a/arch/arm/boot/dts/imx31.dtsi
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -30,12 +30,13 @@
         };
 
         cpus {
-                #address-cells = <0>;
+                #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu {
+                cpu@0 {
                         compatible = "arm,arm1136jf-s";
                         device_type = "cpu";
+                        reg = <0>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi
index d0496c65cea2..6d5e6a60bee7 100644
--- a/arch/arm/boot/dts/imx35.dtsi
+++ b/arch/arm/boot/dts/imx35.dtsi
@@ -35,12 +35,13 @@
         };
 
         cpus {
-                #address-cells = <0>;
+                #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu {
+                cpu@0 {
                         compatible = "arm,arm1136jf-s";
                         device_type = "cpu";
+                        reg = <0>;
                 };
         };
 
diff --git a/arch/arm/boot/dts/imx50-evk.dts b/arch/arm/boot/dts/imx50-evk.dts
index 27d763c7a307..dba2d951aa15 100644
--- a/arch/arm/boot/dts/imx50-evk.dts
+++ b/arch/arm/boot/dts/imx50-evk.dts
@@ -26,7 +26,6 @@
 &cspi {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_cspi>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio4 11 0>, <&gpio4 13 0>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts
index 0f3fe29b816e..a5e6091c8729 100644
--- a/arch/arm/boot/dts/imx51-apf51dev.dts
+++ b/arch/arm/boot/dts/imx51-apf51dev.dts
@@ -80,7 +80,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
                    <&gpio4 25 GPIO_ACTIVE_HIGH>;
         status = "okay";
@@ -89,7 +88,6 @@
 &ecspi2 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
                    <&gpio3 27 GPIO_ACTIVE_LOW>;
         status = "okay";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index f097b4f29ab4..873cf242679c 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -178,7 +178,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
                    <&gpio4 25 GPIO_ACTIVE_LOW>;
         status = "okay";
diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
index 16fc69c69ab2..b821066a0d2a 100644
--- a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
+++ b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
@@ -24,7 +24,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index 728212861ece..1305b05c7ed9 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -114,7 +114,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi
index c05e7cfd0cbc..40b3e31935d0 100644
--- a/arch/arm/boot/dts/imx53-qsb-common.dtsi
+++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi
@@ -215,16 +215,16 @@
 
                 pinctrl_fec: fecgrp {
                         fsl,pins = <
-                                MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
-                                MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
-                                MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
-                                MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
-                                MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
-                                MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
-                                MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
-                                MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
-                                MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
-                                MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
+                                MX53_PAD_FEC_MDC__FEC_MDC               0x4
+                                MX53_PAD_FEC_MDIO__FEC_MDIO             0x1fc
+                                MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x180
+                                MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x180
+                                MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x180
+                                MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x180
+                                MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x180
+                                MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x4
+                                MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x4
+                                MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x4
                         >;
                 };
 
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 379939699164..f4c158cce908 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -90,7 +90,6 @@
                         ldo7_reg: ldo7 {
                                 regulator-min-microvolt = <1200000>;
                                 regulator-max-microvolt = <3600000>;
-                                regulator-always-on;
                         };
 
                         ldo8_reg: ldo8 {
@@ -113,3 +112,7 @@
                 };
         };
 };
+
+&tve {
+        dac-supply = <&ldo7_reg>;
+};
diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts
index 96d7eede412e..479ca4c9e384 100644
--- a/arch/arm/boot/dts/imx53-qsrb.dts
+++ b/arch/arm/boot/dts/imx53-qsrb.dts
@@ -130,8 +130,6 @@
                                 regulator-name = "VDAC";
                                 regulator-min-microvolt = <2500000>;
                                 regulator-max-microvolt = <2775000>;
-                                regulator-boot-on;
-                                regulator-always-on;
                         };
 
                         vgen1_reg: vgen1 {
@@ -152,3 +150,7 @@
                 };
         };
 };
+
+&tve {
+        dac-supply = <&vdac_reg>;
+};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index 9f5190040555..472f6f0f55b3 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -63,7 +63,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx53-tqma53.dtsi b/arch/arm/boot/dts/imx53-tqma53.dtsi
index 91a6a9ff50d7..85972f2201c2 100644
--- a/arch/arm/boot/dts/imx53-tqma53.dtsi
+++ b/arch/arm/boot/dts/imx53-tqma53.dtsi
@@ -55,7 +55,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <4>;
         cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>,
                    <&gpio3 24 0>, <&gpio3 25 0>;
         status = "disabled";
@@ -249,7 +248,6 @@
 &cspi {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_cspi>;
-        fsl,spi-num-chipselects = <3>;
         cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>,
                    <&gpio1 21 0>;
         status = "disabled";
diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index 57e75f1639e0..3a3220141988 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -161,7 +161,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <2>;
         status = "okay";
 
         cs-gpios = <
diff --git a/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi b/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
index ba689fbd0e41..524192cf6a0f 100644
--- a/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
+++ b/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
@@ -129,7 +129,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <4>;
         cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>, <&gpio2 16 0>, <&gpio2 17 0>;
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
index bb92f309c191..0677625463d6 100644
--- a/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
+++ b/arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts b/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
index 3d5ad2cc7e22..805b1318b7f7 100644
--- a/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
+++ b/arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-aristainetos_4.dts b/arch/arm/boot/dts/imx6dl-aristainetos_4.dts
index d4c4a22db488..32a812b1839e 100644
--- a/arch/arm/boot/dts/imx6dl-aristainetos_4.dts
+++ b/arch/arm/boot/dts/imx6dl-aristainetos_4.dts
@@ -66,7 +66,6 @@
 };
 
 &ecspi2 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index e0c21727866d..26541538562c 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts
index 2a43917d048e..f10a36b8647d 100644
--- a/arch/arm/boot/dts/imx6dl-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6dl-cubox-i.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index d5c966031962..39c2602fa87c 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-icore-rqs.dts b/arch/arm/boot/dts/imx6dl-icore-rqs.dts
new file mode 100644
index 000000000000..cf42c2f5cdc7
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-icore-rqs.dts
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+        model = "Engicam i.CoreM6 DualLite/Solo RQS Starter Kit";
+        compatible = "engicam,imx6-icore-rqs", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6dl-icore.dts b/arch/arm/boot/dts/imx6dl-icore.dts
index aec332c14af1..6de83c72bd72 100644
--- a/arch/arm/boot/dts/imx6dl-icore.dts
+++ b/arch/arm/boot/dts/imx6dl-icore.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-nit6xlite.dts b/arch/arm/boot/dts/imx6dl-nit6xlite.dts
index e0161e46195c..30ce2c0cec2b 100644
--- a/arch/arm/boot/dts/imx6dl-nit6xlite.dts
+++ b/arch/arm/boot/dts/imx6dl-nit6xlite.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
index 8398f979b912..ec53d7a09572 100644
--- a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
+++ b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts b/arch/arm/boot/dts/imx6dl-sabrelite.dts
index 0f06ca5c9146..2f904527a097 100644
--- a/arch/arm/boot/dts/imx6dl-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6dl-savageboard.dts b/arch/arm/boot/dts/imx6dl-savageboard.dts
new file mode 100644
index 000000000000..b95469c520a4
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-savageboard.dts
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2017 Milo Kim <woogyom.kim@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-savageboard.dtsi"
+
+/ {
+        model = "Poslab SavageBoard Dual";
+        compatible = "poslab,imx6dl-savageboard", "fsl,imx6dl";
+};
diff --git a/arch/arm/boot/dts/imx6dl-ts4900.dts b/arch/arm/boot/dts/imx6dl-ts4900.dts
index 85eddeb30e21..6ea0b780677d 100644
--- a/arch/arm/boot/dts/imx6dl-ts4900.dts
+++ b/arch/arm/boot/dts/imx6dl-ts4900.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
index 0ea75f7b6039..88cc7f51a4e9 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts b/arch/arm/boot/dts/imx6q-b450v3.dts
index 78bfc1a307d6..116bebb5e435 100644
--- a/arch/arm/boot/dts/imx6q-b450v3.dts
+++ b/arch/arm/boot/dts/imx6q-b450v3.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts b/arch/arm/boot/dts/imx6q-b650v3.dts
index 1dcaee23ed9c..33f5c436c09f 100644
--- a/arch/arm/boot/dts/imx6q-b650v3.dts
+++ b/arch/arm/boot/dts/imx6q-b650v3.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts b/arch/arm/boot/dts/imx6q-b850v3.dts
index 167f7446722a..d78514c92349 100644
--- a/arch/arm/boot/dts/imx6q-b850v3.dts
+++ b/arch/arm/boot/dts/imx6q-b850v3.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-ba16.dtsi b/arch/arm/boot/dts/imx6q-ba16.dtsi
index 308e11cea1db..14fa6b25dc45 100644
--- a/arch/arm/boot/dts/imx6q-ba16.dtsi
+++ b/arch/arm/boot/dts/imx6q-ba16.dtsi
@@ -13,17 +13,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -133,7 +133,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
index e4a415fd899b..36d6bb39593a 100644
--- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi
+++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -95,7 +95,6 @@
 };
 
 &ecspi5 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi5>;
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index a150bca84daa..d8a5789a4bc8 100644
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -89,6 +89,14 @@
                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
                 enable-active-high;
         };
+
+        sound-spdif {
+                compatible = "fsl,imx-audio-spdif";
+                model = "imx-spdif";
+                spdif-controller = <&spdif>;
+                spdif-out;
+                spdif-in;
+        };
 };
 
 &cpu0 {
@@ -114,7 +122,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -222,6 +229,13 @@
                 >;
         };
 
+        pinctrl_spdif: spdifgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0
+                        MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
+                >;
+        };
+
         pinctrl_uart4: uart4grp {
                 fsl,pins = <
                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
@@ -259,6 +273,12 @@
         status = "okay";
 };
 
+&spdif {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_spdif>;
+        status = "okay";
+};
+
 &uart4 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_uart4>;
diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts
index 353425edcdf4..b68aa0e57f20 100644
--- a/arch/arm/boot/dts/imx6q-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6q-cubox-i.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 908dab68bdca..f28883bbe7b1 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -104,7 +104,6 @@
 &ecspi5 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi5>;
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio1 12 0>;
         status = "okay";
 
diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 7c7c1a855ece..fd2220aa49e2 100644
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -90,7 +90,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
@@ -98,7 +97,6 @@
 };
 
 &ecspi3 {
-        fsl,spi-num-chipselects = <3>;
         cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
                 <&gpio4 25 GPIO_ACTIVE_LOW>,
                 <&gpio4 26 GPIO_ACTIVE_LOW>;
@@ -108,7 +106,6 @@
 };
 
 &ecspi5 {
-        fsl,spi-num-chipselects = <4>;
         cs-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>,
                 <&gpio1 13 GPIO_ACTIVE_LOW>,
                 <&gpio1 12 GPIO_ACTIVE_LOW>,
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 747bc104ad00..8e84713f42c0 100644
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -138,7 +138,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
diff --git a/arch/arm/boot/dts/imx6q-h100.dts b/arch/arm/boot/dts/imx6q-h100.dts
index 65e66f994f88..8f9252889971 100644
--- a/arch/arm/boot/dts/imx6q-h100.dts
+++ b/arch/arm/boot/dts/imx6q-h100.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-hummingboard.dts b/arch/arm/boot/dts/imx6q-hummingboard.dts
index 1884c16784e2..69a7a0a1cb21 100644
--- a/arch/arm/boot/dts/imx6q-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6q-hummingboard.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
index 005318865f66..e451b4ceb4d8 100644
--- a/arch/arm/boot/dts/imx6q-icore-rqs.dts
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -45,7 +45,7 @@
 #include "imx6qdl-icore-rqs.dtsi"
 
 / {
-        model = "Engicam i.CoreM6 Quad SOM";
+        model = "Engicam i.CoreM6 Quad/Dual RQS Starter Kit";
         compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
 
         sound {
diff --git a/arch/arm/boot/dts/imx6q-icore.dts b/arch/arm/boot/dts/imx6q-icore.dts
index 025f54350c28..59eb7adc2472 100644
--- a/arch/arm/boot/dts/imx6q-icore.dts
+++ b/arch/arm/boot/dts/imx6q-icore.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts
index f7995c513b67..432291bedcf1 100644
--- a/arch/arm/boot/dts/imx6q-marsboard.dts
+++ b/arch/arm/boot/dts/imx6q-marsboard.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -97,7 +97,6 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
         cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
-        fsl,spi-num-chipselects = <1>;
         status = "okay";
 
         m25p80@0 {
diff --git a/arch/arm/boot/dts/imx6q-mccmon6.dts b/arch/arm/boot/dts/imx6q-mccmon6.dts
new file mode 100644
index 000000000000..eedbe737420c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-mccmon6.dts
@@ -0,0 +1,473 @@
+/*
+ * Copyright 2016-2017
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+        model = "Liebherr (LWN) monitor6 i.MX6 Quad Board";
+        compatible = "lwn,mccmon6", "fsl,imx6q";
+
+        memory {
+                reg = <0x10000000 0x80000000>;
+        };
+
+        backlight_lvds: backlight {
+                compatible = "pwm-backlight";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_backlight>;
+                pwms = <&pwm2 0 5000000 PWM_POLARITY_INVERTED>;
+                brightness-levels = <  0   1   2   3   4   5   6   7   8   9
+                                      10  11  12  13  14  15  16  17  18  19
+                                      20  21  22  23  24  25  26  27  28  29
+                                      30  31  32  33  34  35  36  37  38  39
+                                      40  41  42  43  44  45  46  47  48  49
+                                      50  51  52  53  54  55  56  57  58  59
+                                      60  61  62  63  64  65  66  67  68  69
+                                      70  71  72  73  74  75  76  77  78  79
+                                      80  81  82  83  84  85  86  87  88  89
+                                      90  91  92  93  94  95  96  97  98  99
+                                     100 101 102 103 104 105 106 107 108 109
+                                     110 111 112 113 114 115 116 117 118 119
+                                     120 121 122 123 124 125 126 127 128 129
+                                     130 131 132 133 134 135 136 137 138 139
+                                     140 141 142 143 144 145 146 147 148 149
+                                     150 151 152 153 154 155 156 157 158 159
+                                     160 161 162 163 164 165 166 167 168 169
+                                     170 171 172 173 174 175 176 177 178 179
+                                     180 181 182 183 184 185 186 187 188 189
+                                     190 191 192 193 194 195 196 197 198 199
+                                     200 201 202 203 204 205 206 207 208 209
+                                     210 211 212 213 214 215 216 217 218 219
+                                     220 221 222 223 224 225 226 227 228 229
+                                     230 231 232 233 234 235 236 237 238 239
+                                     240 241 242 243 244 245 246 247 248 249
+                                     250 251 252 253 254 255>;
+                default-brightness-level = <50>;
+                enable-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+        };
+
+        reg_lvds: regulator-lvds {
+                compatible = "regulator-fixed";
+                regulator-name = "lvds_ppen";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-boot-on;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_reg_lvds>;
+                gpio = <&gpio1 19 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        panel-lvds0 {
+                compatible = "innolux,g121x1-l03";
+                backlight = <&backlight_lvds>;
+                power-supply = <&reg_lvds>;
+
+                port {
+                        panel_in_lvds0: endpoint {
+                                remote-endpoint = <&lvds0_out>;
+                        };
+                };
+        };
+};
+
+&ecspi3 {
+        cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>;
+        status = "okay";
+
+        s25sl032p: flash@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "jedec,spi-nor";
+                spi-max-frequency = <40000000>;
+                reg = <0>;
+        };
+};
+
+&fec {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_enet>;
+        phy-mode = "rgmii";
+        phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+        interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
+                              <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
+        status = "okay";
+};
+
+&i2c1 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c1>;
+        status = "okay";
+};
+
+&i2c2 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2>;
+        status = "okay";
+
+        pfuze100: pmic@08 {
+                compatible = "fsl,pfuze100";
+                reg = <0x08>;
+
+                regulators {
+                        sw1a_reg: sw1ab {
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1875000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                                regulator-ramp-delay = <6250>;
+                        };
+
+                        sw1c_reg: sw1c {
+                                regulator-min-microvolt = <300000>;
+                                regulator-max-microvolt = <1875000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                                regulator-ramp-delay = <6250>;
+                        };
+
+                        sw2_reg: sw2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <3950000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw3a_reg: sw3a {
+                                regulator-min-microvolt = <400000>;
+                                regulator-max-microvolt = <1975000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw3b_reg: sw3b {
+                                regulator-min-microvolt = <400000>;
+                                regulator-max-microvolt = <1975000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        sw4_reg: sw4 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        swbst_reg: swbst {
+                                regulator-min-microvolt = <5000000>;
+                                regulator-max-microvolt = <5150000>;
+                        };
+
+                        snvs_reg: vsnvs {
+                                regulator-min-microvolt = <1000000>;
+                                regulator-max-microvolt = <3000000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        vref_reg: vrefddr {
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        vgen1_reg: vgen1 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        vgen2_reg: vgen2 {
+                                regulator-min-microvolt = <800000>;
+                                regulator-max-microvolt = <1550000>;
+                        };
+
+                        vgen3_reg: vgen3 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                        };
+
+                        vgen4_reg: vgen4 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen5_reg: vgen5 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+
+                        vgen6_reg: vgen6 {
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <3300000>;
+                                regulator-always-on;
+                        };
+                };
+        };
+};
+
+&ldb {
+        status = "okay";
+
+        lvds0: lvds-channel@0 {
+                fsl,data-mapping = "spwg";
+                fsl,data-width = <24>;
+                status = "okay";
+
+                port@4 {
+                        reg = <4>;
+
+                        lvds0_out: endpoint {
+                                remote-endpoint = <&panel_in_lvds0>;
+                        };
+                };
+        };
+};
+
+&pwm2 {
+        #pwm-cells = <3>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm2>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        status = "okay";
+};
+
+&uart4 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart4>;
+        uart-has-rtscts;
+        status = "okay";
+};
+
+&usdhc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc2>;
+        cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+        bus-width = <4>;
+        status = "okay";
+};
+
+&usdhc3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc3>;
+        bus-width = <8>;
+        non-removable;
+        status = "okay";
+};
+
+&weim {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
+        ranges = <0 0 0x08000000 0x08000000>;
+        status = "okay";
+
+        nor@0,0 {
+                compatible = "cfi-flash";
+                reg = <0 0 0x02000000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+                bank-width = <2>;
+                use-advanced-sector-protection;
+                fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
+                                0x0000c000 0x1404a38e 0x00000000>;
+        };
+};
+
+&iomuxc {
+        pinctrl-names = "default";
+
+        pinctrl_backlight: dispgrp {
+                fsl,pins = <
+                        /* BLEN_OUT */
+                        MX6QDL_PAD_GPIO_2__GPIO1_IO02    0x1b0b0
+                >;
+        };
+
+        pinctrl_ecspi3: ecspi3grp {
+                fsl,pins = <
+                        MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
+                        MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
+                        MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
+                >;
+        };
+
+        pinctrl_ecspi3_cs: ecspi3csgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000
+                >;
+        };
+
+        pinctrl_ecspi3_flwp: ecspi3flwpgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x80000000
+                >;
+        };
+
+        pinctrl_enet: enetgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
+                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
+                        MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
+                        MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
+                        MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
+                        MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
+                        MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
+                        MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
+                        MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                        MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                        MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+                        MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
+                        MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x1b0b0
+                >;
+        };
+
+        pinctrl_i2c1: i2c1grp {
+                fsl,pins = <
+                        MX6QDL_PAD_CSI0_DAT9__I2C1_SCL  0x4001b8b1
+                        MX6QDL_PAD_CSI0_DAT8__I2C1_SDA  0x4001b8b1
+                >;
+        };
+
+        pinctrl_i2c2: i2c2grp {
+                fsl,pins = <
+                        MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
+                        MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
+                >;
+        };
+
+        pinctrl_pwm2: pwm2grp {
+                fsl,pins = <
+                        MX6QDL_PAD_GPIO_1__PWM2_OUT     0x1b0b1
+                >;
+        };
+
+        pinctrl_reg_lvds: reqlvdsgrp {
+                fsl,pins = <
+                        /* LVDS_PPEN_OUT */
+                        MX6QDL_PAD_SD1_DAT2__GPIO1_IO19         0x1b0b0
+                >;
+        };
+
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
+                        MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
+                >;
+        };
+
+        pinctrl_uart4: uart4grp {
+                fsl,pins = <
+                        MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
+                        MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
+                        MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B      0x1b0b1
+                        MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B      0x1b0b1
+                >;
+        };
+
+        pinctrl_usdhc2: usdhc2grp {
+                fsl,pins = <
+                        MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
+                        MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
+                        MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
+                        MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
+                        MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
+                        MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
+                        MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b1
+                >;
+        };
+
+        pinctrl_usdhc3: usdhc3grp {
+                fsl,pins = <
+                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
+                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
+                        MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
+                        MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
+                        MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
+                        MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
+                        MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
+                        MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
+                        MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
+                        MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
+                        MX6QDL_PAD_SD3_RST__SD3_RESET           0x17059
+                >;
+        };
+
+        pinctrl_weim_cs0: weimcs0grp {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_CS0__EIM_CS0_B           0xb0b1
+                >;
+        };
+
+        pinctrl_weim_nor: weimnorgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_OE__EIM_OE_B             0xb0b1
+                        MX6QDL_PAD_EIM_RW__EIM_RW               0xb0b1
+                        MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060
+                        MX6QDL_PAD_EIM_D16__EIM_DATA16          0x1b0b0
+                        MX6QDL_PAD_EIM_D17__EIM_DATA17          0x1b0b0
+                        MX6QDL_PAD_EIM_D18__EIM_DATA18          0x1b0b0
+                        MX6QDL_PAD_EIM_D19__EIM_DATA19          0x1b0b0
+                        MX6QDL_PAD_EIM_D20__EIM_DATA20          0x1b0b0
+                        MX6QDL_PAD_EIM_D21__EIM_DATA21          0x1b0b0
+                        MX6QDL_PAD_EIM_D22__EIM_DATA22          0x1b0b0
+                        MX6QDL_PAD_EIM_D23__EIM_DATA23          0x1b0b0
+                        MX6QDL_PAD_EIM_D24__EIM_DATA24          0x1b0b0
+                        MX6QDL_PAD_EIM_D25__EIM_DATA25          0x1b0b0
+                        MX6QDL_PAD_EIM_D26__EIM_DATA26          0x1b0b0
+                        MX6QDL_PAD_EIM_D27__EIM_DATA27          0x1b0b0
+                        MX6QDL_PAD_EIM_D28__EIM_DATA28          0x1b0b0
+                        MX6QDL_PAD_EIM_D29__EIM_DATA29          0x1b0b0
+                        MX6QDL_PAD_EIM_D30__EIM_DATA30          0x1b0b0
+                        MX6QDL_PAD_EIM_D31__EIM_DATA31          0x1b0b0
+                        MX6QDL_PAD_EIM_A23__EIM_ADDR23          0xb0b1
+                        MX6QDL_PAD_EIM_A22__EIM_ADDR22          0xb0b1
+                        MX6QDL_PAD_EIM_A21__EIM_ADDR21          0xb0b1
+                        MX6QDL_PAD_EIM_A20__EIM_ADDR20          0xb0b1
+                        MX6QDL_PAD_EIM_A19__EIM_ADDR19          0xb0b1
+                        MX6QDL_PAD_EIM_A18__EIM_ADDR18          0xb0b1
+                        MX6QDL_PAD_EIM_A17__EIM_ADDR17          0xb0b1
+                        MX6QDL_PAD_EIM_A16__EIM_ADDR16          0xb0b1
+                        MX6QDL_PAD_EIM_DA15__EIM_AD15           0xb0b1
+                        MX6QDL_PAD_EIM_DA14__EIM_AD14           0xb0b1
+                        MX6QDL_PAD_EIM_DA13__EIM_AD13           0xb0b1
+                        MX6QDL_PAD_EIM_DA12__EIM_AD12           0xb0b1
+                        MX6QDL_PAD_EIM_DA11__EIM_AD11           0xb0b1
+                        MX6QDL_PAD_EIM_DA10__EIM_AD10           0xb0b1
+                        MX6QDL_PAD_EIM_DA9__EIM_AD09            0xb0b1
+                        MX6QDL_PAD_EIM_DA8__EIM_AD08            0xb0b1
+                        MX6QDL_PAD_EIM_DA7__EIM_AD07            0xb0b1
+                        MX6QDL_PAD_EIM_DA6__EIM_AD06            0xb0b1
+                        MX6QDL_PAD_EIM_DA5__EIM_AD05            0xb0b1
+                        MX6QDL_PAD_EIM_DA4__EIM_AD04            0xb0b1
+                        MX6QDL_PAD_EIM_DA3__EIM_AD03            0xb0b1
+                        MX6QDL_PAD_EIM_DA2__EIM_AD02            0xb0b1
+                        MX6QDL_PAD_EIM_DA1__EIM_AD01            0xb0b1
+                        MX6QDL_PAD_EIM_DA0__EIM_AD00            0xb0b1
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6_max.dts b/arch/arm/boot/dts/imx6q-nitrogen6_max.dts
index d417457ca6db..2a3c44f98eed 100644
--- a/arch/arm/boot/dts/imx6q-nitrogen6_max.dts
+++ b/arch/arm/boot/dts/imx6q-nitrogen6_max.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6_som2.dts b/arch/arm/boot/dts/imx6q-nitrogen6_som2.dts
index cf4feefe02c5..c5d59baa1a07 100644
--- a/arch/arm/boot/dts/imx6q-nitrogen6_som2.dts
+++ b/arch/arm/boot/dts/imx6q-nitrogen6_som2.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6x.dts b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
index d1686339dc48..df8ff397a914 100644
--- a/arch/arm/boot/dts/imx6q-nitrogen6x.dts
+++ b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts
index 758bca96786f..0fa32b2f3aec 100644
--- a/arch/arm/boot/dts/imx6q-novena.dts
+++ b/arch/arm/boot/dts/imx6q-novena.dts
@@ -210,7 +210,6 @@
 &ecspi3 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi3_novena>;
-        fsl,spi-num-chipselects = <3>;
         status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 66d10d8d534c..02a7cdfd57c9 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-savageboard.dts b/arch/arm/boot/dts/imx6q-savageboard.dts
new file mode 100644
index 000000000000..717ac62fc2cf
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-savageboard.dts
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2017 Milo Kim <woogyom.kim@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-savageboard.dtsi"
+
+/ {
+        model = "Poslab SavageBoard Quad";
+        compatible = "poslab,imx6q-savageboard", "fsl,imx6q";
+};
+
+&sata {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6q-ts4900.dts b/arch/arm/boot/dts/imx6q-ts4900.dts
index 9b81ebc8b0d4..fab76f8cd076 100644
--- a/arch/arm/boot/dts/imx6q-ts4900.dts
+++ b/arch/arm/boot/dts/imx6q-ts4900.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
index 22009947cebc..69bdd82ce21f 100644
--- a/arch/arm/boot/dts/imx6q-utilite-pro.dts
+++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
@@ -59,6 +59,33 @@
                 rtc1 = &snvs_rtc;
         };
 
+        encoder {
+                compatible = "ti,tfp410";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+
+                                tfp410_in: endpoint {
+                                        remote-endpoint = <&parallel_display_out>;
+                                };
+                        };
+
+                        port@1 {
+                                reg = <1>;
+
+                                tfp410_out: endpoint {
+                                        remote-endpoint = <&hdmi_connector_in>;
+                                };
+                        };
+                };
+        };
+
         gpio-keys {
                 compatible = "gpio-keys";
                 pinctrl-names = "default";
@@ -72,6 +99,19 @@
                 };
         };
 
+        hdmi-connector {
+                compatible = "hdmi-connector";
+
+                type = "a";
+                ddc-i2c-bus = <&i2c_dvi_ddc>;
+
+                port {
+                        hdmi_connector_in: endpoint {
+                                remote-endpoint = <&tfp410_out>;
+                        };
+                };
+        };
+
         i2cmux {
                 compatible = "i2c-mux-gpio";
                 pinctrl-names = "default";
@@ -105,8 +145,46 @@
                         #size-cells = <0>;
                 };
         };
+
+        parallel-display {
+                compatible = "fsl,imx-parallel-display";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_ipu1>;
+
+                interface-pix-fmt = "rgb24";
+
+                port@0 {
+                        reg = <0>;
+
+                        parallel_display_in: endpoint {
+                                remote-endpoint = <&ipu1_di0_disp0>;
+                        };
+                };
+
+                port@1 {
+                        reg = <1>;
+
+                        parallel_display_out: endpoint {
+                                remote-endpoint = <&tfp410_in>;
+                        };
+                };
+        };
 };
 
+/*
+ * A single IPU is not able to drive both display interfaces available on the
+ * Utilite Pro at high resolution due to its bandwidth limitation. Since the
+ * tfp410 encoder is wired up to IPU1, sever the link between IPU1 and the
+ * SoC-internal Designware HDMI encoder forcing the latter to be connected to
+ * IPU2 instead of IPU1.
+ */
+/delete-node/&ipu1_di0_hdmi;
+/delete-node/&hdmi_mux_0;
+/delete-node/&ipu1_di1_hdmi;
+/delete-node/&hdmi_mux_1;
+
 &hdmi {
         ddc-i2c-bus = <&i2c2>;
         status = "okay";
@@ -151,6 +229,39 @@
                 >;
         };
 
+        pinctrl_ipu1: ipu1grp {
+                fsl,pins = <
+                        MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
+                        MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x38
+                        MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x38
+                        MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x38
+                        MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x38
+                        MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x38
+                        MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x38
+                        MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x38
+                        MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x38
+                        MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x38
+                        MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x38
+                        MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x38
+                        MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x38
+                        MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x38
+                        MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x38
+                        MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x38
+                        MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x38
+                        MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x38
+                        MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x38
+                        MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x38
+                        MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x38
+                        MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x38
+                        MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x38
+                        MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x38
+                        MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x38
+                        MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x38
+                        MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x38
+                        MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x38
+                >;
+        };
+
         pinctrl_uart2: uart2grp {
                 fsl,pins = <
                         MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
@@ -194,6 +305,10 @@
         };
 };
 
+&ipu1_di0_disp0 {
+        remote-endpoint = <&parallel_display_in>;
+};
+
 &pcie {
         pcie@0,0 {
                 reg = <0x000000 0 0 0 0>;
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 8c8a049eb3d0..ba01dd76d887 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -175,7 +175,6 @@
 
 /* Apalis SPI1 */
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -184,7 +183,6 @@
 
 /* Apalis SPI2 */
 &ecspi2 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
diff --git a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
index 5e7792d6bf58..550e100e85fc 100644
--- a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
@@ -176,7 +176,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <3>;
         cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
                    <&gpio4 10 GPIO_ACTIVE_LOW>,
                    <&gpio4 11 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
index 54f4f0193f2b..b2debc0aa720 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
@@ -100,7 +100,6 @@
 };
 
 &ecspi4 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 20 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi4>;
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
index 7fff02c406f2..ec68f1cace31 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -114,7 +114,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <3>;
         cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH
                     &gpio4 10 GPIO_ACTIVE_HIGH
                     &gpio4 11 GPIO_ACTIVE_HIGH>;
@@ -124,7 +123,6 @@
 };
 
 &ecspi2 {
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH &gpio2 27 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
@@ -132,7 +130,6 @@
 };
 
 &ecspi4 {
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi4>;
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index e6faa653f91a..e8078758f26c 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -138,7 +138,6 @@
 
 /* Colibri SSP */
 &ecspi4 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi4>;
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index ff41f83551de..14fff4ee6516 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
index b2c083d57598..d78312c63672 100644
--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -29,7 +29,6 @@
 };
 
 &ecspi3 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 24 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi3>;
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index afec2c7628ef..e8c1edc82e6e 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -56,38 +56,29 @@
                 status = "okay";
         };
 
-        regulators {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                reg_3p3v: regulator@0 {
-                        compatible = "regulator-fixed";
-                        reg = <0>;
-                        regulator-name = "3P3V";
-                        regulator-min-microvolt = <3300000>;
-                        regulator-max-microvolt = <3300000>;
-                        regulator-always-on;
-                };
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
 
-                reg_5p0v: regulator@1 {
-                        compatible = "regulator-fixed";
-                        reg = <1>;
-                        regulator-name = "5P0V";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        regulator-always-on;
-                };
+        reg_5p0v: regulator-5p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "5P0V";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-always-on;
+        };
 
-                reg_usb_otg_vbus: regulator@2 {
-                        compatible = "regulator-fixed";
-                        reg = <2>;
-                        regulator-name = "usb_otg_vbus";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
-                        enable-active-high;
-                };
+        reg_usb_otg_vbus: regulator-usb-otg-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_otg_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
         };
 };
 
@@ -158,6 +149,81 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_i2c2>;
         status = "okay";
+
+        ltc3676: pmic@3c {
+                compatible = "lltc,ltc3676";
+                reg = <0x3c>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pmic>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+                regulators {
+                        /* VDD_SOC (1+R1/R2 = 1.635) */
+                        reg_vdd_soc: sw1 {
+                                regulator-name = "vddsoc";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
+                        reg_1p8v: sw2 {
+                                regulator-name = "vdd1p8";
+                                regulator-min-microvolt = <1033310>;
+                                regulator-max-microvolt = <2004000>;
+                                lltc,fb-voltage-divider = <301000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_ARM (1+R1/R2 = 1.635) */
+                        reg_vdd_arm: sw3 {
+                                regulator-name = "vddarm";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_DDR (1+R1/R2 = 2.105) */
+                        reg_vdd_ddr: sw4 {
+                                regulator-name = "vddddr";
+                                regulator-min-microvolt = <868310>;
+                                regulator-max-microvolt = <1684000>;
+                                lltc,fb-voltage-divider = <221000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
+                        reg_2p5v: ldo2 {
+                                regulator-name = "vdd2p5";
+                                regulator-min-microvolt = <2490375>;
+                                regulator-max-microvolt = <2490375>;
+                                lltc,fb-voltage-divider = <487000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_HIGH (1+R1/R2 = 4.17) */
+                        reg_3p0v: ldo4 {
+                                regulator-name = "vdd3p0";
+                                regulator-min-microvolt = <3023250>;
+                                regulator-max-microvolt = <3023250>;
+                                lltc,fb-voltage-divider = <634000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                };
+        };
 };
 
 &i2c3 {
@@ -312,6 +378,12 @@
                         >;
                 };
 
+                pinctrl_pmic: pmicgrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
+                        >;
+                };
+
                 pinctrl_pps: ppsgrp {
                         fsl,pins = <
                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 54aca3a07ce4..91991d63a69c 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -71,57 +71,37 @@
                 status = "okay";
         };
 
-        regulators {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                reg_1p0v: regulator@0 {
-                        compatible = "regulator-fixed";
-                        reg = <0>;
-                        regulator-name = "1P0V";
-                        regulator-min-microvolt = <1000000>;
-                        regulator-max-microvolt = <1000000>;
-                        regulator-always-on;
-                };
-
-                /* remove this fixed regulator once ltc3676__sw2 driver available */
-                reg_1p8v: regulator@1 {
-                        compatible = "regulator-fixed";
-                        reg = <1>;
-                        regulator-name = "1P8V";
-                        regulator-min-microvolt = <1800000>;
-                        regulator-max-microvolt = <1800000>;
-                        regulator-always-on;
-                };
+        reg_1p0v: regulator-1p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "1P0V";
+                regulator-min-microvolt = <1000000>;
+                regulator-max-microvolt = <1000000>;
+                regulator-always-on;
+        };
 
-                reg_3p3v: regulator@2 {
-                        compatible = "regulator-fixed";
-                        reg = <2>;
-                        regulator-name = "3P3V";
-                        regulator-min-microvolt = <3300000>;
-                        regulator-max-microvolt = <3300000>;
-                        regulator-always-on;
-                };
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
 
-                reg_5p0v: regulator@3 {
-                        compatible = "regulator-fixed";
-                        reg = <3>;
-                        regulator-name = "5P0V";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        regulator-always-on;
-                };
+        reg_5p0v: regulator-5p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "5P0V";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-always-on;
+        };
 
-                reg_usb_otg_vbus: regulator@4 {
-                        compatible = "regulator-fixed";
-                        reg = <4>;
-                        regulator-name = "usb_otg_vbus";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
-                        enable-active-high;
-                };
+        reg_usb_otg_vbus: regulator-usb-otg-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_otg_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
         };
 
         sound {
@@ -159,7 +139,6 @@
 };
 
 &ecspi3 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi3>;
@@ -233,6 +212,89 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_i2c2>;
         status = "okay";
+
+        ltc3676: pmic@3c {
+                compatible = "lltc,ltc3676";
+                reg = <0x3c>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pmic>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+                regulators {
+                        /* VDD_SOC (1+R1/R2 = 1.635) */
+                        reg_vdd_soc: sw1 {
+                                regulator-name = "vddsoc";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
+                        reg_1p8v: sw2 {
+                                regulator-name = "vdd1p8";
+                                regulator-min-microvolt = <1033310>;
+                                regulator-max-microvolt = <2004000>;
+                                lltc,fb-voltage-divider = <301000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_ARM (1+R1/R2 = 1.635) */
+                        reg_vdd_arm: sw3 {
+                                regulator-name = "vddarm";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_DDR (1+R1/R2 = 2.105) */
+                        reg_vdd_ddr: sw4 {
+                                regulator-name = "vddddr";
+                                regulator-min-microvolt = <868310>;
+                                regulator-max-microvolt = <1684000>;
+                                lltc,fb-voltage-divider = <221000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
+                        reg_2p5v: ldo2 {
+                                regulator-name = "vdd2p5";
+                                regulator-min-microvolt = <2490375>;
+                                regulator-max-microvolt = <2490375>;
+                                lltc,fb-voltage-divider = <487000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_AUD_1P8: Audio codec */
+                        reg_aud_1p8v: ldo3 {
+                                regulator-name = "vdd1p8";
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-boot-on;
+                        };
+
+                        /* VDD_HIGH (1+R1/R2 = 4.17) */
+                        reg_3p0v: ldo4 {
+                                regulator-name = "vdd3p0";
+                                regulator-min-microvolt = <3023250>;
+                                regulator-max-microvolt = <3023250>;
+                                lltc,fb-voltage-divider = <634000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                };
+        };
 };
 
 &i2c3 {
@@ -467,6 +529,12 @@
                         >;
                 };
 
+                pinctrl_pmic: pmicgrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
+                        >;
+                };
+
                 pinctrl_pps: ppsgrp {
                         fsl,pins = <
                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index 88e5cb3b6be9..a208e7e0dc6e 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -72,57 +72,37 @@
                 status = "okay";
         };
 
-        regulators {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                reg_1p0v: regulator@0 {
-                        compatible = "regulator-fixed";
-                        reg = <0>;
-                        regulator-name = "1P0V";
-                        regulator-min-microvolt = <1000000>;
-                        regulator-max-microvolt = <1000000>;
-                        regulator-always-on;
-                };
-
-                /* remove when pmic 1p8 regulator available */
-                reg_1p8v: regulator@1 {
-                        compatible = "regulator-fixed";
-                        reg = <1>;
-                        regulator-name = "1P8V";
-                        regulator-min-microvolt = <1800000>;
-                        regulator-max-microvolt = <1800000>;
-                        regulator-always-on;
-                };
+        reg_1p0v: regulator-1p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "1P0V";
+                regulator-min-microvolt = <1000000>;
+                regulator-max-microvolt = <1000000>;
+                regulator-always-on;
+        };
 
-                reg_3p3v: regulator@2 {
-                        compatible = "regulator-fixed";
-                        reg = <2>;
-                        regulator-name = "3P3V";
-                        regulator-min-microvolt = <3300000>;
-                        regulator-max-microvolt = <3300000>;
-                        regulator-always-on;
-                };
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
 
-                reg_usb_h1_vbus: regulator@3 {
-                        compatible = "regulator-fixed";
-                        reg = <3>;
-                        regulator-name = "usb_h1_vbus";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        regulator-always-on;
-                };
+        reg_usb_h1_vbus: regulator-usb-h1-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_h1_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-always-on;
+        };
 
-                reg_usb_otg_vbus: regulator@4 {
-                        compatible = "regulator-fixed";
-                        reg = <4>;
-                        regulator-name = "usb_otg_vbus";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
-                        enable-active-high;
-                };
+        reg_usb_otg_vbus: regulator-usb-otg-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_otg_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
         };
 
         sound {
@@ -226,6 +206,87 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_i2c2>;
         status = "okay";
+
+        ltc3676: pmic@3c {
+                compatible = "lltc,ltc3676";
+                reg = <0x3c>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+                regulators {
+                        /* VDD_SOC (1+R1/R2 = 1.635) */
+                        reg_vdd_soc: sw1 {
+                                regulator-name = "vddsoc";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
+                        reg_1p8v: sw2 {
+                                regulator-name = "vdd1p8";
+                                regulator-min-microvolt = <1033310>;
+                                regulator-max-microvolt = <2004000>;
+                                lltc,fb-voltage-divider = <301000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_ARM (1+R1/R2 = 1.635) */
+                        reg_vdd_arm: sw3 {
+                                regulator-name = "vddarm";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_DDR (1+R1/R2 = 2.105) */
+                        reg_vdd_ddr: sw4 {
+                                regulator-name = "vddddr";
+                                regulator-min-microvolt = <868310>;
+                                regulator-max-microvolt = <1684000>;
+                                lltc,fb-voltage-divider = <221000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
+                        reg_2p5v: ldo2 {
+                                regulator-name = "vdd2p5";
+                                regulator-min-microvolt = <2490375>;
+                                regulator-max-microvolt = <2490375>;
+                                lltc,fb-voltage-divider = <487000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_AUD_1P8: Audio codec */
+                        reg_aud_1p8v: ldo3 {
+                                regulator-name = "vdd1p8a";
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-boot-on;
+                        };
+
+                        /* VDD_HIGH (1+R1/R2 = 4.17) */
+                        reg_3p0v: ldo4 {
+                                regulator-name = "vdd3p0";
+                                regulator-min-microvolt = <3023250>;
+                                regulator-max-microvolt = <3023250>;
+                                lltc,fb-voltage-divider = <634000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                };
+        };
 };
 
 &i2c3 {
@@ -456,6 +517,12 @@
                         >;
                 };
 
+                pinctrl_pmic: pmicgrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
+                        >;
+                };
+
                 pinctrl_pps: ppsgrp {
                         fsl,pins = <
                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 1753ab720b0b..968fda94d14b 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -149,6 +149,13 @@
                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 };
 
+&ecspi2 {
+        cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_ecspi2>;
+        status = "okay";
+};
+
 &fec {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_enet>;
@@ -499,6 +506,15 @@
                         >;
                 };
 
+                pinctrl_ecspi2: escpi2grp {
+                        fsl,pins = <
+                                MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+                                MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+                                MX6QDL_PAD_EIM_OE__ECSPI2_MISO  0x100b1
+                                MX6QDL_PAD_EIM_RW__GPIO2_IO26   0x100b1
+                        >;
+                };
+
                 pinctrl_flexcan1: flexcan1grp {
                         fsl,pins = <
                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
index 4b9fef834822..405b40310ddf 100644
--- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
@@ -78,34 +78,25 @@
                 reg = <0x10000000 0x20000000>;
         };
 
-        regulators {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                reg_5p0v: regulator@0 {
-                        compatible = "regulator-fixed";
-                        reg = <0>;
-                        regulator-name = "5P0V";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                };
+        reg_5p0v: regulator-5p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "5P0V";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+        };
 
-                reg_usb_h1_vbus: regulator@1 {
-                        compatible = "regulator-fixed";
-                        reg = <1>;
-                        regulator-name = "usb_h1_vbus";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                };
+        reg_usb_h1_vbus: regulator-usb-h1-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_h1_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+        };
 
-                reg_usb_otg_vbus: regulator@2 {
-                        compatible = "regulator-fixed";
-                        reg = <2>;
-                        regulator-name = "usb_otg_vbus";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                };
+        reg_usb_otg_vbus: regulator-usb-otg-vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usb_otg_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
         };
 };
 
@@ -174,6 +165,89 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_i2c2>;
         status = "okay";
+
+        ltc3676: pmic@3c {
+                compatible = "lltc,ltc3676";
+                reg = <0x3c>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pmic>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+                regulators {
+                        /* VDD_SOC (1+R1/R2 = 1.635) */
+                        reg_vdd_soc: sw1 {
+                                regulator-name = "vddsoc";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_DDR (1+R1/R2 = 2.105) */
+                        reg_vdd_ddr: sw2 {
+                                regulator-name = "vddddr";
+                                regulator-min-microvolt = <868310>;
+                                regulator-max-microvolt = <1684000>;
+                                lltc,fb-voltage-divider = <221000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_ARM (1+R1/R2 = 1.635) */
+                        reg_vdd_arm: sw3 {
+                                regulator-name = "vddarm";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_3P3 (1+R1/R2 = 1.281) */
+                        reg_3p3: sw4 {
+                                regulator-name = "vdd3p3";
+                                regulator-min-microvolt = <1880000>;
+                                regulator-max-microvolt = <3647000>;
+                                lltc,fb-voltage-divider = <200000 56200>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
+                        reg_1p8a: ldo2 {
+                                regulator-name = "vdd1p8a";
+                                regulator-min-microvolt = <1816125>;
+                                regulator-max-microvolt = <1816125>;
+                                lltc,fb-voltage-divider = <301000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8b: HDMI In analog */
+                        reg_1p8b: ldo3 {
+                                regulator-name = "vdd1p8b";
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-boot-on;
+                        };
+
+                        /* VDD_HIGH (1+R1/R2 = 4.17) */
+                        reg_3p0: ldo4 {
+                                regulator-name = "vdd3p0";
+                                regulator-min-microvolt = <3023250>;
+                                regulator-max-microvolt = <3023250>;
+                                lltc,fb-voltage-divider = <634000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                };
+        };
 };
 
 &i2c3 {
@@ -308,6 +382,12 @@
                         >;
                 };
 
+                pinctrl_pmic: pmicgrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
+                        >;
+                };
+
                 pinctrl_pwm2: pwm2grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
index ee83161f674b..67613dd7cc92 100644
--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -55,37 +55,28 @@
                 reg = <0x10000000 0x20000000>;
         };
 
-        regulators {
-                compatible = "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                reg_1p0v: regulator@0 {
-                        compatible = "regulator-fixed";
-                        reg = <0>;
-                        regulator-name = "1P0V";
-                        regulator-min-microvolt = <1000000>;
-                        regulator-max-microvolt = <1000000>;
-                        regulator-always-on;
-                };
+        reg_1p0v: regulator-1p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "1P0V";
+                regulator-min-microvolt = <1000000>;
+                regulator-max-microvolt = <1000000>;
+                regulator-always-on;
+        };
 
-                reg_3p3v: regulator@2 {
-                        compatible = "regulator-fixed";
-                        reg = <2>;
-                        regulator-name = "3P3V";
-                        regulator-min-microvolt = <3300000>;
-                        regulator-max-microvolt = <3300000>;
-                        regulator-always-on;
-                };
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
 
-                reg_5p0v: regulator@3 {
-                        compatible = "regulator-fixed";
-                        reg = <3>;
-                        regulator-name = "5P0V";
-                        regulator-min-microvolt = <5000000>;
-                        regulator-max-microvolt = <5000000>;
-                        regulator-always-on;
-                };
+        reg_5p0v: regulator-5p0v {
+                compatible = "regulator-fixed";
+                regulator-name = "5P0V";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-always-on;
         };
 };
 
@@ -148,6 +139,81 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_i2c2>;
         status = "okay";
+
+        ltc3676: pmic@3c {
+                compatible = "lltc,ltc3676";
+                reg = <0x3c>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pmic>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+                regulators {
+                        /* VDD_SOC (1+R1/R2 = 1.635) */
+                        reg_vdd_soc: sw1 {
+                                regulator-name = "vddsoc";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */
+                        reg_1p8v: sw2 {
+                                regulator-name = "vdd1p8";
+                                regulator-min-microvolt = <1033310>;
+                                regulator-max-microvolt = <2004000>;
+                                lltc,fb-voltage-divider = <301000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_ARM (1+R1/R2 = 1.635) */
+                        reg_vdd_arm: sw3 {
+                                regulator-name = "vddarm";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_DDR (1+R1/R2 = 2.105) */
+                        reg_vdd_ddr: sw4 {
+                                regulator-name = "vddddr";
+                                regulator-min-microvolt = <868310>;
+                                regulator-max-microvolt = <1684000>;
+                                lltc,fb-voltage-divider = <221000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
+                        reg_2p5v: ldo2 {
+                                regulator-name = "vdd2p5";
+                                regulator-min-microvolt = <2490375>;
+                                regulator-max-microvolt = <2490375>;
+                                lltc,fb-voltage-divider = <487000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_HIGH (1+R1/R2 = 4.17) */
+                        reg_3p0v: ldo4 {
+                                regulator-name = "vdd3p0";
+                                regulator-min-microvolt = <3023250>;
+                                regulator-max-microvolt = <3023250>;
+                                lltc,fb-voltage-divider = <634000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                };
+        };
 };
 
 &i2c3 {
@@ -260,6 +326,12 @@
                         >;
                 };
 
+                pinctrl_pmic: pmicgrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
+                        >;
+                };
+
                 pinctrl_pwm2: pwm2grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi
index 86cec0527f73..57374dddf98d 100644
--- a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi
@@ -92,14 +92,6 @@
                 status = "okay";
         };
 
-        reg_3p3v: regulator-3p3v {
-                compatible = "regulator-fixed";
-                regulator-name = "3P0V";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                regulator-always-on;
-        };
-
         reg_5p0v: regulator-5p0v {
                 compatible = "regulator-fixed";
                 regulator-name = "5P0V";
@@ -179,6 +171,89 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_i2c2>;
         status = "okay";
+
+        ltc3676: pmic@3c {
+                compatible = "lltc,ltc3676";
+                reg = <0x3c>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pmic>;
+                interrupt-parent = <&gpio1>;
+                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+
+                regulators {
+                        /* VDD_SOC (1+R1/R2 = 1.635) */
+                        reg_vdd_soc: sw1 {
+                                regulator-name = "vddsoc";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_DDR (1+R1/R2 = 2.105) */
+                        reg_vdd_ddr: sw2 {
+                                regulator-name = "vddddr";
+                                regulator-min-microvolt = <868310>;
+                                regulator-max-microvolt = <1684000>;
+                                lltc,fb-voltage-divider = <221000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_ARM (1+R1/R2 = 1.635) */
+                        reg_vdd_arm: sw3 {
+                                regulator-name = "vddarm";
+                                regulator-min-microvolt = <674400>;
+                                regulator-max-microvolt = <1308000>;
+                                lltc,fb-voltage-divider = <127000 200000>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_3P3 (1+R1/R2 = 1.281) */
+                        reg_3p3v: sw4 {
+                                regulator-name = "vdd3p3";
+                                regulator-min-microvolt = <1880000>;
+                                regulator-max-microvolt = <3647000>;
+                                lltc,fb-voltage-divider = <200000 56200>;
+                                regulator-ramp-delay = <7000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8a (1+R1/R2 = 2.505): Analog Video Decoder */
+                        reg_1p8a: ldo2 {
+                                regulator-name = "vdd1p8a";
+                                regulator-min-microvolt = <1816125>;
+                                regulator-max-microvolt = <1816125>;
+                                lltc,fb-voltage-divider = <301000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+
+                        /* VDD_1P8b: microSD VDD_1P8 */
+                        reg_1p8b: ldo3 {
+                                regulator-name = "vdd1p8b";
+                                regulator-min-microvolt = <1800000>;
+                                regulator-max-microvolt = <1800000>;
+                                regulator-boot-on;
+                        };
+
+                        /* VDD_HIGH (1+R1/R2 = 4.17) */
+                        reg_3p0v: ldo4 {
+                                regulator-name = "vdd3p0";
+                                regulator-min-microvolt = <3023250>;
+                                regulator-max-microvolt = <3023250>;
+                                lltc,fb-voltage-divider = <634000 200000>;
+                                regulator-boot-on;
+                                regulator-always-on;
+                        };
+                };
+        };
 };
 
 &i2c3 {
@@ -255,7 +330,6 @@
         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-        vmmc-supply = <&reg_3p3v>;
         status = "okay";
 };
 
@@ -327,6 +401,12 @@
                 >;
         };
 
+        pinctrl_pmic: pmicgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
+                >;
+        };
+
         pinctrl_pps: ppsgrp {
                 fsl,pins = <
                         MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index d6c2358ffad4..988334c889eb 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
index d5c3aa88adbe..5fab5be414fe 100644
--- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -223,7 +223,7 @@
         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
         vmcc-supply = <&reg_sd3_vmmc>;
         cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
-        bus-witdh=<4>;
+        bus-witdh = <4>;
         no-1-8-v;
         status = "okay";
 };
@@ -234,7 +234,7 @@
         pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
         pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
         vmcc-supply = <&reg_sd4_vmmc>;
-        bus-witdh=<8>;
+        bus-witdh = <8>;
         no-1-8-v;
         non-removable;
         status = "okay";
diff --git a/arch/arm/boot/dts/imx6qdl-icore.dtsi b/arch/arm/boot/dts/imx6qdl-icore.dtsi
index 023839a02dd0..55bebfc9ad94 100644
--- a/arch/arm/boot/dts/imx6qdl-icore.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore.dtsi
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
index 469ef58ce4bc..a9b207751a02 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -13,17 +13,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index 3d62401dbd7f..6a410160c9ee 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
index 63acd54f5278..6b81580623ff 100644
--- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -209,7 +209,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -515,8 +514,6 @@
         status = "okay";
 
         lvds-channel@0 {
-                fsl,data-mapping = "spwg";
-                fsl,data-width = <18>;
                 status = "okay";
 
                 port@4 {
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
index 47ba97229a48..bad3c9f9eeac 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -351,7 +351,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -739,8 +738,6 @@
         status = "okay";
 
         lvds-channel@0 {
-                fsl,data-mapping = "spwg";
-                fsl,data-width = <18>;
                 status = "okay";
 
                 port@4 {
@@ -753,8 +750,6 @@
         };
 
         lvds-channel@1 {
-                fsl,data-mapping = "spwg";
-                fsl,data-width = <18>;
                 status = "okay";
 
                 port@4 {
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
index 31d4cc62dbc7..559da17297ef 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -282,7 +282,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -640,8 +639,6 @@
         status = "okay";
 
         lvds-channel@0 {
-                fsl,data-mapping = "spwg";
-                fsl,data-width = <18>;
                 status = "okay";
 
                 port@4 {
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 26d060484728..70772ebadd4d 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -255,7 +255,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -579,8 +578,6 @@
         status = "okay";
 
         lvds-channel@0 {
-                fsl,data-mapping = "spwg";
-                fsl,data-width = <18>;
                 status = "okay";
 
                 port@4 {
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index e9801a26f3b4..6e5cb6a99550 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -76,7 +76,6 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi3>;
         status = "okay";
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 24 0>;
 
         flash@0 {
diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi
index 17704a5c1bcb..5cf90c24c707 100644
--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi
@@ -89,7 +89,6 @@
 };
 
 &ecspi2 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
@@ -97,7 +96,6 @@
 };
 
 &ecspi3 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi3>;
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 52390ba83e81..a2a714d199ea 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -124,7 +124,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 1f9076e271e4..84131794e97b 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -241,7 +241,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -525,8 +524,6 @@
         status = "okay";
 
         lvds-channel@0 {
-                fsl,data-mapping = "spwg";
-                fsl,data-width = <18>;
                 status = "okay";
 
                 port@4 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 55ef53571fdd..63bf95ed8c88 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -160,7 +160,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 9 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
diff --git a/arch/arm/boot/dts/imx6qdl-savageboard.dtsi b/arch/arm/boot/dts/imx6qdl-savageboard.dtsi
new file mode 100644
index 000000000000..a616e3c400d3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-savageboard.dtsi
@@ -0,0 +1,255 @@
+/*
+ * Copyright (C) 2017 Milo Kim <woogyom.kim@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+        chosen {
+                stdout-path = &uart1;
+        };
+
+        memory@10000000 {
+                device_type = "memory";
+                reg = <0x10000000 0x40000000>;
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_gpio_keys>;
+
+                power {
+                        gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
+                        label = "Power Button";
+                        linux,code = <KEY_POWER>;
+                        wakeup-source;
+                };
+        };
+
+        panel {
+                compatible = "avic,tm097tdh02", "hannstar,hsd100pxn1";
+                backlight = <&panel_bl>;
+                power-supply = <&reg_3p3v>;
+
+                port {
+                        panel_in: endpoint {
+                                remote-endpoint = <&lvds0_out>;
+                        };
+                };
+        };
+
+        panel_bl: backlight {
+                compatible = "pwm-backlight";
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <4>;
+                power-supply = <&reg_3p3v>;
+                pwms = <&pwm1 0 10000>;
+        };
+
+        reg_3p3v: regulator-3p3v {
+                compatible = "regulator-fixed";
+                regulator-name = "3P3V";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
+};
+
+&clks {
+        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+                                 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
+&fec {
+        phy-mode = "rgmii";
+        phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_enet>;
+        status = "okay";
+};
+
+&hdmi {
+        ddc-i2c-bus = <&i2c2>;
+        status = "okay";
+};
+
+&i2c2 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2>;
+        status = "okay";
+};
+
+&ldb {
+        status = "okay";
+
+        lvds-channel@0 {
+                reg = <0>;
+                status = "okay";
+
+                port@4 {
+                        reg = <4>;
+
+                        lvds0_out: endpoint {
+                                remote-endpoint = <&panel_in>;
+                        };
+                };
+        };
+};
+
+&pwm1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm1>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        status = "okay";
+};
+
+&usbh1 {
+        status = "okay";
+};
+
+/* SD card */
+&usdhc3 {
+        bus-width = <4>;
+        cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+        no-1-8-v;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_sd>;
+        status = "okay";
+};
+
+/* eMMC */
+&usdhc4 {
+        bus-width = <8>;
+        keep-power-in-suspend;
+        no-1-8-v;
+        non-removable;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_emmc>;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_emmc: emmcgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
+                        MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
+                        MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
+                        MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
+                        MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
+                        MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
+                        MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
+                        MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
+                        MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
+                        MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
+                >;
+        };
+
+        pinctrl_enet: enetgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
+                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
+                        MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                        MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                        MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                        MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                        MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                        MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
+                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
+                        MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                        MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                        MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                        MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                        MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                        MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                        /* PHY reset */
+                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b0b0
+                >;
+        };
+
+        pinctrl_gpio_keys: gpiokeysgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_EIM_DA7__GPIO3_IO07          0x1b0b1
+                >;
+        };
+
+        pinctrl_i2c2: i2c2grp {
+                fsl,pins = <
+                        MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
+                        MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
+                >;
+        };
+
+        pinctrl_pwm1: pwm1grp {
+                fsl,pins = <
+                        MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
+                >;
+        };
+
+        pinctrl_sd: sdgrp {
+                fsl,pins = <
+                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
+                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
+                        MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
+                        MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
+                        MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
+                        MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
+                        /* CD pin */
+                        MX6QDL_PAD_NANDF_D0__GPIO2_IO00         0x1b0b1
+                >;
+        };
+
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
+                        MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6qdl-ts4900.dtsi b/arch/arm/boot/dts/imx6qdl-ts4900.dtsi
index 5c26b26e851a..267c956d8910 100644
--- a/arch/arm/boot/dts/imx6qdl-ts4900.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-ts4900.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -95,7 +95,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
@@ -109,7 +108,6 @@
 };
 
 &ecspi2 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
index 2bf2e623ac1e..1691714f13a2 100644
--- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
@@ -221,7 +221,6 @@
 &ecspi1 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <
                 &gpio2 30 GPIO_ACTIVE_HIGH
                 &gpio3 19 GPIO_ACTIVE_HIGH
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 6d37d9af5f1d..6d7bf6496117 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -634,8 +634,8 @@
                                 regulator-1p1 {
                                         compatible = "fsl,anatop-regulator";
                                         regulator-name = "vdd1p1";
-                                        regulator-min-microvolt = <800000>;
-                                        regulator-max-microvolt = <1375000>;
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                         anatop-reg-offset = <0x110>;
                                         anatop-vol-bit-shift = <8>;
@@ -662,15 +662,15 @@
                                 regulator-2p5 {
                                         compatible = "fsl,anatop-regulator";
                                         regulator-name = "vdd2p5";
-                                        regulator-min-microvolt = <2000000>;
+                                        regulator-min-microvolt = <2250000>;
                                         regulator-max-microvolt = <2750000>;
                                         regulator-always-on;
                                         anatop-reg-offset = <0x130>;
                                         anatop-vol-bit-shift = <8>;
                                         anatop-vol-bit-width = <5>;
                                         anatop-min-bit-val = <0>;
-                                        anatop-min-voltage = <2000000>;
-                                        anatop-max-voltage = <2750000>;
+                                        anatop-min-voltage = <2100000>;
+                                        anatop-max-voltage = <2875000>;
                                 };
 
                                 reg_arm: regulator-vddcore {
@@ -816,7 +816,7 @@
                                 reg = <0x020e0000 0x4000>;
                         };
 
-                        ldb: ldb@020e0008 {
+                        ldb: ldb {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 0d4977ab7d29..24d071f5d9cd 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -95,6 +95,12 @@
         };
 };
 
+&fec {
+        /delete-property/interrupts-extended;
+        interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
+                     <0 119 IRQ_TYPE_LEVEL_HIGH>;
+};
+
 &ldb {
         clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
                  <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index be118820e9f7..0a90eea17018 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -117,7 +117,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio4 11 0>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
diff --git a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
index 9b817f3501a6..802da45aa551 100644
--- a/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
+++ b/arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
@@ -142,7 +142,6 @@
 };
 
 &ecspi1 {
-        fsl,spi-num-chipselects = <1>;
         cs-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi1>;
diff --git a/arch/arm/boot/dts/imx6sx-sdb-sai.dts b/arch/arm/boot/dts/imx6sx-sdb-sai.dts
index 0155450d680e..2ac865b7c364 100644
--- a/arch/arm/boot/dts/imx6sx-sdb-sai.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb-sai.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
index 2b65d26f4396..49f466fe0b1d 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
@@ -75,6 +75,50 @@
                 regulator-max-microvolt = <3300000>;
                 regulator-boot-on;
         };
+
+        reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+                compatible = "regulator-fixed";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_otg1_reg>;
+                regulator-name = "usb_otg1_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+                compatible = "regulator-fixed";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_otg2_reg>;
+                regulator-name = "usb_otg2_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_wlan: regulator-wlan {
+                compatible = "regulator-fixed";
+                regulator-name = "wlan-en-regulator";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <1800000>;
+                gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+                startup-delay-us = <70000>;
+                enable-active-high;
+        };
+
+        reg_bt: regulator-bt {
+                compatible = "regulator-fixed";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_bt_reg>;
+                enable-active-high;
+                gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>;
+                regulator-name = "bt_reg";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <1800000>;
+                regulator-always-on;
+        };
 };
 
 &cpu0 {
@@ -86,6 +130,7 @@
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_enet1>;
         phy-mode = "rmii";
+        phy-reset-duration = <10>;
         phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 };
 
@@ -186,6 +231,11 @@
 };
 
 &iomuxc {
+        pinctrl_bt_reg: btreggrp {
+                fsl,pins =
+                        <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17        0x15059>;
+        };
+
         pinctrl_enet1: enet1grp {
                 fsl,pins =
                         <MX6SX_PAD_ENET1_CRS__GPIO2_IO_1        0xa0b1>,
@@ -223,6 +273,14 @@
                         <MX6SX_PAD_GPIO1_IO07__UART2_RX         0x1b0b1>;
         };
 
+        pinctrl_uart3: uart3grp {
+                fsl,pins =
+                        <MX6SX_PAD_SD3_DATA4__UART3_RX          0x13059>,
+                        <MX6SX_PAD_SD3_DATA5__UART3_TX          0x13059>,
+                        <MX6SX_PAD_SD3_DATA6__UART3_RTS_B       0x13059>,
+                        <MX6SX_PAD_SD3_DATA7__UART3_CTS_B       0x13059>;
+        };
+
         pinctrl_uart5: uart5grp {
                 fsl,pins =
                         <MX6SX_PAD_SD4_DATA4__UART5_RX          0x1b0b1>,
@@ -241,6 +299,28 @@
                         <MX6SX_PAD_CSI_DATA07__UART6_CTS_B      0x1b0b1>;
         };
 
+        pinctrl_otg1_reg: otg1grp {
+                fsl,pins =
+                        <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9        0x10b0>;
+        };
+
+
+        pinctrl_otg2_reg: otg2grp {
+                fsl,pins =
+                        <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12        0x10b0>;
+        };
+
+        pinctrl_usb_otg1: usbotg1grp {
+                fsl,pins =
+                        <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID    0x17059>,
+                        <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC       0x10b0>;
+        };
+
+        pinctrl_usb_otg2: usbot2ggrp {
+                fsl,pins =
+                        <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC     0x10b0>;
+        };
+
         pinctrl_usdhc2: usdhc2grp {
                 fsl,pins =
                         <MX6SX_PAD_SD2_CMD__USDHC2_CMD          0x17059>,
@@ -251,6 +331,19 @@
                         <MX6SX_PAD_SD2_DATA3__USDHC2_DATA3      0x17059>,
                         <MX6SX_PAD_SD1_DATA0__GPIO6_IO_2        0x17059>; /* CD */
         };
+
+        pinctrl_usdhc3: usdhc3grp {
+                fsl,pins =
+                        <MX6SX_PAD_KEY_COL2__GPIO2_IO_12        0x15059>,
+                        <MX6SX_PAD_KEY_ROW1__GPIO2_IO_16        0x13059>,
+                        <MX6SX_PAD_SD3_DATA0__USDHC3_DATA0      0x17069>,
+                        <MX6SX_PAD_SD3_DATA1__USDHC3_DATA1      0x17069>,
+                        <MX6SX_PAD_SD3_DATA2__USDHC3_DATA2      0x17069>,
+                        <MX6SX_PAD_SD3_DATA3__USDHC3_DATA3      0x17069>,
+                        <MX6SX_PAD_SD3_CMD__USDHC3_CMD          0x17069>,
+                        <MX6SX_PAD_SD3_CLK__USDHC3_CLK          0x10069>,
+                        <MX6SX_PAD_CSI_MCLK__OSC32K_32K_OUT     0x10059>;
+        };
 };
 
 &uart1 {
@@ -266,6 +359,13 @@
         status = "disabled";
 };
 
+&uart3 { /* Bluetooth */
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart3>;
+        uart-has-rtscts;
+        status = "okay";
+};
+
 /* Arduino serial */
 &uart5 {
         pinctrl-names = "default";
@@ -280,6 +380,21 @@
         status = "disabled";
 };
 
+&usbotg1 { /* J2 micro USB port */
+        vbus-supply = <&reg_usb_otg1_vbus>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usb_otg1>;
+        status = "okay";
+};
+
+&usbotg2 { /* J3 host USB port */
+        vbus-supply = <&reg_usb_otg2_vbus>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usb_otg2>;
+        dr_mode = "host";
+        status = "okay";
+};
+
 &usdhc2 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_usdhc2>;
@@ -291,3 +406,25 @@
         wakeup-source;
         status = "okay";
 };
+
+&usdhc3 { /* Wi-Fi */
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc3>;
+        non-removable;
+        vmmc-supply = <&reg_wlan>;
+        cap-power-off-card;
+        wakeup-source;
+        keep-power-in-suspend;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        status = "okay";
+
+        wlcore: wlcore@2 {
+                compatible = "ti,wl1831";
+                reg = <2>;
+                interrupt-parent = <&gpio2>;
+                interrupts = <16 IRQ_TYPE_EDGE_RISING>;
+                ref-clock-frequency = <38400000>;
+                tcxo-clock-frequency = <26000000>;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts
index 4c4af76143e3..142e60cab65f 100644
--- a/arch/arm/boot/dts/imx6ul-geam-kit.dts
+++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi
index 64eb9ed59b9c..940aef67313b 100644
--- a/arch/arm/boot/dts/imx6ul-geam.dtsi
+++ b/arch/arm/boot/dts/imx6ul-geam.dtsi
@@ -11,17 +11,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -30,11 +30,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6ul-isiot-emmc.dts b/arch/arm/boot/dts/imx6ul-isiot-emmc.dts
new file mode 100644
index 000000000000..f5b422898e61
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-isiot-emmc.dts
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6ul-isiot.dtsi"
+
+/ {
+        model = "Engicam Is.IoT MX6UL eMMC Starter kit";
+        compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
+};
+
+&usdhc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc2>;
+        cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
+        bus-width = <8>;
+        no-1-8-v;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_usdhc2: usdhc2grp {
+                fsl,pins = <
+                        MX6UL_PAD_NAND_RE_B__USDHC2_CLK      0x17070
+                        MX6UL_PAD_NAND_WE_B__USDHC2_CMD      0x10070
+                        MX6UL_PAD_NAND_DATA00__USDHC2_DATA0  0x17070
+                        MX6UL_PAD_NAND_DATA01__USDHC2_DATA1  0x17070
+                        MX6UL_PAD_NAND_DATA02__USDHC2_DATA2  0x17070
+                        MX6UL_PAD_NAND_DATA03__USDHC2_DATA3  0x17070
+                        MX6UL_PAD_NAND_DATA04__USDHC2_DATA4  0x17070
+                        MX6UL_PAD_NAND_DATA05__USDHC2_DATA5  0x17070
+                        MX6UL_PAD_NAND_DATA06__USDHC2_DATA6  0x17070
+                        MX6UL_PAD_NAND_DATA07__USDHC2_DATA7  0x17070
+                        MX6UL_PAD_NAND_ALE__USDHC2_RESET_B   0x17070
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6ul-isiot-nand.dts b/arch/arm/boot/dts/imx6ul-isiot-nand.dts
new file mode 100644
index 000000000000..de15e1c75dd1
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-isiot-nand.dts
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6ul-isiot.dtsi"
+
+/ {
+        model = "Engicam Is.IoT MX6UL NAND Starter kit";
+        compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
+};
+
+&gpmi {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpmi_nand>;
+        nand-on-flash-bbt;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_gpmi_nand: gpmi-nand {
+                fsl,pins = <
+                        MX6UL_PAD_NAND_CLE__RAWNAND_CLE         0xb0b1
+                        MX6UL_PAD_NAND_ALE__RAWNAND_ALE         0xb0b1
+                        MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B       0xb0b1
+                        MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+                        MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B     0xb0b1
+                        MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B       0xb0b1
+                        MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B       0xb0b1
+                        MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00   0xb0b1
+                        MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01   0xb0b1
+                        MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02   0xb0b1
+                        MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03   0xb0b1
+                        MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04   0xb0b1
+                        MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05   0xb0b1
+                        MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06   0xb0b1
+                        MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07   0xb0b1
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6ul-isiot.dtsi b/arch/arm/boot/dts/imx6ul-isiot.dtsi
new file mode 100644
index 000000000000..0b43699af3e3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-isiot.dtsi
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6ul.dtsi"
+
+/ {
+        memory {
+                reg = <0x80000000 0x20000000>;
+        };
+
+        chosen {
+                stdout-path = &uart1;
+        };
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        status = "okay";
+};
+
+&usdhc1 {
+        pinctrl-names = "default", "state_100mhz", "state_200mhz";
+        pinctrl-0 = <&pinctrl_usdhc1>;
+        pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+        pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+        cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+        bus-width = <4>;
+        no-1-8-v;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+                        MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+                >;
+        };
+
+        pinctrl_usdhc1: usdhc1grp {
+                fsl,pins = <
+                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
+                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
+                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+                >;
+        };
+
+        pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+                fsl,pins = <
+                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
+                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
+                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+                >;
+        };
+
+        pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+                fsl,pins = <
+                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
+                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
+                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6ul-liteboard.dts b/arch/arm/boot/dts/imx6ul-liteboard.dts
index 6e04cb9202f4..ed1d891d6a89 100644
--- a/arch/arm/boot/dts/imx6ul-liteboard.dts
+++ b/arch/arm/boot/dts/imx6ul-liteboard.dts
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6ul-litesom.dtsi b/arch/arm/boot/dts/imx6ul-litesom.dtsi
index 461292d33417..039721d3dcb4 100644
--- a/arch/arm/boot/dts/imx6ul-litesom.dtsi
+++ b/arch/arm/boot/dts/imx6ul-litesom.dtsi
@@ -12,17 +12,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -31,11 +31,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6ul-opos6ul.dtsi b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
new file mode 100644
index 000000000000..51095df33a90
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-opos6ul.dtsi
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2017 Armadeus Systems <support@armadeus.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of
+ *     the License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this file; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6ul.dtsi"
+
+/ {
+        memory {
+                reg = <0x80000000 0>; /* will be filled by U-Boot */
+        };
+
+        reg_3v3: regulator-3v3 {
+                compatible = "regulator-fixed";
+                regulator-name = "3V3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+
+        usdhc3_pwrseq: usdhc3-pwrseq {
+                compatible = "mmc-pwrseq-simple";
+                reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
+        };
+};
+
+&fec1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_enet1>;
+        phy-mode = "rmii";
+        phy-reset-duration = <1>;
+        phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
+        phy-handle = <&ethphy1>;
+        phy-supply = <&reg_3v3>;
+        status = "okay";
+
+        mdio: mdio {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ethphy1: ethernet-phy@1 {
+                        compatible = "ethernet-phy-ieee802.3-c22";
+                        reg = <1>;
+                        interrupt-parent = <&gpio4>;
+                        interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+                        status = "okay";
+                };
+        };
+};
+
+/* Bluetooth */
+&uart8 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart8>;
+        uart-has-rtscts;
+        status = "okay";
+};
+
+/* eMMC */
+&usdhc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc1>;
+        bus-width = <8>;
+        no-1-8-v;
+        non-removable;
+        status = "okay";
+};
+
+/* WiFi */
+&usdhc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc2>;
+        bus-width = <4>;
+        no-1-8-v;
+        non-removable;
+        mmc-pwrseq = <&usdhc3_pwrseq>;
+        status = "okay";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        brcmf: bcrmf@1 {
+                compatible = "brcm,bcm4329-fmac";
+                reg = <1>;
+                interrupt-parent = <&gpio2>;
+                interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+                interrupt-names = "host-wake";
+        };
+};
+
+&iomuxc {
+        pinctrl_enet1: enet1grp {
+                fsl,pins = <
+                        MX6UL_PAD_GPIO1_IO06__ENET1_MDIO        0x1b0b0
+                        MX6UL_PAD_GPIO1_IO07__ENET1_MDC         0x1b0b0
+                        MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x130b0
+                        MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x130b0
+                        MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x130b0
+                        MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x130b0
+                        MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+                        MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+                        MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
+                        /* INT# */
+                        MX6UL_PAD_NAND_DQS__GPIO4_IO16          0x1b0b0
+                        /* RST# */
+                        MX6UL_PAD_NAND_DATA00__GPIO4_IO02       0x130b0
+                        MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+                >;
+        };
+
+        pinctrl_uart8: uart8grp {
+                fsl,pins = <
+                        MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX     0x1b0b0
+                        MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX  0x1b0b0
+                        MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS    0x1b0b0
+                        MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS   0x1b0b0
+                        /* BT_REG_ON */
+                        MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10       0x130b0
+                >;
+        };
+
+        pinctrl_usdhc1: usdhc1grp {
+                fsl,pins = <
+                        MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
+                        MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10059
+                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
+                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
+                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
+                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
+                        MX6UL_PAD_NAND_READY_B__USDHC1_DATA4    0x17059
+                        MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5      0x17059
+                        MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6      0x17059
+                        MX6UL_PAD_NAND_CLE__USDHC1_DATA7        0x17059
+                >;
+        };
+
+        pinctrl_usdhc2: usdhc2grp {
+                fsl,pins = <
+                        MX6UL_PAD_LCD_DATA18__USDHC2_CMD        0x1b0b0
+                        MX6UL_PAD_LCD_DATA19__USDHC2_CLK        0x100b0
+                        MX6UL_PAD_LCD_DATA20__USDHC2_DATA0      0x1b0b0
+                        MX6UL_PAD_LCD_DATA21__USDHC2_DATA1      0x1b0b0
+                        MX6UL_PAD_LCD_DATA22__USDHC2_DATA2      0x1b0b0
+                        MX6UL_PAD_LCD_DATA23__USDHC2_DATA3      0x1b0b0
+                        /* WL_REG_ON */
+                        MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09    0x130b0
+                        /* WL_IRQ */
+                        MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08    0x1b0b0
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6ul-opos6uldev.dts b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
new file mode 100644
index 000000000000..0e59ee57fd55
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-opos6uldev.dts
@@ -0,0 +1,412 @@
+/*
+ * Copyright 2017 Armadeus Systems <support@armadeus.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of
+ *     the License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this file; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "imx6ul-opos6ul.dtsi"
+
+/ {
+        model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
+        compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
+
+        chosen {
+                stdout-path = &uart1;
+        };
+
+        backlight {
+                compatible = "pwm-backlight";
+                pwms = <&pwm3 0 191000>;
+                brightness-levels = <0 4 8 16 32 64 128 255>;
+                default-brightness-level = <7>;
+                power-supply = <&reg_5v>;
+                status = "okay";
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_gpio_keys>;
+
+                user-button {
+                        label = "User button";
+                        gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
+                        linux,code = <BTN_MISC>;
+                        wakeup-source;
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                user-led {
+                        label = "User";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_led>;
+                        gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        onewire {
+                compatible = "w1-gpio";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_w1>;
+                gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+        };
+
+        reg_5v: regulator-5v {
+                compatible = "regulator-fixed";
+                regulator-name = "5V";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+        };
+
+        reg_usbotg1_vbus: regulator-usbotg1vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usbotg1vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usbotg1_vbus>;
+                gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        reg_usbotg2_vbus: regulator-usbotg2vbus {
+                compatible = "regulator-fixed";
+                regulator-name = "usbotg2vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_usbotg2_vbus>;
+                gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+};
+
+&adc1 {
+        vref-supply = <&reg_3v3>;
+        status = "okay";
+};
+
+&can1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_flexcan1>;
+        xceiver-supply = <&reg_5v>;
+        status = "okay";
+};
+
+&can2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_flexcan2>;
+        xceiver-supply = <&reg_5v>;
+        status = "okay";
+};
+
+&ecspi4 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_ecspi4>;
+        cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
+        status = "okay";
+
+        spidev0: spi@0 {
+                compatible = "spidev";
+                reg = <0>;
+                spi-max-frequency = <5000000>;
+        };
+
+        spidev1: spi@1 {
+                compatible = "spidev";
+                reg = <1>;
+                spi-max-frequency = <5000000>;
+        };
+};
+
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c1>;
+        clock_frequency = <400000>;
+        status = "okay";
+};
+
+&i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2>;
+        clock_frequency = <400000>;
+        status = "okay";
+};
+
+&lcdif {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_lcdif>;
+        display = <&display0>;
+        lcd-supply = <&reg_3v3>;
+        status = "okay";
+
+        display0: display0 {
+                bits-per-pixel = <32>;
+                bus-width = <18>;
+
+                display-timings {
+                        timing0: timing0 {
+                                clock-frequency = <33000033>;
+                                hactive = <800>;
+                                vactive = <480>;
+                                hback-porch = <96>;
+                                hfront-porch = <96>;
+                                vback-porch = <20>;
+                                vfront-porch = <21>;
+                                hsync-len = <64>;
+                                vsync-len = <4>;
+                                de-active = <1>;
+                                pixelclk-active = <0>;
+                        };
+                };
+        };
+};
+
+&pwm3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_pwm3>;
+        status = "okay";
+};
+
+&snvs_pwrkey {
+        status = "disabled";
+};
+
+&tsc {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_tsc>;
+        xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+        measure-delay-time = <0xffff>;
+        pre-charge-time = <0xffff>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        status = "okay";
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart2>;
+        status = "okay";
+};
+
+&usbotg1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usbotg1_id>;
+        vbus-supply = <&reg_usbotg1_vbus>;
+        dr_mode = "otg";
+        disable-over-current;
+        status = "okay";
+};
+
+&usbotg2 {
+        vbus-supply = <&reg_usbotg2_vbus>;
+        dr_mode = "host";
+        disable-over-current;
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpios>;
+
+        pinctrl_ecspi4: ecspi4grp {
+                fsl,pins = <
+                        MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK      0x1b0b0
+                        MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI      0x1b0b0
+                        MX6UL_PAD_NAND_DATA06__ECSPI4_MISO      0x1b0b0
+                        MX6UL_PAD_NAND_DATA01__GPIO4_IO03       0x1b0b0
+                        MX6UL_PAD_NAND_DATA07__GPIO4_IO09       0x1b0b0
+                >;
+        };
+
+        pinctrl_flexcan1: flexcan1grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x0b0b0
+                        MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x0b0b0
+                >;
+        };
+
+        pinctrl_flexcan2: flexcan2grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX      0x0b0b0
+                        MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX      0x0b0b0
+                >;
+        };
+
+        pinctrl_gpios: gpiosgrp {
+                fsl,pins = <
+                        MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x0b0b0
+                        MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25     0x0b0b0
+                        MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24     0x0b0b0
+                        MX6UL_PAD_NAND_RE_B__GPIO4_IO00         0x0b0b0
+                        MX6UL_PAD_GPIO1_IO08__GPIO1_IO08        0x0b0b0
+                        MX6UL_PAD_UART1_CTS_B__GPIO1_IO18       0x0b0b0
+                        MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x0b0b0
+                        MX6UL_PAD_NAND_WE_B__GPIO4_IO01         0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x0b0b0
+                        MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08      0x0b0b0
+                >;
+        };
+
+        pinctrl_gpio_keys: gpiokeysgrp {
+                fsl,pins = <
+                        MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11    0x0b0b0
+                >;
+        };
+
+        pinctrl_i2c1: i2c1grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART4_RX_DATA__I2C1_SDA       0x4001b8b0
+                        MX6UL_PAD_UART4_TX_DATA__I2C1_SCL       0x4001b8b0
+                >;
+        };
+
+        pinctrl_i2c2: i2c2grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART5_RX_DATA__I2C2_SDA       0x4001b8b0
+                        MX6UL_PAD_UART5_TX_DATA__I2C2_SCL       0x4001b8b0
+                >;
+        };
+
+        pinctrl_lcdif: lcdifgrp {
+                fsl,pins = <
+                        MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x100b1
+                        MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x100b1
+                        MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x100b1
+                        MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x100b1
+                        MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x100b1
+                        MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x100b1
+                        MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x100b1
+                        MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x100b1
+                        MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x100b1
+                        MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x100b1
+                        MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x100b1
+                        MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x100b1
+                        MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x100b1
+                        MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x100b1
+                        MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x100b1
+                        MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x100b1
+                        MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x100b1
+                        MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x100b1
+                        MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x100b1
+                        MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x100b1
+                        MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x100b1
+                        MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x100b1
+                >;
+        };
+
+        pinctrl_led: ledgrp {
+                fsl,pins = <
+                        MX6UL_PAD_LCD_RESET__GPIO3_IO04         0x0b0b0
+                >;
+        };
+
+        pinctrl_pwm3: pwm3grp {
+                fsl,pins = <
+                        MX6UL_PAD_NAND_ALE__PWM3_OUT            0x1b0b0
+                >;
+        };
+
+        pinctrl_tsc: tscgrp {
+                fsl,pins = <
+                        MX6UL_PAD_GPIO1_IO01__GPIO1_IO01       0xb0
+                        MX6UL_PAD_GPIO1_IO02__GPIO1_IO02       0xb0
+                        MX6UL_PAD_GPIO1_IO03__GPIO1_IO03       0xb0
+                        MX6UL_PAD_GPIO1_IO04__GPIO1_IO04       0xb0
+                >;
+        };
+
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1
+                        MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX   0x1b0b1
+                >;
+        };
+
+        pinctrl_uart2: uart2grp {
+                fsl,pins = <
+                        MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
+                        MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
+                >;
+        };
+
+        pinctrl_usbotg1_id: usbotg1idgrp {
+                fsl,pins = <
+                        MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x1b0b0
+                >;
+        };
+
+        pinctrl_usbotg1_vbus: usbotg1vbusgrp {
+                fsl,pins = <
+                        MX6UL_PAD_GPIO1_IO05__GPIO1_IO05        0x1b0b0
+                >;
+        };
+
+        pinctrl_usbotg2_vbus: usbotg2vbusgrp {
+                fsl,pins = <
+                        MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09      0x1b0b0
+                >;
+        };
+
+        pinctrl_w1: w1grp {
+                fsl,pins = <
+                        MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01      0x0b0b0
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/imx6ul-pico-hobbit.dts b/arch/arm/boot/dts/imx6ul-pico-hobbit.dts
index 827d9e8fc74e..7d7254b12a75 100644
--- a/arch/arm/boot/dts/imx6ul-pico-hobbit.dts
+++ b/arch/arm/boot/dts/imx6ul-pico-hobbit.dts
@@ -14,17 +14,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6ul-tx6ul.dtsi b/arch/arm/boot/dts/imx6ul-tx6ul.dtsi
index 530e9ca13a74..c784a0b75ca0 100644
--- a/arch/arm/boot/dts/imx6ul-tx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul-tx6ul.dtsi
@@ -285,7 +285,6 @@
 &ecspi2 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi2>;
-        fsl,spi-num-chipselects = <2>;
         cs-gpios = <
                 &gpio1 29 GPIO_ACTIVE_HIGH
                 &gpio1 10 GPIO_ACTIVE_HIGH
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 53d3f8e41e9b..b9d7d2d09402 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -99,11 +99,11 @@
         };
 
         intc: interrupt-controller@00a01000 {
-                compatible = "arm,cortex-a7-gic";
+                compatible = "arm,gic-400", "arm,cortex-a7-gic";
                 #interrupt-cells = <3>;
                 interrupt-controller;
                 reg = <0x00a01000 0x1000>,
-                      <0x00a02000 0x1000>,
+                      <0x00a02000 0x2000>,
                       <0x00a04000 0x2000>,
                       <0x00a06000 0x2000>;
         };
@@ -542,7 +542,6 @@
                                         anatop-min-bit-val = <0>;
                                         anatop-min-voltage = <2625000>;
                                         anatop-max-voltage = <3400000>;
-                                        anatop-enable-bit = <0>;
                                 };
 
                                 reg_arm: regulator-vddcore {
@@ -859,6 +858,12 @@
                                 reg = <0x021b0000 0x4000>;
                         };
 
+                        ocotp: ocotp-ctrl@021bc000 {
+                                compatible = "fsl,imx6ul-ocotp", "syscon";
+                                reg = <0x021bc000 0x4000>;
+                                clocks = <&clks IMX6UL_CLK_OCOTP>;
+                        };
+
                         lcdif: lcdif@021c8000 {
                                 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
                                 reg = <0x021c8000 0x4000>;
diff --git a/arch/arm/boot/dts/imx6ull-14x14-evk.dts b/arch/arm/boot/dts/imx6ull-14x14-evk.dts
index db5bc076e1cc..4741871434dd 100644
--- a/arch/arm/boot/dts/imx6ull-14x14-evk.dts
+++ b/arch/arm/boot/dts/imx6ull-14x14-evk.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index dee8ab8135e1..0c182917b863 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index a9cc65725f19..a171545478be 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -596,29 +596,29 @@
 
         pinctrl_gpio_lpsr: gpio1-grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO01__GPIO1_IO1  0x59
-                        MX7D_PAD_GPIO1_IO02__GPIO1_IO2  0x59
-                        MX7D_PAD_GPIO1_IO03__GPIO1_IO3  0x59
+                        MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1     0x59
+                        MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2     0x59
+                        MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3     0x59
                 >;
         };
 
         pinctrl_i2c1: i2c1-grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO05__I2C1_SDA   0x4000007f
-                        MX7D_PAD_GPIO1_IO04__I2C1_SCL   0x4000007f
+                        MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA      0x4000007f
+                        MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL      0x4000007f
                 >;
         };
 
         pinctrl_cd_usdhc1: usdhc1-cd-grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO00__GPIO1_IO0  0x59 /* CD */
+                        MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x59 /* CD */
                 >;
         };
 
         pinctrl_uart1_ctrl2: uart1-ctrl2-grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO07__GPIO1_IO7  0x14 /* DSR */
-                        MX7D_PAD_GPIO1_IO06__GPIO1_IO6  0x14 /* RI */
+                        MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7     0x14 /* DSR */
+                        MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6     0x14 /* RI */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 58b09bf1ba2d..ae45af1ad062 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -261,12 +261,6 @@
                 >;
         };
 
-        pinctrl_usbotg1: usbotg1grp {
-                fsl,pins = <
-                        MX7D_PAD_GPIO1_IO05__GPIO1_IO5          0x14 /* OTG PWREN */
-                >;
-        };
-
         pinctrl_usdhc3: usdhc3grp {
                 fsl,pins = <
                         MX7D_PAD_SD3_CMD__SD3_CMD               0x59
@@ -283,3 +277,11 @@
                 >;
         };
 };
+
+&iomuxc_lpsr {
+        pinctrl_usbotg1: usbotg1grp {
+                fsl,pins = <
+                        MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x14 /* OTG PWREN */
+                >;
+        };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/imx7d-nitrogen7.dts b/arch/arm/boot/dts/imx7d-nitrogen7.dts
index ce08f180f213..5d98e2b5d54b 100644
--- a/arch/arm/boot/dts/imx7d-nitrogen7.dts
+++ b/arch/arm/boot/dts/imx7d-nitrogen7.dts
@@ -712,33 +712,33 @@
 
         pinctrl_hog_2: hoggrp-2 {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO02__GPIO1_IO2          0x7d
-                        MX7D_PAD_GPIO1_IO03__CCM_CLKO2          0x7d
+                        MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2     0x7d
+                        MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2     0x7d
                 >;
         };
 
         pinctrl_backlight_j9: backlightj9grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO07__GPIO1_IO7          0x7d
+                        MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7     0x7d
                 >;
         };
 
         pinctrl_pwm1: pwm1grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO01__PWM1_OUT           0x7d
+                        MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT      0x7d
                 >;
         };
 
         pinctrl_usbotg1: usbotg1grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO04__USB_OTG1_OC        0x7d
-                        MX7D_PAD_GPIO1_IO05__GPIO1_IO5          0x14
+                        MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC   0x7d
+                        MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x14
                 >;
         };
 
         pinctrl_wdog1: wdog1grp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B       0x75
+                        MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B  0x75
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/imx7d-pinfunc.h b/arch/arm/boot/dts/imx7d-pinfunc.h
index 7bc3c00e56c6..f6f7e78f8820 100644
--- a/arch/arm/boot/dts/imx7d-pinfunc.h
+++ b/arch/arm/boot/dts/imx7d-pinfunc.h
@@ -15,61 +15,61 @@
  * <mux_reg conf_reg input_reg mux_mode input_val>
  */
 
-#define MX7D_PAD_GPIO1_IO00__GPIO1_IO0                            0x0000 0x0030 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO00__PWM4_OUT                             0x0000 0x0030 0x0000 0x1 0x0
-#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_ANY                       0x0000 0x0030 0x0000 0x2 0x0
-#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B                         0x0000 0x0030 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB                0x0000 0x0030 0x0000 0x4 0x0
-#define MX7D_PAD_GPIO1_IO01__GPIO1_IO1                            0x0004 0x0034 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO01__PWM1_OUT                             0x0004 0x0034 0x0000 0x1 0x0
-#define MX7D_PAD_GPIO1_IO01__CCM_ENET_REF_CLK3                    0x0004 0x0034 0x0000 0x2 0x0
-#define MX7D_PAD_GPIO1_IO01__SAI1_MCLK                            0x0004 0x0034 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO01__ANATOP_24M_OUT                       0x0004 0x0034 0x0000 0x4 0x0
-#define MX7D_PAD_GPIO1_IO01__OBSERVE0_OUT                         0x0004 0x0034 0x0000 0x6 0x0
-#define MX7D_PAD_GPIO1_IO02__GPIO1_IO2                            0x0008 0x0038 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO02__PWM2_OUT                             0x0008 0x0038 0x0000 0x1 0x0
-#define MX7D_PAD_GPIO1_IO02__CCM_ENET_REF_CLK1                    0x0008 0x0038 0x0564 0x2 0x3
-#define MX7D_PAD_GPIO1_IO02__SAI2_MCLK                            0x0008 0x0038 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO02__CCM_CLKO1                            0x0008 0x0038 0x0000 0x5 0x0
-#define MX7D_PAD_GPIO1_IO02__OBSERVE1_OUT                         0x0008 0x0038 0x0000 0x6 0x0
-#define MX7D_PAD_GPIO1_IO02__USB_OTG1_ID                          0x0008 0x0038 0x0734 0x7 0x3
-#define MX7D_PAD_GPIO1_IO03__GPIO1_IO3                            0x000C 0x003C 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO03__PWM3_OUT                             0x000C 0x003C 0x0000 0x1 0x0
-#define MX7D_PAD_GPIO1_IO03__CCM_ENET_REF_CLK2                    0x000C 0x003C 0x0570 0x2 0x3
-#define MX7D_PAD_GPIO1_IO03__SAI3_MCLK                            0x000C 0x003C 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO03__CCM_CLKO2                            0x000C 0x003C 0x0000 0x5 0x0
-#define MX7D_PAD_GPIO1_IO03__OBSERVE2_OUT                         0x000C 0x003C 0x0000 0x6 0x0
-#define MX7D_PAD_GPIO1_IO03__USB_OTG2_ID                          0x000C 0x003C 0x0730 0x7 0x3
-#define MX7D_PAD_GPIO1_IO04__GPIO1_IO4                            0x0010 0x0040 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC                          0x0010 0x0040 0x072C 0x1 0x1
-#define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4                       0x0010 0x0040 0x0594 0x2 0x1
-#define MX7D_PAD_GPIO1_IO04__UART5_DCE_CTS                        0x0010 0x0040 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO04__UART5_DTE_RTS                        0x0010 0x0040 0x0710 0x3 0x4
-#define MX7D_PAD_GPIO1_IO04__I2C1_SCL                             0x0010 0x0040 0x05D4 0x4 0x2
-#define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT                         0x0010 0x0040 0x0000 0x6 0x0
-#define MX7D_PAD_GPIO1_IO05__GPIO1_IO5                            0x0014 0x0044 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR                         0x0014 0x0044 0x0000 0x1 0x0
-#define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5                       0x0014 0x0044 0x0598 0x2 0x1
-#define MX7D_PAD_GPIO1_IO05__UART5_DCE_RTS                        0x0014 0x0044 0x0710 0x3 0x5
-#define MX7D_PAD_GPIO1_IO05__UART5_DTE_CTS                        0x0014 0x0044 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO05__I2C1_SDA                             0x0014 0x0044 0x05D8 0x4 0x2
-#define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT                         0x0014 0x0044 0x0000 0x6 0x0
-#define MX7D_PAD_GPIO1_IO06__GPIO1_IO6                            0x0018 0x0048 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC                          0x0018 0x0048 0x0728 0x1 0x1
-#define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6                       0x0018 0x0048 0x059C 0x2 0x1
-#define MX7D_PAD_GPIO1_IO06__UART5_DCE_RX                         0x0018 0x0048 0x0714 0x3 0x4
-#define MX7D_PAD_GPIO1_IO06__UART5_DTE_TX                         0x0018 0x0048 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO06__I2C2_SCL                             0x0018 0x0048 0x05DC 0x4 0x2
-#define MX7D_PAD_GPIO1_IO06__CCM_WAIT                             0x0018 0x0048 0x0000 0x5 0x0
-#define MX7D_PAD_GPIO1_IO06__KPP_ROW4                             0x0018 0x0048 0x0624 0x6 0x1
-#define MX7D_PAD_GPIO1_IO07__GPIO1_IO7                            0x001C 0x004C 0x0000 0x0 0x0
-#define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR                         0x001C 0x004C 0x0000 0x1 0x0
-#define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7                       0x001C 0x004C 0x05A0 0x2 0x1
-#define MX7D_PAD_GPIO1_IO07__UART5_DCE_TX                         0x001C 0x004C 0x0000 0x3 0x0
-#define MX7D_PAD_GPIO1_IO07__UART5_DTE_RX                         0x001C 0x004C 0x0714 0x3 0x5
-#define MX7D_PAD_GPIO1_IO07__I2C2_SDA                             0x001C 0x004C 0x05E0 0x4 0x2
-#define MX7D_PAD_GPIO1_IO07__CCM_STOP                             0x001C 0x004C 0x0000 0x5 0x0
-#define MX7D_PAD_GPIO1_IO07__KPP_COL4                             0x001C 0x004C 0x0604 0x6 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0                       0x0000 0x0030 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT                        0x0000 0x0030 0x0000 0x1 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_ANY                  0x0000 0x0030 0x0000 0x2 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B                    0x0000 0x0030 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB           0x0000 0x0030 0x0000 0x4 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1                       0x0004 0x0034 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT                        0x0004 0x0034 0x0000 0x1 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3               0x0004 0x0034 0x0000 0x2 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK                       0x0004 0x0034 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT                  0x0004 0x0034 0x0000 0x4 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO01__OBSERVE0_OUT                    0x0004 0x0034 0x0000 0x6 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2                       0x0008 0x0038 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO02__PWM2_OUT                        0x0008 0x0038 0x0000 0x1 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO02__CCM_ENET_REF_CLK1               0x0008 0x0038 0x0564 0x2 0x3
+#define MX7D_PAD_LPSR_GPIO1_IO02__SAI2_MCLK                       0x0008 0x0038 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO02__CCM_CLKO1                       0x0008 0x0038 0x0000 0x5 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO02__OBSERVE1_OUT                    0x0008 0x0038 0x0000 0x6 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO02__USB_OTG1_ID                     0x0008 0x0038 0x0734 0x7 0x3
+#define MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3                       0x000C 0x003C 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO03__PWM3_OUT                        0x000C 0x003C 0x0000 0x1 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2               0x000C 0x003C 0x0570 0x2 0x3
+#define MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK                       0x000C 0x003C 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2                       0x000C 0x003C 0x0000 0x5 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO03__OBSERVE2_OUT                    0x000C 0x003C 0x0000 0x6 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO03__USB_OTG2_ID                     0x000C 0x003C 0x0730 0x7 0x3
+#define MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4                       0x0010 0x0040 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC                     0x0010 0x0040 0x072C 0x1 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO04__FLEXTIMER1_CH4                  0x0010 0x0040 0x0594 0x2 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DCE_CTS                   0x0010 0x0040 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DTE_RTS                   0x0010 0x0040 0x0710 0x3 0x4
+#define MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL                        0x0010 0x0040 0x05D4 0x4 0x2
+#define MX7D_PAD_LPSR_GPIO1_IO04__OBSERVE3_OUT                    0x0010 0x0040 0x0000 0x6 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5                       0x0014 0x0044 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO05__USB_OTG1_PWR                    0x0014 0x0044 0x0000 0x1 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO05__FLEXTIMER1_CH5                  0x0014 0x0044 0x0598 0x2 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO05__UART5_DCE_RTS                   0x0014 0x0044 0x0710 0x3 0x5
+#define MX7D_PAD_LPSR_GPIO1_IO05__UART5_DTE_CTS                   0x0014 0x0044 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA                        0x0014 0x0044 0x05D8 0x4 0x2
+#define MX7D_PAD_LPSR_GPIO1_IO05__OBSERVE4_OUT                    0x0014 0x0044 0x0000 0x6 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6                       0x0018 0x0048 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC                     0x0018 0x0048 0x0728 0x1 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO06__FLEXTIMER1_CH6                  0x0018 0x0048 0x059C 0x2 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO06__UART5_DCE_RX                    0x0018 0x0048 0x0714 0x3 0x4
+#define MX7D_PAD_LPSR_GPIO1_IO06__UART5_DTE_TX                    0x0018 0x0048 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL                        0x0018 0x0048 0x05DC 0x4 0x2
+#define MX7D_PAD_LPSR_GPIO1_IO06__CCM_WAIT                        0x0018 0x0048 0x0000 0x5 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO06__KPP_ROW4                        0x0018 0x0048 0x0624 0x6 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7                       0x001C 0x004C 0x0000 0x0 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO07__USB_OTG2_PWR                    0x001C 0x004C 0x0000 0x1 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO07__FLEXTIMER1_CH7                  0x001C 0x004C 0x05A0 0x2 0x1
+#define MX7D_PAD_LPSR_GPIO1_IO07__UART5_DCE_TX                    0x001C 0x004C 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO07__UART5_DTE_RX                    0x001C 0x004C 0x0714 0x3 0x5
+#define MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA                        0x001C 0x004C 0x05E0 0x4 0x2
+#define MX7D_PAD_LPSR_GPIO1_IO07__CCM_STOP                        0x001C 0x004C 0x0000 0x5 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO07__KPP_COL4                        0x001C 0x004C 0x0604 0x6 0x1
 #define MX7D_PAD_GPIO1_IO08__GPIO1_IO8                            0x0014 0x026C 0x0000 0x0 0x0
 #define MX7D_PAD_GPIO1_IO08__SD1_VSELECT                          0x0014 0x026C 0x0000 0x1 0x0
 #define MX7D_PAD_GPIO1_IO08__WDOG1_WDOG_B                         0x0014 0x026C 0x0000 0x2 0x0
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 2f33c463cbce..5be01a1bf840 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -111,7 +111,6 @@
 };
 
 &ecspi3 {
-        fsl,spi-num-chipselects = <1>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_ecspi3>;
         cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
@@ -502,12 +501,6 @@
                         >;
                 };
 
-                pinctrl_pwm1: pwm1grp {
-                        fsl,pins = <
-                                MX7D_PAD_GPIO1_IO01__PWM1_OUT           0x110b0
-                        >;
-                };
-
                 pinctrl_tsc2046_pendown: tsc2046_pendown {
                         fsl,pins = <
                                 MX7D_PAD_EPDC_BDR1__GPIO2_IO29          0x59
@@ -635,11 +628,19 @@
                                 MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
                         >;
                 };
+        };
+};
 
-                pinctrl_wdog: wdoggrp {
-                        fsl,pins = <
-                                MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B       0x74
-                        >;
-                };
+&iomuxc_lpsr {
+        pinctrl_wdog: wdoggrp {
+                fsl,pins = <
+                        MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B          0x74
+                >;
+        };
+
+        pinctrl_pwm1: pwm1grp {
+                fsl,pins = <
+                        MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT              0x110b0
+                >;
         };
 };
diff --git a/arch/arm/boot/dts/imx7s-warp.dts b/arch/arm/boot/dts/imx7s-warp.dts
index 0345267f3390..d5237fd0fa65 100644
--- a/arch/arm/boot/dts/imx7s-warp.dts
+++ b/arch/arm/boot/dts/imx7s-warp.dts
@@ -437,10 +437,12 @@
                         MX7D_PAD_SD3_RESET_B__SD3_RESET_B       0x1b
                 >;
         };
+};
 
+&iomuxc_lpsr {
         pinctrl_wdog: wdoggrp {
                 fsl,pins = <
-                        MX7D_PAD_GPIO1_IO00__WDOD1_WDOG_B       0x74
+                        MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B  0x74
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index be33dfc86838..5d3a43b8de20 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -517,7 +517,6 @@
                                         anatop-min-bit-val = <8>;
                                         anatop-min-voltage = <800000>;
                                         anatop-max-voltage = <1200000>;
-                                        anatop-enable-bit = <31>;
                                 };
                         };
 
diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
index ac990f679725..ba828cb59587 100644
--- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
@@ -138,7 +138,8 @@ netcp: netcp@24000000 {
         /* NetCP address range */
         ranges = <0 0x24000000 0x1000000>;
 
-        clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+        clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
+        clock-names = "pa_clk", "ethss_clk", "cpts";
         dma-coherent;
 
         ti,navigator-dmas = <&dma_gbe 0>,
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 497c417db5b6..0dd4cdd6d40c 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -8,6 +8,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/reset/ti-syscon.h>
+
 / {
         compatible = "ti,k2e", "ti,keystone";
         model = "Texas Instruments Keystone 2 Edison SoC";
@@ -82,6 +84,29 @@
                         };
                 };
 
+                msm_ram: msmram@0c000000 {
+                        compatible = "mmio-sram";
+                        reg = <0x0c000000 0x200000>;
+                        ranges = <0x0 0x0c000000 0x200000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        sram-bm@1f0000 {
+                                reg = <0x001f0000 0x8000>;
+                        };
+                };
+
+                psc: power-sleep-controller@02350000 {
+                        pscrst: reset-controller {
+                                compatible = "ti,k2e-pscrst", "ti,syscon-reset";
+                                #reset-cells = <1>;
+
+                                ti,reset-bits = <
+                                        0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
+                                >;
+                        };
+                };
+
                 dspgpio0: keystone_dsp_gpio@02620240 {
                         compatible = "ti,keystone-dsp-gpio";
                         gpio-controller;
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 63c7cf0c6b6d..f59567fe7d91 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -40,12 +40,12 @@
         };
 
         gic: interrupt-controller@02561000 {
-                compatible = "arm,cortex-a15-gic";
+                compatible = "arm,gic-400", "arm,cortex-a15-gic";
                 #interrupt-cells = <3>;
                 interrupt-controller;
                 reg = <0x0 0x02561000 0x0 0x1000>,
                       <0x0 0x02562000 0x0 0x2000>,
-                      <0x0 0x02564000 0x0 0x1000>,
+                      <0x0 0x02564000 0x0 0x2000>,
                       <0x0 0x02566000 0x0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
                                 IRQ_TYPE_LEVEL_HIGH)>;
@@ -77,6 +77,18 @@
                 ranges = <0x0 0x0 0x0 0xc0000000>;
                 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
 
+                msm_ram: msmram@0c000000 {
+                        compatible = "mmio-sram";
+                        reg = <0x0c000000 0x100000>;
+                        ranges = <0x0 0x0c000000 0x100000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        sram-bm@f7000 {
+                                reg = <0x000f7000 0x8000>;
+                        };
+                };
+
                 k2g_pinctrl: pinmux@02621000 {
                         compatible = "pinctrl-single";
                         reg = <0x02621000 0x410>;
@@ -90,7 +102,7 @@
                 };
 
                 uart0: serial@02530c00 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         current-speed = <115200>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
diff --git a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
index f86d6ddb832b..a5ac845464bf 100644
--- a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
@@ -155,7 +155,8 @@ netcp: netcp@2000000 {
         /* NetCP address range */
         ranges  = <0 0x2000000 0x100000>;
 
-        clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+        clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
+        clock-names = "pa_clk", "ethss_clk", "cpts";
         dma-coherent;
 
         ti,navigator-dmas = <&dma_gbe 22>,
diff --git a/arch/arm/boot/dts/keystone-k2hk.dtsi b/arch/arm/boot/dts/keystone-k2hk.dtsi
index 8f67fa8df936..69d449430511 100644
--- a/arch/arm/boot/dts/keystone-k2hk.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk.dtsi
@@ -8,6 +8,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/reset/ti-syscon.h>
+
 / {
         compatible = "ti,k2hk", "ti,keystone";
         model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
@@ -46,6 +48,36 @@
         soc {
                 /include/ "keystone-k2hk-clocks.dtsi"
 
+                msm_ram: msmram@0c000000 {
+                        compatible = "mmio-sram";
+                        reg = <0x0c000000 0x600000>;
+                        ranges = <0x0 0x0c000000 0x600000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        sram-bm@5f0000 {
+                                reg = <0x5f0000 0x8000>;
+                        };
+                };
+
+                psc: power-sleep-controller@02350000 {
+                        pscrst: reset-controller {
+                                compatible = "ti,k2hk-pscrst", "ti,syscon-reset";
+                                #reset-cells = <1>;
+
+                                ti,reset-bits = <
+                                        0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
+                                        0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
+                                        0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
+                                        0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
+                                        0xa4c 8 0xa4c 8 0x84c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 4: dsp4 */
+                                        0xa50 8 0xa50 8 0x850 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 5: dsp5 */
+                                        0xa54 8 0xa54 8 0x854 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 6: dsp6 */
+                                        0xa58 8 0xa58 8 0x858 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 7: dsp7 */
+                                >;
+                        };
+                };
+
                 dspgpio0: keystone_dsp_gpio@02620240 {
                         compatible = "ti,keystone-dsp-gpio";
                         gpio-controller;
diff --git a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
index 5acbd0dcc2ab..b6f26824e83a 100644
--- a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
@@ -137,7 +137,8 @@ netcp: netcp@26000000 {
         /* NetCP address range */
         ranges = <0 0x26000000 0x1000000>;
 
-        clocks = <&clkosr>, <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+        clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>, <&clkosr>;
+        clock-names = "pa_clk", "ethss_clk", "cpts", "osr_clk";
         dma-coherent;
 
         ti,navigator-dmas = <&dma_gbe 0>,
diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi
index 0c5e74e79ba2..b58e7ebc0919 100644
--- a/arch/arm/boot/dts/keystone-k2l.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l.dtsi
@@ -8,6 +8,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/reset/ti-syscon.h>
+
 / {
         compatible = "ti,k2l", "ti,keystone";
         model = "Texas Instruments Keystone 2 Lamarr SoC";
@@ -35,7 +37,7 @@
                 /include/ "keystone-k2l-clocks.dtsi"
 
                 uart2: serial@02348400 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         current-speed = <115200>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
@@ -45,7 +47,7 @@
                 };
 
                 uart3:  serial@02348800 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         current-speed = <115200>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
@@ -204,6 +206,32 @@
                         };
                 };
 
+                msm_ram: msmram@0c000000 {
+                        compatible = "mmio-sram";
+                        reg = <0x0c000000 0x200000>;
+                        ranges = <0x0 0x0c000000 0x200000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        sram-bm@1f8000 {
+                                reg = <0x001f8000 0x8000>;
+                        };
+                };
+
+                psc: power-sleep-controller@02350000 {
+                        pscrst: reset-controller {
+                                compatible = "ti,k2l-pscrst", "ti,syscon-reset";
+                                #reset-cells = <1>;
+
+                                ti,reset-bits = <
+                                        0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
+                                        0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
+                                        0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
+                                        0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
+                                >;
+                        };
+                };
+
                 dspgpio0: keystone_dsp_gpio@02620240 {
                         compatible = "ti,keystone-dsp-gpio";
                         gpio-controller;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 02708ba2d4f4..8dd74f48a6d3 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -30,12 +30,12 @@
         };
 
         gic: interrupt-controller {
-                compatible = "arm,cortex-a15-gic";
+                compatible = "arm,gic-400", "arm,cortex-a15-gic";
                 #interrupt-cells = <3>;
                 interrupt-controller;
                 reg = <0x0 0x02561000 0x0 0x1000>,
                       <0x0 0x02562000 0x0 0x2000>,
-                      <0x0 0x02564000 0x0 0x1000>,
+                      <0x0 0x02564000 0x0 0x2000>,
                       <0x0 0x02566000 0x0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
                                 IRQ_TYPE_LEVEL_HIGH)>;
@@ -83,6 +83,11 @@
                         reg = <0x02310000 0x200>;
                 };
 
+                psc: power-sleep-controller@02350000 {
+                        compatible = "syscon", "simple-mfd";
+                        reg = <0x02350000 0x1000>;
+                };
+
                 devctrl: device-state-control@02620000 {
                         compatible = "ti,keystone-devctrl", "syscon";
                         reg = <0x02620000 0x1000>;
@@ -98,7 +103,7 @@
                 /include/ "keystone-clocks.dtsi"
 
                 uart0: serial@02530c00 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         current-speed = <115200>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
@@ -108,7 +113,7 @@
                 };
 
                 uart1:  serial@02531000 {
-                        compatible = "ns16550a";
+                        compatible = "ti,da830-uart", "ns16550a";
                         current-speed = <115200>;
                         reg-shift = <2>;
                         reg-io-width = <4>;
diff --git a/arch/arm/boot/dts/kirkwood-dir665.dts b/arch/arm/boot/dts/kirkwood-dir665.dts
index 41acbb6dd6ab..4d2b15d6244a 100644
--- a/arch/arm/boot/dts/kirkwood-dir665.dts
+++ b/arch/arm/boot/dts/kirkwood-dir665.dts
@@ -194,6 +194,8 @@
         };
 
         dsa {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <2>;
                 #size-cells = <0>;
@@ -241,6 +243,53 @@
 
 &mdio {
         status = "okay";
+
+        switch@0 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan4";
+                        };
+
+                        port@1 {
+                               reg = <1>;
+                               label = "lan3";
+                        };
+
+                        port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                        };
+
+                        port@3 {
+                               reg = <3>;
+                               label = "lan1";
+                        };
+
+                        port@4 {
+                                reg = <4>;
+                                label = "wan";
+                        };
+
+                        port@6 {
+                                reg = <6>;
+                                label = "cpu";
+                                ethernet = <&eth0port>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
+        };
 };
 
 /* eth0 is connected to a Marvell 88E6171 switch, without a PHY. So set
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-6282.dtsi b/arch/arm/boot/dts/kirkwood-linkstation-6282.dtsi
index 6548e68a20d0..b9125e5ed076 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-linkstation-6282.dtsi
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-duo-6281.dtsi b/arch/arm/boot/dts/kirkwood-linkstation-duo-6281.dtsi
index cf2e69f0d54f..29d929535453 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-duo-6281.dtsi
+++ b/arch/arm/boot/dts/kirkwood-linkstation-duo-6281.dtsi
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-lsqvl.dts b/arch/arm/boot/dts/kirkwood-linkstation-lsqvl.dts
index 6dc0df2969f0..9cc05203baee 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-lsqvl.dts
+++ b/arch/arm/boot/dts/kirkwood-linkstation-lsqvl.dts
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-lsvl.dts b/arch/arm/boot/dts/kirkwood-linkstation-lsvl.dts
index edcba5c44b05..ff37e76ab551 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-lsvl.dts
+++ b/arch/arm/boot/dts/kirkwood-linkstation-lsvl.dts
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-lswsxl.dts b/arch/arm/boot/dts/kirkwood-linkstation-lswsxl.dts
index 4b6450186af5..f602c059c718 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-lswsxl.dts
+++ b/arch/arm/boot/dts/kirkwood-linkstation-lswsxl.dts
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-lswvl.dts b/arch/arm/boot/dts/kirkwood-linkstation-lswvl.dts
index 954ec1d5b6dc..ef8fc1a077f8 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-lswvl.dts
+++ b/arch/arm/boot/dts/kirkwood-linkstation-lswvl.dts
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation-lswxl.dts b/arch/arm/boot/dts/kirkwood-linkstation-lswxl.dts
index ecd5c12a805d..ce41d553b693 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation-lswxl.dts
+++ b/arch/arm/boot/dts/kirkwood-linkstation-lswxl.dts
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linkstation.dtsi b/arch/arm/boot/dts/kirkwood-linkstation.dtsi
index 36c54c9dfa30..b459042a904a 100644
--- a/arch/arm/boot/dts/kirkwood-linkstation.dtsi
+++ b/arch/arm/boot/dts/kirkwood-linkstation.dtsi
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/kirkwood-linksys-viper.dts b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
index 345fcac48dc7..df7851820507 100644
--- a/arch/arm/boot/dts/kirkwood-linksys-viper.dts
+++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts
@@ -70,6 +70,8 @@
         };
 
         dsa {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <2>;
                 #size-cells = <0>;
@@ -207,6 +209,53 @@
 
 &mdio {
         status = "okay";
+
+        switch@10 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <16>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "ethernet1";
+                        };
+
+                        port@1 {
+                                reg = <1>;
+                                label = "ethernet2";
+                        };
+
+                        port@2 {
+                                reg = <2>;
+                                label = "ethernet3";
+                        };
+
+                        port@3 {
+                                reg = <3>;
+                                label = "ethernet4";
+                        };
+
+                        port@4 {
+                                reg = <4>;
+                                label = "internet";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth0port>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
+        };
 };
 
 &uart0 {
diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
index 172a38c0b8a9..327023a477b8 100644
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -112,6 +112,8 @@
         };
 
         dsa {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -159,6 +161,53 @@
 
 &mdio {
         status = "okay";
+
+        switch@0 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan1";
+                        };
+
+                        port@1 {
+                                reg = <1>;
+                                label = "lan2";
+                        };
+
+                        port@2 {
+                                reg = <2>;
+                                label = "lan3";
+                        };
+
+                        port@3 {
+                                reg = <3>;
+                                label = "lan4";
+                        };
+
+                        port@4 {
+                                reg = <4>;
+                                label = "wan";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth0port>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+                };
+        };
 };
 
 &eth0 {
diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts b/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts
index 6f771a99cb02..9ec5a65561e9 100644
--- a/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts
@@ -19,11 +19,6 @@
         model = "Marvell RD88f6281 Reference design, with A0 or higher SoC";
         compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
 
-        dsa {
-                switch@0 {
-                        reg = <10 0>;    /* MDIO address 10, switch 0 in tree */
-                };
-        };
 };
 
 &mdio {
@@ -34,6 +29,10 @@
         };
 };
 
+&switch {
+        reg = <10>;
+};
+
 &eth1 {
         status = "okay";
 
diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts b/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts
index 1a797381d3d4..6a4a65ec7944 100644
--- a/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts
@@ -33,3 +33,14 @@
 &eth1 {
       status = "disabled";
 };
+
+&switch {
+        reg = <0>;
+
+        ports {
+                port@4 {
+                        reg = <4>;
+                        label = "wan";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
index d5aacf137e40..91f5da5dae5f 100644
--- a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
@@ -54,6 +54,8 @@
         };
 
         dsa {
+                status = "disabled";
+
                 compatible = "marvell,dsa";
                 #address-cells = <2>;
                 #size-cells = <0>;
@@ -115,6 +117,48 @@
 
 &mdio {
         status = "okay";
+
+        switch: switch@0 {
+                compatible = "marvell,mv88e6085";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        port@0 {
+                                reg = <0>;
+                                label = "lan1";
+                        };
+
+                        port@1 {
+                                reg = <1>;
+                                label = "lan2";
+                        };
+
+                        port@2 {
+                                reg = <2>;
+                                label = "lan3";
+                        };
+
+                        port@3 {
+                                reg = <3>;
+                                label = "lan4";
+                        };
+
+                        port@5 {
+                                reg = <5>;
+                                label = "cpu";
+                                ethernet = <&eth0port>;
+                                fixed-link {
+                                        speed = <1000>;
+                                        full-duplex;
+                                };
+                        };
+
+                };
+        };
 };
 
 &eth0 {
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 282d854f4342..45ea57fafa18 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -110,11 +110,11 @@
                 ranges;
 
                 gic: interrupt-controller@1400000 {
-                        compatible = "arm,cortex-a7-gic";
+                        compatible = "arm,gic-400", "arm,cortex-a7-gic";
                         #interrupt-cells = <3>;
                         interrupt-controller;
                         reg = <0x0 0x1401000 0x0 0x1000>,
-                              <0x0 0x1402000 0x0 0x1000>,
+                              <0x0 0x1402000 0x0 0x2000>,
                               <0x0 0x1404000 0x0 0x2000>,
                               <0x0 0x1406000 0x0 0x2000>;
                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 082ca8807c62..a4837985b7a7 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -24,6 +24,60 @@
         };
 };
 
+&auxadc {
+        status = "okay";
+};
+
+&pio {
+        spi_pins_a: spi0@0 {
+                pins_spi {
+                        pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>,
+                                 <MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>,
+                                 <MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>,
+                                 <MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>;
+                        bias-disable;
+                };
+        };
+
+        spi_pins_b: spi1@0 {
+                pins_spi {
+                        pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>,
+                                 <MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>,
+                                 <MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>,
+                                 <MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>;
+                        bias-disable;
+                };
+        };
+
+        spi_pins_c: spi2@0 {
+                pins_spi {
+                        pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>,
+                                 <MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>,
+                                 <MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>,
+                                 <MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>;
+                        bias-disable;
+                };
+        };
+};
+
+&spi0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi_pins_a>;
+        status = "disabled";
+};
+
+&spi1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi_pins_b>;
+        status = "disabled";
+};
+
+&spi2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi_pins_c>;
+        status = "disabled";
+};
+
 &uart0 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 7eab6f4c4665..803721050116 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -13,6 +13,7 @@
  */
 
 #include <dt-bindings/clock/mt2701-clk.h>
+#include <dt-bindings/power/mt2701-power.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/mt2701-resets.h>
@@ -87,6 +88,36 @@
                 clock-output-names = "rtc32k";
         };
 
+        thermal-zones {
+                cpu_thermal: cpu_thermal {
+                        polling-delay-passive = <1000>; /* milliseconds */
+                        polling-delay = <1000>; /* milliseconds */
+
+                        thermal-sensors = <&thermal 0>;
+                        sustainable-power = <1000>;
+
+                        trips {
+                                threshold: trip-point@0 {
+                                        temperature = <68000>;
+                                        hysteresis = <2000>;
+                                        type = "passive";
+                                };
+
+                                target: trip-point@1 {
+                                        temperature = <85000>;
+                                        hysteresis = <2000>;
+                                        type = "passive";
+                                };
+
+                                cpu_crit: cpu_crit@0 {
+                                        temperature = <115000>;
+                                        hysteresis = <2000>;
+                                        type = "critical";
+                                };
+                        };
+                };
+        };
+
         timer {
                 compatible = "arm,armv7-timer";
                 interrupt-parent = <&gic>;
@@ -96,24 +127,6 @@
                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
         };
 
-        pio: pinctrl@10005000 {
-                compatible = "mediatek,mt2701-pinctrl";
-                reg = <0 0x1000b000 0 0x1000>;
-                mediatek,pctl-regmap = <&syscfg_pctl_a>;
-                pins-are-numbered;
-                gpio-controller;
-                #gpio-cells = <2>;
-                interrupt-controller;
-                #interrupt-cells = <2>;
-                interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
-                             <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
-        };
-
-        syscfg_pctl_a: syscfg@10005000 {
-                compatible = "mediatek,mt2701-pctl-a-syscfg", "syscon";
-                reg = <0 0x10005000 0 0x1000>;
-        };
-
         topckgen: syscon@10000000 {
                 compatible = "mediatek,mt2701-topckgen", "syscon";
                 reg = <0 0x10000000 0 0x1000>;
@@ -134,6 +147,22 @@
                 #reset-cells = <1>;
         };
 
+        syscfg_pctl_a: syscfg@10005000 {
+                compatible = "mediatek,mt2701-pctl-a-syscfg", "syscon";
+                reg = <0 0x10005000 0 0x1000>;
+        };
+
+        scpsys: scpsys@10006000 {
+                compatible = "mediatek,mt2701-scpsys", "syscon";
+                #power-domain-cells = <1>;
+                reg = <0 0x10006000 0 0x1000>;
+                infracfg = <&infracfg>;
+                clocks = <&topckgen CLK_TOP_MM_SEL>,
+                         <&topckgen CLK_TOP_MFG_SEL>,
+                         <&topckgen CLK_TOP_ETHIF_SEL>;
+                clock-names = "mm", "mfg", "ethif";
+        };
+
         watchdog: watchdog@10007000 {
                 compatible = "mediatek,mt2701-wdt",
                              "mediatek,mt6589-wdt";
@@ -149,6 +178,29 @@
                 clock-names = "system-clk", "rtc-clk";
         };
 
+        pio: pinctrl@1000b000 {
+                compatible = "mediatek,mt2701-pinctrl";
+                reg = <0 0x1000b000 0 0x1000>;
+                mediatek,pctl-regmap = <&syscfg_pctl_a>;
+                pins-are-numbered;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+                interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+        smi_common: smi@1000c000 {
+                compatible = "mediatek,mt2701-smi-common";
+                reg = <0 0x1000c000 0 0x1000>;
+                clocks = <&infracfg CLK_INFRA_SMI>,
+                         <&mmsys CLK_MM_SMI_COMMON>,
+                         <&infracfg CLK_INFRA_SMI>;
+                clock-names = "apb", "smi", "async";
+                power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+        };
+
         sysirq: interrupt-controller@10200100 {
                 compatible = "mediatek,mt2701-sysirq",
                              "mediatek,mt6577-sysirq";
@@ -158,6 +210,16 @@
                 reg = <0 0x10200100 0 0x1c>;
         };
 
+        iommu: mmsys_iommu@10205000 {
+                compatible = "mediatek,mt2701-m4u";
+                reg = <0 0x10205000 0 0x1000>;
+                interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&infracfg CLK_INFRA_M4U>;
+                clock-names = "bclk";
+                mediatek,larbs = <&larb0 &larb1 &larb2>;
+                #iommu-cells = <1>;
+        };
+
         apmixedsys: syscon@10209000 {
                 compatible = "mediatek,mt2701-apmixedsys", "syscon";
                 reg = <0 0x10209000 0 0x1000>;
@@ -170,11 +232,20 @@
                 #interrupt-cells = <3>;
                 interrupt-parent = <&gic>;
                 reg = <0 0x10211000 0 0x1000>,
-                      <0 0x10212000 0 0x1000>,
+                      <0 0x10212000 0 0x2000>,
                       <0 0x10214000 0 0x2000>,
                       <0 0x10216000 0 0x2000>;
         };
 
+        auxadc: adc@11001000 {
+                compatible = "mediatek,mt2701-auxadc";
+                reg = <0 0x11001000 0 0x1000>;
+                clocks = <&pericfg CLK_PERI_AUXADC>;
+                clock-names = "main";
+                #io-channel-cells = <1>;
+                status = "disabled";
+        };
+
         uart0: serial@11002000 {
                 compatible = "mediatek,mt2701-uart",
                              "mediatek,mt6577-uart";
@@ -214,4 +285,144 @@
                 clock-names = "baud", "bus";
                 status = "disabled";
         };
+
+        spi0: spi@1100a000 {
+                compatible = "mediatek,mt2701-spi";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0 0x1100a000 0 0x100>;
+                interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+                         <&topckgen CLK_TOP_SPI0_SEL>,
+                         <&pericfg CLK_PERI_SPI0>;
+                clock-names = "parent-clk", "sel-clk", "spi-clk";
+                status = "disabled";
+        };
+
+        thermal: thermal@1100b000 {
+                #thermal-sensor-cells = <0>;
+                compatible = "mediatek,mt2701-thermal";
+                reg = <0 0x1100b000 0 0x1000>;
+                interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+                clock-names = "therm", "auxadc";
+                resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
+                reset-names = "therm";
+                mediatek,auxadc = <&auxadc>;
+                mediatek,apmixedsys = <&apmixedsys>;
+        };
+
+        nandc: nfi@1100d000 {
+                compatible = "mediatek,mt2701-nfc";
+                reg = <0 0x1100d000 0 0x1000>;
+                interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&pericfg CLK_PERI_NFI>,
+                         <&pericfg CLK_PERI_NFI_PAD>;
+                clock-names = "nfi_clk", "pad_clk";
+                status = "disabled";
+                ecc-engine = <&bch>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
+        bch: ecc@1100e000 {
+                compatible = "mediatek,mt2701-ecc";
+                reg = <0 0x1100e000 0 0x1000>;
+                interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&pericfg CLK_PERI_NFI_ECC>;
+                clock-names = "nfiecc_clk";
+                status = "disabled";
+        };
+
+        spi1: spi@11016000 {
+                compatible = "mediatek,mt2701-spi";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0 0x11016000 0 0x100>;
+                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+                         <&topckgen CLK_TOP_SPI1_SEL>,
+                         <&pericfg CLK_PERI_SPI1>;
+                clock-names = "parent-clk", "sel-clk", "spi-clk";
+                status = "disabled";
+        };
+
+        spi2: spi@11017000 {
+                compatible = "mediatek,mt2701-spi";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0 0x11017000 0 0x1000>;
+                interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+                         <&topckgen CLK_TOP_SPI2_SEL>,
+                         <&pericfg CLK_PERI_SPI2>;
+                clock-names = "parent-clk", "sel-clk", "spi-clk";
+                status = "disabled";
+        };
+
+        mmsys: syscon@14000000 {
+                compatible = "mediatek,mt2701-mmsys", "syscon";
+                reg = <0 0x14000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        larb0: larb@14010000 {
+                compatible = "mediatek,mt2701-smi-larb";
+                reg = <0 0x14010000 0 0x1000>;
+                mediatek,smi = <&smi_common>;
+                clocks = <&mmsys CLK_MM_SMI_LARB0>,
+                         <&mmsys CLK_MM_SMI_LARB0>;
+                clock-names = "apb", "smi";
+                power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+        };
+
+        imgsys: syscon@15000000 {
+                compatible = "mediatek,mt2701-imgsys", "syscon";
+                reg = <0 0x15000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        larb2: larb@15001000 {
+                compatible = "mediatek,mt2701-smi-larb";
+                reg = <0 0x15001000 0 0x1000>;
+                mediatek,smi = <&smi_common>;
+                clocks = <&imgsys CLK_IMG_SMI_COMM>,
+                         <&imgsys CLK_IMG_SMI_COMM>;
+                clock-names = "apb", "smi";
+                power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+        };
+
+        vdecsys: syscon@16000000 {
+                compatible = "mediatek,mt2701-vdecsys", "syscon";
+                reg = <0 0x16000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        larb1: larb@16010000 {
+                compatible = "mediatek,mt2701-smi-larb";
+                reg = <0 0x16010000 0 0x1000>;
+                mediatek,smi = <&smi_common>;
+                clocks = <&vdecsys CLK_VDEC_CKGEN>,
+                         <&vdecsys CLK_VDEC_LARB>;
+                clock-names = "apb", "smi";
+                power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>;
+        };
+
+        hifsys: syscon@1a000000 {
+                compatible = "mediatek,mt2701-hifsys", "syscon";
+                reg = <0 0x1a000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        ethsys: syscon@1b000000 {
+                compatible = "mediatek,mt2701-ethsys", "syscon";
+                reg = <0 0x1b000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
+
+        bdpsys: syscon@1c000000 {
+                compatible = "mediatek,mt2701-bdpsys", "syscon";
+                reg = <0 0x1c000000 0 0x1000>;
+                #clock-cells = <1>;
+        };
 };
diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
index 06fdf6c2d5fd..a349dba5ff79 100644
--- a/arch/arm/boot/dts/mt6580.dtsi
+++ b/arch/arm/boot/dts/mt6580.dtsi
@@ -91,7 +91,7 @@
                 #interrupt-cells = <3>;
                 interrupt-parent = <&gic>;
                 reg = <0x10211000 0x1000>,
-                      <0x10212000 0x1000>,
+                      <0x10212000 0x2000>,
                       <0x10214000 0x2000>,
                       <0x10216000 0x2000>;
         };
diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
index 88b3cb128698..0d6f60af7640 100644
--- a/arch/arm/boot/dts/mt6589.dtsi
+++ b/arch/arm/boot/dts/mt6589.dtsi
@@ -102,7 +102,7 @@
                         #interrupt-cells = <3>;
                         interrupt-parent = <&gic>;
                         reg = <0x10211000 0x1000>,
-                              <0x10212000 0x1000>,
+                              <0x10212000 0x2000>,
                               <0x10214000 0x2000>,
                               <0x10216000 0x2000>;
                 };
diff --git a/arch/arm/boot/dts/mt7623-evb.dts b/arch/arm/boot/dts/mt7623-evb.dts
index a9ee2d64c6f7..b60b41cad592 100644
--- a/arch/arm/boot/dts/mt7623-evb.dts
+++ b/arch/arm/boot/dts/mt7623-evb.dts
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
+ * Author: John Crispin <john@phrozen.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index fd2b614ae6f3..402579ab70d2 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
+ * Author: John Crispin <john@phrozen.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -104,7 +104,7 @@
                 #interrupt-cells = <3>;
                 interrupt-parent = <&gic>;
                 reg = <0 0x10211000 0 0x1000>,
-                      <0 0x10212000 0 0x1000>,
+                      <0 0x10212000 0 0x2000>,
                       <0 0x10214000 0 0x2000>,
                       <0 0x10216000 0 0x2000>;
         };
diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
index 52086c8018e2..916c095d11b9 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -129,7 +129,7 @@
                         #interrupt-cells = <3>;
                         interrupt-parent = <&gic>;
                         reg = <0 0x10211000 0 0x1000>,
-                              <0 0x10212000 0 0x1000>,
+                              <0 0x10212000 0 0x2000>,
                               <0 0x10214000 0 0x2000>,
                               <0 0x10216000 0 0x2000>;
                 };
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index 1d7f92bdcb9c..a97b4ee4ae79 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -221,7 +221,7 @@
                         #interrupt-cells = <3>;
                         interrupt-parent = <&gic>;
                         reg = <0 0x10211000 0 0x1000>,
-                              <0 0x10212000 0 0x1000>,
+                              <0 0x10212000 0 0x2000>,
                               <0 0x10214000 0 0x2000>,
                               <0 0x10216000 0 0x2000>;
                 };
diff --git a/arch/arm/boot/dts/mvebu-linkstation-fan.dtsi b/arch/arm/boot/dts/mvebu-linkstation-fan.dtsi
index e211a3c47a76..e172029a0c4d 100644
--- a/arch/arm/boot/dts/mvebu-linkstation-fan.dtsi
+++ b/arch/arm/boot/dts/mvebu-linkstation-fan.dtsi
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/mvebu-linkstation-gpio-simple.dtsi b/arch/arm/boot/dts/mvebu-linkstation-gpio-simple.dtsi
index 68d75e79a360..c2d87ba6190a 100644
--- a/arch/arm/boot/dts/mvebu-linkstation-gpio-simple.dtsi
+++ b/arch/arm/boot/dts/mvebu-linkstation-gpio-simple.dtsi
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 85e297ed0ea1..673cee2234b2 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -27,6 +27,7 @@
         aliases {
                 display0 = &dvi0;
                 display1 = &tv0;
+                ethernet = &ethernet;
         };
 
         leds {
@@ -348,6 +349,21 @@
 
 &usbhsehci {
         phys = <0 &hsusb2_phy>;
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        hub@2 {
+                compatible = "usb424,9514";
+                reg = <2>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ethernet: usbether@1 {
+                        compatible = "usb424,ec00";
+                        reg = <1>;
+                };
+        };
 };
 
 &vaux2 {
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index 54c4c07bbe4a..e268efde6c6d 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -126,27 +126,6 @@
 
                 #address-cells = <1>;
                 #size-cells = <1>;
-
-                partition@0 {
-                        label = "SPL";
-                        reg = <0 0x100000>;
-                };
-                partition@80000 {
-                        label = "U-Boot";
-                        reg = <0x100000 0x180000>;
-                };
-                partition@1c0000 {
-                        label = "Environment";
-                        reg = <0x280000 0x100000>;
-                };
-                partition@280000 {
-                        label = "Kernel";
-                        reg = <0x380000 0x300000>;
-                };
-                partition@780000 {
-                        label = "Filesystem";
-                        reg = <0x680000 0x1f980000>;
-                };
         };
 };
 
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 4d448f145ed1..b64cfda8dbb7 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -47,7 +47,7 @@
                 compatible = "gpio-leds";
                 heartbeat {
                         label = "debug::sleep";
-                        gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* gpio162 */
+                        gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
                         linux,default-trigger = "default-on";
                         pinctrl-names = "default";
                         pinctrl-0 = <&debug_leds>;
@@ -625,6 +625,7 @@
                 reg = <0x55>;
         };
 
+        /* Stereo headphone amplifier */
         tpa6130a2: tpa6130a2@60 {
                 compatible = "ti,tpa6130a2";
                 reg = <0x60>;
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 1673689e6705..edbc4090297d 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -16,6 +16,7 @@
         aliases {
                 display0 = &dvi0;
                 display1 = &hdmi0;
+                ethernet = &ethernet;
         };
 
         leds: leds {
@@ -520,6 +521,21 @@
 
 &usbhsehci {
         phys = <&hsusb1_phy>;
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        hub@1 {
+                compatible = "usb424,9514";
+                reg = <1>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ethernet: usbether@1 {
+                        compatible = "usb424,ec00";
+                        reg = <1>;
+                };
+        };
 };
 
 &dss {
diff --git a/arch/arm/boot/dts/omap5-igep0050.dts b/arch/arm/boot/dts/omap5-igep0050.dts
index 8fc19218057e..fef2a446b61c 100644
--- a/arch/arm/boot/dts/omap5-igep0050.dts
+++ b/arch/arm/boot/dts/omap5-igep0050.dts
@@ -19,6 +19,10 @@
                 reg = <0x0 0x80000000 0 0x7f000000>;    /* 2032 MB */
         };
 
+        aliases {
+                ethernet = &ethernet;
+        };
+
         gpio_keys {
                 compatible = "gpio-keys";
                 pinctrl-0 = <&power_button_pin>;
@@ -116,3 +120,20 @@
                 OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6)      /* perslimbus2_clock.gpio5_145 */
         >;
 };
+
+&usbhsehci {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        hub@2 {
+                compatible = "usb424,3503";
+                reg = <2>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                ethernet: usbether@3 {
+                        compatible = "usb424,7500";
+                        reg = <3>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index a8c72611fbe3..0d42c46f13e7 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -18,6 +18,10 @@
                 reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
         };
 
+        aliases {
+                ethernet = &ethernet;
+        };
+
         leds {
                 compatible = "gpio-leds";
                 led1 {
@@ -164,6 +168,23 @@
         >;
 };
 
+&usbhsehci {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        hub@2 {
+                compatible = "usb424,3503";
+                reg = <2>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
+        ethernet: usbether@3 {
+                compatible = "usb424,9730";
+                reg = <3>;
+        };
+};
+
 &wlcore {
         compatible = "ti,wl1837";
 };
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 0844737b72b2..222155ca8ad7 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -92,7 +92,7 @@
                 interrupt-controller;
                 #interrupt-cells = <3>;
                 reg = <0 0x48211000 0 0x1000>,
-                      <0 0x48212000 0 0x1000>,
+                      <0 0x48212000 0 0x2000>,
                       <0 0x48214000 0 0x2000>,
                       <0 0x48216000 0 0x2000>;
                 interrupt-parent = <&gic>;
diff --git a/arch/arm/boot/dts/orion5x-kuroboxpro.dts b/arch/arm/boot/dts/orion5x-kuroboxpro.dts
index 1a672b098d0b..e28b568e741a 100644
--- a/arch/arm/boot/dts/orion5x-kuroboxpro.dts
+++ b/arch/arm/boot/dts/orion5x-kuroboxpro.dts
@@ -17,17 +17,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -36,11 +36,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/orion5x-linkstation-lschl.dts b/arch/arm/boot/dts/orion5x-linkstation-lschl.dts
index ea6c881634b9..ee751995c8d0 100644
--- a/arch/arm/boot/dts/orion5x-linkstation-lschl.dts
+++ b/arch/arm/boot/dts/orion5x-linkstation-lschl.dts
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts b/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts
index 51dc734cd5b9..9f6fedd39170 100644
--- a/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts
+++ b/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts
@@ -18,17 +18,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -37,11 +37,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts b/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
index 0eead400f427..7f77ce8cc1fc 100644
--- a/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
+++ b/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/orion5x-linkstation.dtsi b/arch/arm/boot/dts/orion5x-linkstation.dtsi
index ed456ab35fd8..e9991c83d7b7 100644
--- a/arch/arm/boot/dts/orion5x-linkstation.dtsi
+++ b/arch/arm/boot/dts/orion5x-linkstation.dtsi
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/orion5x-lswsgl.dts b/arch/arm/boot/dts/orion5x-lswsgl.dts
index 6b47a52ceb9c..ea966ec03dd0 100644
--- a/arch/arm/boot/dts/orion5x-lswsgl.dts
+++ b/arch/arm/boot/dts/orion5x-lswsgl.dts
@@ -14,17 +14,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -33,11 +33,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/ox810se.dtsi b/arch/arm/boot/dts/ox810se.dtsi
index ce13705c38d4..46aa6db8353a 100644
--- a/arch/arm/boot/dts/ox810se.dtsi
+++ b/arch/arm/boot/dts/ox810se.dtsi
@@ -7,6 +7,8 @@
  */
 
 /include/ "skeleton.dtsi"
+#include <dt-bindings/clock/oxsemi,ox810se.h>
+#include <dt-bindings/reset/oxsemi,ox810se.h>
 
 / {
         compatible = "oxsemi,ox810se";
@@ -242,7 +244,7 @@
                                current-speed = <115200>;
                                no-loopback-test;
                                status = "disabled";
-                               resets = <&reset 17>;
+                               resets = <&reset RESET_UART1>;
                         };
 
                         uart1: serial@300000 {
@@ -256,7 +258,7 @@
                                current-speed = <115200>;
                                no-loopback-test;
                                status = "disabled";
-                               resets = <&reset 18>;
+                               resets = <&reset RESET_UART2>;
                         };
 
                         uart2: serial@900000 {
@@ -270,7 +272,7 @@
                                current-speed = <115200>;
                                no-loopback-test;
                                status = "disabled";
-                               resets = <&reset 22>;
+                               resets = <&reset RESET_UART3>;
                         };
 
                         uart3: serial@a00000 {
@@ -284,7 +286,7 @@
                                current-speed = <115200>;
                                no-loopback-test;
                                status = "disabled";
-                               resets = <&reset 23>;
+                               resets = <&reset RESET_UART4>;
                         };
                 };
 
diff --git a/arch/arm/boot/dts/ox820.dtsi b/arch/arm/boot/dts/ox820.dtsi
index e40f282a023a..459207536a46 100644
--- a/arch/arm/boot/dts/ox820.dtsi
+++ b/arch/arm/boot/dts/ox820.dtsi
@@ -8,6 +8,8 @@
 
 /include/ "skeleton.dtsi"
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/oxsemi,ox820.h>
+#include <dt-bindings/reset/oxsemi,ox820.h>
 
 / {
         compatible = "oxsemi,ox820";
@@ -83,8 +85,8 @@
                 nandc: nand-controller@41000000 {
                         compatible = "oxsemi,ox820-nand";
                         reg = <0x41000000 0x100000>;
-                        clocks = <&stdclk 11>;
-                        resets = <&reset 15>;
+                        clocks = <&stdclk CLK_820_NAND>;
+                        resets = <&reset RESET_NAND>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         status = "disabled";
@@ -99,9 +101,9 @@
                         mac-address = [000000000000]; /* Filled in by U-Boot */
                         phy-mode = "rgmii";
 
-                        clocks = <&stdclk 9>, <&gmacclk>;
+                        clocks = <&stdclk CLK_820_ETHA>, <&gmacclk>;
                         clock-names = "gmac", "stmmaceth";
-                        resets = <&reset 6>;
+                        resets = <&reset RESET_MAC>;
 
                         /* Regmap for sys registers */
                         oxsemi,sys-ctrl = <&sys>;
@@ -208,7 +210,7 @@
                                no-loopback-test;
                                status = "disabled";
                                clocks = <&sysclk>;
-                               resets = <&reset 17>;
+                               resets = <&reset RESET_UART1>;
                         };
 
                         uart1: serial@300000 {
@@ -222,7 +224,7 @@
                                no-loopback-test;
                                status = "disabled";
                                clocks = <&sysclk>;
-                               resets = <&reset 18>;
+                               resets = <&reset RESET_UART2>;
                         };
 
                         rps@400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
index 4b8872cc8bf9..39d9e6ddefed 100644
--- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
@@ -220,6 +220,14 @@
                                         function = "ebi2";
                                 };
                         };
+
+                        /* Interrupt line for the KXSD9 accelerometer */
+                        dragon_kxsd9_gpios: kxsd9 {
+                                irq {
+                                        pins = "gpio57"; /* IRQ line */
+                                        bias-pull-up;
+                                };
+                        };
                 };
 
                 qcom,ssbi@500000 {
@@ -272,6 +280,15 @@
                                                         power-source = <PM8058_GPIO_S3>;
                                                 };
                                         };
+                                        dragon_mpu3050_gpios: mpu3050-gpios {
+                                                pinconf {
+                                                        pins = "gpio17";
+                                                        function = "normal";
+                                                        input-enable;
+                                                        bias-disable;
+                                                        power-source = <PM8058_GPIO_S3>;
+                                                };
+                                        };
                                         dragon_sdcc3_gpios: sdcc3-gpios {
                                                 pinconf {
                                                         pins = "gpio22";
@@ -369,8 +386,8 @@
                                 ak8975@0c {
                                         compatible = "asahi-kasei,ak8975";
                                         reg = <0x0c>;
-                                        /* GPIO33 has interrupt 224 on the PM8058 */
-                                        interrupt-parent = <&pm8058_gpio>;
+                                        /* FIXME: GPIO33 has interrupt 224 on the PM8058 */
+                                        interrupt-parent = <&pm8058>;
                                         interrupts = <224 IRQ_TYPE_EDGE_RISING>;
                                         pinctrl-names = "default";
                                         pinctrl-0 = <&dragon_ak8975_gpios>;
@@ -380,8 +397,8 @@
                                 bmp085@77 {
                                         compatible = "bosch,bmp085";
                                         reg = <0x77>;
-                                        /* GPIO16 has interrupt 207 on the PM8058 */
-                                        interrupt-parent = <&pm8058_gpio>;
+                                        /* FIXME: GPIO16 has interrupt 207 on the PM8058 */
+                                        interrupt-parent = <&pm8058>;
                                         interrupts = <207 IRQ_TYPE_EDGE_RISING>;
                                         reset-gpios = <&tlmm 86 GPIO_ACTIVE_LOW>;
                                         pinctrl-names = "default";
@@ -389,6 +406,41 @@
                                         vddd-supply = <&pm8058_lvs0>; // 1.8V
                                         vdda-supply = <&pm8058_l14>; // 2.85V
                                 };
+                                mpu3050@68 {
+                                        compatible = "invensense,mpu3050";
+                                        reg = <0x68>;
+                                        /*
+                                         * GPIO17 has interrupt 208 on the
+                                         * PM8058, it is pulled high by a 10k
+                                         * resistor to VLOGIC so needs to be
+                                         * active low/falling edge.
+                                         */
+                                        interrupts-extended = <&pm8058 208 IRQ_TYPE_EDGE_FALLING>;
+                                        pinctrl-names = "default";
+                                        pinctrl-0 = <&dragon_mpu3050_gpios>;
+                                        vlogic-supply = <&pm8058_lvs0>; // 1.8V
+                                        vdd-supply = <&pm8058_l14>; // 2.85V
+
+                                        /*
+                                         * The MPU-3050 acts as a hub for the
+                                         * accelerometer.
+                                         */
+                                        i2c-gate {
+                                                #address-cells = <1>;
+                                                #size-cells = <0>;
+
+                                                kxsd9@18 {
+                                                        compatible = "kionix,kxsd9";
+                                                        reg = <0x18>;
+                                                        interrupt-parent = <&tlmm>;
+                                                        interrupts = <57 IRQ_TYPE_EDGE_FALLING>;
+                                                        pinctrl-names = "default";
+                                                        pinctrl-0 = <&dragon_kxsd9_gpios>;
+                                                        iovdd-supply = <&pm8058_lvs0>; // 1.8V
+                                                        vdd-supply = <&pm8058_l14>; // 2.85V
+                                                };
+                                        };
+                                };
                         };
                 };
 
@@ -412,7 +464,7 @@
                                  * The second interrupt is the PME interrupt
                                  * for network wakeup, connected to the TLMM.
                                  */
-                                interrupts-extended = <&pmicintc 198 IRQ_TYPE_EDGE_FALLING>,
+                                interrupts-extended = <&pm8058 198 IRQ_TYPE_EDGE_FALLING>,
                                                     <&tlmm 29 IRQ_TYPE_EDGE_RISING>;
                                 reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
                                 vdd33a-supply = <&dragon_veth>;
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts
index 39ae2bc8cb08..8f5de029bca9 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts
@@ -39,6 +39,17 @@
 
         };
 
+        hdmi-out {
+                compatible = "hdmi-connector";
+                type = "a";
+
+                port {
+                        hdmi_con: endpoint {
+                                remote-endpoint = <&hdmi_out>;
+                        };
+                };
+        };
+
         soc {
                 rpm@108000 {
                         regulators {
@@ -74,6 +85,14 @@
                                         bias-pull-down;
                                 };
 
+                                s2 {
+                                        regulator-min-microvolt = <1300000>;
+                                        regulator-max-microvolt = <1300000>;
+                                        qcom,switch-mode-frequency = <1600000>;
+                                        bias-pull-down;
+                                        regulator-always-on;
+                                };
+
                                 s3 {
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1400000>;
@@ -121,6 +140,16 @@
                                         bias-pull-down;
                                 };
 
+                                /**
+                                 * 1.8v required on LS expansion
+                                 * for mezzanine boards
+                                 */
+                                l15 {
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                };
+
                                 l23 {
                                         regulator-min-microvolt = <1700000>;
                                         regulator-max-microvolt = <1900000>;
@@ -347,5 +376,45 @@
                                 cd-gpios        = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
                         };
                 };
+
+                riva-pil@3204000 {
+                        status = "okay";
+
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&riva_wlan_pin_a>, <&riva_bt_pin_a>, <&riva_fm_pin_a>;
+                };
+
+                hdmi-tx@4a00000 {
+                        status = "okay";
+                        core-vdda-supply = <&pm8921_hdmi_switch>;
+                        hdmi-mux-supply = <&vcc3v3>;
+
+                        hpd-gpio = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
+
+                        ports {
+                                port@1 {
+                                        endpoint {
+                                                remote-endpoint = <&hdmi_con>;
+                                        };
+                                };
+                        };
+                };
+
+                hdmi-phy@4a00400 {
+                        status = "okay";
+                        core-vdda-supply = <&pm8921_hdmi_switch>;
+                };
+
+                mdp@5100000 {
+                        status = "okay";
+
+                        ports {
+                                port@3 {
+                                        endpoint {
+                                                remote-endpoint = <&hdmi_in>;
+                                        };
+                                };
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 3d37cab3b9a9..881ce707311a 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -75,25 +75,6 @@
                                         bias-disable;
                                 };
                         };
-
-                        hdmi_pinctrl: hdmi-pinctrl {
-                                mux {
-                                        pins = "gpio70", "gpio71", "gpio72";
-                                        function = "hdmi";
-                                };
-
-                                pinconf_ddc {
-                                        pins = "gpio70", "gpio71";
-                                        bias-pull-up;
-                                        drive-strength = <2>;
-                                };
-
-                                pinconf_hpd {
-                                        pins = "gpio72";
-                                        bias-pull-down;
-                                        drive-strength = <16>;
-                                };
-                        };
                 };
 
                 rpm@108000 {
@@ -368,9 +349,6 @@
 
                         hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
 
-                        pinctrl-names = "default";
-                        pinctrl-0 = <&hdmi_pinctrl>;
-
                         ports {
                                 port@0 {
                                         endpoint {
diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index 6b801e7e57a2..173ab7c299ce 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -284,4 +284,41 @@
                         bias-disable = <0>;
                 };
         };
+
+        riva_fm_pin_a: riva-fm-active {
+                pins = "gpio14", "gpio15";
+                function = "riva_fm";
+        };
+
+        riva_bt_pin_a: riva-bt-active {
+                pins = "gpio16", "gpio17";
+                function = "riva_bt";
+        };
+
+        riva_wlan_pin_a: riva-wlan-active {
+                pins = "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
+                function = "riva_wlan";
+
+                drive-strength = <6>;
+                bias-pull-down;
+        };
+
+        hdmi_pinctrl: hdmi-pinctrl {
+                mux {
+                        pins = "gpio70", "gpio71", "gpio72";
+                        function = "hdmi";
+                };
+
+                pinconf_ddc {
+                        pins = "gpio70", "gpio71";
+                        bias-pull-up;
+                        drive-strength = <2>;
+                };
+
+                pinconf_hpd {
+                        pins = "gpio72";
+                        bias-pull-down;
+                        drive-strength = <16>;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
index ebd675ca94b4..a34ba3555454 100644
--- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts
@@ -390,5 +390,12 @@
                                 pinctrl-0 = <&sdcc3_pins>, <&sdcc3_cd_pin_a>;
                         };
                 };
+
+                riva-pil@3204000 {
+                        status = "okay";
+
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&riva_wlan_pin_a>, <&riva_bt_pin_a>, <&riva_fm_pin_a>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 407a4610f4a7..14a6f5ed02de 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -22,13 +22,18 @@
                         reg = <0x80000000 0x200000>;
                         no-map;
                 };
+
+                wcnss_mem: wcnss@8f000000 {
+                        reg = <0x8f000000 0x700000>;
+                        no-map;
+                };
         };
 
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu@0 {
+                CPU0: cpu@0 {
                         compatible = "qcom,krait";
                         enable-method = "qcom,kpss-acc-v1";
                         device_type = "cpu";
@@ -39,7 +44,7 @@
                         cpu-idle-states = <&CPU_SPC>;
                 };
 
-                cpu@1 {
+                CPU1: cpu@1 {
                         compatible = "qcom,krait";
                         enable-method = "qcom,kpss-acc-v1";
                         device_type = "cpu";
@@ -50,7 +55,7 @@
                         cpu-idle-states = <&CPU_SPC>;
                 };
 
-                cpu@2 {
+                CPU2: cpu@2 {
                         compatible = "qcom,krait";
                         enable-method = "qcom,kpss-acc-v1";
                         device_type = "cpu";
@@ -61,7 +66,7 @@
                         cpu-idle-states = <&CPU_SPC>;
                 };
 
-                cpu@3 {
+                CPU3: cpu@3 {
                         compatible = "qcom,krait";
                         enable-method = "qcom,kpss-acc-v1";
                         device_type = "cpu";
@@ -180,7 +185,7 @@
         };
 
         clocks {
-                cxo_board {
+                cxo_board: cxo_board {
                         compatible = "fixed-clock";
                         #clock-cells = <0>;
                         clock-frequency = <19200000>;
@@ -631,6 +636,33 @@
                         clock-names = "core";
                 };
 
+                ssbi@c00000 {
+                        compatible = "qcom,ssbi";
+                        reg = <0x00c00000 0x1000>;
+                        qcom,controller-type = "pmic-arbiter";
+
+                        pm8821: pmic@1 {
+                                compatible = "qcom,pm8821";
+                                interrupt-parent = <&tlmm_pinmux>;
+                                interrupts = <76 IRQ_TYPE_LEVEL_LOW>;
+                                #interrupt-cells = <2>;
+                                interrupt-controller;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                pm8821_mpps: mpps@50 {
+                                        compatible = "qcom,pm8821-mpp", "qcom,ssbi-mpp";
+                                        reg = <0x50>;
+                                        interrupts = <24 IRQ_TYPE_NONE>,
+                                                     <25 IRQ_TYPE_NONE>,
+                                                     <26 IRQ_TYPE_NONE>,
+                                                     <27 IRQ_TYPE_NONE>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                };
+                        };
+                };
+
                 qcom,ssbi@500000 {
                         compatible = "qcom,ssbi";
                         reg = <0x00500000 0x1000>;
@@ -1327,6 +1359,8 @@
 
                 hdmi: hdmi-tx@4a00000 {
                         compatible = "qcom,hdmi-tx-8960";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&hdmi_pinctrl>;
                         reg = <0x04a00000 0x2f0>;
                         reg-names = "core_physical";
                         interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@@ -1420,6 +1454,249 @@
                                 };
                         };
                 };
+
+                riva: riva-pil@3204000 {
+                        compatible = "qcom,riva-pil";
+
+                        reg = <0x03200800 0x1000>, <0x03202000 0x2000>, <0x03204000 0x100>;
+                        reg-names = "ccu", "dxe", "pmu";
+
+                        interrupts-extended = <&intc GIC_SPI 199 IRQ_TYPE_EDGE_RISING>,
+                                              <&wcnss_smsm 6 IRQ_TYPE_EDGE_RISING>;
+                        interrupt-names = "wdog", "fatal";
+
+                        memory-region = <&wcnss_mem>;
+
+                        vddcx-supply = <&pm8921_s3>;
+                        vddmx-supply = <&pm8921_l24>;
+                        vddpx-supply = <&pm8921_s4>;
+
+                        status = "disabled";
+
+                        iris {
+                                compatible = "qcom,wcn3660";
+
+                                clocks = <&cxo_board>;
+                                clock-names = "xo";
+
+                                vddxo-supply = <&pm8921_l4>;
+                                vddrfa-supply = <&pm8921_s2>;
+                                vddpa-supply = <&pm8921_l10>;
+                                vdddig-supply = <&pm8921_lvs2>;
+                        };
+
+                        smd-edge {
+                                interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
+
+                                qcom,ipc = <&l2cc 8 25>;
+                                qcom,smd-edge = <6>;
+
+                                label = "riva";
+
+                                wcnss {
+                                        compatible = "qcom,wcnss";
+                                        qcom,smd-channels = "WCNSS_CTRL";
+
+                                        qcom,mmio = <&riva>;
+
+                                        bt {
+                                                compatible = "qcom,wcnss-bt";
+                                        };
+
+                                        wifi {
+                                                compatible = "qcom,wcnss-wlan";
+
+                                                interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+                                                             <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
+                                                interrupt-names = "tx", "rx";
+
+                                                qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
+                                                qcom,smem-state-names = "tx-enable", "tx-rings-empty";
+                                        };
+                                };
+                        };
+                };
+
+                etb@1a01000 {
+                        compatible = "coresight-etb10", "arm,primecell";
+                        reg = <0x1a01000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        port {
+                                etb_in: endpoint {
+                                        slave-mode;
+                                        remote-endpoint = <&replicator_out0>;
+                                };
+                        };
+                };
+
+                tpiu@1a03000 {
+                        compatible = "arm,coresight-tpiu", "arm,primecell";
+                        reg = <0x1a03000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        port {
+                                tpiu_in: endpoint {
+                                        slave-mode;
+                                        remote-endpoint = <&replicator_out1>;
+                                };
+                        };
+                };
+
+                replicator {
+                        compatible = "arm,coresight-replicator";
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        ports {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                port@0 {
+                                        reg = <0>;
+                                        replicator_out0: endpoint {
+                                                remote-endpoint = <&etb_in>;
+                                        };
+                                };
+                                port@1 {
+                                        reg = <1>;
+                                        replicator_out1: endpoint {
+                                                remote-endpoint = <&tpiu_in>;
+                                        };
+                                };
+                                port@2 {
+                                        reg = <0>;
+                                        replicator_in: endpoint {
+                                                slave-mode;
+                                                remote-endpoint = <&funnel_out>;
+                                        };
+                                };
+                        };
+                };
+
+                funnel@1a04000 {
+                        compatible = "arm,coresight-funnel", "arm,primecell";
+                        reg = <0x1a04000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        ports {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                /*
+                                 * Not described input ports:
+                                 * 2 - connected to STM component
+                                 * 3 - not-connected
+                                 * 6 - not-connected
+                                 * 7 - not-connected
+                                 */
+                                port@0 {
+                                        reg = <0>;
+                                        funnel_in0: endpoint {
+                                                slave-mode;
+                                                remote-endpoint = <&etm0_out>;
+                                        };
+                                };
+                                port@1 {
+                                        reg = <1>;
+                                        funnel_in1: endpoint {
+                                                slave-mode;
+                                                remote-endpoint = <&etm1_out>;
+                                        };
+                                };
+                                port@4 {
+                                        reg = <4>;
+                                        funnel_in4: endpoint {
+                                                slave-mode;
+                                                remote-endpoint = <&etm2_out>;
+                                        };
+                                };
+                                port@5 {
+                                        reg = <5>;
+                                        funnel_in5: endpoint {
+                                                slave-mode;
+                                                remote-endpoint = <&etm3_out>;
+                                        };
+                                };
+                                port@8 {
+                                        reg = <0>;
+                                        funnel_out: endpoint {
+                                                remote-endpoint = <&replicator_in>;
+                                        };
+                                };
+                        };
+                };
+
+                etm@1a1c000 {
+                        compatible = "arm,coresight-etm3x", "arm,primecell";
+                        reg = <0x1a1c000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        cpu = <&CPU0>;
+
+                        port {
+                                etm0_out: endpoint {
+                                        remote-endpoint = <&funnel_in0>;
+                                };
+                        };
+                };
+
+                etm@1a1d000 {
+                        compatible = "arm,coresight-etm3x", "arm,primecell";
+                        reg = <0x1a1d000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        cpu = <&CPU1>;
+
+                        port {
+                                etm1_out: endpoint {
+                                        remote-endpoint = <&funnel_in1>;
+                                };
+                        };
+                };
+
+                etm@1a1e000 {
+                        compatible = "arm,coresight-etm3x", "arm,primecell";
+                        reg = <0x1a1e000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        cpu = <&CPU2>;
+
+                        port {
+                                etm2_out: endpoint {
+                                        remote-endpoint = <&funnel_in4>;
+                                };
+                        };
+                };
+
+                etm@1a1f000 {
+                        compatible = "arm,coresight-etm3x", "arm,primecell";
+                        reg = <0x1a1f000 0x1000>;
+
+                        clocks = <&rpmcc RPM_QDSS_CLK>;
+                        clock-names = "apb_pclk";
+
+                        cpu = <&CPU3>;
+
+                        port {
+                                etm3_out: endpoint {
+                                        remote-endpoint = <&funnel_in5>;
+                                };
+                        };
+                };
         };
 };
 #include "qcom-apq8064-pins.dtsi"
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 2e375576ffd0..76f4e8921d58 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -65,13 +65,13 @@
                 cxo_board {
                         compatible = "fixed-clock";
                         #clock-cells = <0>;
-                        clock-frequency = <19200000>;
+                        clock-frequency = <25000000>;
                 };
 
                 pxo_board {
                         compatible = "fixed-clock";
                         #clock-cells = <0>;
-                        clock-frequency = <27000000>;
+                        clock-frequency = <25000000>;
                 };
 
                 sleep_clk: sleep_clk {
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts
index 23de764558ab..1adc04978a47 100644
--- a/arch/arm/boot/dts/qcom-msm8660-surf.dts
+++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts
@@ -48,7 +48,7 @@
         };
 };
 
-&pmicintc {
+&pm8058 {
         keypad@148 {
                 linux,keymap = <
                         MATRIX_KEY(0, 0, KEY_FN_F1)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 4d828f810746..91c9a62ae725 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -163,7 +163,7 @@
                         reg = <0x500000 0x1000>;
                         qcom,controller-type = "pmic-arbiter";
 
-                        pmicintc: pmic@0 {
+                        pm8058: pmic@0 {
                                 compatible = "qcom,pm8058";
                                 interrupt-parent = <&tlmm>;
                                 interrupts = <88 8>;
@@ -176,7 +176,7 @@
                                         compatible = "qcom,pm8058-gpio",
                                                      "qcom,ssbi-gpio";
                                         reg = <0x150>;
-                                        interrupt-parent = <&pmicintc>;
+                                        interrupt-parent = <&pm8058>;
                                         interrupts = <192 IRQ_TYPE_NONE>,
                                                      <193 IRQ_TYPE_NONE>,
                                                      <194 IRQ_TYPE_NONE>,
@@ -232,7 +232,7 @@
                                         reg = <0x50>;
                                         gpio-controller;
                                         #gpio-cells = <2>;
-                                        interrupt-parent = <&pmicintc>;
+                                        interrupt-parent = <&pm8058>;
                                         interrupts =
                                         <128 IRQ_TYPE_NONE>,
                                         <129 IRQ_TYPE_NONE>,
@@ -251,7 +251,7 @@
                                 pwrkey@1c {
                                         compatible = "qcom,pm8058-pwrkey";
                                         reg = <0x1c>;
-                                        interrupt-parent = <&pmicintc>;
+                                        interrupt-parent = <&pm8058>;
                                         interrupts = <50 1>, <51 1>;
                                         debounce = <15625>;
                                         pull-up;
@@ -260,7 +260,7 @@
                                 keypad@148 {
                                         compatible = "qcom,pm8058-keypad";
                                         reg = <0x148>;
-                                        interrupt-parent = <&pmicintc>;
+                                        interrupt-parent = <&pm8058>;
                                         interrupts = <74 1>, <75 1>;
                                         debounce = <15>;
                                         scan-delay = <32>;
@@ -270,7 +270,7 @@
                                 rtc@1e8 {
                                         compatible = "qcom,pm8058-rtc";
                                         reg = <0x1e8>;
-                                        interrupt-parent = <&pmicintc>;
+                                        interrupt-parent = <&pm8058>;
                                         interrupts = <39 1>;
                                         allow-set-time;
                                 };
diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
index e7c1577d56f4..96c853bab8ba 100644
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts
@@ -413,6 +413,14 @@
         dma-controller@f9944000 {
                 qcom,controlled-remotely;
         };
+
+        usb-phy@f9a55000 {
+                status = "ok";
+        };
+
+        usb@f9a55000 {
+                status = "ok";
+        };
 };
 
 &spmi_bus {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 49d579f28865..d3e1a61b8671 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -3,6 +3,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/qcom,gcc-msm8974.h>
 #include "skeleton.dtsi"
 
 / {
@@ -30,7 +31,7 @@
                         no-map;
                 };
 
-                adsp@0dc00000 {
+                adsp_region: adsp@0dc00000 {
                         reg = <0x0dc00000 0x1900000>;
                         no-map;
                 };
@@ -59,11 +60,6 @@
                         reg = <0x0fd80000 0x180000>;
                         no-map;
                 };
-
-                unused@0ff00000 {
-                        reg = <0x0ff00000 0x10100000>;
-                        no-map;
-                };
         };
 
         cpus {
@@ -242,6 +238,24 @@
                 clock-frequency = <19200000>;
         };
 
+        adsp-pil {
+                compatible = "qcom,msm8974-adsp-pil";
+
+                interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>,
+                                      <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                      <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                      <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                      <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+                cx-supply = <&pm8841_s2>;
+
+                memory-region = <&adsp_region>;
+
+                qcom,smem-states = <&adsp_smp2p_out 0>;
+                qcom,smem-state-names = "stop";
+        };
+
         smem {
                 compatible = "qcom,smem";
 
@@ -251,6 +265,31 @@
                 hwlocks = <&tcsr_mutex 3>;
         };
 
+        smp2p-adsp {
+                compatible = "qcom,smp2p";
+                qcom,smem = <443>, <429>;
+
+                interrupt-parent = <&intc>;
+                interrupts = <0 158 IRQ_TYPE_EDGE_RISING>;
+
+                qcom,ipc = <&apcs 8 10>;
+
+                qcom,local-pid = <0>;
+                qcom,remote-pid = <2>;
+
+                adsp_smp2p_out: master-kernel {
+                        qcom,entry-name = "master-kernel";
+                        #qcom,smem-state-cells = <1>;
+                };
+
+                adsp_smp2p_in: slave-kernel {
+                        qcom,entry-name = "slave-kernel";
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+                };
+        };
+
         smp2p-modem {
                 compatible = "qcom,smp2p";
                 qcom,smem = <435>, <428>;
@@ -655,11 +694,56 @@
                         #dma-cells = <1>;
                         qcom,ee = <0>;
                 };
+
+                usb1_phy: usb-phy@f9a55000 {
+                        compatible = "qcom,usb-otg-snps";
+
+                        reg = <0xf9a55000 0x400>;
+                        interrupts-extended = <&intc 0 134 0>, <&intc 0 140 0>,
+                                <&spmi_bus 0 0x9 0 0>;
+                        interrupt-names = "core_irq", "async_irq", "pmic_id_irq";
+
+                        vddcx-supply = <&pm8841_s2>;
+                        v3p3-supply = <&pm8941_l24>;
+                        v1p8-supply = <&pm8941_l6>;
+
+                        dr_mode = "otg";
+                        qcom,phy-init-sequence = <0x63 0x81 0xfffffff>;
+                        qcom,otg-control = <1>;
+                        qcom,phy-num = <0>;
+
+                        resets = <&gcc GCC_USB2A_PHY_BCR>, <&gcc GCC_USB_HS_BCR>;
+                        reset-names = "phy", "link";
+
+                        clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>,
+                                <&gcc GCC_USB_HS_AHB_CLK>;
+                        clock-names = "phy", "core", "iface";
+
+                        status = "disabled";
+                };
+
+                usb@f9a55000 {
+                        compatible = "qcom,ci-hdrc";
+                        reg = <0xf9a55000 0x400>;
+                        dr_mode = "otg";
+                        interrupts = <0 134 0>, <0 140 0>;
+                        interrupt-names = "core_irq", "async_irq";
+                        usb-phy = <&usb1_phy>;
+
+                        status = "disabled";
+                };
         };
 
         smd {
                 compatible = "qcom,smd";
 
+                adsp {
+                        interrupts = <0 156 IRQ_TYPE_EDGE_RISING>;
+
+                        qcom,ipc = <&apcs 8 8>;
+                        qcom,smd-edge = <1>;
+                };
+
                 modem {
                         interrupts = <0 25 IRQ_TYPE_EDGE_RISING>;
 
diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index dd4418195ca6..02b59c5b3c53 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -61,6 +61,14 @@
         status = "okay";
 };
 
+&ostm0 {
+        status = "okay";
+};
+
+&ostm1 {
+        status = "okay";
+};
+
 &scif2 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 3dd427d68c83..b8aa256bd515 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -108,6 +108,15 @@
                         clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
                 };
 
+                mstp5_clks: mstp5_clks@fcfe0428 {
+                        #clock-cells = <1>;
+                        compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                        reg = <0xfcfe0428 4>;
+                        clocks = <&p0_clk>, <&p0_clk>;
+                        clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>;
+                        clock-output-names = "ostm0", "ostm1";
+                };
+
                 mstp7_clks: mstp7_clks@fcfe0430 {
                         #clock-cells = <1>;
                         compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -466,6 +475,7 @@
                               GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
                               GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
+                power-domains = <&cpg_clocks>;
                 reg-io-width = <4>;
                 bus-width = <8>;
                 status = "disabled";
@@ -496,4 +506,22 @@
                 cap-sdio-irq;
                 status = "disabled";
         };
+
+        ostm0: timer@fcfec000 {
+                compatible = "renesas,r7s72100-ostm", "renesas,ostm";
+                reg = <0xfcfec000 0x30>;
+                interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
+                clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
+
+        ostm1: timer@fcfec400 {
+                compatible = "renesas,r7s72100-ostm", "renesas,ostm";
+                reg = <0xfcfec400 0x30>;
+                interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;
+                clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;
+                power-domains = <&cpg_clocks>;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 53183ffe04c1..00eb9a7114dc 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -440,7 +440,7 @@
         };
 
         mmcif0: mmc@ee200000 {
-                compatible = "renesas,sh-mmcif";
+                compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
                 reg = <0 0xee200000 0 0x80>;
                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>;
@@ -450,7 +450,7 @@
         };
 
         mmcif1: mmc@ee220000 {
-                compatible = "renesas,sh-mmcif";
+                compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
                 reg = <0 0xee220000 0 0x80>;
                 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>;
@@ -465,7 +465,7 @@
                 #address-cells = <0>;
                 interrupt-controller;
                 reg = <0 0xf1001000 0 0x1000>,
-                        <0 0xf1002000 0 0x1000>,
+                        <0 0xf1002000 0 0x2000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 216cb1f37f87..d8393b97768b 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -55,11 +55,14 @@
                         #address-cells = <0>;
                         interrupt-controller;
                         reg = <0 0xf1001000 0 0x1000>,
-                              <0 0xf1002000 0 0x1000>,
+                              <0 0xf1002000 0 0x2000>,
                               <0 0xf1004000 0 0x2000>,
                               <0 0xf1006000 0 0x2000>;
                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
                                                  IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&cpg CPG_MOD 408>;
+                        clock-names = "clk";
+                        power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
                 };
 
                 irqc: interrupt-controller@e61c0000 {
@@ -102,10 +105,9 @@
                         #power-domain-cells = <0>;
                 };
 
-                sysc: system-controller@e6180000 {
-                        compatible = "renesas,r8a7743-sysc";
-                        reg = <0 0xe6180000 0 0x200>;
-                        #power-domain-cells = <1>;
+                prr: chipid@ff000044 {
+                        compatible = "renesas,prr";
+                        reg = <0 0xff000044 0 4>;
                 };
 
                 rst: reset-controller@e6160000 {
@@ -113,6 +115,12 @@
                         reg = <0 0xe6160000 0 0x100>;
                 };
 
+                sysc: system-controller@e6180000 {
+                        compatible = "renesas,r8a7743-sysc";
+                        reg = <0 0xe6180000 0 0x200>;
+                        #power-domain-cells = <1>;
+                };
+
                 dmac0: dma-controller@e6700000 {
                         compatible = "renesas,dmac-r8a7743",
                                      "renesas,rcar-dmac";
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 0b2e2f37150f..1f65ff68a469 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -55,11 +55,14 @@
                         #address-cells = <0>;
                         interrupt-controller;
                         reg = <0 0xf1001000 0 0x1000>,
-                              <0 0xf1002000 0 0x1000>,
+                              <0 0xf1002000 0 0x2000>,
                               <0 0xf1004000 0 0x2000>,
                               <0 0xf1006000 0 0x2000>;
                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
                                                  IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&cpg CPG_MOD 408>;
+                        clock-names = "clk";
+                        power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
                 };
 
                 irqc: interrupt-controller@e61c0000 {
@@ -102,10 +105,9 @@
                         #power-domain-cells = <0>;
                 };
 
-                sysc: system-controller@e6180000 {
-                        compatible = "renesas,r8a7745-sysc";
-                        reg = <0 0xe6180000 0 0x200>;
-                        #power-domain-cells = <1>;
+                prr: chipid@ff000044 {
+                        compatible = "renesas,prr";
+                        reg = <0 0xff000044 0 4>;
                 };
 
                 rst: reset-controller@e6160000 {
@@ -113,6 +115,12 @@
                         reg = <0 0xe6160000 0 0x100>;
                 };
 
+                sysc: system-controller@e6180000 {
+                        compatible = "renesas,r8a7745-sysc";
+                        reg = <0 0xe6180000 0 0x200>;
+                        #power-domain-cells = <1>;
+                };
+
                 dmac0: dma-controller@e6700000 {
                         compatible = "renesas,dmac-r8a7745",
                                      "renesas,rcar-dmac";
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index d0db998effc8..1e93c94a9eac 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -150,7 +150,7 @@
         i2c0: i2c@ffc70000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7778";
+                compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
                 reg = <0xffc70000 0x1000>;
                 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7778_CLK_I2C0>;
@@ -161,7 +161,7 @@
         i2c1: i2c@ffc71000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7778";
+                compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
                 reg = <0xffc71000 0x1000>;
                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7778_CLK_I2C1>;
@@ -172,7 +172,7 @@
         i2c2: i2c@ffc72000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7778";
+                compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
                 reg = <0xffc72000 0x1000>;
                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7778_CLK_I2C2>;
@@ -183,7 +183,7 @@
         i2c3: i2c@ffc73000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7778";
+                compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
                 reg = <0xffc73000 0x1000>;
                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7778_CLK_I2C3>;
@@ -369,7 +369,7 @@
         };
 
         mmcif: mmc@ffe4e000 {
-                compatible = "renesas,sh-mmcif";
+                compatible = "renesas,mmcif-r8a7778", "renesas,sh-mmcif";
                 reg = <0xffe4e000 0x100>;
                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7778_CLK_MMC>;
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index 676151b70185..89c5b24a3d03 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -216,6 +216,10 @@
         };
 };
 
+&sata {
+        status = "okay";
+};
+
 &scif2 {
         pinctrl-0 = <&scif2_pins>;
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 55a7c1e37c57..ae2d9a9c65af 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -173,7 +173,7 @@
         i2c0: i2c@ffc70000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7779";
+                compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
                 reg = <0xffc70000 0x1000>;
                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7779_CLK_I2C0>;
@@ -184,7 +184,7 @@
         i2c1: i2c@ffc71000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7779";
+                compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
                 reg = <0xffc71000 0x1000>;
                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
@@ -195,7 +195,7 @@
         i2c2: i2c@ffc72000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7779";
+                compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
                 reg = <0xffc72000 0x1000>;
                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
@@ -206,7 +206,7 @@
         i2c3: i2c@ffc73000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7779";
+                compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
                 reg = <0xffc73000 0x1000>;
                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
@@ -347,6 +347,7 @@
                 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp1_clks R8A7779_CLK_SATA>;
                 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
+                status = "disabled";
         };
 
         sdhi0: sd@ffe4c000 {
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0c8900d4b824..6d10450de6d7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -183,7 +183,7 @@
                 #address-cells = <0>;
                 interrupt-controller;
                 reg = <0 0xf1001000 0 0x1000>,
-                        <0 0xf1002000 0 0x1000>,
+                        <0 0xf1002000 0 0x2000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -480,7 +480,7 @@
         i2c0: i2c@e6508000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7790";
+                compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6508000 0 0x40>;
                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
@@ -492,7 +492,7 @@
         i2c1: i2c@e6518000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7790";
+                compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6518000 0 0x40>;
                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
@@ -504,7 +504,7 @@
         i2c2: i2c@e6530000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7790";
+                compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6530000 0 0x40>;
                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
@@ -516,7 +516,7 @@
         i2c3: i2c@e6540000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7790";
+                compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6540000 0 0x40>;
                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
@@ -528,7 +528,8 @@
         iic0: i2c@e6500000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6500000 0 0x425>;
                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
@@ -542,7 +543,8 @@
         iic1: i2c@e6510000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6510000 0 0x425>;
                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
@@ -556,7 +558,8 @@
         iic2: i2c@e6520000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6520000 0 0x425>;
                 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
@@ -570,7 +573,8 @@
         iic3: i2c@e60b0000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe60b0000 0 0x425>;
                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
@@ -883,7 +887,8 @@
         };
 
         usbphy: usb-phy@e6590100 {
-                compatible = "renesas,usb-phy-r8a7790";
+                compatible = "renesas,usb-phy-r8a7790",
+                             "renesas,rcar-gen2-usb-phy";
                 reg = <0 0xe6590100 0 0x100>;
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -1503,7 +1508,8 @@
         };
 
         msiof0: spi@e6e20000 {
-                compatible = "renesas,msiof-r8a7790";
+                compatible = "renesas,msiof-r8a7790",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6e20000 0 0x0064>;
                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
@@ -1517,7 +1523,8 @@
         };
 
         msiof1: spi@e6e10000 {
-                compatible = "renesas,msiof-r8a7790";
+                compatible = "renesas,msiof-r8a7790",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6e10000 0 0x0064>;
                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
@@ -1531,7 +1538,8 @@
         };
 
         msiof2: spi@e6e00000 {
-                compatible = "renesas,msiof-r8a7790";
+                compatible = "renesas,msiof-r8a7790",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6e00000 0 0x0064>;
                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
@@ -1545,7 +1553,8 @@
         };
 
         msiof3: spi@e6c90000 {
-                compatible = "renesas,msiof-r8a7790";
+                compatible = "renesas,msiof-r8a7790",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6c90000 0 0x0064>;
                 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 87214668d70f..9f9e48511836 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -114,7 +114,7 @@
                 #address-cells = <0>;
                 interrupt-controller;
                 reg = <0 0xf1001000 0 0x1000>,
-                        <0 0xf1002000 0 0x1000>,
+                        <0 0xf1002000 0 0x2000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -444,7 +444,7 @@
         i2c0: i2c@e6508000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7791";
+                compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6508000 0 0x40>;
                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
@@ -456,7 +456,7 @@
         i2c1: i2c@e6518000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7791";
+                compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6518000 0 0x40>;
                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
@@ -468,7 +468,7 @@
         i2c2: i2c@e6530000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7791";
+                compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6530000 0 0x40>;
                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
@@ -480,7 +480,7 @@
         i2c3: i2c@e6540000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7791";
+                compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6540000 0 0x40>;
                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
@@ -492,7 +492,7 @@
         i2c4: i2c@e6520000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7791";
+                compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6520000 0 0x40>;
                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
@@ -505,7 +505,7 @@
                 /* doesn't need pinmux */
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7791";
+                compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6528000 0 0x40>;
                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
@@ -518,7 +518,8 @@
                 /* doesn't need pinmux */
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe60b0000 0 0x425>;
                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
@@ -532,7 +533,8 @@
         i2c7: i2c@e6500000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6500000 0 0x425>;
                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
@@ -546,7 +548,8 @@
         i2c8: i2c@e6510000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6510000 0 0x425>;
                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
@@ -934,7 +937,8 @@
         };
 
         usbphy: usb-phy@e6590100 {
-                compatible = "renesas,usb-phy-r8a7791";
+                compatible = "renesas,usb-phy-r8a7791",
+                             "renesas,rcar-gen2-usb-phy";
                 reg = <0 0xe6590100 0 0x100>;
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -1517,7 +1521,8 @@
         };
 
         msiof0: spi@e6e20000 {
-                compatible = "renesas,msiof-r8a7791";
+                compatible = "renesas,msiof-r8a7791",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6e20000 0 0x0064>;
                 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
@@ -1531,7 +1536,8 @@
         };
 
         msiof1: spi@e6e10000 {
-                compatible = "renesas,msiof-r8a7791";
+                compatible = "renesas,msiof-r8a7791",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6e10000 0 0x0064>;
                 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
@@ -1545,7 +1551,8 @@
         };
 
         msiof2: spi@e6e00000 {
-                compatible = "renesas,msiof-r8a7791";
+                compatible = "renesas,msiof-r8a7791",
+                             "renesas,rcar-gen2-msiof";
                 reg = <0 0xe6e00000 0 0x0064>;
                 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 6ced3c1ec377..8ecfda7a004e 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -88,7 +88,7 @@
                         #interrupt-cells = <3>;
                         interrupt-controller;
                         reg = <0 0xf1001000 0 0x1000>,
-                              <0 0xf1002000 0 0x1000>,
+                              <0 0xf1002000 0 0x2000>,
                               <0 0xf1004000 0 0x2000>,
                               <0 0xf1006000 0 0x2000>;
                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
@@ -498,7 +498,8 @@
 
                 /* I2C doesn't need pinmux */
                 i2c0: i2c@e6508000 {
-                        compatible = "renesas,i2c-r8a7792";
+                        compatible = "renesas,i2c-r8a7792",
+                                     "renesas,rcar-gen2-i2c";
                         reg = <0 0xe6508000 0 0x40>;
                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
@@ -510,7 +511,8 @@
                 };
 
                 i2c1: i2c@e6518000 {
-                        compatible = "renesas,i2c-r8a7792";
+                        compatible = "renesas,i2c-r8a7792",
+                                     "renesas,rcar-gen2-i2c";
                         reg = <0 0xe6518000 0 0x40>;
                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
@@ -522,7 +524,8 @@
                 };
 
                 i2c2: i2c@e6530000 {
-                        compatible = "renesas,i2c-r8a7792";
+                        compatible = "renesas,i2c-r8a7792",
+                                     "renesas,rcar-gen2-i2c";
                         reg = <0 0xe6530000 0 0x40>;
                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
@@ -534,7 +537,8 @@
                 };
 
                 i2c3: i2c@e6540000 {
-                        compatible = "renesas,i2c-r8a7792";
+                        compatible = "renesas,i2c-r8a7792",
+                                     "renesas,rcar-gen2-i2c";
                         reg = <0 0xe6540000 0 0x40>;
                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
@@ -546,7 +550,8 @@
                 };
 
                 i2c4: i2c@e6520000 {
-                        compatible = "renesas,i2c-r8a7792";
+                        compatible = "renesas,i2c-r8a7792",
+                                     "renesas,rcar-gen2-i2c";
                         reg = <0 0xe6520000 0 0x40>;
                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
@@ -558,7 +563,8 @@
                 };
 
                 i2c5: i2c@e6528000 {
-                        compatible = "renesas,i2c-r8a7792";
+                        compatible = "renesas,i2c-r8a7792",
+                                     "renesas,rcar-gen2-i2c";
                         reg = <0 0xe6528000 0 0x40>;
                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
@@ -585,7 +591,8 @@
                 };
 
                 msiof0: spi@e6e20000 {
-                        compatible = "renesas,msiof-r8a7792";
+                        compatible = "renesas,msiof-r8a7792",
+                                     "renesas,rcar-gen2-msiof";
                         reg = <0 0xe6e20000 0 0x0064>;
                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
@@ -599,7 +606,8 @@
                 };
 
                 msiof1: spi@e6e10000 {
-                        compatible = "renesas,msiof-r8a7792";
+                        compatible = "renesas,msiof-r8a7792",
+                                     "renesas,rcar-gen2-msiof";
                         reg = <0 0xe6e10000 0 0x0064>;
                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
                         clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index dc311eba4444..92fff07c5e2b 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -538,6 +538,27 @@
         };
 };
 
+&i2c6 {
+        status = "okay";
+        clock-frequency = <100000>;
+
+        pmic@58 {
+                compatible = "dlg,da9063";
+                reg = <0x58>;
+                interrupt-parent = <&irqc0>;
+                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+                interrupt-controller;
+
+                rtc {
+                        compatible = "dlg,da9063-rtc";
+                };
+
+                wdt {
+                        compatible = "dlg,da9063-watchdog";
+                };
+        };
+};
+
 &rcar_sound {
         pinctrl-0 = <&sound_pins &sound_clk_pins>;
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 2fb527ca0b15..48ce21c5e8db 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -105,7 +105,7 @@
                 #address-cells = <0>;
                 interrupt-controller;
                 reg = <0 0xf1001000 0 0x1000>,
-                        <0 0xf1002000 0 0x1000>,
+                        <0 0xf1002000 0 0x2000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -411,7 +411,7 @@
         i2c0: i2c@e6508000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7793";
+                compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6508000 0 0x40>;
                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
@@ -423,7 +423,7 @@
         i2c1: i2c@e6518000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7793";
+                compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6518000 0 0x40>;
                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
@@ -435,7 +435,7 @@
         i2c2: i2c@e6530000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7793";
+                compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6530000 0 0x40>;
                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
@@ -447,7 +447,7 @@
         i2c3: i2c@e6540000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7793";
+                compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6540000 0 0x40>;
                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
@@ -459,7 +459,7 @@
         i2c4: i2c@e6520000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7793";
+                compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6520000 0 0x40>;
                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
@@ -472,7 +472,7 @@
                 /* doesn't need pinmux */
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,i2c-r8a7793";
+                compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6528000 0 0x40>;
                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
@@ -485,7 +485,8 @@
                 /* doesn't need pinmux */
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe60b0000 0 0x425>;
                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
@@ -499,7 +500,8 @@
         i2c7: i2c@e6500000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6500000 0 0x425>;
                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
@@ -513,7 +515,8 @@
         i2c8: i2c@e6510000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6510000 0 0x425>;
                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index fb576dba748c..319c1069b7ee 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -71,7 +71,7 @@
                 #address-cells = <0>;
                 interrupt-controller;
                 reg = <0 0xf1001000 0 0x1000>,
-                        <0 0xf1002000 0 0x1000>,
+                        <0 0xf1002000 0 0x2000>,
                         <0 0xf1004000 0 0x2000>,
                         <0 0xf1006000 0 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -611,7 +611,7 @@
 
         /* The memory map in the User's Manual maps the cores to bus numbers */
         i2c0: i2c@e6508000 {
-                compatible = "renesas,i2c-r8a7794";
+                compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6508000 0 0x40>;
                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
@@ -623,7 +623,7 @@
         };
 
         i2c1: i2c@e6518000 {
-                compatible = "renesas,i2c-r8a7794";
+                compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6518000 0 0x40>;
                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
@@ -635,7 +635,7 @@
         };
 
         i2c2: i2c@e6530000 {
-                compatible = "renesas,i2c-r8a7794";
+                compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6530000 0 0x40>;
                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
@@ -647,7 +647,7 @@
         };
 
         i2c3: i2c@e6540000 {
-                compatible = "renesas,i2c-r8a7794";
+                compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6540000 0 0x40>;
                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
@@ -659,7 +659,7 @@
         };
 
         i2c4: i2c@e6520000 {
-                compatible = "renesas,i2c-r8a7794";
+                compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6520000 0 0x40>;
                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
@@ -671,7 +671,7 @@
         };
 
         i2c5: i2c@e6528000 {
-                compatible = "renesas,i2c-r8a7794";
+                compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                 reg = <0 0xe6528000 0 0x40>;
                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
@@ -683,7 +683,8 @@
         };
 
         i2c6: i2c@e6500000 {
-                compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6500000 0 0x425>;
                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
@@ -697,7 +698,8 @@
         };
 
         i2c7: i2c@e6510000 {
-                compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
+                compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
+                             "renesas,rmobile-iic";
                 reg = <0 0xe6510000 0 0x425>;
                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
@@ -878,7 +880,8 @@
         };
 
         usbphy: usb-phy@e6590100 {
-                compatible = "renesas,usb-phy-r8a7794";
+                compatible = "renesas,usb-phy-r8a7794",
+                             "renesas,rcar-gen2-usb-phy";
                 reg = <0 0xe6590100 0 0x100>;
                 #address-cells = <1>;
                 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
index d7700235e0f5..d6194bff7afe 100644
--- a/arch/arm/boot/dts/rk1108.dtsi
+++ b/arch/arm/boot/dts/rk1108.dtsi
@@ -215,7 +215,7 @@
                 #address-cells = <0>;
 
                 reg = <0x32011000 0x1000>,
-                      <0x32012000 0x1000>,
+                      <0x32012000 0x2000>,
                       <0x32014000 0x2000>,
                       <0x32016000 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts
index 2f5f15524fba..c0953410121b 100644
--- a/arch/arm/boot/dts/rk3036-evb.dts
+++ b/arch/arm/boot/dts/rk3036-evb.dts
@@ -56,7 +56,7 @@
         pinctrl-names = "default";
         pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
         phy = <&phy0>;
-        phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */
+        phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
         phy-reset-duration = <10>; /* millisecond */
 
         status = "okay";
diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index 3de958ec29c0..5726135b7f8a 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -55,7 +55,7 @@
                 compatible = "gpio-leds";
 
                 work {
-                        gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
+                        gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
                         label = "kylin:red:led";
                         pinctrl-names = "default";
                         pinctrl-0 = <&led_ctl>;
@@ -74,9 +74,9 @@
                  * - SDIO_RESET_L_WL_RST
                  * - SDIO_RESET_L_BT_EN
                  */
-                reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
-                              <&gpio0 27 GPIO_ACTIVE_LOW>, /* WL_RST */
-                              <&gpio2 9  GPIO_ACTIVE_LOW>; /* BT_EN */
+                reset-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
+                              <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>, /* WL_RST */
+                              <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; /* BT_EN */
         };
 
         sound {
@@ -121,7 +121,7 @@
         pinctrl-names = "default";
         pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
         phy = <&phy0>;
-        phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */
+        phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
         phy-reset-duration = <10>; /* millisecond */
 
         status = "okay";
@@ -148,7 +148,7 @@
                 compatible = "rockchip,rk808";
                 reg = <0x1b>;
                 interrupt-parent = <&gpio2>;
-                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int &global_pwroff>;
                 rockchip,system-power-controller;
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 4ed49a243e5c..ff9b90bfaefd 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -189,7 +189,7 @@
                 #address-cells = <0>;
 
                 reg = <0x10139000 0x1000>,
-                      <0x1013a000 0x1000>,
+                      <0x1013a000 0x2000>,
                       <0x1013c000 0x2000>,
                       <0x1013e000 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index c0d8b5446ba7..e1f5198723b2 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -71,7 +71,7 @@
                 regulator-name = "sdmmc-supply";
                 regulator-min-microvolt = <3000000>;
                 regulator-max-microvolt = <3000000>;
-                gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
                 startup-delay-us = <100000>;
                 vin-supply = <&vcc_io>;
         };
@@ -81,7 +81,7 @@
                 autorepeat;
 
                 power {
-                        gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */
+                        gpios = <&gpio6 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */
                         linux,code = <KEY_POWER>;
                         label = "GPIO Key Power";
                         linux,input-type = <1>;
@@ -89,7 +89,7 @@
                         debounce-interval = <100>;
                 };
                 volume-down {
-                        gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */
+                        gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */
                         linux,code = <KEY_VOLUMEDOWN>;
                         label = "GPIO Key Vol-";
                         linux,input-type = <1>;
@@ -111,7 +111,7 @@
                 reg = <0x2d>;
 
                 interrupt-parent = <&gpio6>;
-                interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA6 IRQ_TYPE_LEVEL_LOW>;
 
                 vcc5-supply = <&vcc_io>;
                 vcc6-supply = <&vcc_io>;
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts
index 0a54c4beff8d..c6d92c25df42 100644
--- a/arch/arm/boot/dts/rk3066a-marsboard.dts
+++ b/arch/arm/boot/dts/rk3066a-marsboard.dts
@@ -69,7 +69,7 @@
                 regulator-name = "sdmmc-supply";
                 regulator-min-microvolt = <3000000>;
                 regulator-max-microvolt = <3000000>;
-                gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
                 startup-delay-us = <100000>;
                 vin-supply = <&vcc_io>;
         };
@@ -91,7 +91,7 @@
                 reg = <0x2d>;
 
                 interrupt-parent = <&gpio6>;
-                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
 
                 vcc1-supply = <&vsys>;
                 vcc2-supply = <&vsys>;
@@ -186,7 +186,7 @@
         phy0: ethernet-phy@0 {
                 reg = <0>;
                 interrupt-parent = <&gpio1>;
-                interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
         };
 };
 
diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts
index 658eb7ddeaf5..7ca1cf5241e0 100644
--- a/arch/arm/boot/dts/rk3066a-mk808.dts
+++ b/arch/arm/boot/dts/rk3066a-mk808.dts
@@ -61,7 +61,7 @@
 
                 blue {
                         label = "mk808:blue:power";
-                        gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+                        gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
                         default-state = "off";
                         linux,default-trigger = "default-on";
                 };
@@ -77,7 +77,7 @@
         vcc_host: usb-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
                 pinctrl-0 = <&host_drv>;
                 pinctrl-names = "default";
                 regulator-always-on;
@@ -91,7 +91,7 @@
         vcc_otg: usb-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
                 pinctrl-0 = <&otg_drv>;
                 pinctrl-names = "default";
                 regulator-always-on;
@@ -104,7 +104,7 @@
 
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
                 pinctrl-0 = <&sdmmc_pwr>;
                 pinctrl-names = "default";
                 regulator-name = "vcc_sd";
@@ -117,7 +117,7 @@
         vcc_wifi: sdio-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
                 pinctrl-0 = <&wifi_pwr>;
                 pinctrl-names = "default";
                 regulator-name = "vcc_wifi";
diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts
index 82465b644443..8907deaab18e 100644
--- a/arch/arm/boot/dts/rk3066a-rayeager.dts
+++ b/arch/arm/boot/dts/rk3066a-rayeager.dts
@@ -55,7 +55,7 @@
 
         ir: ir-receiver {
                 compatible = "gpio-ir-receiver";
-                gpios = <&gpio6 1 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio6 RK_PA1 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ir_int>;
         };
@@ -65,7 +65,7 @@
 
                 power {
                         wakeup-source;
-                        gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio6 RK_PA2 GPIO_ACTIVE_LOW>;
                         label = "GPIO Power";
                         linux,code = <KEY_POWER>;
                         pinctrl-names = "default";
@@ -115,7 +115,7 @@
         vcc_sata: sata-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sata_pwr>;
                 regulator-name = "usb_5v";
@@ -127,7 +127,7 @@
 
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_pwr>;
                 regulator-name = "vcc_sd";
@@ -140,7 +140,7 @@
         vcc_host: usb-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_drv>;
                 regulator-name = "host-pwr";
@@ -153,7 +153,7 @@
         vcc_otg: usb-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&otg_drv>;
                 regulator-name = "vcc_otg";
@@ -201,7 +201,7 @@
                 compatible = "asahi-kasei,ak8975";
                 reg = <0x0d>;
                 interrupt-parent = <&gpio4>;
-                interrupts = <17 IRQ_TYPE_EDGE_RISING>;
+                interrupts = <RK_PC1 IRQ_TYPE_EDGE_RISING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&comp_int>;
         };
@@ -210,7 +210,7 @@
                 compatible = "fsl,mma8452";
                 reg = <0x1d>;
                 interrupt-parent = <&gpio4>;
-                interrupts = <16 IRQ_TYPE_EDGE_RISING>;
+                interrupts = <RK_PC0 IRQ_TYPE_EDGE_RISING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&gsensor_int>;
         };
@@ -223,7 +223,7 @@
         tps: tps@2d {
                 reg = <0x2d>;
                 interrupt-parent = <&gpio6>;
-                interrupts = <4 IRQ_TYPE_EDGE_RISING>;
+                interrupts = <RK_PA4 IRQ_TYPE_EDGE_RISING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int>, <&pwr_hold>;
 
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index e498c362b9e7..f50481fd8e5c 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -687,6 +687,7 @@
 };
 
 &uart0 {
+        compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
         dmas = <&dmac1_s 0>, <&dmac1_s 1>;
         dma-names = "tx", "rx";
         pinctrl-names = "default";
@@ -694,6 +695,7 @@
 };
 
 &uart1 {
+        compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
         dmas = <&dmac1_s 2>, <&dmac1_s 3>;
         dma-names = "tx", "rx";
         pinctrl-names = "default";
@@ -701,6 +703,7 @@
 };
 
 &uart2 {
+        compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
         dmas = <&dmac2 6>, <&dmac2 7>;
         dma-names = "tx", "rx";
         pinctrl-names = "default";
@@ -708,6 +711,7 @@
 };
 
 &uart3 {
+        compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
         dmas = <&dmac2 8>, <&dmac2 9>;
         dma-names = "tx", "rx";
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts
index df727bafd6dc..5b2a0b6885cd 100644
--- a/arch/arm/boot/dts/rk3188-px3-evb.dts
+++ b/arch/arm/boot/dts/rk3188-px3-evb.dts
@@ -62,7 +62,7 @@
                 autorepeat;
 
                 power {
-                        gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_POWER>;
                         label = "GPIO Key Power";
                         linux,input-type = <1>;
@@ -102,7 +102,7 @@
                 compatible = "bosch,bma250";
                 reg = <0x18>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PB7 IRQ_TYPE_LEVEL_LOW>;
         };
 };
 
@@ -114,7 +114,7 @@
                 compatible = "rockchip,rk818";
                 reg = <0x1c>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
                 rockchip,system-power-controller;
                 wakeup-source;
                 #clock-cells = <1>;
@@ -247,8 +247,8 @@
                 compatible = "silead,gsl1680";
                 reg = <0x40>;
                 interrupt-parent = <&gpio1>;
-                interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
-                power-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                interrupts = <RK_PB7 IRQ_TYPE_EDGE_FALLING>;
+                power-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 touchscreen-size-x = <800>;
                 touchscreen-size-y = <1280>;
                 silead,max-fingers = <5>;
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 5e8a235ed02d..ca0a1c4bc15c 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -58,7 +58,7 @@
                 autorepeat;
 
                 power {
-                        gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_POWER>;
                         label = "GPIO Key Power";
                         linux,input-type = <1>;
@@ -72,19 +72,19 @@
 
                 green {
                         label = "rock:green:user1";
-                        gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>;
                         default-state = "off";
                 };
 
                 blue {
                         label = "rock:blue:user2";
-                        gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
                         default-state = "off";
                 };
 
                 sleep {
                         label = "rock:red:power";
-                        gpios = <&gpio0 15 0>;
+                        gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
                         default-state = "off";
                 };
         };
@@ -106,7 +106,7 @@
 
         ir_recv: gpio-ir-receiver {
                 compatible = "gpio-ir-receiver";
-                gpios = <&gpio0 10 1>;
+                gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ir_recv_pin>;
         };
@@ -114,7 +114,7 @@
         vcc_otg: usb-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&otg_vbus_drv>;
                 regulator-name = "otg-vbus";
@@ -129,7 +129,7 @@
                 regulator-name = "sdmmc-supply";
                 regulator-min-microvolt = <3300000>;
                 regulator-max-microvolt = <3300000>;
-                gpio = <&gpio3 1 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
                 startup-delay-us = <100000>;
                 vin-supply = <&vcc_io>;
         };
@@ -137,7 +137,7 @@
         vcc_host: usb-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 regulator-name = "host-pwr";
@@ -168,7 +168,7 @@
         phy0: ethernet-phy@0 {
                 reg = <0>;
                 interrupt-parent = <&gpio3>;
-                interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
         };
 };
 
@@ -184,7 +184,7 @@
                 compatible = "haoyu,hym8563";
                 reg = <0x51>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&rtc_int>;
                 #clock-cells = <0>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 869e189331ec..cf91254d0a43 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -599,21 +599,25 @@
 };
 
 &uart0 {
+        compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_xfer>;
 };
 
 &uart1 {
+        compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
         pinctrl-names = "default";
         pinctrl-0 = <&uart1_xfer>;
 };
 
 &uart2 {
+        compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
         pinctrl-names = "default";
         pinctrl-0 = <&uart2_xfer>;
 };
 
 &uart3 {
+        compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart";
         pinctrl-names = "default";
         pinctrl-0 = <&uart3_xfer>;
 };
diff --git a/arch/arm/boot/dts/rk3229-evb.dts b/arch/arm/boot/dts/rk3229-evb.dts
index dcdd0cee619e..275092a950ef 100644
--- a/arch/arm/boot/dts/rk3229-evb.dts
+++ b/arch/arm/boot/dts/rk3229-evb.dts
@@ -77,7 +77,7 @@
         phy-mode = "rgmii";
         pinctrl-names = "default";
         pinctrl-0 = <&rgmii_pins>;
-        snps,reset-gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
+        snps,reset-gpio = <&gpio2 RK_PD0 GPIO_ACTIVE_LOW>;
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
         tx_delay = <0x30>;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 9d3aee5abc15..9dff8221112c 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -443,7 +443,7 @@
                 #address-cells = <0>;
 
                 reg = <0x32011000 0x1000>,
-                      <0x32012000 0x1000>,
+                      <0x32012000 0x2000>,
                       <0x32014000 0x2000>,
                       <0x32016000 0x2000>;
                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index 041dd5d2d18c..b9418d170502 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -47,7 +47,7 @@
         vcc_lcd: vcc-lcd {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PA3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&lcd_en>;
                 regulator-name = "vcc_lcd";
@@ -57,7 +57,7 @@
         vcc_wl: vcc-wl {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PB1 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&wifi_pwr>;
                 regulator-name = "vcc_wl";
@@ -96,7 +96,7 @@
                 reg = <0x51>;
 
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
 
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int>;
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts
index 44ebc6e59b3a..56c266df01c1 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts
@@ -52,7 +52,7 @@
                 compatible = "rockchip,rk808";
                 reg = <0x1b>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int &global_pwroff>;
                 rockchip,system-power-controller;
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index bf7ccfad3260..0dec94c3583b 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -84,7 +84,7 @@
                         240 241 242 243 244 245 246 247
                         248 249 250 251 252 253 254 255>;
                 default-brightness-level = <128>;
-                enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+                enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&bl_en>;
                 pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
@@ -100,7 +100,7 @@
         panel: panel {
                 compatible ="lg,lp079qx1-sp0v", "simple-panel";
                 backlight = <&backlight>;
-                enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+                enable-gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_HIGH>;
                 pinctrl-0 = <&lcd_cs>;
 
                 ports {
@@ -120,7 +120,7 @@
                 pinctrl-0 = <&pwrbtn>;
 
                 power {
-                        gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_POWER>;
                         label = "GPIO Key Power";
                         linux,input-type = <1>;
@@ -133,7 +133,7 @@
         vcc_host: vcc-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 regulator-name = "vcc_host";
@@ -144,7 +144,7 @@
         vcc_phy: vcc-phy-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&eth_phy_pwr>;
                 regulator-name = "vcc_phy";
@@ -170,7 +170,7 @@
          */
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_pwr>;
                 regulator-name = "vcc_sd";
@@ -236,7 +236,7 @@
         phy-supply = <&vcc_phy>;
         phy-mode = "rgmii";
         clock_in_out = "input";
-        snps,reset-gpio = <&gpio4 7 0>;
+        snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
         assigned-clocks = <&cru SCLK_MAC>;
diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b/arch/arm/boot/dts/rk3288-fennec.dts
index 805c0d26770b..61d1c1028317 100644
--- a/arch/arm/boot/dts/rk3288-fennec.dts
+++ b/arch/arm/boot/dts/rk3288-fennec.dts
@@ -93,7 +93,7 @@
         phy-mode = "rgmii";
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
-        snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+        snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
         tx_delay = <0x30>;
         rx_delay = <0x10>;
         status = "okay";
@@ -111,7 +111,7 @@
                 compatible = "rockchip,rk808";
                 reg = <0x1b>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
                 #clock-cells = <1>;
                 clock-output-names = "xin32k", "rk808-clkout2";
                 pinctrl-names = "default";
@@ -345,7 +345,7 @@
 &usbphy {
         pinctrl-names = "default";
         pinctrl-0 = <&host_drv>;
-        vbus_drv-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+        vbus_drv-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
         status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/rk3288-firefly-beta.dts b/arch/arm/boot/dts/rk3288-firefly-beta.dts
index 75d77e38e0d6..0195d9721660 100644
--- a/arch/arm/boot/dts/rk3288-firefly-beta.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-beta.dts
@@ -49,7 +49,7 @@
 };
 
 &ir {
-        gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+        gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
 };
 
 &pinctrl {
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
index d242588bae0d..813496618d08 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
@@ -96,7 +96,7 @@
         phy-mode = "rgmii";
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
-        snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+        snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
         tx_delay = <0x30>;
         rx_delay = <0x10>;
         status = "ok";
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
index 751bee81128e..d0b3204a4799 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
@@ -53,7 +53,7 @@
 
                 power {
                         wakeup-source;
-                        gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
                         label = "GPIO Power";
                         linux,code = <KEY_POWER>;
                         pinctrl-names = "default";
@@ -63,14 +63,14 @@
 
         ir-receiver {
                 compatible = "gpio-ir-receiver";
-                gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
         };
 
         leds {
                 compatible = "gpio-leds";
 
                 power {
-                        gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>;
                         label = "firefly:blue:power";
                         pinctrl-names = "default";
                         pinctrl-0 = <&power_led>;
@@ -78,7 +78,7 @@
                 };
 
                 work {
-                        gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>;
                         label = "firefly:blue:user";
                         linux,default-trigger = "rc-feedback";
                         pinctrl-names = "default";
@@ -92,7 +92,7 @@
                 clock-names = "ext_clock";
                 pinctrl-names = "default";
                 pinctrl-0 = <&wifi_enable>;
-                reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+                reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
         };
 
         sound {
@@ -112,7 +112,7 @@
         vcc_host_5v: usb-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 regulator-name = "vcc_host_5v";
@@ -133,7 +133,7 @@
 
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_pwr>;
                 regulator-name = "vcc_sd";
@@ -146,7 +146,7 @@
         vcc_otg_5v: usb-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&otg_vbus_drv>;
                 regulator-name = "vcc_otg_5v";
@@ -159,7 +159,7 @@
         dovdd_1v8: dovdd-1v8-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&dvp_pwr>;
                 regulator-name = "dovdd_1v8";
@@ -171,7 +171,7 @@
         vcc28_dvp: vcc28-dvp-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&dvp_pwr>;
                 regulator-name = "vcc28_dvp";
@@ -183,7 +183,7 @@
         af_28: af_28-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&dvp_pwr>;
                 regulator-name = "af_28";
@@ -195,7 +195,7 @@
         dvdd_1v2: af_28-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&cif_pwr>;
                 regulator-name = "dvdd_1v2";
@@ -221,7 +221,7 @@
                 clock-frequency = <32768>;
                 clock-output-names = "xin32k";
                 interrupt-parent = <&gpio7>;
-                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&rtc_int>;
         };
diff --git a/arch/arm/boot/dts/rk3288-firefly.dts b/arch/arm/boot/dts/rk3288-firefly.dts
index c07fe92dc69f..14271be72f30 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dts
+++ b/arch/arm/boot/dts/rk3288-firefly.dts
@@ -49,7 +49,7 @@
 };
 
 &ir {
-        gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+        gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
 };
 
 &pinctrl {
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index 44935af1fb0e..10793ac18599 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -75,7 +75,7 @@
 
                 power {
                         wakeup-source;
-                        gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
                         label = "GPIO Power";
                         linux,code = <KEY_POWER>;
                         pinctrl-names = "default";
@@ -87,7 +87,7 @@
                 compatible = "gpio-leds";
 
                 work {
-                        gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>;
                         label = "firefly:blue:user";
                         linux,default-trigger = "rc-feedback";
                         pinctrl-names = "default";
@@ -95,7 +95,7 @@
                 };
 
                 power {
-                        gpios = <&gpio8 2 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio8 RK_PA2 GPIO_ACTIVE_LOW>;
                         label = "firefly:green:power";
                         linux,default-trigger = "default-on";
                         pinctrl-names = "default";
@@ -114,7 +114,7 @@
 
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_pwr>;
                 regulator-name = "vcc_sd";
@@ -145,7 +145,7 @@
         vcc_host_5v: usb-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 regulator-name = "vcc_host_5v";
@@ -158,7 +158,7 @@
         vcc_otg_5v: usb-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&otg_vbus_drv>;
                 regulator-name = "vcc_otg_5v";
@@ -175,7 +175,7 @@
         vcc28_dvp: vcc28-dvp-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&dvp_pwr>;
                 regulator-name = "vcc28_dvp";
@@ -213,7 +213,7 @@
         phy-mode = "rgmii";
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
-        snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+        snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
         tx_delay = <0x30>;
         rx_delay = <0x10>;
         status = "ok";
@@ -260,7 +260,7 @@
                 clock-frequency = <32768>;
                 clock-output-names = "xin32k";
                 interrupt-parent = <&gpio7>;
-                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&rtc_int>;
         };
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 441d450fd151..21326f3e8564 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -68,7 +68,7 @@
                 compatible = "gpio-leds";
 
                 work {
-                        gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_LOW>;
                         label = "miqi:green:user";
                         linux,default-trigger = "default-on";
                         pinctrl-names = "default";
@@ -87,7 +87,7 @@
         vcc_host: usb-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 regulator-name = "vcc_host";
@@ -99,7 +99,7 @@
 
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_pwr>;
                 regulator-name = "vcc_sd";
@@ -146,7 +146,7 @@
         phy-mode = "rgmii";
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
-        snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+        snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
         tx_delay = <0x30>;
         rx_delay = <0x10>;
         status = "ok";
diff --git a/arch/arm/boot/dts/rk3288-popmetal.dts b/arch/arm/boot/dts/rk3288-popmetal.dts
index bc6d10054f6a..aa1f9ecff231 100644
--- a/arch/arm/boot/dts/rk3288-popmetal.dts
+++ b/arch/arm/boot/dts/rk3288-popmetal.dts
@@ -180,7 +180,7 @@
         phy-supply = <&vcc_lan>;
         phy-mode = "rgmii";
         clock_in_out = "input";
-        snps,reset-gpio = <&gpio4 RK_PB0 0>;
+        snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
         assigned-clocks = <&cru SCLK_MAC>;
@@ -205,7 +205,7 @@
                 compatible = "rockchip,rk808";
                 reg = <0x1b>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int &global_pwroff>;
                 rockchip,system-power-controller;
@@ -390,7 +390,7 @@
                 compatible = "asahi-kasei,ak8975";
                 reg = <0x0d>;
                 interrupt-parent = <&gpio8>;
-                interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+                interrupts = <RK_PA1 IRQ_TYPE_EDGE_RISING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&comp_int>;
                 vdd-supply = <&vcc_io>;
@@ -409,7 +409,7 @@
                 compatible = "fsl,mma8452";
                 reg = <0x1d>;
                 interrupt-parent = <&gpio8>;
-                interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+                interrupts = <RK_PA0 IRQ_TYPE_EDGE_RISING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&gsensor_int>;
         };
diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts
index 04faa72dbd95..1145b62edde7 100644
--- a/arch/arm/boot/dts/rk3288-r89.dts
+++ b/arch/arm/boot/dts/rk3288-r89.dts
@@ -68,7 +68,7 @@
                 pinctrl-0 = <&pwrbtn>;
 
                 power {
-                        gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_POWER>;
                         label = "GPIO Key Power";
                         linux,input-type = <1>;
@@ -79,7 +79,7 @@
 
         ir: ir-receiver {
                 compatible = "gpio-ir-receiver";
-                gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ir_int>;
         };
@@ -87,7 +87,7 @@
         vcc_host: vcc-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 regulator-name = "vcc_host";
@@ -98,7 +98,7 @@
         vcc_otg: vcc-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&otg_vbus_drv>;
                 regulator-name = "vcc_otg";
@@ -111,7 +111,7 @@
                 regulator-name = "sdmmc-supply";
                 regulator-min-microvolt = <3300000>;
                 regulator-max-microvolt = <3300000>;
-                gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
                 startup-delay-us = <100000>;
                 vin-supply = <&vcc_io>;
         };
@@ -134,7 +134,7 @@
         phy-supply = <&vcc_lan>;
         phy-mode = "rgmii";
         clock_in_out = "input";
-        snps,reset-gpio = <&gpio4 7 0>;
+        snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 1000000>;
         assigned-clocks = <&cru SCLK_MAC>;
@@ -187,7 +187,7 @@
                 #clock-cells = <0>;
                 clock-output-names = "xin32k";
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int>;
         };
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
index b25ba806d5ee..1c0bbc9b928b 100644
--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
@@ -51,7 +51,7 @@
                 compatible = "mmc-pwrseq-emmc";
                 pinctrl-0 = <&emmc_reset>;
                 pinctrl-names = "default";
-                reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
+                reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
         };
 
         ext_gmac: external-gmac-clock {
@@ -106,7 +106,7 @@
         phy-supply = <&vccio_pmu>;
         pinctrl-names = "default";
         pinctrl-0 = <&rgmii_pins &phy_rst>;
-        snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+        snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
         snps,reset-active-low;
         snps,reset-delays-us = <0 10000 30000>;
         rx_delay = <0x10>;
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts
index dd3ad2e93a6d..96a2e745bb93 100644
--- a/arch/arm/boot/dts/rk3288-rock2-square.dts
+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
@@ -53,13 +53,13 @@
                 compatible = "gpio-leds";
 
                 heartbeat {
-                        gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio7 RK_PB7 GPIO_ACTIVE_LOW>;
                         label = "rock2:green:state1";
                         linux,default-trigger = "heartbeat";
                 };
 
                 mmc {
-                        gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>;
                         label = "rock2:blue:state2";
                         linux,default-trigger = "mmc0";
                 };
@@ -67,7 +67,7 @@
 
         ir: ir-receiver {
                 compatible = "gpio-ir-receiver";
-                gpios = <&gpio8 1 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio8 RK_PA1 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ir_int>;
         };
@@ -92,13 +92,13 @@
                 clock-names = "ext_clock";
                 pinctrl-names = "default";
                 pinctrl-0 = <&wifi_enable>;
-                reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+                reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
         };
 
         vcc_usb_host: vcc-host-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host_vbus_drv>;
                 /* Always on as the rockchip usb phy doesn't have a vbus-supply
@@ -110,7 +110,7 @@
 
         vcc_sd: sdmmc-regulator {
                 compatible = "regulator-fixed";
-                gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+                gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&sdmmc_pwr>;
                 regulator-name = "vcc_sd";
@@ -166,7 +166,7 @@
                 clock-frequency = <32768>;
                 clock-output-names = "xin32k";
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int>;
 
diff --git a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
index 6d105914a4f3..280aceae25d5 100644
--- a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
@@ -17,8 +17,8 @@
                 rockchip,model = "VEYRON-I2S";
                 rockchip,i2s-controller = <&i2s>;
                 rockchip,audio-codec = <&max98090>;
-                rockchip,hp-det-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
-                rockchip,mic-det-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+                rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>;
+                rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>;
                 rockchip,headset-codec = <&headsetcodec>;
         };
 };
@@ -28,7 +28,7 @@
                 compatible = "maxim,max98090";
                 reg = <0x10>;
                 interrupt-parent = <&gpio6>;
-                interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA7 IRQ_TYPE_EDGE_FALLING>;
                 clock-names = "mclk";
                 clocks = <&cru SCLK_I2S0_OUT>;
                 pinctrl-names = "default";
@@ -41,7 +41,7 @@
                 compatible = "ti,ts3a227e";
                 reg = <0x3b>;
                 interrupt-parent = <&gpio0>;
-                interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ts3a227e_int_l>;
                 ti,micbias = <7>;               /* MICBIAS = 2.8V */
diff --git a/arch/arm/boot/dts/rk3288-veyron-brain.dts b/arch/arm/boot/dts/rk3288-veyron-brain.dts
index cf5311d2617c..ed4255294ad4 100644
--- a/arch/arm/boot/dts/rk3288-veyron-brain.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-brain.dts
@@ -67,7 +67,7 @@
         vcc5_host2: vcc5-host2-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&usb2_pwr_en>;
                 regulator-name = "vcc5_host2";
@@ -103,8 +103,8 @@
 &rk808 {
         pinctrl-names = "default";
         pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
-        dvs-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>,
-                    <&gpio7 15 GPIO_ACTIVE_HIGH>;
+        dvs-gpios = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>,
+                    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
 
         /delete-property/ vcc6-supply;
 
@@ -133,7 +133,7 @@
 
 &vcc50_hdmi {
         enable-active-high;
-        gpio = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&vcc50_hdmi_en>;
 };
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index ce1f87980bcb..d752a315f884 100644
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -91,7 +91,7 @@
                         240 241 242 243 244 245 246 247
                         248 249 250 251 252 253 254 255>;
                 default-brightness-level = <128>;
-                enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+                enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
                 backlight-boot-off;
                 pinctrl-names = "default";
                 pinctrl-0 = <&bl_en>;
@@ -102,7 +102,7 @@
         gpio-charger {
                 compatible = "gpio-charger";
                 charger-type = "mains";
-                gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+                gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ac_present_ap>;
         };
@@ -142,7 +142,7 @@
         vcc5_host1: vcc5-host1-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&host1_pwr_en>;
                 regulator-name = "vcc5_host1";
@@ -154,7 +154,7 @@
         vcc5v_otg: vcc5v-otg-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&usbotg_pwren_h>;
                 regulator-name = "vcc5_host2";
@@ -190,7 +190,7 @@
         pinctrl-0 = <&pwr_key_l &ap_lid_int_l>;
         lid {
                 label = "Lid";
-                gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
                 wakeup-source;
                 linux,code = <0>; /* SW_LID */
                 linux,input-type = <5>; /* EV_SW */
@@ -228,7 +228,7 @@
                 reg = <0>;
                 google,cros-ec-spi-pre-delay = <30>;
                 interrupt-parent = <&gpio7>;
-                interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ec_int>;
                 spi-max-frequency = <3000000>;
@@ -247,7 +247,7 @@
                 compatible = "elan,ekth3000";
                 reg = <0x15>;
                 interrupt-parent = <&gpio7>;
-                interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&trackpad_int>;
                 vcc-supply = <&vcc33_io>;
diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
index 3748abf562b1..d33f5763c39c 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
@@ -57,7 +57,7 @@
         panel_regulator: panel-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&lcd_enable_h>;
                 regulator-name = "panel_regulator";
@@ -68,7 +68,7 @@
         vcc18_lcd: vcc18-lcd {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&avdd_1v8_disp_en>;
                 regulator-name = "vcc18_lcd";
@@ -80,7 +80,7 @@
         backlight_regulator: backlight-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&bl_pwr_en>;
                 regulator-name = "backlight_regulator";
@@ -134,8 +134,8 @@
 &rk808 {
         pinctrl-names = "default";
         pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
-        dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
-                    <&gpio7 15 GPIO_ACTIVE_HIGH>;
+        dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
+                    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
 
         regulators {
                 mic_vcc: LDO_REG2 {
@@ -160,14 +160,14 @@
 
 &vcc_5v {
         enable-active-high;
-        gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&drv_5v>;
 };
 
 &vcc50_hdmi {
         enable-active-high;
-        gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&vcc50_hdmi_en>;
 };
diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
index f6b2eaaebb9a..cdea751f2a8c 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
@@ -56,7 +56,7 @@
         panel_regulator: panel-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&lcd_enable_h>;
                 regulator-name = "panel_regulator";
@@ -67,7 +67,7 @@
         vcc18_lcd: vcc18-lcd {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&avdd_1v8_disp_en>;
                 regulator-name = "vcc18_lcd";
@@ -79,7 +79,7 @@
         backlight_regulator: backlight-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&bl_pwr_en>;
                 regulator-name = "backlight_regulator";
@@ -123,14 +123,14 @@
 
 &vcc_5v {
         enable-active-high;
-        gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&drv_5v>;
 };
 
 &vcc50_hdmi {
         enable-active-high;
-        gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&vcc50_hdmi_en>;
 };
@@ -197,7 +197,7 @@
         trackpad@2c {
                 compatible = "hid-over-i2c";
                 interrupt-parent = <&gpio7>;
-                interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
                 reg = <0x2c>;
                 hid-descr-addr = <0x0020>;
                 vcc-supply = <&vcc33_io>;
diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
index f36f6f459225..f0994f0e5774 100644
--- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
@@ -182,8 +182,8 @@
 &rk808 {
         pinctrl-names = "default";
         pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
-        dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
-                    <&gpio7 15 GPIO_ACTIVE_HIGH>;
+        dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
+                    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
 
         /delete-property/ vcc6-supply;
         /delete-property/ vcc12-supply;
@@ -244,7 +244,7 @@
 
 &vcc50_hdmi {
         enable-active-high;
-        gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&power_hdmi_on>;
 };
diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
index f72d616d1bf8..544de6027aaa 100644
--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
@@ -55,7 +55,7 @@
         backlight_regulator: backlight-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&bl_pwr_en>;
                 regulator-name = "backlight_regulator";
@@ -66,7 +66,7 @@
         panel_regulator: panel-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&lcd_enable_h>;
                 regulator-name = "panel_regulator";
@@ -77,7 +77,7 @@
         vcc18_lcd: vcc18-lcd {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&avdd_1v8_disp_en>;
                 regulator-name = "vcc18_lcd";
@@ -134,14 +134,14 @@
 
         volum_down {
                 label = "Volum_down";
-                gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
                 linux,code = <KEY_VOLUMEDOWN>;
                 debounce-interval = <100>;
         };
 
         volum_up {
                 label = "Volum_up";
-                gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
+                gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
                 linux,code = <KEY_VOLUMEUP>;
                 debounce-interval = <100>;
         };
@@ -165,10 +165,10 @@
                 compatible = "elan,ekth3500";
                 reg = <0x10>;
                 interrupt-parent = <&gpio2>;
-                interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
+                interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&touch_int &touch_rst>;
-                reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
+                reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
                 vcc33-supply = <&vcc33_touch>;
                 vccio-supply = <&vcc33_touch>;
         };
@@ -211,14 +211,14 @@
 
 &vcc_5v {
         enable-active-high;
-        gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&drv_5v>;
 };
 
 &vcc50_hdmi {
         enable-active-high;
-        gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&vcc50_hdmi_en>;
 };
diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
index d44351ec2333..995cff42fa43 100644
--- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
@@ -76,7 +76,7 @@
         pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
 
         power {
-                gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+                gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
         };
 };
 
@@ -126,7 +126,7 @@
         pinctrl-names = "default";
         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
                      &sdmmc_wp_gpio &sdmmc_bus4>;
-        wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
+        wp-gpios = <&gpio7 RK_PB2 GPIO_ACTIVE_HIGH>;
 };
 
 &tsadc {
diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
index fec076eb7aef..aef07101e9ab 100644
--- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
@@ -115,7 +115,7 @@
         cap-mmc-highspeed;
         cap-sd-highspeed;
         card-detect-delay = <200>;
-        cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+        cd-gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
         rockchip,default-sample-phase = <90>;
         num-slots = <1>;
         sd-uhs-sdr12;
diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
index a0d033f6fe52..cc0b78cefe34 100644
--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
@@ -57,7 +57,7 @@
         panel_regulator: panel-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&lcd_enable_h>;
                 regulator-name = "panel_regulator";
@@ -68,7 +68,7 @@
         vcc18_lcd: vcc18-lcd {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&avdd_1v8_disp_en>;
                 regulator-name = "vcc18_lcd";
@@ -80,7 +80,7 @@
         backlight_regulator: backlight-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
-                gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+                gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&bl_pwr_en>;
                 regulator-name = "backlight_regulator";
@@ -126,14 +126,14 @@
 
 &vcc_5v {
         enable-active-high;
-        gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&drv_5v>;
 };
 
 &vcc50_hdmi {
         enable-active-high;
-        gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
+        gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
         pinctrl-names = "default";
         pinctrl-0 = <&vcc50_hdmi_en>;
 };
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2251d28e9d2a..5d1eb0a25827 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -61,7 +61,7 @@
                 pinctrl-0 = <&pwr_key_l>;
                 power {
                         label = "Power";
-                        gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                        gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
                         linux,code = <KEY_POWER>;
                         debounce-interval = <100>;
                         wakeup-source;
@@ -70,7 +70,7 @@
 
         gpio-restart {
                 compatible = "gpio-restart";
-                gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+                gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&ap_warm_reset_h>;
                 priority = <200>;
@@ -80,7 +80,7 @@
                 compatible = "mmc-pwrseq-emmc";
                 pinctrl-0 = <&emmc_reset>;
                 pinctrl-names = "default";
-                reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+                reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
         };
 
         sdio_pwrseq: sdio-pwrseq {
@@ -96,7 +96,7 @@
                  * - SDIO_RESET_L_WL_REG_ON
                  * - PDN (power down when low)
                  */
-                reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+                reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
         };
 
         vcc_5v: vcc-5v {
@@ -178,7 +178,7 @@
                 reg = <0x1b>;
                 clock-output-names = "xin32k", "wifibt_32kin";
                 interrupt-parent = <&gpio0>;
-                interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+                interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
                 pinctrl-names = "default";
                 pinctrl-0 = <&pmic_int_l>;
                 rockchip,system-power-controller;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 4fad13368a7b..df8a0dbe9d91 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -762,6 +762,15 @@
                                          <&cru SCLK_ISP_JPE>,
                                          <&cru SCLK_ISP>,
                                          <&cru SCLK_RGA>;
+                                pm_qos = <&qos_vio0_iep>,
+                                         <&qos_vio1_vop>,
+                                         <&qos_vio1_isp_w0>,
+                                         <&qos_vio1_isp_w1>,
+                                         <&qos_vio0_vop>,
+                                         <&qos_vio0_vip>,
+                                         <&qos_vio2_rga_r>,
+                                         <&qos_vio2_rga_w>,
+                                         <&qos_vio1_isp_r>;
                         };
 
                         /*
@@ -773,6 +782,8 @@
                                 clocks = <&cru ACLK_HEVC>,
                                          <&cru SCLK_HEVC_CABAC>,
                                          <&cru SCLK_HEVC_CORE>;
+                                pm_qos = <&qos_hevc_r>,
+                                         <&qos_hevc_w>;
                         };
 
                         /*
@@ -784,6 +795,7 @@
                                 reg = <RK3288_PD_VIDEO>;
                                 clocks = <&cru ACLK_VCODEC>,
                                          <&cru HCLK_VCODEC>;
+                                pm_qos = <&qos_video>;
                         };
 
                         /*
@@ -793,6 +805,8 @@
                         pd_gpu@RK3288_PD_GPU {
                                 reg = <RK3288_PD_GPU>;
                                 clocks = <&cru ACLK_GPU>;
+                                pm_qos = <&qos_gpu_r>,
+                                         <&qos_gpu_w>;
                         };
                 };
 
@@ -1103,6 +1117,76 @@
                 };
         };
 
+        qos_gpu_r: qos@ffaa0000 {
+                compatible = "syscon";
+                reg = <0xffaa0000 0x20>;
+        };
+
+        qos_gpu_w: qos@ffaa0080 {
+                compatible = "syscon";
+                reg = <0xffaa0080 0x20>;
+        };
+
+        qos_vio1_vop: qos@ffad0000 {
+                compatible = "syscon";
+                reg = <0xffad0000 0x20>;
+        };
+
+        qos_vio1_isp_w0: qos@ffad0100 {
+                compatible = "syscon";
+                reg = <0xffad0100 0x20>;
+        };
+
+        qos_vio1_isp_w1: qos@ffad0180 {
+                compatible = "syscon";
+                reg = <0xffad0180 0x20>;
+        };
+
+        qos_vio0_vop: qos@ffad0400 {
+                compatible = "syscon";
+                reg = <0xffad0400 0x20>;
+        };
+
+        qos_vio0_vip: qos@ffad0480 {
+                compatible = "syscon";
+                reg = <0xffad0480 0x20>;
+        };
+
+        qos_vio0_iep: qos@ffad0500 {
+                compatible = "syscon";
+                reg = <0xffad0500 0x20>;
+        };
+
+        qos_vio2_rga_r: qos@ffad0800 {
+                compatible = "syscon";
+                reg = <0xffad0800 0x20>;
+        };
+
+        qos_vio2_rga_w: qos@ffad0880 {
+                compatible = "syscon";
+                reg = <0xffad0880 0x20>;
+        };
+
+        qos_vio1_isp_r: qos@ffad0900 {
+                compatible = "syscon";
+                reg = <0xffad0900 0x20>;
+        };
+
+        qos_video: qos@ffae0000 {
+                compatible = "syscon";
+                reg = <0xffae0000 0x20>;
+        };
+
+        qos_hevc_r: qos@ffaf0000 {
+                compatible = "syscon";
+                reg = <0xffaf0000 0x20>;
+        };
+
+        qos_hevc_w: qos@ffaf0080 {
+                compatible = "syscon";
+                reg = <0xffaf0080 0x20>;
+        };
+
         gic: interrupt-controller@ffc01000 {
                 compatible = "arm,gic-400";
                 interrupt-controller;
@@ -1110,7 +1194,7 @@
                 #address-cells = <0>;
 
                 reg = <0xffc01000 0x1000>,
-                      <0xffc02000 0x1000>,
+                      <0xffc02000 0x2000>,
                       <0xffc04000 0x2000>,
                       <0xffc06000 0x2000>;
                 interrupts = <GIC_PPI 9 0xf04>;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ceb9783ff7e1..22332be72140 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -395,6 +395,16 @@
                                 clock-names = "dma_clk";
                         };
 
+                        /* Place dma1 here despite its address */
+                        dma1: dma-controller@f0004000 {
+                                compatible = "atmel,sama5d4-dma";
+                                reg = <0xf0004000 0x1000>;
+                                interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
+                                #dma-cells = <1>;
+                                clocks = <&dma1_clk>;
+                                clock-names = "dma_clk";
+                        };
+
                         pmc: pmc@f0014000 {
                                 compatible = "atmel,sama5d2-pmc", "syscon";
                                 reg = <0xf0014000 0x160>;
@@ -931,6 +941,22 @@
                                 status = "disabled";
                         };
 
+                        ssc0: ssc@f8004000 {
+                                compatible = "atmel,at91sam9g45-ssc";
+                                reg = <0xf8004000 0x4000>;
+                                interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
+                                dmas = <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(21))>,
+                                       <&dma0
+                                        (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(22))>;
+                                dma-names = "tx", "rx";
+                                clocks = <&ssc0_clk>;
+                                clock-names = "pclk";
+                                status = "disabled";
+                        };
+
                         macb0: ethernet@f8008000 {
                                 compatible = "atmel,sama5d2-gem";
                                 reg = <0xf8008000 0x1000>;
@@ -1141,10 +1167,10 @@
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfc008000 0x100>;
                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
-                                dmas = <&dma0
+                                dmas = <&dma1
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
                                          AT91_XDMAC_DT_PERID(41))>,
-                                       <&dma0
+                                       <&dma1
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
                                          AT91_XDMAC_DT_PERID(42))>;
                                 dma-names = "tx", "rx";
diff --git a/arch/arm/boot/dts/sama5d36ek_cmp.dts b/arch/arm/boot/dts/sama5d36ek_cmp.dts
new file mode 100644
index 000000000000..b632143844e5
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d36ek_cmp.dts
@@ -0,0 +1,87 @@
+/*
+ * sama5d36ek_cmp.dts - Device Tree file for SAMA5D36-EK CMP board
+ *
+ *  Copyright (C) 2016 Atmel,
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "sama5d36.dtsi"
+#include "sama5d3xmb_cmp.dtsi"
+
+/ {
+        model = "Atmel SAMA5D36EK-CMP";
+        compatible = "atmel,sama5d36ek-cmp", "atmel,sama5d3xmb-cmp", "atmel,sama5d3xcm-cmp", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
+
+        ahb {
+                apb {
+                        spi0: spi@f0004000 {
+                                status = "okay";
+                        };
+
+                        ssc0: ssc@f0008000 {
+                                status = "okay";
+                        };
+
+                        can0: can@f000c000 {
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@f0014000 {
+                                status = "okay";
+                        };
+
+                        i2c1: i2c@f0018000 {
+                                status = "okay";
+                        };
+
+                        macb0: ethernet@f0028000 {
+                                status = "okay";
+                        };
+
+                        macb1: ethernet@f802c000 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        sound {
+                status = "okay";
+        };
+};
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index 2511d748867b..186377d41c91 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -55,7 +55,7 @@
 
                         uart0: serial@f0024000 {
                                 compatible = "atmel,at91sam9260-usart";
-                                reg = <0xf0024000 0x200>;
+                                reg = <0xf0024000 0x100>;
                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart0>;
@@ -66,7 +66,7 @@
 
                         uart1: serial@f8028000 {
                                 compatible = "atmel,at91sam9260-usart";
-                                reg = <0xf8028000 0x200>;
+                                reg = <0xf8028000 0x100>;
                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi b/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi
new file mode 100644
index 000000000000..dc7572bc7ff0
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi
@@ -0,0 +1,201 @@
+/*
+ * sama5d3xcm_cmp.dtsi - Device Tree Include file for SAMA5D36 CMP CPU Module
+ *
+ *  Copyright (C) 2016 Atmel,
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/ {
+        compatible = "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5";
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        memory {
+                reg = <0x20000000 0x20000000>;
+        };
+
+        clocks {
+                slow_xtal {
+                        clock-frequency = <32768>;
+                };
+
+                main_xtal {
+                        clock-frequency = <12000000>;
+                };
+        };
+
+        ahb {
+                apb {
+                        spi0: spi@f0004000 {
+                                cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
+                        };
+
+                        macb0: ethernet@f0028000 {
+                                phy-mode = "rgmii";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                ethernet-phy@1 {
+                                        reg = <0x1>;
+                                        interrupt-parent = <&pioB>;
+                                        interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+                                        txen-skew-ps = <800>;
+                                        txc-skew-ps = <3000>;
+                                        rxdv-skew-ps = <400>;
+                                        rxc-skew-ps = <3000>;
+                                        rxd0-skew-ps = <400>;
+                                        rxd1-skew-ps = <400>;
+                                        rxd2-skew-ps = <400>;
+                                        rxd3-skew-ps = <400>;
+                                };
+
+                                ethernet-phy@7 {
+                                        reg = <0x7>;
+                                        interrupt-parent = <&pioB>;
+                                        interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+                                        txen-skew-ps = <800>;
+                                        txc-skew-ps = <3000>;
+                                        rxdv-skew-ps = <400>;
+                                        rxc-skew-ps = <3000>;
+                                        rxd0-skew-ps = <400>;
+                                        rxd1-skew-ps = <400>;
+                                        rxd2-skew-ps = <400>;
+                                        rxd3-skew-ps = <400>;
+                                };
+                        };
+
+                        i2c1: i2c@f0018000 {
+                                pmic: act8865@5b {
+                                        compatible = "active-semi,act8865";
+                                        reg = <0x5b>;
+                                        status = "disabled";
+
+                                        regulators {
+                                                vcc_1v8_reg: DCDC_REG1 {
+                                                        regulator-name = "VCC_1V8";
+                                                        regulator-min-microvolt = <1800000>;
+                                                        regulator-max-microvolt = <1800000>;
+                                                        regulator-always-on;
+                                                };
+
+                                                vcc_1v2_reg: DCDC_REG2 {
+                                                        regulator-name = "VCC_1V2";
+                                                        regulator-min-microvolt = <1100000>;
+                                                        regulator-max-microvolt = <1300000>;
+                                                        regulator-always-on;
+                                                };
+
+                                                vcc_3v3_reg: DCDC_REG3 {
+                                                        regulator-name = "VCC_3V3";
+                                                        regulator-min-microvolt = <3300000>;
+                                                        regulator-max-microvolt = <3300000>;
+                                                        regulator-always-on;
+                                                };
+
+                                                vddana_reg: LDO_REG1 {
+                                                        regulator-name = "VDDANA";
+                                                        regulator-min-microvolt = <3300000>;
+                                                        regulator-max-microvolt = <3300000>;
+                                                        regulator-always-on;
+                                                };
+
+                                                vddfuse_reg: LDO_REG2 {
+                                                        regulator-name = "FUSE_2V5";
+                                                        regulator-min-microvolt = <2500000>;
+                                                        regulator-max-microvolt = <2500000>;
+                                                };
+                                        };
+                                };
+                        };
+                };
+
+                nand0: nand@60000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "hw";
+                        atmel,has-pmecc;
+                        atmel,pmecc-cap = <4>;
+                        atmel,pmecc-sector-size = <512>;
+                        nand-on-flash-bbt;
+                        status = "okay";
+
+                        at91bootstrap@0 {
+                                label = "at91bootstrap";
+                                reg = <0x0 0x40000>;
+                        };
+
+                        bootloader@40000 {
+                                label = "bootloader";
+                                reg = <0x40000 0x80000>;
+                        };
+
+                        bootloaderenv@c0000 {
+                                label = "bootloader env";
+                                reg = <0xc0000 0xc0000>;
+                        };
+
+                        dtb@180000 {
+                                label = "device tree";
+                                reg = <0x180000 0x80000>;
+                        };
+
+                        kernel@200000 {
+                                label = "kernel";
+                                reg = <0x200000 0x600000>;
+                        };
+
+                        rootfs@800000 {
+                                label = "rootfs";
+                                reg = <0x800000 0x0f800000>;
+                        };
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                d2 {
+                        label = "d2";
+                        gpios = <&pioE 25 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
new file mode 100644
index 000000000000..252e0d35f846
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
@@ -0,0 +1,301 @@
+/*
+ * sama5d3xmb_cmp.dts - Device Tree file for SAMA5D3x CMP mother board
+ *
+ *  Copyright (C) 2016 Atmel,
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "sama5d3xcm_cmp.dtsi"
+
+/ {
+        compatible = "atmel,sama5d3xmb-cmp", "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5";
+
+        ahb {
+                apb {
+                        mmc0: mmc@f0000000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
+                                };
+                        };
+
+                        spi0: spi@f0004000 {
+                                dmas = <0>, <0>;        /*  Do not use DMA for spi0 */
+
+                                m25p80@0 {
+                                        compatible = "atmel,at25df321a";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
+
+                        ssc0: ssc@f0008000 {
+                                atmel,clk-from-rk-pin;
+                        };
+
+                        /*
+                         * i2c0 conflicts with ISI:
+                         * disable it to allow the use of ISI
+                         * can not enable audio when i2c0 disabled
+                         */
+                        i2c0: i2c@f0014000 {
+                                wm8904: wm8904@1a {
+                                        compatible = "wlf,wm8904";
+                                        reg = <0x1a>;
+                                        clocks = <&pck0>;
+                                        clock-names = "mclk";
+                                };
+                        };
+
+                        i2c1: i2c@f0018000 {
+                                ov2640: camera@0x30 {
+                                        compatible = "ovti,ov2640";
+                                        reg = <0x30>;
+                                        pinctrl-names = "default";
+                                        pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
+                                        resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
+                                        pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
+                                        /* use pck1 for the master clock of ov2640 */
+                                        clocks = <&pck1>;
+                                        clock-names = "xvclk";
+                                        assigned-clocks = <&pck1>;
+                                        assigned-clock-rates = <25000000>;
+
+                                        port {
+                                                ov2640_0: endpoint {
+                                                        remote-endpoint = <&isi_0>;
+                                                        bus-width = <8>;
+                                                };
+                                        };
+                                };
+                        };
+
+                        usart1: serial@f0020000 {
+                                dmas = <0>, <0>;        /*  Do not use DMA for usart1 */
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+                                status = "okay";
+                        };
+
+                        isi: isi@f0034000 {
+                                port {
+                                        isi_0: endpoint {
+                                                remote-endpoint = <&ov2640_0>;
+                                                bus-width = <8>;
+                                                vsync-active = <1>;
+                                                hsync-active = <1>;
+                                        };
+                                };
+                        };
+
+                        mmc1: mmc@f8000000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
+                                status = "okay";
+                                slot@0 {
+                                        reg = <0>;
+                                        bus-width = <4>;
+                                        cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>;
+                                };
+                        };
+
+                        adc0: adc@f8018000 {
+                                pinctrl-names = "default", "sleep";
+                                pinctrl-0 = <
+                                        &pinctrl_adc0_adtrg
+                                        &pinctrl_adc0_ad0
+                                        &pinctrl_adc0_ad1
+                                        &pinctrl_adc0_ad2
+                                        &pinctrl_adc0_ad3
+                                        &pinctrl_adc0_ad4
+                                        >;
+                                pinctrl-1 = <
+                                        &pinctrl_adc0_adtrg_sleep
+                                        &pinctrl_adc0_ad0_sleep
+                                        &pinctrl_adc0_ad1_sleep
+                                        &pinctrl_adc0_ad2_sleep
+                                        &pinctrl_adc0_ad3_sleep
+                                        &pinctrl_adc0_ad4_sleep
+                                        >;
+                                status = "okay";
+                        };
+
+                        macb1: ethernet@f802c000 {
+                                phy-mode = "rmii";
+
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                phy0: ethernet-phy@1 {
+                                        /*interrupt-parent = <&pioE>;*/
+                                        /*interrupts = <30 IRQ_TYPE_EDGE_FALLING>;*/
+                                        reg = <1>;
+                                };
+                        };
+
+                        pinctrl@fffff200 {
+                                adc0 {
+                                        pinctrl_adc0_adtrg_sleep: adc0_adtrg_1 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 19 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+                                        };
+                                        pinctrl_adc0_ad0_sleep: adc0_ad0_1 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 20 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+                                        };
+                                        pinctrl_adc0_ad1_sleep: adc0_ad1_1 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 21 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+                                        };
+                                        pinctrl_adc0_ad2_sleep: adc0_ad2_1 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+                                        };
+                                        pinctrl_adc0_ad3_sleep: adc0_ad3_1 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 23 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+                                        };
+                                        pinctrl_adc0_ad4_sleep: adc0_ad4_1 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 24 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+                                        };
+                                };
+
+                                board {
+                                        pinctrl_gpio_keys: gpio_keys {
+                                                atmel,pins =
+                                                        <AT91_PIOE 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+                                        };
+
+                                        pinctrl_mmc0_cd: mmc0_cd {
+                                                atmel,pins =
+                                                        <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+                                        };
+
+                                        pinctrl_mmc1_cd: mmc1_cd {
+                                                atmel,pins =
+                                                        <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+                                        };
+
+                                        pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
+                                                atmel,pins =
+                                                        <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                        };
+
+                                        pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                        };
+
+                                        pinctrl_sensor_reset: sensor_reset-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                        };
+
+                                        pinctrl_sensor_power: sensor_power-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                        };
+
+                                        pinctrl_usba_vbus: usba_vbus {
+                                                atmel,pins =
+                                                        <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+                                        };
+                                };
+                        };
+
+                        dbgu: serial@ffffee00 {
+                                dmas = <0>, <0>;        /*  Do not use DMA for dbgu */
+                                status = "okay";
+                        };
+
+                        watchdog@fffffe40 {
+                                status = "okay";
+                        };
+                };
+
+                usb0: gadget@00500000 {
+                        atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_usba_vbus>;
+                        status = "okay";
+                };
+        };
+
+        sound {
+                compatible = "atmel,asoc-wm8904";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
+
+                atmel,model = "wm8904 @ SAMA5D3EK";
+                atmel,audio-routing =
+                        "Headphone Jack", "HPOUTL",
+                        "Headphone Jack", "HPOUTR",
+                        "IN2L", "Line In Jack",
+                        "IN2R", "Line In Jack",
+                        "Mic", "MICBIAS",
+                        "IN1L", "Mic";
+
+                atmel,ssc-controller = <&ssc0>;
+                atmel,audio-codec = <&wm8904>;
+
+                status = "disabled";
+        };
+
+        /* Conflict with LCD pins */
+        gpio_keys {
+                compatible = "gpio-keys";
+                status = "okay";
+
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_gpio_keys>;
+
+                pb_user1 {
+                        label = "pb_user1";
+                        gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
+                        linux,code = <0x100>;
+                        wakeup-source;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 4f60c1b7b137..d3889c9d25a9 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -854,10 +854,10 @@
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xf8004000 0x100>;
                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
-                                dmas = <&dma1
+                                dmas = <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(22))>,
-                                       <&dma1
+                                       <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(23))>;
                                 dma-names = "tx", "rx";
@@ -938,10 +938,10 @@
                                 compatible = "atmel,sama5d4-i2c";
                                 reg = <0xf8018000 0x4000>;
                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
-                                dmas = <&dma1
+                                dmas = <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(4))>,
-                                       <&dma1
+                                       <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(5))>;
                                 dma-names = "tx", "rx";
@@ -1055,10 +1055,10 @@
                                 compatible = "atmel,at91sam9260-usart";
                                 reg = <0xfc004000 0x100>;
                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
-                                dmas = <&dma1
+                                dmas = <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(24))>,
-                                       <&dma1
+                                       <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(25))>;
                                 dma-names = "tx", "rx";
@@ -1167,10 +1167,10 @@
                                 compatible = "atmel,at91rm9200-spi";
                                 reg = <0xfc01c000 0x100>;
                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
-                                dmas = <&dma1
+                                dmas = <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(14))>,
-                                       <&dma1
+                                       <&dma0
                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
                                         | AT91_XDMAC_DT_PERID(15))>;
                                 dma-names = "tx", "rx";
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index e1267590b575..6b01ab354e88 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -263,7 +263,7 @@
         };
 
         mmcif: mmc@e6bd0000 {
-                compatible = "renesas,sh-mmcif";
+                compatible = "renesas,mmcif-sh73a0", "renesas,sh-mmcif";
                 reg = <0xe6bd0000 0x100>;
                 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH
                               GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index da689659131f..2c43c4d85dee 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -93,6 +93,14 @@
                         };
                 };
 
+                base_fpga_region {
+                        compatible = "fpga-region";
+                        fpga-mgr = <&fpgamgr0>;
+
+                        #address-cells = <0x1>;
+                        #size-cells = <0x1>;
+                };
+
                 can0: can@ffc00000 {
                         compatible = "bosch,d_can";
                         reg = <0xffc00000 0x1000>;
@@ -513,10 +521,24 @@
                                 };
                 };
 
+                fpga_bridge0: fpga_bridge@ff400000 {
+                        compatible = "altr,socfpga-lwhps2fpga-bridge";
+                        reg = <0xff400000 0x100000>;
+                        resets = <&rst LWHPS2FPGA_RESET>;
+                        clocks = <&l4_main_clk>;
+                };
+
+                fpga_bridge1: fpga_bridge@ff500000 {
+                        compatible = "altr,socfpga-hps2fpga-bridge";
+                        reg = <0xff500000 0x10000>;
+                        resets = <&rst HPS2FPGA_RESET>;
+                        clocks = <&l4_main_clk>;
+                };
+
                 fpgamgr0: fpgamgr@ff706000 {
                         compatible = "altr,socfpga-fpga-mgr";
                         reg = <0xff706000 0x1000
-                               0xffb90000 0x1000>;
+                               0xffb90000 0x4>;
                         interrupts = <0 175 4>;
                 };
 
@@ -694,6 +716,11 @@
                         arm,prefetch-offset = <7>;
                 };
 
+                l3regs@0xff800000 {
+                        compatible = "altr,l3regs", "syscon";
+                        reg = <0xff800000 0x1000>;
+                };
+
                 mmc: dwmmc0@ff704000 {
                         compatible = "altr,socfpga-dw-mshc";
                         reg = <0xff704000 0x1000>;
@@ -751,7 +778,7 @@
                 };
 
                 sdr: sdr@ffc25000 {
-                        compatible = "syscon";
+                        compatible = "altr,sdr-ctl", "syscon";
                         reg = <0xffc25000 0x1000>;
                 };
 
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 551c636a4f01..6b0b7463f36f 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -83,6 +83,14 @@
                         };
                 };
 
+                base_fpga_region {
+                        #address-cells = <0x1>;
+                        #size-cells = <0x1>;
+
+                        compatible = "fpga-region";
+                        fpga-mgr = <&fpga_mgr>;
+                };
+
                 clkmgr@ffd04000 {
                                 compatible = "altr,clk-mgr";
                                 reg = <0xffd04000 0x1000>;
@@ -400,6 +408,12 @@
                                 };
                 };
 
+                socfpga_axi_setup: stmmac-axi-config {
+                        snps,wr_osr_lmt = <0xf>;
+                        snps,rd_osr_lmt = <0xf>;
+                        snps,blen = <0 0 0 0 16 0 0>;
+                };
+
                 gmac0: ethernet@ff800000 {
                         compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
                         altr,sysmgr-syscon = <&sysmgr 0x44 0>;
@@ -416,6 +430,7 @@
                         clock-names = "stmmaceth";
                         resets = <&rst EMAC0_RESET>;
                         reset-names = "stmmaceth";
+                        snps,axi-config = <&socfpga_axi_setup>;
                         status = "disabled";
                 };
 
@@ -435,6 +450,7 @@
                         clock-names = "stmmaceth";
                         resets = <&rst EMAC1_RESET>;
                         reset-names = "stmmaceth";
+                        snps,axi-config = <&socfpga_axi_setup>;
                         status = "disabled";
                 };
 
@@ -452,6 +468,7 @@
                         rx-fifo-depth = <16384>;
                         clocks = <&l4_mp_clk>;
                         clock-names = "stmmaceth";
+                        snps,axi-config = <&socfpga_axi_setup>;
                         status = "disabled";
                 };
 
@@ -512,6 +529,15 @@
                         };
                 };
 
+                fpga_mgr: fpga-mgr@ffd03000 {
+                        compatible = "altr,socfpga-a10-fpga-mgr";
+                        reg = <0xffd03000 0x100
+                               0xffcfe400 0x20>;
+                        clocks = <&l4_mp_clk>;
+                        resets = <&rst FPGAMGR_RESET>;
+                        reset-names = "fpgamgr";
+                };
+
                 i2c0: i2c@ffc02200 {
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -578,7 +604,7 @@
                 };
 
                 sdr: sdr@ffc25000 {
-                        compatible = "syscon";
+                        compatible = "altr,sdr-ctl", "syscon";
                         reg = <0xffcfb100 0x80>;
                 };
 
@@ -605,6 +631,19 @@
                         status = "disabled";
                 };
 
+                nand: nand@ffb90000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand";
+                        reg = <0xffb90000 0x72000>,
+                              <0xffb80000 0x10000>;
+                        reg-names = "nand_data", "denali_reg";
+                        interrupts = <0 99 4>;
+                        dma-mask = <0xffffffff>;
+                        clocks = <&nand_clk>;
+                        status = "disabled";
+                };
+
                 ocram: sram@ffe00000 {
                         compatible = "mmio-sram";
                         reg = <0xffe00000 0x40000>;
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index eb00ae37f316..c57e6cea0d83 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -145,6 +145,11 @@
                 compatible = "dallas,ds1339";
                 reg = <0x68>;
         };
+
+        ltc@5c {
+                compatible = "ltc2977";
+                reg = <0x5c>;
+        };
 };
 
 &uart1 {
@@ -154,3 +159,7 @@
 &usb0 {
         status = "okay";
 };
+
+&watchdog1 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
new file mode 100644
index 000000000000..d14f9ccb6e10
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2015 Altera Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+#include "socfpga_arria10_socdk.dtsi"
+
+&nand {
+        status = "okay";
+
+        partition@nand-boot {
+                label = "Boot and fpga data";
+                reg = <0x0 0x1C00000>;
+        };
+        partition@nand-rootfs {
+                label = "Root Filesystem - JFFS2";
+                reg = <0x1C00000 0x6400000>;
+        };
+};
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 1907cc600452..8c037297296c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -42,3 +42,7 @@
                 };
         };
 };
+
+&watchdog0 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index f739ead074a2..8672edf9ba4e 100644
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -39,6 +39,29 @@
                 ethernet0 = &gmac1;
         };
 
+        leds {
+                compatible = "gpio-leds";
+                hps0 {
+                        label = "hps_led0";
+                        gpios = <&porta 0 1>;
+                };
+
+                hps1 {
+                        label = "hps_led1";
+                        gpios = <&portb 11 1>;
+                };
+
+                hps2 {
+                        label = "hps_led2";
+                        gpios = <&porta 17 1>;
+                };
+
+                hps3 {
+                        label = "hps_led3";
+                        gpios = <&porta 18 1>;
+                };
+        };
+
         regulator_3_3v: 3-3-v-regulator {
                 compatible = "regulator-fixed";
                 regulator-name = "3.3V";
@@ -61,8 +84,28 @@
         rxc-skew-ps = <2000>;
 };
 
+&gpio0 {
+        status = "okay";
+};
+
+&gpio1 {
+        status = "okay";
+};
+
+&gpio2 {
+        status = "okay";
+};
+
 &i2c0 {
         status = "okay";
+        clock-frequency = <100000>;
+
+        /*
+         * adjust the falling times to decrease the i2c frequency to 50Khz
+         * because the LCD module does not work at the standard 100Khz
+         */
+        i2c-sda-falling-time-ns = <5000>;
+        i2c-scl-falling-time-ns = <5000>;
 
         eeprom@51 {
                 compatible = "atmel,24c32";
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index 6306d008f01b..7ea32c81e720 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -39,6 +39,29 @@
                 ethernet0 = &gmac1;
         };
 
+        leds {
+                compatible = "gpio-leds";
+                hps0 {
+                        label = "hps_led0";
+                        gpios = <&portb 15 1>;
+                };
+
+                hps1 {
+                        label = "hps_led1";
+                        gpios = <&portb 14 1>;
+                };
+
+                hps2 {
+                        label = "hps_led2";
+                        gpios = <&portb 13 1>;
+                };
+
+                hps3 {
+                        label = "hps_led3";
+                        gpios = <&portb 12 1>;
+                };
+        };
+
         regulator_3_3v: 3-3-v-regulator {
                 compatible = "regulator-fixed";
                 regulator-name = "3.3V";
@@ -47,6 +70,10 @@
         };
 };
 
+&can0 {
+        status = "okay";
+};
+
 &gmac1 {
         status = "okay";
         phy-mode = "rgmii";
@@ -61,12 +88,28 @@
         rxc-skew-ps = <2000>;
 };
 
+&gpio0 {
+        status = "okay";
+};
+
 &gpio1 {
         status = "okay";
 };
 
+&gpio2 {
+        status = "okay";
+};
+
 &i2c0 {
         status = "okay";
+        clock-frequency = <100000>;
+
+        /*
+         * adjust the falling times to decrease the i2c frequency to 50Khz
+         * because the LCD module does not work at the standard 100Khz
+         */
+        i2c-sda-falling-time-ns = <5000>;
+        i2c-scl-falling-time-ns = <5000>;
 
         eeprom@51 {
                 compatible = "atmel,24c32";
@@ -120,6 +163,16 @@
         };
 };
 
+&spi0 {
+        status = "okay";
+
+        spidev@0 {
+                compatible = "rohm,dh2228fv";
+                reg = <0>;
+                spi-max-frequency = <1000000>;
+        };
+};
+
 &usb1 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index d309314f3a36..82d8c4771293 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -669,6 +669,8 @@
                                         vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
                                         v-ape-supply = <&db8500_vape_reg>;
                                         musb_1v8-supply = <&db8500_vsmps2_reg>;
+                                        clocks = <&prcmu_clk PRCMU_SYSCLK>;
+                                        clock-names = "sysclk";
                                 };
 
                                 ab8500-ponkey {
diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi
index 48dc38482633..f37f9e10713c 100644
--- a/arch/arm/boot/dts/ste-href.dtsi
+++ b/arch/arm/boot/dts/ste-href.dtsi
@@ -19,12 +19,6 @@
         };
 
         soc {
-                usb_per5@a03e0000 {
-                        pinctrl-names = "default", "sleep";
-                        pinctrl-0 = <&musb_default_mode>;
-                        pinctrl-1 = <&musb_sleep_mode>;
-                };
-
                 uart@80120000 {
                         pinctrl-names = "default", "sleep";
                         pinctrl-0 = <&uart0_default_mode>;
@@ -111,6 +105,7 @@
                         pinctrl-1 = <&i2c3_sleep_mode>;
                 };
 
+                /* ST6G3244ME level translator for 1.8/2.9 V */
                 vmmci: regulator-gpio {
                         compatible = "regulator-gpio";
 
@@ -120,7 +115,6 @@
                         regulator-type = "voltage";
 
                         startup-delay-us = <100>;
-                        enable-active-high;
 
                         states = <1800000 0x1
                                   2900000 0x0>;
@@ -197,6 +191,8 @@
 
                         stericsson,cpu-dai = <&msp1 &msp3>;
                         stericsson,audio-codec = <&codec>;
+                        clocks = <&prcmu_clk PRCMU_SYSCLK>;
+                        clock-names = "sysclk";
                 };
 
                 msp0: msp@80123000 {
@@ -225,6 +221,12 @@
                                 ab8500-gpio {
                                 };
 
+                                ab8500_usb {
+                                        pinctrl-names = "default", "sleep";
+                                        pinctrl-0 = <&musb_default_mode>;
+                                        pinctrl-1 = <&musb_sleep_mode>;
+                                };
+
                                 ab8500-regulators {
                                         ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
                                                 regulator-name = "V-DISPLAY";
diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
index ece222d51717..5882a2606ac3 100644
--- a/arch/arm/boot/dts/ste-hrefprev60.dtsi
+++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi
@@ -74,6 +74,7 @@
                 vmmci: regulator-gpio {
                         gpios = <&tc3589x_gpio 18 GPIO_ACTIVE_HIGH>;
                         enable-gpio = <&tc3589x_gpio 17 GPIO_ACTIVE_HIGH>;
+                        enable-active-high;
                 };
 
                 pinctrl {
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index 7187676836be..bf259bbd1d0a 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -146,6 +146,7 @@
                 vmmci: regulator-gpio {
                         gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
                         enable-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+                        enable-active-high;
                 };
 
                 pinctrl {
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index 386eee6de232..dd5514def604 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -159,17 +159,13 @@
                                      "", "", "", "", "", "", "", "";
                 };
 
-                usb_per5@a03e0000 {
-                        pinctrl-names = "default", "sleep";
-                        pinctrl-0 = <&musb_default_mode>;
-                        pinctrl-1 = <&musb_sleep_mode>;
-                };
-
                 sound {
                         compatible = "stericsson,snd-soc-mop500";
 
                         stericsson,cpu-dai = <&msp1 &msp3>;
                         stericsson,audio-codec = <&codec>;
+                        clocks = <&prcmu_clk PRCMU_SYSCLK>;
+                        clock-names = "sysclk";
                 };
 
                 msp0: msp@80123000 {
@@ -216,11 +212,15 @@
                         };
                 };
 
+                /* ST6G3244ME level translator for 1.8/2.9 V */
                 vmmci: regulator-gpio {
                         compatible = "regulator-gpio";
 
+                        /* GPIO228 SD_SEL */
                         gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+                        /* GPIO217 MMC_EN */
                         enable-gpio = <&gpio6 25 GPIO_ACTIVE_HIGH>;
+                        enable-active-high;
 
                         regulator-min-microvolt = <1800000>;
                         regulator-max-microvolt = <2900000>;
@@ -228,7 +228,6 @@
                         regulator-type = "voltage";
 
                         startup-delay-us = <100>;
-                        enable-active-high;
 
                         states = <1800000 0x1
                                   2900000 0x0>;
@@ -448,6 +447,12 @@
                                                      "PM_GPIO42"; /* AB8500 GPIO42 */
                                 };
 
+                                ab8500_usb {
+                                        pinctrl-names = "default", "sleep";
+                                        pinctrl-0 = <&musb_default_mode>;
+                                        pinctrl-1 = <&musb_sleep_mode>;
+                                };
+
                                 ext_regulators: ab8500-ext-regulators {
                                         ab8500_ext1_reg: ab8500_ext1 {
                                                 regulator-name = "ab8500-ext-supply1";
@@ -546,6 +551,7 @@
                                 sdi0_default_mode: sdi0_default {
                                         snowball_mux {
                                                 function = "mc0";
+                                                /* Add the DAT31 pin even if it is not really used */
                                                 groups = "mc0dat31dir_a_1";
                                         };
                                         snowball_cfg1 {
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 0fe03cb88628..d753ac36788f 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -20,30 +20,15 @@
                 #size-cells = <1>;
                 ranges;
 
-                gp0_reserved: rproc@40000000 {
+                gp0_reserved: rproc@45000000 {
                         compatible = "shared-dma-pool";
-                        reg = <0x40000000 0x01000000>;
+                        reg = <0x45000000 0x00400000>;
                         no-map;
-                        status = "disabled";
                 };
 
-                gp1_reserved: rproc@41000000 {
+                delta_reserved: rproc@44000000 {
                         compatible = "shared-dma-pool";
-                        reg = <0x41000000 0x01000000>;
-                        no-map;
-                        status = "disabled";
-                };
-
-                audio_reserved: rproc@42000000 {
-                        compatible = "shared-dma-pool";
-                        reg = <0x42000000 0x01000000>;
-                        no-map;
-                        status = "disabled";
-                };
-
-                dmu_reserved: rproc@43000000 {
-                        compatible = "shared-dma-pool";
-                        reg = <0x43000000 0x01000000>;
+                        reg = <0x44000000 0x01000000>;
                         no-map;
                 };
         };
@@ -703,6 +688,7 @@
                         compatible      = "st,sti-pwm";
                         #pwm-cells      = <2>;
                         reg             = <0x9510000 0x68>;
+                        interrupts      = <GIC_SPI 131 IRQ_TYPE_NONE>;
                         pinctrl-names   = "default";
                         pinctrl-0       = <&pinctrl_pwm1_chan0_default
                                         &pinctrl_pwm1_chan1_default
@@ -823,37 +809,22 @@
                         clocks          = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
                         clock-frequency = <600000000>;
                         st,syscfg       = <&syscfg_core 0x22c>;
+                        #mbox-cells = <1>;
+                        mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
+                        mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>;
                 };
 
-
-                st231_gp1: remote-processor {
+                st231_delta: remote-processor {
                         compatible      = "st,st231-rproc";
-                        memory-region   = <&gp1_reserved>;
-                        resets          = <&softreset STIH407_ST231_GP1_SOFTRESET>;
-                        reset-names     = "sw_reset";
-                        clocks          = <&clk_s_c0_flexgen CLK_ST231_GP_1>;
-                        clock-frequency = <600000000>;
-                        st,syscfg       = <&syscfg_core 0x220>;
-                };
-
-                st231_audio: remote-processor {
-                        compatible      = "st,st231-rproc";
-                        memory-region   = <&audio_reserved>;
-                        resets          = <&softreset STIH407_ST231_AUD_SOFTRESET>;
-                        reset-names     = "sw_reset";
-                        clocks          = <&clk_s_c0_flexgen CLK_ST231_AUD_0>;
-                        clock-frequency = <600000000>;
-                        st,syscfg       = <&syscfg_core 0x228>;
-                };
-
-                st231_dmu: remote-processor {
-                        compatible      = "st,st231-rproc";
-                        memory-region   = <&dmu_reserved>;
+                        memory-region   = <&delta_reserved>;
                         resets          = <&softreset STIH407_ST231_DMU_SOFTRESET>;
                         reset-names     = "sw_reset";
                         clocks          = <&clk_s_c0_flexgen CLK_ST231_DMU>;
                         clock-frequency = <600000000>;
                         st,syscfg       = <&syscfg_core 0x224>;
+                        #mbox-cells = <1>;
+                        mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
+                        mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>;
                 };
 
                 /* fdma audio */
@@ -889,6 +860,8 @@
                         interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>;
                         dma-channels = <16>;
                         #dma-cells = <3>;
+
+                        status = "disabled";
                 };
 
                 /* fdma free running */
@@ -906,6 +879,8 @@
                                 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
                                 <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
                                 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
+
+                        status = "disabled";
                 };
 
                 sti_sasg_codec: sti-sasg-codec {
diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
index 118ac284fc4b..83313b51915d 100644
--- a/arch/arm/boot/dts/stih410-b2120.dts
+++ b/arch/arm/boot/dts/stih410-b2120.dts
@@ -60,5 +60,11 @@
                 ehci1: usb@9a83e00 {
                         status = "okay";
                 };
+
+                sti-display-subsystem {
+                        sti-hda@8d02000 {
+                                status = "okay";
+                        };
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 281a12424cf6..3c9672c5b09f 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -131,7 +131,7 @@
                                                  <&clk_s_d2_quadfs 0>;
 
                         assigned-clock-rates = <297000000>,
-                                               <108000000>,
+                                               <297000000>,
                                                <0>,
                                                <400000000>,
                                                <400000000>;
@@ -221,6 +221,7 @@
 
                         sti-hda@8d02000 {
                                 compatible = "st,stih407-hda";
+                                status = "disabled";
                                 reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
                                 reg-names = "hda-reg", "video-dacs-ctrl";
                                 clock-names = "pix",
@@ -232,6 +233,17 @@
                                          <&clk_s_d2_quadfs 0>,
                                          <&clk_s_d2_quadfs 1>;
                         };
+
+                        sti-hqvdp@9c000000 {
+                                compatible = "st,stih407-hqvdp";
+                                reg = <0x9C00000 0x100000>;
+                                clock-names = "hqvdp", "pix_main";
+                                clocks = <&clk_s_c0_flexgen CLK_MAIN_DISP>,
+                                         <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>;
+                                reset-names = "hqvdp";
+                                resets = <&softreset STIH407_HDQVDP_SOFTRESET>;
+                                st,vtg = <&vtg_main>;
+                        };
                 };
 
                 bdisp0:bdisp@9f10000 {
@@ -259,5 +271,15 @@
                         clocks = <&clk_sysin>;
                         interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
                 };
+
+                delta0 {
+                        compatible = "st,st-delta";
+                        clock-names = "delta",
+                                      "delta-st231",
+                                      "delta-flash-promip";
+                        clocks = <&clk_s_c0_flexgen CLK_VID_DMU>,
+                                 <&clk_s_c0_flexgen CLK_ST231_DMU>,
+                                 <&clk_s_c0_flexgen CLK_FLASH_PROMIP>;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts
index 5436e880e28f..3c99466989b1 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -70,6 +70,20 @@
                 dma-ranges = <0xc0000000 0x0 0x10000000>;
         };
 
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                reg_vref: regulator@0 {
+                        compatible = "regulator-fixed";
+                        reg = <0>;
+                        regulator-name = "vref";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                };
+        };
+
         leds {
                 compatible = "gpio-leds";
                 green {
@@ -107,15 +121,32 @@
         usbotg_hs_phy: usbphy {
                 #phy-cells = <0>;
                 compatible = "usb-nop-xceiv";
-                clocks = <&rcc 0 30>;
+                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHSULPI)>;
                 clock-names = "main_clk";
         };
 };
 
+&adc {
+        pinctrl-names = "default";
+        pinctrl-0 = <&adc3_in8_pin>;
+        vref-supply = <&reg_vref>;
+        status = "okay";
+        adc3: adc@200 {
+                st,adc-channels = <8>;
+                status = "okay";
+        };
+};
+
 &clk_hse {
         clock-frequency = <25000000>;
 };
 
+&i2c1 {
+        pinctrl-0 = <&i2c1_pins>;
+        pinctrl-names = "default";
+        status = "okay";
+};
+
 &mac {
         status = "okay";
         pinctrl-0       = <&ethernet_mii>;
@@ -132,6 +163,10 @@
         };
 };
 
+&rtc {
+        status = "okay";
+};
+
 &usart1 {
         pinctrl-0 = <&usart1_pins_a>;
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts
index 7d0415e80668..9222b9f37bc0 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -94,6 +94,12 @@
         clock-frequency = <8000000>;
 };
 
+&rtc {
+        assigned-clocks = <&rcc 1 CLK_RTC>;
+        assigned-clock-parents = <&rcc 1 CLK_LSI>;
+        status = "okay";
+};
+
 &usart1 {
         pinctrl-0 = <&usart1_pins_a>;
         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index e4dae0eda3cd..ee0da970e8ad 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -48,6 +48,8 @@
 #include "skeleton.dtsi"
 #include "armv7-m.dtsi"
 #include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
+#include <dt-bindings/clock/stm32fx-clock.h>
+#include <dt-bindings/mfd/stm32f4-rcc.h>
 
 / {
         clocks {
@@ -68,6 +70,12 @@
                         compatible = "fixed-clock";
                         clock-frequency = <32000>;
                 };
+
+                clk_i2s_ckin: i2s-ckin {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <0>;
+                };
         };
 
         soc {
@@ -75,46 +83,227 @@
                         compatible = "st,stm32-timer";
                         reg = <0x40000000 0x400>;
                         interrupts = <28>;
-                        clocks = <&rcc 0 128>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
+                        status = "disabled";
+                };
+
+                timers2: timers@40000000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40000000 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
+                        clock-names = "int";
                         status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@1 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <1>;
+                                status = "disabled";
+                        };
                 };
 
                 timer3: timer@40000400 {
                         compatible = "st,stm32-timer";
                         reg = <0x40000400 0x400>;
                         interrupts = <29>;
-                        clocks = <&rcc 0 129>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
+                        status = "disabled";
+                };
+
+                timers3: timers@40000400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40000400 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
+                        clock-names = "int";
                         status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@2 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <2>;
+                                status = "disabled";
+                        };
                 };
 
                 timer4: timer@40000800 {
                         compatible = "st,stm32-timer";
                         reg = <0x40000800 0x400>;
                         interrupts = <30>;
-                        clocks = <&rcc 0 130>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
+                        status = "disabled";
+                };
+
+                timers4: timers@40000800 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40000800 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
+                        clock-names = "int";
                         status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@3 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <3>;
+                                status = "disabled";
+                        };
                 };
 
                 timer5: timer@40000c00 {
                         compatible = "st,stm32-timer";
                         reg = <0x40000c00 0x400>;
                         interrupts = <50>;
-                        clocks = <&rcc 0 131>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
+                };
+
+                timers5: timers@40000c00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40000C00 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@4 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <4>;
+                                status = "disabled";
+                        };
                 };
 
                 timer6: timer@40001000 {
                         compatible = "st,stm32-timer";
                         reg = <0x40001000 0x400>;
                         interrupts = <54>;
-                        clocks = <&rcc 0 132>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
                         status = "disabled";
                 };
 
+                timers6: timers@40001000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40001000 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        timer@5 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <5>;
+                                status = "disabled";
+                        };
+                };
+
                 timer7: timer@40001400 {
                         compatible = "st,stm32-timer";
                         reg = <0x40001400 0x400>;
                         interrupts = <55>;
-                        clocks = <&rcc 0 133>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
+                        status = "disabled";
+                };
+
+                timers7: timers@40001400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40001400 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        timer@6 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <6>;
+                                status = "disabled";
+                        };
+                };
+
+                timers12: timers@40001800 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40001800 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM12)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@11 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <11>;
+                                status = "disabled";
+                        };
+                };
+
+                timers13: timers@40001c00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40001C00 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+                };
+
+                timers14: timers@40002000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40002000 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+                };
+
+                rtc: rtc@40002800 {
+                        compatible = "st,stm32-rtc";
+                        reg = <0x40002800 0x400>;
+                        clocks = <&rcc 1 CLK_RTC>;
+                        clock-names = "ck_rtc";
+                        assigned-clocks = <&rcc 1 CLK_RTC>;
+                        assigned-clock-parents = <&rcc 1 CLK_LSE>;
+                        interrupt-parent = <&exti>;
+                        interrupts = <17 1>;
+                        interrupt-names = "alarm";
+                        st,syscfg = <&pwrcfg>;
                         status = "disabled";
                 };
 
@@ -122,7 +311,7 @@
                         compatible = "st,stm32-usart", "st,stm32-uart";
                         reg = <0x40004400 0x400>;
                         interrupts = <38>;
-                        clocks =  <&rcc 0 145>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART2)>;
                         status = "disabled";
                 };
 
@@ -130,7 +319,7 @@
                         compatible = "st,stm32-usart", "st,stm32-uart";
                         reg = <0x40004800 0x400>;
                         interrupts = <39>;
-                        clocks = <&rcc 0 146>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART3)>;
                         status = "disabled";
                         dmas = <&dma1 1 4 0x400 0x0>,
                                <&dma1 3 4 0x400 0x0>;
@@ -141,7 +330,7 @@
                         compatible = "st,stm32-uart";
                         reg = <0x40004c00 0x400>;
                         interrupts = <52>;
-                        clocks = <&rcc 0 147>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART4)>;
                         status = "disabled";
                 };
 
@@ -149,7 +338,19 @@
                         compatible = "st,stm32-uart";
                         reg = <0x40005000 0x400>;
                         interrupts = <53>;
-                        clocks = <&rcc 0 148>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART5)>;
+                        status = "disabled";
+                };
+
+                i2c1: i2c@40005400 {
+                        compatible = "st,stm32f4-i2c";
+                        reg = <0x40005400 0x400>;
+                        interrupts = <31>,
+                                     <32>;
+                        resets = <&rcc STM32F4_APB1_RESET(I2C1)>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
                         status = "disabled";
                 };
 
@@ -157,7 +358,7 @@
                         compatible = "st,stm32-usart", "st,stm32-uart";
                         reg = <0x40007800 0x400>;
                         interrupts = <82>;
-                        clocks = <&rcc 0 158>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART7)>;
                         status = "disabled";
                 };
 
@@ -165,15 +366,57 @@
                         compatible = "st,stm32-usart", "st,stm32-uart";
                         reg = <0x40007c00 0x400>;
                         interrupts = <83>;
-                        clocks = <&rcc 0 159>;
+                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART8)>;
+                        status = "disabled";
+                };
+
+                timers1: timers@40010000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40010000 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM1)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@0 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <0>;
+                                status = "disabled";
+                        };
+                };
+
+                timers8: timers@40010400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40010400 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM8)>;
+                        clock-names = "int";
                         status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@7 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <7>;
+                                status = "disabled";
+                        };
                 };
 
                 usart1: serial@40011000 {
                         compatible = "st,stm32-usart", "st,stm32-uart";
                         reg = <0x40011000 0x400>;
                         interrupts = <37>;
-                        clocks = <&rcc 0 164>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART1)>;
                         status = "disabled";
                         dmas = <&dma2 2 4 0x400 0x0>,
                                <&dma2 7 4 0x400 0x0>;
@@ -184,10 +427,53 @@
                         compatible = "st,stm32-usart", "st,stm32-uart";
                         reg = <0x40011400 0x400>;
                         interrupts = <71>;
-                        clocks = <&rcc 0 165>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART6)>;
                         status = "disabled";
                 };
 
+                adc: adc@40012000 {
+                        compatible = "st,stm32f4-adc-core";
+                        reg = <0x40012000 0x400>;
+                        interrupts = <18>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
+                        clock-names = "adc";
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+
+                        adc1: adc@0 {
+                                compatible = "st,stm32f4-adc";
+                                #io-channel-cells = <1>;
+                                reg = <0x0>;
+                                clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
+                                interrupt-parent = <&adc>;
+                                interrupts = <0>;
+                                status = "disabled";
+                        };
+
+                        adc2: adc@100 {
+                                compatible = "st,stm32f4-adc";
+                                #io-channel-cells = <1>;
+                                reg = <0x100>;
+                                clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC2)>;
+                                interrupt-parent = <&adc>;
+                                interrupts = <1>;
+                                status = "disabled";
+                        };
+
+                        adc3: adc@200 {
+                                compatible = "st,stm32f4-adc";
+                                #io-channel-cells = <1>;
+                                reg = <0x200>;
+                                clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC3)>;
+                                interrupt-parent = <&adc>;
+                                interrupts = <2>;
+                                status = "disabled";
+                        };
+                };
+
                 syscfg: system-config@40013800 {
                         compatible = "syscon";
                         reg = <0x40013800 0x400>;
@@ -201,6 +487,57 @@
                         interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
                 };
 
+                timers9: timers@40014000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40014000 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM9)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+
+                        timer@8 {
+                                compatible = "st,stm32-timer-trigger";
+                                reg = <8>;
+                                status = "disabled";
+                        };
+                };
+
+                timers10: timers@40014400 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40014400 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+                };
+
+                timers11: timers@40014800 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-timers";
+                        reg = <0x40014800 0x400>;
+                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
+                        clock-names = "int";
+                        status = "disabled";
+
+                        pwm {
+                                compatible = "st,stm32-pwm";
+                                status = "disabled";
+                        };
+                };
+
                 pwrcfg: power-config@40007000 {
                         compatible = "syscon";
                         reg = <0x40007000 0x400>;
@@ -219,7 +556,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x0 0x400>;
-                                clocks = <&rcc 0 0>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
                                 st,bank-name = "GPIOA";
                         };
 
@@ -227,7 +564,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x400 0x400>;
-                                clocks = <&rcc 0 1>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
                                 st,bank-name = "GPIOB";
                         };
 
@@ -235,7 +572,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x800 0x400>;
-                                clocks = <&rcc 0 2>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
                                 st,bank-name = "GPIOC";
                         };
 
@@ -243,7 +580,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0xc00 0x400>;
-                                clocks = <&rcc 0 3>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>;
                                 st,bank-name = "GPIOD";
                         };
 
@@ -251,7 +588,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x1000 0x400>;
-                                clocks = <&rcc 0 4>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>;
                                 st,bank-name = "GPIOE";
                         };
 
@@ -259,7 +596,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x1400 0x400>;
-                                clocks = <&rcc 0 5>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>;
                                 st,bank-name = "GPIOF";
                         };
 
@@ -267,7 +604,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x1800 0x400>;
-                                clocks = <&rcc 0 6>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>;
                                 st,bank-name = "GPIOG";
                         };
 
@@ -275,7 +612,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x1c00 0x400>;
-                                clocks = <&rcc 0 7>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>;
                                 st,bank-name = "GPIOH";
                         };
 
@@ -283,7 +620,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x2000 0x400>;
-                                clocks = <&rcc 0 8>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>;
                                 st,bank-name = "GPIOI";
                         };
 
@@ -291,7 +628,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x2400 0x400>;
-                                clocks = <&rcc 0 9>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>;
                                 st,bank-name = "GPIOJ";
                         };
 
@@ -299,7 +636,7 @@
                                 gpio-controller;
                                 #gpio-cells = <2>;
                                 reg = <0x2800 0x400>;
-                                clocks = <&rcc 0 10>;
+                                clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>;
                                 st,bank-name = "GPIOK";
                         };
 
@@ -316,6 +653,19 @@
                                 };
                         };
 
+                        usart3_pins_a: usart3@0 {
+                                pins1 {
+                                        pinmux = <STM32F429_PB10_FUNC_USART3_TX>;
+                                        bias-disable;
+                                        drive-push-pull;
+                                        slew-rate = <0>;
+                                };
+                                pins2 {
+                                        pinmux = <STM32F429_PB11_FUNC_USART3_RX>;
+                                        bias-disable;
+                                };
+                        };
+
                         usbotg_hs_pins_a: usbotg_hs@0 {
                                 pins {
                                         pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
@@ -355,6 +705,37 @@
                                         slew-rate = <2>;
                                 };
                         };
+
+                        adc3_in8_pin: adc@200 {
+                                pins {
+                                        pinmux = <STM32F429_PF10_FUNC_ANALOG>;
+                                };
+                        };
+
+                        pwm1_pins: pwm@1 {
+                                pins {
+                                        pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,
+                                                 <STM32F429_PB13_FUNC_TIM1_CH1N>,
+                                                 <STM32F429_PB12_FUNC_TIM1_BKIN>;
+                                };
+                        };
+
+                        pwm3_pins: pwm@3 {
+                                pins {
+                                        pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,
+                                                 <STM32F429_PB5_FUNC_TIM3_CH2>;
+                                };
+                        };
+
+                        i2c1_pins: i2c1@0 {
+                                pins {
+                                        pinmux = <STM32F429_PB9_FUNC_I2C1_SDA>,
+                                                 <STM32F429_PB6_FUNC_I2C1_SCL>;
+                                        bias-disable;
+                                        drive-open-drain;
+                                        slew-rate = <3>;
+                                };
+                        };
                 };
 
                 rcc: rcc@40023810 {
@@ -362,8 +743,10 @@
                         #clock-cells = <2>;
                         compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
                         reg = <0x40023800 0x400>;
-                        clocks = <&clk_hse>;
+                        clocks = <&clk_hse>, <&clk_i2s_ckin>;
                         st,syscfg = <&pwrcfg>;
+                        assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
+                        assigned-clock-rates = <1000000>;
                 };
 
                 dma1: dma-controller@40026000 {
@@ -377,7 +760,7 @@
                                      <16>,
                                      <17>,
                                      <47>;
-                        clocks = <&rcc 0 21>;
+                        clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA1)>;
                         #dma-cells = <4>;
                 };
 
@@ -392,7 +775,7 @@
                                      <68>,
                                      <69>,
                                      <70>;
-                        clocks = <&rcc 0 22>;
+                        clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2)>;
                         #dma-cells = <4>;
                         st,mem2mem;
                 };
@@ -404,7 +787,9 @@
                         interrupts = <61>;
                         interrupt-names = "macirq";
                         clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
-                        clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
+                        clocks = <&rcc 0 STM32F4_AHB1_CLOCK(ETHMAC)>,
+                                        <&rcc 0 STM32F4_AHB1_CLOCK(ETHMACTX)>,
+                                        <&rcc 0 STM32F4_AHB1_CLOCK(ETHMACRX)>;
                         st,syscon = <&syscfg 0x4>;
                         snps,pbl = <8>;
                         snps,mixed-burst;
@@ -415,7 +800,7 @@
                         compatible = "snps,dwc2";
                         reg = <0x40040000 0x40000>;
                         interrupts = <77>;
-                        clocks = <&rcc 0 29>;
+                        clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHS)>;
                         clock-names = "otg";
                         status = "disabled";
                 };
@@ -424,12 +809,13 @@
                         compatible = "st,stm32-rng";
                         reg = <0x50060800 0x400>;
                         interrupts = <80>;
-                        clocks = <&rcc 0 38>;
+                        clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
+
                 };
         };
 };
 
 &systick {
-        clocks = <&rcc 1 0>;
+        clocks = <&rcc 1 SYSTICK>;
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts
index 8877c00ce8e8..0dd56ef574fa 100644
--- a/arch/arm/boot/dts/stm32f469-disco.dts
+++ b/arch/arm/boot/dts/stm32f469-disco.dts
@@ -58,7 +58,7 @@
         };
 
         memory {
-                reg = <0x00000000 0x800000>;
+                reg = <0x00000000 0x1000000>;
         };
 
         aliases {
@@ -78,6 +78,40 @@
         clock-frequency = <8000000>;
 };
 
+&rtc {
+        status = "okay";
+};
+
+&timers1 {
+        status = "okay";
+
+        pwm {
+                pinctrl-0 = <&pwm1_pins>;
+                pinctrl-names = "default";
+                status = "okay";
+        };
+
+        timer@0 {
+                status = "okay";
+        };
+};
+
+&timers3 {
+        status = "okay";
+
+        pwm {
+                pinctrl-0 = <&pwm3_pins>;
+                pinctrl-names = "default";
+                status = "okay";
+        };
+
+        timer@2 {
+                status = "okay";
+        };
+};
+
 &usart3 {
+        pinctrl-0 = <&usart3_pins_a>;
+        pinctrl-names = "default";
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index 39e368ec3428..f3fc27412a67 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -117,6 +117,10 @@
         status = "okay";
 };
 
+&cpu0 {
+        cpu-supply = <&reg_dcdc2>;
+};
+
 &ehci0 {
         status = "okay";
 };
@@ -186,20 +190,43 @@
 
 &pio {
         emac_power_pin_a1000: emac_power_pin@0 {
-                allwinner,pins = "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15";
+                function = "gpio_out";
         };
 
         led_pins_a1000: led_pins@0 {
-                allwinner,pins = "PH10", "PH20";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH10", "PH20";
+                function = "gpio_out";
         };
 };
 
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1250000>;
+        regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+        regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "avcc";
+};
+
 &reg_usb1_vbus {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
index 5f98582232d6..942d739a4384 100644
--- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
@@ -127,7 +127,7 @@
 
 &pio {
         usb2_vbus_pin_a: usb2_vbus_pin@0 {
-                allwinner,pins = "PH12";
+                pins = "PH12";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
index 023b03efa5ff..17f8c5ec011c 100644
--- a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
+++ b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
@@ -142,17 +142,15 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 710e2ef516a8..04e040e6233d 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -165,17 +165,15 @@
 
 &pio {
         led_pins_cubieboard: led_pins@0 {
-                allwinner,pins = "PH20", "PH21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH20", "PH21";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
index 893497e397da..8317fbfeec4a 100644
--- a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
+++ b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
@@ -178,45 +178,35 @@
 
 &pio {
         bl_en_pin_dsrv9703c: bl_en_pin@0 {
-                allwinner,pins = "PH7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH7";
+                function = "gpio_out";
         };
 
         codec_pa_pin: codec_pa_pin@0 {
-                allwinner,pins = "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15";
+                function = "gpio_out";
         };
 
         motor_pins: motor_pins@0 {
-                allwinner,pins = "PB3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB3";
+                function = "gpio_out";
         };
 
         touchscreen_pins: touchscreen_pins@0 {
-                allwinner,pins = "PB13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB13";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
index ac64781a0a9c..9616cdecce93 100644
--- a/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
@@ -156,10 +156,8 @@
 
 &pio {
         codec_pa_pin: codec_pa_pin@0 {
-                allwinner,pins = "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index 6de83a6187d0..a48b46474417 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -129,17 +129,13 @@
         pinctrl-0 = <&hackberry_hogs>;
 
         hackberry_hogs: hogs@0 {
-                allwinner,pins = "PH19";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH19";
+                function = "gpio_out";
         };
 
         usb2_vbus_pin_hackberry: usb2_vbus_pin@0 {
-                allwinner,pins = "PH12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH12";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts
index 9103864fef90..85dcf81ab64e 100644
--- a/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts
@@ -93,17 +93,15 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
@@ -123,7 +121,7 @@
 };
 
 &usb2_vbus_pin_a {
-        allwinner,pins = "PH6";
+        pins = "PH6";
 };
 
 &usb_otg {
diff --git a/arch/arm/boot/dts/sun4i-a10-inet1.dts b/arch/arm/boot/dts/sun4i-a10-inet1.dts
index e09053bf5e1f..f3092703a1a6 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet1.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet1.dts
@@ -180,31 +180,25 @@
 
 &pio {
         bl_en_pin_inet: bl_en_pin@0 {
-                allwinner,pins = "PH7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH7";
+                function = "gpio_out";
         };
 
         touchscreen_wake_pin: touchscreen_wake_pin@0 {
-                allwinner,pins = "PB13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB13";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
index 04b0d2d1ae6c..a1a2bbb3f9d3 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
@@ -161,17 +161,15 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
index bba4f9cf9bf5..4ef2a60a8cd4 100644
--- a/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
+++ b/arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
@@ -320,28 +320,25 @@
 
 &pio {
         key_pins_inet9f: key_pins@0 {
-                allwinner,pins = "PA0", "PA1", "PA3", "PA4",
-                                 "PA5", "PA6", "PA8", "PA9",
-                                 "PA11", "PA12", "PA13",
-                                 "PA14", "PA15", "PA16", "PA17",
-                                 "PH22", "PH23", "PH24", "PH25", "PH26";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA0", "PA1", "PA3", "PA4",
+                       "PA5", "PA6", "PA8", "PA9",
+                       "PA11", "PA12", "PA13",
+                       "PA14", "PA15", "PA16", "PA17",
+                       "PH22", "PH23", "PH24", "PH25", "PH26";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
index e28f080b1fd5..fc4d4d49e2e2 100644
--- a/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
@@ -163,17 +163,13 @@
 
 &pio {
         emac_power_pin_q5: emac_power_pin@0 {
-                allwinner,pins = "PH19";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH19";
+                function = "gpio_out";
         };
 
         led_pins_q5: led_pins@0 {
-                allwinner,pins = "PH20";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH20";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
index 8e50723dbe02..a2885039d5f1 100644
--- a/arch/arm/boot/dts/sun4i-a10-marsboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-marsboard.dts
@@ -164,17 +164,14 @@
 
 &pio {
         led_pins_marsboard: led_pins@0 {
-                allwinner,pins = "PB5", "PB6", "PB7", "PB8";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB5", "PB6", "PB7", "PB8";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
index a7dd86d30fa2..af42ebb3a97b 100644
--- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
@@ -93,7 +93,7 @@
 
 &ir0_rx_pins_a {
         /* The ir receiver is not always populated */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc0 {
diff --git a/arch/arm/boot/dts/sun4i-a10-mk802.dts b/arch/arm/boot/dts/sun4i-a10-mk802.dts
index ee46ea854832..9c1afd4277d7 100644
--- a/arch/arm/boot/dts/sun4i-a10-mk802.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mk802.dts
@@ -91,24 +91,18 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH4";
+                function = "gpio_in";
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH5";
+                function = "gpio_in";
         };
 
         usb2_vbus_pin_mk802: usb2_vbus_pin@0 {
-                allwinner,pins = "PH12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH12";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
index b350448c7217..214a5accfe93 100644
--- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
@@ -168,31 +168,26 @@
 
 &pio {
         ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
-                allwinner,pins = "PC3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC3";
+                function = "gpio_out";
         };
 
         led_pins_olinuxinolime: led_pins@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
index 39034aa8e1ae..b0365d63ba70 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts
@@ -170,24 +170,19 @@
 
 &pio {
         led_pins_pcduino: led_pins@0 {
-                allwinner,pins = "PH15", "PH16";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15", "PH16";
+                function = "gpio_out";
         };
 
         key_pins_pcduino: key_pins@0 {
-                allwinner,pins = "PH17", "PH18", "PH19";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH17", "PH18", "PH19";
+                function = "gpio_in";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
index de483a1bf36a..811d00ee2ade 100644
--- a/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pcduino2.dts
@@ -57,10 +57,8 @@
 
 &pio {
         usb2_vbus_pin_pcduino2: usb2_vbus_pin@0 {
-                allwinner,pins = "PD2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PD2";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
index 918f97294b33..bfa6bbdaab27 100644
--- a/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
+++ b/arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
@@ -164,38 +164,30 @@
 
 &pio {
         bl_en_pin_protab: bl_en_pin@0 {
-                allwinner,pins = "PH7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH7";
+                function = "gpio_out";
         };
 
         codec_pa_pin: codec_pa_pin@0 {
-                allwinner,pins = "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15";
+                function = "gpio_out";
         };
 
         touchscreen_pins: touchscreen_pins@0 {
-                allwinner,pins = "PA5", "PB13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA5", "PB13";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index b14a4281058d..ba20b48c0702 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -975,190 +975,142 @@
                         #gpio-cells = <3>;
 
                         emac_pins_a: emac0@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2",
-                                                "PA3", "PA4", "PA5", "PA6",
-                                                "PA7", "PA8", "PA9", "PA10",
-                                                "PA11", "PA12", "PA13", "PA14",
-                                                "PA15", "PA16";
-                                allwinner,function = "emac";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA0", "PA1", "PA2",
+                                       "PA3", "PA4", "PA5", "PA6",
+                                       "PA7", "PA8", "PA9", "PA10",
+                                       "PA11", "PA12", "PA13", "PA14",
+                                       "PA15", "PA16";
+                                function = "emac";
                         };
 
                         i2c0_pins_a: i2c0@0 {
-                                allwinner,pins = "PB0", "PB1";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB0", "PB1";
+                                function = "i2c0";
                         };
 
                         i2c1_pins_a: i2c1@0 {
-                                allwinner,pins = "PB18", "PB19";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB18", "PB19";
+                                function = "i2c1";
                         };
 
                         i2c2_pins_a: i2c2@0 {
-                                allwinner,pins = "PB20", "PB21";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB20", "PB21";
+                                function = "i2c2";
                         };
 
                         ir0_rx_pins_a: ir0@0 {
-                                allwinner,pins = "PB4";
-                                allwinner,function = "ir0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB4";
+                                function = "ir0";
                         };
 
                         ir0_tx_pins_a: ir0@1 {
-                                allwinner,pins = "PB3";
-                                allwinner,function = "ir0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB3";
+                                function = "ir0";
                         };
 
                         ir1_rx_pins_a: ir1@0 {
-                                allwinner,pins = "PB23";
-                                allwinner,function = "ir1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB23";
+                                function = "ir1";
                         };
 
                         ir1_tx_pins_a: ir1@1 {
-                                allwinner,pins = "PB22";
-                                allwinner,function = "ir1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB22";
+                                function = "ir1";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2",
-                                                 "PF3", "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1", "PF2",
+                                       "PF3", "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
-                                allwinner,pins = "PH1";
-                                allwinner,function = "gpio_in";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PH1";
+                                function = "gpio_in";
+                                bias-pull-up;
                         };
 
                         ps20_pins_a: ps20@0 {
-                                allwinner,pins = "PI20", "PI21";
-                                allwinner,function = "ps2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI20", "PI21";
+                                function = "ps2";
                         };
 
                         ps21_pins_a: ps21@0 {
-                                allwinner,pins = "PH12", "PH13";
-                                allwinner,function = "ps2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH12", "PH13";
+                                function = "ps2";
                         };
 
                         pwm0_pins_a: pwm0@0 {
-                                allwinner,pins = "PB2";
-                                allwinner,function = "pwm";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB2";
+                                function = "pwm";
                         };
 
                         pwm1_pins_a: pwm1@0 {
-                                allwinner,pins = "PI3";
-                                allwinner,function = "pwm";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI3";
+                                function = "pwm";
                         };
 
                         spdif_tx_pins_a: spdif@0 {
-                                allwinner,pins = "PB13";
-                                allwinner,function = "spdif";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PB13";
+                                function = "spdif";
+                                bias-pull-up;
                         };
 
                         spi0_pins_a: spi0@0 {
-                                allwinner,pins = "PI11", "PI12", "PI13";
-                                allwinner,function = "spi0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI11", "PI12", "PI13";
+                                function = "spi0";
                         };
 
                         spi0_cs0_pins_a: spi0_cs0@0 {
-                                allwinner,pins = "PI10";
-                                allwinner,function = "spi0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI10";
+                                function = "spi0";
                         };
 
                         spi1_pins_a: spi1@0 {
-                                allwinner,pins = "PI17", "PI18", "PI19";
-                                allwinner,function = "spi1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI17", "PI18", "PI19";
+                                function = "spi1";
                         };
 
                         spi1_cs0_pins_a: spi1_cs0@0 {
-                                allwinner,pins = "PI16";
-                                allwinner,function = "spi1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI16";
+                                function = "spi1";
                         };
 
                         spi2_pins_a: spi2@0 {
-                                allwinner,pins = "PC20", "PC21", "PC22";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC20", "PC21", "PC22";
+                                function = "spi2";
                         };
 
                         spi2_pins_b: spi2@1 {
-                                allwinner,pins = "PB15", "PB16", "PB17";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB15", "PB16", "PB17";
+                                function = "spi2";
                         };
 
                         spi2_cs0_pins_a: spi2_cs0@0 {
-                                allwinner,pins = "PC19";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC19";
+                                function = "spi2";
                         };
 
                         spi2_cs0_pins_b: spi2_cs0@1 {
-                                allwinner,pins = "PB14";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB14";
+                                function = "spi2";
                         };
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PB22", "PB23";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB22", "PB23";
+                                function = "uart0";
                         };
 
                         uart0_pins_b: uart0@1 {
-                                allwinner,pins = "PF2", "PF4";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF2", "PF4";
+                                function = "uart0";
                         };
 
                         uart1_pins_a: uart1@0 {
-                                allwinner,pins = "PA10", "PA11";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA10", "PA11";
+                                function = "uart1";
                         };
                 };
 
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
index d4ad02182353..a539b72ce093 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
@@ -109,17 +109,15 @@
 
 &pio {
         mmc0_cd_pin_t003: mmc0_cd_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_t003: led_pins@0 {
-                allwinner,pins = "PB2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 };
 
@@ -140,11 +138,11 @@
 };
 
 &usb0_vbus_pin_a {
-        allwinner,pins = "PG13";
+        pins = "PG13";
 };
 
 &usb1_vbus_pin_a {
-        allwinner,pins = "PB10";
+        pins = "PB10";
 };
 
 &usb_otg {
diff --git a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
index 2150e15e115a..e1b5e8a446fe 100644
--- a/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
@@ -130,31 +130,26 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG12";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG12";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc0_cd_pin_t004: mmc0_cd_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin@0 {
-                allwinner,pins = "PB18";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB18";
+                function = "gpio_out";
         };
 
         led_pins_t004: led_pins@0 {
-                allwinner,pins = "PB2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 };
 
@@ -175,7 +170,7 @@
 };
 
 &usb1_vbus_pin_a {
-        allwinner,pins = "PG13";
+        pins = "PG13";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun5i-a10s-mk802.dts b/arch/arm/boot/dts/sun5i-a10s-mk802.dts
index c84ac005342e..020aa9d6c31d 100644
--- a/arch/arm/boot/dts/sun5i-a10s-mk802.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-mk802.dts
@@ -116,24 +116,19 @@
 
 &pio {
         led_pins_mk802: led_pins@0 {
-                allwinner,pins = "PB2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB2";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_mk802: mmc0_cd_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_mk802: usb1_vbus_pin@0 {
-                allwinner,pins = "PB10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB10";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index 0684d7930d65..d8245c6314a7 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -202,38 +202,32 @@
 
 &pio {
         mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {
-                allwinner,pins = "PG13";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG13";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_olinuxino: led_pins@0 {
-                allwinner,pins = "PE3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PE3";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb1_vbus_pin_olinuxino_m: usb1_vbus_pin@0 {
-                allwinner,pins = "PB10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB10";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG12";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG12";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -279,7 +273,7 @@
 };
 
 &usb0_vbus_pin_a {
-        allwinner,pins = "PG11";
+        pins = "PG11";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
index 3b057983c74a..51371f9b1cf0 100644
--- a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
@@ -101,24 +101,20 @@
 
 &pio {
         mmc0_cd_pin_r7: mmc0_cd_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_r7: led_pins@0 {
-                allwinner,pins = "PB2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb1_vbus_pin_r7: usb1_vbus_pin@0 {
-                allwinner,pins = "PG13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG13";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
index b5de75f4c710..2b8adda0deda 100644
--- a/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
@@ -146,24 +146,19 @@
 
 &pio {
         led_pins_wobo_i5: led_pins@0 {
-                allwinner,pins = "PB2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB2";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_wobo_i5: mmc0_cd_pin@0 {
-                allwinner,pins = "PB3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PB3";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         emac_power_pin_wobo: emac_power_pin@0 {
-                allwinner,pins = "PA02";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA02";
+                function = "gpio_out";
         };
 };
 
@@ -223,7 +218,7 @@
 };
 
 &usb1_vbus_pin_a {
-        allwinner,pins = "PG12";
+        pins = "PG12";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 7aa8c7aa0153..62b3ffe62df2 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -200,61 +200,48 @@
         compatible = "allwinner,sun5i-a10s-pinctrl";
 
         uart0_pins_a: uart0@0 {
-                allwinner,pins = "PB19", "PB20";
-                allwinner,function = "uart0";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB19", "PB20";
+                function = "uart0";
         };
 
         uart2_pins_a: uart2@0 {
-                allwinner,pins = "PC18", "PC19";
-                allwinner,function = "uart2";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC18", "PC19";
+                function = "uart2";
         };
 
         emac_pins_a: emac0@0 {
-                allwinner,pins = "PA0", "PA1", "PA2",
+                pins = "PA0", "PA1", "PA2",
                                 "PA3", "PA4", "PA5", "PA6",
                                 "PA7", "PA8", "PA9", "PA10",
                                 "PA11", "PA12", "PA13", "PA14",
                                 "PA15", "PA16";
-                allwinner,function = "emac";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                function = "emac";
         };
 
         emac_pins_b: emac0@1 {
-                allwinner,pins = "PD6", "PD7", "PD10",
+                pins = "PD6", "PD7", "PD10",
                                 "PD11", "PD12", "PD13", "PD14",
                                 "PD15", "PD18", "PD19", "PD20",
                                 "PD21", "PD22", "PD23", "PD24",
                                 "PD25", "PD26", "PD27";
-                allwinner,function = "emac";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                function = "emac";
         };
 
         mmc1_pins_a: mmc1@0 {
-                allwinner,pins = "PG3", "PG4", "PG5",
+                pins = "PG3", "PG4", "PG5",
                                  "PG6", "PG7", "PG8";
-                allwinner,function = "mmc1";
-                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                function = "mmc1";
+                drive-strength = <30>;
         };
 
         spi2_pins_b: spi2@1 {
-                allwinner,pins = "PB12", "PB13", "PB14";
-                allwinner,function = "spi2";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB12", "PB13", "PB14";
+                function = "spi2";
         };
 
         spi2_cs0_pins_b: spi2_cs0@1 {
-                allwinner,pins = "PB11";
-                allwinner,function = "spi2";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB11";
+                function = "spi2";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
index 6efbba6d40a9..42435454acef 100644
--- a/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
+++ b/arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
@@ -137,24 +137,21 @@
 
 &pio {
         mmc0_cd_pin_d709: mmc0_cd_pin@0 {
-                allwinner,pins = "PG0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG0";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-down;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG2";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -212,7 +209,7 @@
 };
 
 &usb0_vbus_pin_a {
-        allwinner,pins = "PG12";
+        pins = "PG12";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
index 3724b988064e..5879a75cf97a 100644
--- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
@@ -136,24 +136,20 @@
 
 &pio {
         mmc0_cd_pin_h702: mmc0_cd_pin@0 {
-                allwinner,pins = "PG0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG0";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG2";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG1";
+                function = "gpio_in";
         };
 };
 
@@ -208,7 +204,7 @@
 };
 
 &usb0_vbus_pin_a {
-        allwinner,pins = "PG12";
+        pins = "PG12";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
new file mode 100644
index 000000000000..566cda91a66b
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
@@ -0,0 +1,224 @@
+/*
+ * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun5i-a13-olinuxino.dts, which is
+ *   Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *   Copyright 2013 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+        model = "Lichee Pi One";
+        compatible = "licheepi,licheepi-one", "allwinner,sun5i-a13";
+
+        aliases {
+                serial0 = &uart1;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                red {
+                        label ="licheepi:red:usr";
+                        gpios = <&pio 2 5 GPIO_ACTIVE_LOW>;
+                };
+
+                green {
+                        label ="licheepi:green:usr";
+                        gpios = <&pio 2 19 GPIO_ACTIVE_LOW>;
+                        default-state = "on";
+                };
+
+                blue {
+                        label ="licheepi:blue:usr";
+                        gpios = <&pio 2 4 GPIO_ACTIVE_LOW>;
+                };
+
+        };
+};
+
+&cpu0 {
+        cpu-supply = <&reg_dcdc2>;
+};
+
+&ehci0 {
+        status = "okay";
+};
+
+&i2c0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c0_pins_a>;
+        status = "okay";
+
+        axp209: pmic@34 {
+                compatible = "x-powers,axp209";
+                reg = <0x34>;
+                interrupts = <0>;
+
+                interrupt-controller;
+                #interrupt-cells = <1>;
+        };
+};
+
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins_a>;
+        status = "disabled";
+};
+
+&i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2_pins_a>;
+        status = "disabled";
+};
+
+&lradc {
+        vref-supply = <&reg_ldo2>;
+        status = "okay";
+
+        button@984 {
+                label = "Home";
+                linux,code = <KEY_HOMEPAGE>;
+                channel = <0>;
+                voltage = <984126>;
+        };
+};
+
+&mmc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins_a>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        broken-cd;
+        status = "okay";
+};
+
+&mmc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_4bit_pins_a>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        broken-cd;
+        status = "okay";
+};
+
+&ohci0 {
+        status = "okay";
+};
+
+&otg_sram {
+        status = "okay";
+};
+
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1500000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+        regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-name = "csi-1.8v";
+};
+
+&reg_ldo4 {
+        regulator-min-microvolt = <2800000>;
+        regulator-max-microvolt = <2800000>;
+        regulator-name = "csi-2.8v";
+};
+
+&reg_usb0_vbus {
+        gpio = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins_b>;
+        status = "okay";
+};
+
+&usb_otg {
+        dr_mode = "otg";
+        status = "okay";
+};
+
+&usbphy {
+        pinctrl-names = "default";
+        usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+        usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+        usb0_vbus-supply = <&reg_usb0_vbus>;
+        usb1_vbus-supply = <&reg_vcc5v0>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
index 081329e2b80b..60e393e28783 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
@@ -115,45 +115,37 @@
 
 &pio {
         mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
-                allwinner,pins = "PG0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG0";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_olinuxinom: led_pins@0 {
-                allwinner,pins = "PG9";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG9";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG2";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-down;
         };
 
         usb0_vbus_pin_olinuxinom: usb0_vbus_pin@0 {
-                allwinner,pins = "PG12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG12";
+                function = "gpio_out";
         };
 
         usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 {
-                allwinner,pins = "PG11";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG11";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index bb7210e0e4a9..940d47e88056 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -206,38 +206,32 @@
 
 &pio {
         mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
-                allwinner,pins = "PG0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG0";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_olinuxino: led_pins@0 {
-                allwinner,pins = "PG9";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG9";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG2";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-down;
         };
 
         usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 {
-                allwinner,pins = "PG11";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG11";
+                function = "gpio_out";
         };
 };
 
@@ -277,7 +271,7 @@
 };
 
 &usb0_vbus_pin_a {
-        allwinner,pins = "PG12";
+        pins = "PG12";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
index 3d7ff10a48e9..bfdd38d6bfcc 100644
--- a/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
@@ -80,7 +80,7 @@
 };
 
 &codec_pa_pin {
-        allwinner,pins = "PG3";
+        pins = "PG3";
 };
 
 &mmc2 {
@@ -100,10 +100,9 @@
 
 &pio {
         i2c_lcd_pins: i2c_lcd_pin@0 {
-                allwinner,pins = "PG10", "PG12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG10", "PG12";
+                function = "gpio_out";
+                bias-pull-up;
         };
 };
 
@@ -131,5 +130,5 @@
 };
 
 &usb0_vbus_pin_a {
-        allwinner,pins = "PB4";
+        pins = "PB4";
 };
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index a17ba0243db3..4131ab44558b 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -350,26 +350,20 @@
         compatible = "allwinner,sun5i-a13-pinctrl";
 
         lcd_rgb666_pins: lcd_rgb666@0 {
-                allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
-                                 "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
-                                 "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
-                                 "PD24", "PD25", "PD26", "PD27";
-                allwinner,function = "lcd0";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+                       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+                       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
+                       "PD24", "PD25", "PD26", "PD27";
+                function = "lcd0";
         };
 
         uart1_pins_a: uart1@0 {
-                allwinner,pins = "PE10", "PE11";
-                allwinner,function = "uart1";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PE10", "PE11";
+                function = "uart1";
         };
 
         uart1_pins_b: uart1@1 {
-                allwinner,pins = "PG3", "PG4";
-                allwinner,function = "uart1";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG3", "PG4";
+                function = "uart1";
         };
 };
diff --git a/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts b/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
index 92a2dc6250a5..0cf0813d363a 100644
--- a/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
+++ b/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
@@ -159,17 +159,13 @@
 
 &pio {
         usb0_id_pin_chip_pro: usb0-id-pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG2";
+                function = "gpio_in";
         };
 
         wifi_reg_on_pin_chip_pro: wifi-reg-on-pin@0 {
-                allwinner,pins = "PB10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB10";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-gr8-evb.dts b/arch/arm/boot/dts/sun5i-gr8-evb.dts
index 030605aa8065..1a845af4d4db 100644
--- a/arch/arm/boot/dts/sun5i-gr8-evb.dts
+++ b/arch/arm/boot/dts/sun5i-gr8-evb.dts
@@ -259,31 +259,23 @@
 
 &pio {
         mmc0_cd_pin_gr8_evb: mmc0-cd-pin@0 {
-                allwinner,pins = "PG0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG0";
+                function = "gpio_in";
         };
 
         usb0_id_pin_gr8_evb: usb0-id-pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG2";
+                function = "gpio_in";
         };
 
         usb0_vbus_det_pin_gr8_evb: usb0-vbus-det-pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG1";
+                function = "gpio_in";
         };
 
         usb1_vbus_pin_gr8_evb: usb1-vbus-pin@0 {
-                allwinner,pins = "PG13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG13";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-gr8.dtsi b/arch/arm/boot/dts/sun5i-gr8.dtsi
index ea86d4d58db6..f83ae3fc6329 100644
--- a/arch/arm/boot/dts/sun5i-gr8.dtsi
+++ b/arch/arm/boot/dts/sun5i-gr8.dtsi
@@ -764,150 +764,112 @@
                         #gpio-cells = <3>;
 
                         i2c0_pins_a: i2c0@0 {
-                                allwinner,pins = "PB0", "PB1";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB0", "PB1";
+                                function = "i2c0";
                         };
 
                         i2c1_pins_a: i2c1@0 {
-                                allwinner,pins = "PB15", "PB16";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB15", "PB16";
+                                function = "i2c1";
                         };
 
                         i2c2_pins_a: i2c2@0 {
-                                allwinner,pins = "PB17", "PB18";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB17", "PB18";
+                                function = "i2c2";
                         };
 
                         i2s0_data_pins_a: i2s0-data@0 {
-                                allwinner,pins = "PB6", "PB7", "PB8", "PB9";
-                                allwinner,function = "i2s0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB6", "PB7", "PB8", "PB9";
+                                function = "i2s0";
                         };
 
                         i2s0_mclk_pins_a: i2s0-mclk@0 {
-                                allwinner,pins = "PB5";
-                                allwinner,function = "i2s0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB5";
+                                function = "i2s0";
                         };
 
                         ir0_rx_pins_a: ir0@0 {
-                                allwinner,pins = "PB4";
-                                allwinner,function = "ir0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB4";
+                                function = "ir0";
                         };
 
                         lcd_rgb666_pins: lcd-rgb666@0 {
-                                allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+                                pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
                                                  "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
                                                  "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
                                                  "PD24", "PD25", "PD26", "PD27";
-                                allwinner,function = "lcd0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "lcd0";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2", "PF3",
+                                pins = "PF0", "PF1", "PF2", "PF3",
                                                  "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "mmc0";
+                                drive-strength = <30>;
                         };
 
                         nand_pins_a: nand-base0@0 {
-                                allwinner,pins = "PC0", "PC1", "PC2",
+                                pins = "PC0", "PC1", "PC2",
                                                 "PC5", "PC8", "PC9", "PC10",
                                                 "PC11", "PC12", "PC13", "PC14",
                                                 "PC15";
-                                allwinner,function = "nand0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "nand0";
                         };
 
                         nand_cs0_pins_a: nand-cs@0 {
-                                allwinner,pins = "PC4";
-                                allwinner,function = "nand0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC4";
+                                function = "nand0";
                         };
 
                         nand_rb0_pins_a: nand-rb@0 {
-                                allwinner,pins = "PC6";
-                                allwinner,function = "nand0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC6";
+                                function = "nand0";
                         };
 
                         pwm0_pins_a: pwm0@0 {
-                                allwinner,pins = "PB2";
-                                allwinner,function = "pwm0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB2";
+                                function = "pwm0";
                         };
 
                         pwm1_pins: pwm1 {
-                                allwinner,pins = "PG13";
-                                allwinner,function = "pwm1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG13";
+                                function = "pwm1";
                         };
 
                         spdif_tx_pins_a: spdif@0 {
-                                allwinner,pins = "PB10";
-                                allwinner,function = "spdif";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PB10";
+                                function = "spdif";
+                                bias-pull-up;
                         };
 
                         uart1_pins_a: uart1@1 {
-                                allwinner,pins = "PG3", "PG4";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG3", "PG4";
+                                function = "uart1";
                         };
 
                         uart1_cts_rts_pins_a: uart1-cts-rts@0 {
-                                allwinner,pins = "PG5", "PG6";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG5", "PG6";
+                                function = "uart1";
                         };
 
                         uart2_pins_a: uart2@1 {
-                                allwinner,pins = "PD2", "PD3";
-                                allwinner,function = "uart2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PD2", "PD3";
+                                function = "uart2";
                         };
 
                         uart2_cts_rts_pins_a: uart2-cts-rts@0 {
-                                allwinner,pins = "PD4", "PD5";
-                                allwinner,function = "uart2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PD4", "PD5";
+                                function = "uart2";
                         };
 
                         uart3_pins_a: uart3@1 {
-                                allwinner,pins = "PG9", "PG10";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG9", "PG10";
+                                function = "uart3";
                         };
 
                         uart3_cts_rts_pins_a: uart3-cts-rts@0 {
-                                allwinner,pins = "PG11", "PG12";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG11", "PG12";
+                                function = "uart3";
                         };
                 };
 
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts
index c6da5ad37152..e86fa46fdd45 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -154,7 +154,7 @@
 };
 
 &mmc0_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc0 {
@@ -177,31 +177,24 @@
 
 &pio {
         chip_vbus_pin: chip_vbus_pin@0 {
-                allwinner,pins = "PB10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB10";
+                function = "gpio_out";
         };
 
         chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {
-                allwinner,pins = "PC19";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC19";
+                function = "gpio_out";
         };
 
         chip_id_det_pin: chip_id_det_pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG2";
+                function = "gpio_in";
         };
 
         chip_w1_pin: chip_w1_pin@0 {
-                allwinner,pins = "PD2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PD2";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
index 82f87cdcd164..8a4d2277826f 100644
--- a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
@@ -130,17 +130,14 @@
 
 &pio {
         codec_pa_pin: codec_pa_pin@0 {
-                allwinner,pins = "PG10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG10";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin: mmc0_cd_pin@0 {
-                allwinner,pins = "PG0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG0";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         ts_power_pin: ts_power_pin {
@@ -151,24 +148,20 @@
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PG1";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PG1";
+                function = "gpio_in";
+                bias-pull-down;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PG2";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PG2";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_pin_a: usb0_vbus_pin@0 {
-                allwinner,pins = "PG12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG12";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index b0fca4ef4dae..c058d37d5433 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -555,86 +555,76 @@
                         #gpio-cells = <3>;
 
                         i2c0_pins_a: i2c0@0 {
-                                allwinner,pins = "PB0", "PB1";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB0", "PB1";
+                                function = "i2c0";
                         };
 
                         i2c1_pins_a: i2c1@0 {
-                                allwinner,pins = "PB15", "PB16";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB15", "PB16";
+                                function = "i2c1";
                         };
 
                         i2c2_pins_a: i2c2@0 {
-                                allwinner,pins = "PB17", "PB18";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB17", "PB18";
+                                function = "i2c2";
                         };
 
                         lcd_rgb565_pins: lcd_rgb565@0 {
-                                allwinner,pins = "PD3", "PD4", "PD5", "PD6", "PD7",
+                                pins = "PD3", "PD4", "PD5", "PD6", "PD7",
                                                  "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
                                                  "PD19", "PD20", "PD21", "PD22", "PD23",
                                                  "PD24", "PD25", "PD26", "PD27";
-                                allwinner,function = "lcd0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "lcd0";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2", "PF3",
-                                                 "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1", "PF2", "PF3",
+                                       "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc2_pins_a: mmc2@0 {
-                                allwinner,pins = "PC6", "PC7", "PC8", "PC9",
-                                        "PC10", "PC11", "PC12", "PC13",
-                                        "PC14", "PC15";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PC6", "PC7", "PC8", "PC9",
+                                       "PC10", "PC11", "PC12", "PC13",
+                                       "PC14", "PC15";
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
+                        };
+
+                        mmc2_4bit_pins_a: mmc2-4bit@0 {
+                                pins = "PC6", "PC7", "PC8", "PC9",
+                                       "PC10", "PC11";
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         spi2_pins_a: spi2@0 {
-                                allwinner,pins = "PE1", "PE2", "PE3";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PE1", "PE2", "PE3";
+                                function = "spi2";
                         };
 
                         spi2_cs0_pins_a: spi2-cs0@0 {
-                                allwinner,pins = "PE0";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PE0";
+                                function = "spi2";
                         };
 
                         uart3_pins_a: uart3@0 {
-                                allwinner,pins = "PG9", "PG10";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG9", "PG10";
+                                function = "uart3";
                         };
 
                         uart3_pins_cts_rts_a: uart3-cts-rts@0 {
-                                allwinner,pins = "PG11", "PG12";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG11", "PG12";
+                                function = "uart3";
                         };
 
                         pwm0_pins: pwm0 {
-                                allwinner,pins = "PB2";
-                                allwinner,function = "pwm";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB2";
+                                function = "pwm";
                         };
                 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
index 2f8cfab771e2..effbdc766938 100644
--- a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
+++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
@@ -68,10 +68,8 @@
 
 &pio {
         usb1_vbus_pin_a: usb1_vbus_pin@0 {
-                allwinner,pins = "PH27";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH27";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts
index f9cf36888d93..f5ececd45bc0 100644
--- a/arch/arm/boot/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts
@@ -124,29 +124,25 @@
 };
 
 &mmc0_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &pio {
         mmc0_cd_pin_colombus: mmc0_cd_pin@0 {
-                allwinner,pins = "PA8";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA8";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb2_vbus_pin_colombus: usb2_vbus_pin@0 {
-                allwinner,pins = "PH24";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24";
+                function = "gpio_out";
         };
 
         i2c_lcd_pins: i2c_lcd_pin@0 {
-                allwinner,pins = "PA23", "PA24";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA23", "PA24";
+                function = "gpio_out";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 7cae328398b1..f094eeb6c499 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -205,7 +205,7 @@
 
 &mmc0_pins_a {
         /* external pull-ups missing for some pins */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc1 {
@@ -224,24 +224,19 @@
 
 &pio {
         gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin@0 {
-                allwinner,pins = "PA21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA21";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 {
-                allwinner,pins = "PA8";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA8";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         wifi_reset_pin_hummingbird: wifi_reset_pin@0 {
-                allwinner,pins = "PG10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG10";
+                function = "gpio_out";
         };
 };
 
@@ -253,6 +248,7 @@
                 reg = <0x68>;
                 interrupt-parent = <&nmi_intc>;
                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+                x-powers,drive-vbus-en;
         };
 };
 
@@ -311,6 +307,11 @@
         regulator-name = "vcc-dram";
 };
 
+&reg_drivevbus {
+        regulator-name = "usb0-vbus";
+        status = "okay";
+};
+
 &reg_usb1_vbus {
         gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */
         status = "okay";
@@ -335,12 +336,25 @@
         status = "okay";
 };
 
+&usb_otg {
+        dr_mode = "otg";
+        status = "okay";
+};
+
+&usb_power_supply {
+        status = "okay";
+};
+
 &usb1_vbus_pin_a {
         /* different pin from sunxi-common-regulators */
-        allwinner,pins = "PH24";
+        pins = "PH24";
 };
 
 &usbphy {
+        usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+        usb0_vbus_det-gpio = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
+        usb0_vbus_power-supply = <&usb_power_supply>;
+        usb0_vbus-supply = <&reg_drivevbus>;
         usb1_vbus-supply = <&reg_usb1_vbus>;
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun6i-a31-i7.dts b/arch/arm/boot/dts/sun6i-a31-i7.dts
index e9185dad67ee..2bc57d2dcd80 100644
--- a/arch/arm/boot/dts/sun6i-a31-i7.dts
+++ b/arch/arm/boot/dts/sun6i-a31-i7.dts
@@ -69,6 +69,29 @@
                         gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
                 };
         };
+
+        sound {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "On-board SPDIF";
+                simple-audio-card,cpu {
+                        sound-dai = <&spdif>;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&spdif_out>;
+                };
+        };
+
+        spdif_out: spdif-out {
+                #sound-dai-cells = <0>;
+                compatible = "linux,spdif-dit";
+        };
+};
+
+&codec {
+        allwinner,audio-routing =
+                "Headphone", "HP";
+        status = "okay";
 };
 
 &ehci0 {
@@ -109,24 +132,19 @@
 
 &pio {
         led_pins_i7: led_pins@0 {
-                allwinner,pins = "PH13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH13";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_i7: mmc0_cd_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH22";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_i7: usb1_vbus_pin@0 {
-                allwinner,pins = "PC27";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC27";
+                function = "gpio_out";
         };
 };
 
@@ -137,6 +155,13 @@
         status = "okay";
 };
 
+&spdif {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spdif_pins_a>;
+        spdif-out = "okay";
+        status = "okay";
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 29016a13a2c1..8af5b667a46d 100644
--- a/arch/arm/boot/dts/sun6i-a31-m9.dts
+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts
@@ -128,24 +128,19 @@
 
 &pio {
         led_pins_m9: led_pins@0 {
-                allwinner,pins = "PH13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH13";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_m9: mmc0_cd_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH22";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_m9: usb1_vbus_pin@0 {
-                allwinner,pins = "PC27";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC27";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
index 5faeae429e2a..bf0f5831126f 100644
--- a/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
+++ b/arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -128,24 +128,19 @@
 
 &pio {
         led_pins_m9: led_pins@0 {
-                allwinner,pins = "PH13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH13";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_m9: mmc0_cd_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH22";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_m9: usb1_vbus_pin@0 {
-                allwinner,pins = "PC27";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC27";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index e78faaf9243c..a4b96184cac1 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -480,130 +480,121 @@
                         #gpio-cells = <3>;
 
                         gmac_pins_gmii_a: gmac_gmii@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2", "PA3",
+                                pins = "PA0", "PA1", "PA2", "PA3",
                                                 "PA4", "PA5", "PA6", "PA7",
                                                 "PA8", "PA9", "PA10", "PA11",
                                                 "PA12", "PA13", "PA14", "PA15",
                                                 "PA16", "PA17", "PA18", "PA19",
                                                 "PA20", "PA21", "PA22", "PA23",
                                                 "PA24", "PA25", "PA26", "PA27";
-                                allwinner,function = "gmac";
+                                function = "gmac";
                                 /*
                                  * data lines in GMII mode run at 125MHz and
                                  * might need a higher signal drive strength
                                  */
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                drive-strength = <30>;
                         };
 
                         gmac_pins_mii_a: gmac_mii@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2", "PA3",
+                                pins = "PA0", "PA1", "PA2", "PA3",
                                                 "PA8", "PA9", "PA11",
                                                 "PA12", "PA13", "PA14", "PA19",
                                                 "PA20", "PA21", "PA22", "PA23",
                                                 "PA24", "PA26", "PA27";
-                                allwinner,function = "gmac";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "gmac";
                         };
 
                         gmac_pins_rgmii_a: gmac_rgmii@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2", "PA3",
+                                pins = "PA0", "PA1", "PA2", "PA3",
                                                 "PA9", "PA10", "PA11",
                                                 "PA12", "PA13", "PA14", "PA19",
                                                 "PA20", "PA25", "PA26", "PA27";
-                                allwinner,function = "gmac";
+                                function = "gmac";
                                 /*
                                  * data lines in RGMII mode use DDR mode
                                  * and need a higher signal drive strength
                                  */
-                                allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                drive-strength = <40>;
                         };
 
                         i2c0_pins_a: i2c0@0 {
-                                allwinner,pins = "PH14", "PH15";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH14", "PH15";
+                                function = "i2c0";
                         };
 
                         i2c1_pins_a: i2c1@0 {
-                                allwinner,pins = "PH16", "PH17";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH16", "PH17";
+                                function = "i2c1";
                         };
 
                         i2c2_pins_a: i2c2@0 {
-                                allwinner,pins = "PH18", "PH19";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH18", "PH19";
+                                function = "i2c2";
                         };
 
                         lcd0_rgb888_pins: lcd0_rgb888 {
-                                allwinner,pins = "PD0", "PD1", "PD2", "PD3",
+                                pins = "PD0", "PD1", "PD2", "PD3",
                                                  "PD4", "PD5", "PD6", "PD7",
                                                  "PD8", "PD9", "PD10", "PD11",
                                                  "PD12", "PD13", "PD14", "PD15",
                                                  "PD16", "PD17", "PD18", "PD19",
                                                  "PD20", "PD21", "PD22", "PD23",
                                                  "PD24", "PD25", "PD26", "PD27";
-                                allwinner,function = "lcd0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "lcd0";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2",
+                                pins = "PF0", "PF1", "PF2",
                                                  "PF3", "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc1_pins_a: mmc1@0 {
-                                allwinner,pins = "PG0", "PG1", "PG2", "PG3",
+                                pins = "PG0", "PG1", "PG2", "PG3",
                                                  "PG4", "PG5";
-                                allwinner,function = "mmc1";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "mmc1";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc2_pins_a: mmc2@0 {
-                                allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+                                pins = "PC6", "PC7", "PC8", "PC9",
                                                  "PC10", "PC11";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc2_8bit_emmc_pins: mmc2@1 {
-                                allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+                                pins = "PC6", "PC7", "PC8", "PC9",
                                                  "PC10", "PC11", "PC12",
                                                  "PC13", "PC14", "PC15",
                                                  "PC24";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc3_8bit_emmc_pins: mmc3@1 {
-                                allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+                                pins = "PC6", "PC7", "PC8", "PC9",
                                                  "PC10", "PC11", "PC12",
                                                  "PC13", "PC14", "PC15",
                                                  "PC24";
-                                allwinner,function = "mmc3";
-                                allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "mmc3";
+                                drive-strength = <40>;
+                                bias-pull-up;
+                        };
+
+                        spdif_pins_a: spdif@0 {
+                                pins = "PH28";
+                                function = "spdif";
                         };
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PH20", "PH21";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH20", "PH21";
+                                function = "uart0";
                         };
                 };
 
@@ -623,6 +614,19 @@
                         reg = <0x01c20ca0 0x20>;
                 };
 
+                spdif: spdif@01c21000 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun6i-a31-spdif";
+                        reg = <0x01c21000 0x400>;
+                        interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_APB1_SPDIF>, <&ccu CLK_SPDIF>;
+                        resets = <&ccu RST_APB1_SPDIF>;
+                        clock-names = "apb", "spdif";
+                        dmas = <&dma 2>, <&dma 2>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
                 lradc: lradc@01c22800 {
                         compatible = "allwinner,sun4i-a10-lradc-keys";
                         reg = <0x01c22800 0x100>;
@@ -862,7 +866,7 @@
                 gic: interrupt-controller@01c81000 {
                         compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c81000 0x1000>,
-                              <0x01c82000 0x1000>,
+                              <0x01c82000 0x2000>,
                               <0x01c84000 0x2000>,
                               <0x01c86000 0x2000>;
                         interrupt-controller;
@@ -1076,17 +1080,13 @@
                         #gpio-cells = <3>;
 
                         ir_pins_a: ir@0 {
-                                allwinner,pins = "PL4";
-                                allwinner,function = "s_ir";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PL4";
+                                function = "s_ir";
                         };
 
                         p2wi_pins: p2wi {
-                                allwinner,pins = "PL0", "PL1";
-                                allwinner,function = "s_p2wi";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PL0", "PL1";
+                                function = "s_p2wi";
                         };
                 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
index 73c133f5e79c..2238eda318f6 100644
--- a/arch/arm/boot/dts/sun6i-a31s-primo81.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-primo81.dts
@@ -134,24 +134,20 @@
 
 &pio {
         gt911_int_primo81: gt911_int_pin@0 {
-                allwinner,pins = "PA3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA3";
+                function = "gpio_in";
         };
 
         mma8452_int_primo81: mma8452_int_pin@0 {
-                allwinner,pins = "PA9";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA9";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc0_cd_pin_primo81: mmc0_cd_pin@0 {
-                allwinner,pins = "PA8";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA8";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
index c35ec112f5a0..7ff68bdd7109 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
@@ -136,17 +136,14 @@
 
 &pio {
         led_pin_sina31s: led_pin@0 {
-                allwinner,pins = "PH13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH13";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_sina31s: mmc0_cd_pin@0 {
-                allwinner,pins = "PA4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -156,6 +153,11 @@
         regulator-name = "vcc-gmac-phy";
 };
 
+&usb_otg {
+        dr_mode = "peripheral";
+        status = "okay";
+};
+
 &usbphy {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index db7fa13f5425..3bd862bf82a9 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -122,7 +122,7 @@
 };
 
 &mmc0_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc2 {
@@ -144,7 +144,7 @@
 };
 
 &mmc2_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &ohci0 {
@@ -153,33 +153,26 @@
 
 &pio {
         gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin@0 {
-                allwinner,pins = "PA21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA21";
+                function = "gpio_out";
         };
 
         led_pins_bpi_m2: led_pins@0 {
-                allwinner,pins = "PG5", "PG10", "PG11";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG5", "PG10", "PG11";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_bpi_m2: mmc0_cd_pin@0 {
-                allwinner,pins = "PA4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
 &r_pio {
         mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin@0 {
-                allwinner,pins = "PL8";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL8";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
index d6ad6196a768..154ebf5082ed 100644
--- a/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
@@ -92,10 +92,9 @@
 
 &pio {
         mmc0_cd_pin_bs1078v2: mmc0_cd_pin@0 {
-                allwinner,pins = "PA8";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA8";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -110,7 +109,7 @@
 };
 
 &mmc0_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &p2wi {
diff --git a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
index 0c434304e040..edaba5f904fd 100644
--- a/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
@@ -77,17 +77,15 @@
 
 &pio {
         mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 {
-                allwinner,pins = "PA8";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA8";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PA15";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PA15";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
index 532f1a160560..08e776ae095a 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -183,7 +183,7 @@
 
 &mmc3_pins_a {
         /* AP6210 requires pull-up */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &ohci0 {
@@ -200,31 +200,24 @@
 
 &pio {
         gmac_power_pin_bpi_m1p: gmac_power_pin@0 {
-                allwinner,pins = "PH23";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH23";
+                function = "gpio_out";
         };
 
         led_pins_bpi_m1p: led_pins@0 {
-                allwinner,pins = "PH24", "PH25";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24", "PH25";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_bpi_m1p: mmc0_cd_pin@0 {
-                allwinner,pins = "PH10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH22";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 67c8a7644b99..91f2e5f9efcb 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -179,31 +179,25 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc0_cd_pin_bananapi: mmc0_cd_pin@0 {
-                allwinner,pins = "PH10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         gmac_power_pin_bananapi: gmac_power_pin@0 {
-                allwinner,pins = "PH23";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH23";
+                function = "gpio_out";
         };
 
         led_pins_bananapi: led_pins@0 {
-                allwinner,pins = "PH24";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 18fcc87f4621..83516bc81225 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -76,6 +76,13 @@
                 };
         };
 
+        wifi_pwrseq: wifi-pwrseq {
+                compatible = "mmc-pwrseq-simple";
+                pinctrl-names = "default";
+                pinctrl-0 = <&vmmc3_pin_bananapro>;
+                reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>;
+        };
+
         reg_gmac_3v3: gmac-3v3 {
                 compatible = "regulator-fixed";
                 pinctrl-names = "default";
@@ -87,23 +94,16 @@
                 enable-active-high;
                 gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>;
         };
-
-        reg_vmmc3: vmmc3 {
-                compatible = "regulator-fixed";
-                pinctrl-names = "default";
-                pinctrl-0 = <&vmmc3_pin_bananapro>;
-                regulator-name = "vmmc3";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-                enable-active-high;
-                gpio = <&pio 7 22 GPIO_ACTIVE_HIGH>;
-        };
 };
 
 &ahci {
         status = "okay";
 };
 
+&codec {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
@@ -166,10 +166,19 @@
 &mmc3 {
         pinctrl-names = "default";
         pinctrl-0 = <&mmc3_pins_a>;
-        vmmc-supply = <&reg_vmmc3>;
+        vmmc-supply = <&reg_vcc3v3>;
+        mmc-pwrseq = <&wifi_pwrseq>;
         bus-width = <4>;
         non-removable;
         status = "okay";
+
+        brcmf: bcrmf@1 {
+                reg = <1>;
+                compatible = "brcm,bcm4329-fmac";
+                interrupt-parent = <&pio>;
+                interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+                interrupt-names = "host-wake";
+        };
 };
 
 &ohci0 {
@@ -182,45 +191,34 @@
 
 &pio {
         gmac_power_pin_bananapro: gmac_power_pin@0 {
-                allwinner,pins = "PH23";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH23";
+                function = "gpio_out";
         };
 
         led_pins_bananapro: led_pins@0 {
-                allwinner,pins = "PH24", "PG2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24", "PG2";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_bananapro: mmc0_cd_pin@0 {
-                allwinner,pins = "PH10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {
-                allwinner,pins = "PH0";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH0";
+                function = "gpio_out";
         };
 
         usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {
-                allwinner,pins = "PH1";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH1";
+                function = "gpio_out";
         };
 
         vmmc3_pin_bananapro: vmmc3_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH22";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 1fa832d7b469..4dc1e10f88c4 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -160,17 +160,14 @@
 
 &pio {
         led_pins_cubieboard2: led_pins@0 {
-                allwinner,pins = "PH20", "PH21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH20", "PH21";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 83f39b0362cb..f019aa3fe96d 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -207,7 +207,7 @@
 
 &mmc3_pins_a {
         /* AP6210 requires pull-up */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &ohci0 {
@@ -224,45 +224,33 @@
 
 &pio {
         ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {
-                allwinner,pins = "PH12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH12";
+                function = "gpio_out";
         };
 
         led_pins_cubietruck: led_pins@0 {
-                allwinner,pins = "PH7", "PH11", "PH20", "PH21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH7", "PH11", "PH20", "PH21";
+                function = "gpio_out";
         };
 
         mmc3_pwrseq_pin_cubietruck: mmc3_pwrseq_pin@0 {
-                allwinner,pins = "PH9";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH9";
+                function = "gpio_out";
         };
 
         usb0_vbus_pin_a: usb0_vbus_pin@0 {
-                allwinner,pins = "PH17";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH17";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH19";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH19";
+                function = "gpio_in";
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH22";
+                function = "gpio_in";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
index 37f4a5497452..e921ba42f170 100644
--- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts
@@ -188,31 +188,23 @@
 
 &pio {
         ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin@0 {
-                allwinner,pins = "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15";
+                function = "gpio_out";
         };
 
         usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
         };
 
         mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin@0 {
-                allwinner,pins = "PH9";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH9";
+                function = "gpio_out";
         };
 
         gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin@0 {
-                allwinner,pins = "PH16";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH16";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
index 1e6bd360dac0..385fd8232ae0 100644
--- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
+++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
@@ -185,7 +185,7 @@
 
 &mmc3_pins_a {
         /* AP6210 / AP6330 requires pull-up */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &ohci0 {
@@ -198,31 +198,23 @@
 
 &pio {
         vmmc3_pin_i12_tvbox: vmmc3_pin@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
         };
 
         vmmc3_io_pin_i12_tvbox: vmmc3_io_pin@0 {
-                allwinner,pins = "PH12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH12";
+                function = "gpio_out";
         };
 
         gmac_power_pin_i12_tvbox: gmac_power_pin@0 {
-                allwinner,pins = "PH21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH21";
+                function = "gpio_out";
         };
 
         led_pins_i12_tvbox: led_pins@0 {
-                allwinner,pins = "PH9", "PH20";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH9", "PH20";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
index 10d48cbf81ff..d52222c82cb8 100644
--- a/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
+++ b/arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
@@ -131,10 +131,9 @@
 
 &pio {
         led_pins_itead_core: led_pins@0 {
-                allwinner,pins = "PH20","PH21";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH20","PH21";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
index 73c05dab0a69..72ec0d5ae052 100644
--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
+++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
@@ -87,7 +87,7 @@
 };
 
 &ahci_pwr_pin_a {
-        allwinner,pins = "PB3";
+        pins = "PB3";
 };
 
 &ahci {
@@ -222,31 +222,25 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc0_cd_pin_lamobo_r1: mmc0_cd_pin@0 {
-                allwinner,pins = "PH10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         gmac_power_pin_lamobo_r1: gmac_power_pin@0 {
-                allwinner,pins = "PH23";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH23";
+                function = "gpio_out";
         };
 
         led_pins_lamobo_r1: led_pins@0 {
-                allwinner,pins = "PH24";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24";
+                function = "gpio_out";
         };
 };
 
@@ -327,7 +321,7 @@
 };
 
 &usb2_vbus_pin_a {
-        allwinner,pins = "PH12";
+        pins = "PH12";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts
index 8d9ea48dd98c..0e074bd0e8c9 100644
--- a/arch/arm/boot/dts/sun7i-a20-m3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-m3.dts
@@ -145,10 +145,8 @@
 
 &pio {
         led_pins_m3: led_pins@0 {
-                allwinner,pins = "PH20";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH20";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-mk808c.dts b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
index 90ff4a267025..97d7a8b65a03 100644
--- a/arch/arm/boot/dts/sun7i-a20-mk808c.dts
+++ b/arch/arm/boot/dts/sun7i-a20-mk808c.dts
@@ -132,17 +132,13 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH4";
+                function = "gpio_in";
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH5";
+                function = "gpio_in";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index 134e0c1b129d..a1450c10b08e 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -120,6 +120,18 @@
         };
 };
 
+&i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins_a>;
+        status = "okay";
+};
+
+&i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2_pins_a>;
+        status = "okay";
+};
+
 &lradc {
         vref-supply = <&reg_vcc3v0>;
         status = "okay";
@@ -208,38 +220,30 @@
 
 &pio {
         ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin@1 {
-                allwinner,pins = "PC3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC3";
+                function = "gpio_out";
         };
 
         led_pins_olimex_som_evb: led_pins@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin@0 {
-                allwinner,pins = "PH0";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH0";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH4";
+                function = "gpio_in";
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH5";
+                function = "gpio_in";
         };
 };
 
@@ -288,12 +292,38 @@
         status = "okay";
 };
 
+&spi1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi1_pins_a>,
+                    <&spi1_cs0_pins_a>;
+        status = "okay";
+};
+
+&spi2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spi2_pins_a>,
+                    <&spi2_cs0_pins_a>;
+        status = "okay";
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_a>;
         status = "okay";
 };
 
+&uart6 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart6_pins_a>;
+        status = "okay";
+};
+
+&uart7 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart7_pins_a>;
+        status = "okay";
+};
+
 &usb_otg {
         dr_mode = "otg";
         status = "okay";
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
index 35ad7006c53c..1297432c2802 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
@@ -153,31 +153,26 @@
 
 &pio {
         ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
-                allwinner,pins = "PC3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC3";
+                function = "gpio_out";
         };
 
         led_pins_olinuxinolime: led_pins@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
index 10d307408f23..81f376f2a44d 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
@@ -57,10 +57,8 @@
 
 &pio {
         mmc2_pins_nrst: mmc2-rst-pin {
-                allwinner,pins = "PC16";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC16";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index d5c796c8d16f..71cca5360728 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -112,57 +112,9 @@
         status = "okay";
 
         axp209: pmic@34 {
-                compatible = "x-powers,axp209";
                 reg = <0x34>;
                 interrupt-parent = <&nmi_intc>;
                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
-                interrupt-controller;
-                #interrupt-cells = <1>;
-
-                acin-supply = <&reg_axp_ipsout>;
-                vin2-supply = <&reg_axp_ipsout>;
-                vin3-supply = <&reg_axp_ipsout>;
-                ldo24in-supply = <&reg_axp_ipsout>;
-                ldo3in-supply = <&reg_axp_ipsout>;
-
-                regulators {
-                        vdd_rtc: ldo1 {
-                                regulator-min-microvolt = <1300000>;
-                                regulator-max-microvolt = <1300000>;
-                                regulator-always-on;
-                        };
-
-                        avcc: ldo2 {
-                                regulator-min-microvolt = <1800000>;
-                                regulator-max-microvolt = <3300000>;
-                                regulator-always-on;
-                        };
-
-                        vcc_csi0: ldo3 {
-                                regulator-min-microvolt = <700000>;
-                                regulator-max-microvolt = <3500000>;
-                                regulator-always-on;
-                        };
-
-                        vcc_csi1: ldo4 {
-                                regulator-min-microvolt = <1250000>;
-                                regulator-max-microvolt = <3300000>;
-                                regulator-always-on;
-                        };
-
-                        vdd_cpu: dcdc2 {
-                                regulator-min-microvolt = <700000>;
-                                regulator-max-microvolt = <2275000>;
-                                regulator-always-on;
-                        };
-
-                        vdd_int: dcdc3 {
-                                regulator-min-microvolt = <700000>;
-                                regulator-max-microvolt = <3500000>;
-                                regulator-always-on;
-                        };
-                };
         };
 };
 
@@ -202,38 +154,31 @@
 
 &pio {
         ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
-                allwinner,pins = "PC3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC3";
+                function = "gpio_out";
         };
 
         led_pins_olinuxinolime: led_pins@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 
         usb0_vbus_pin_lime2: usb0_vbus_pin@0 {
-                allwinner,pins = "PC17";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PC17";
+                function = "gpio_out";
         };
 };
 
@@ -243,6 +188,48 @@
         status = "okay";
 };
 
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+        regulator-always-on;
+        regulator-min-microvolt = <1000000>;
+        regulator-max-microvolt = <1400000>;
+        regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+        regulator-always-on;
+        regulator-min-microvolt = <1300000>;
+        regulator-max-microvolt = <1300000>;
+        regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+        regulator-always-on;
+        regulator-min-microvolt = <3000000>;
+        regulator-max-microvolt = <3000000>;
+        regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+        regulator-min-microvolt = <2800000>;
+        regulator-max-microvolt = <2800000>;
+        regulator-name = "vddio-csi0";
+};
+
+&reg_ldo4 {
+        regulator-min-microvolt = <2800000>;
+        regulator-max-microvolt = <2800000>;
+        regulator-name = "vddio-csi1";
+};
+
 &reg_usb0_vbus {
         pinctrl-0 = <&usb0_vbus_pin_lime2>;
         gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 7e3006f6a775..223fbd9f7c62 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -227,31 +227,27 @@
 
 &pio {
         mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
-                allwinner,pins = "PH11";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH11";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_olinuxino: led_pins@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+                pins = "PH5";
+                function = "gpio_in";
+                bias-pull-down;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 2be04c438b1e..a74265749227 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -166,52 +166,41 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {
-                allwinner,pins = "PH10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc3_cd_pin_orangepi: mmc3_cd_pin@0 {
-                allwinner,pins = "PH11";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH11";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH22";
+                function = "gpio_out";
         };
 
         gmac_power_pin_orangepi: gmac_power_pin@0 {
-                allwinner,pins = "PH23";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH23";
+                function = "gpio_out";
         };
 
         led_pins_orangepi: led_pins@0 {
-                allwinner,pins = "PH24", "PH25";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24", "PH25";
+                function = "gpio_out";
         };
 
         usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {
-                allwinner,pins = "PH26";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH26";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index 71125bf64575..3de980c8f8ff 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -147,45 +147,35 @@
 
 &pio {
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {
-                allwinner,pins = "PH10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb2_vbus_pin_bananapro: usb2_vbus_pin@0 {
-                allwinner,pins = "PH22";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH22";
+                function = "gpio_out";
         };
 
         gmac_power_pin_orangepi: gmac_power_pin@0 {
-                allwinner,pins = "PH23";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH23";
+                function = "gpio_out";
         };
 
         led_pins_orangepi: led_pins@0 {
-                allwinner,pins = "PH24";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH24";
+                function = "gpio_out";
         };
 
         usb1_vbus_pin_bananapro: usb1_vbus_pin@0 {
-                allwinner,pins = "PH26";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH26";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
index ddac7328b852..f47a5c46bc20 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
@@ -152,31 +152,24 @@
 
 &pio {
         ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 {
-                allwinner,pins = "PH2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH2";
+                function = "gpio_out";
         };
 
         led_pins_pcduino3_nano: led_pins@0 {
-                allwinner,pins = "PH16", "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH16", "PH15";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {
-                allwinner,pins = "PD2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PD2";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
index 1a8b39be1d61..4599f98a3aee 100644
--- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts
@@ -108,7 +108,7 @@
 };
 
 &ahci_pwr_pin_a {
-        allwinner,pins = "PH2";
+        pins = "PH2";
 };
 
 &codec {
@@ -183,24 +183,19 @@
 
 &pio {
         led_pins_pcduino3: led_pins@0 {
-                allwinner,pins = "PH15", "PH16";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15", "PH16";
+                function = "gpio_out";
         };
 
         key_pins_pcduino3: key_pins@0 {
-                allwinner,pins = "PH17", "PH18", "PH19";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH17", "PH18", "PH19";
+                function = "gpio_in";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
index 2f6b21adddd9..e19f17177755 100644
--- a/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
@@ -173,31 +173,24 @@
 
 &pio {
         bl_enable_pin: bl_enable_pin@0 {
-                allwinner,pins = "PH7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH7";
+                function = "gpio_out";
         };
 
         codec_pa_pin: codec_pa_pin@0 {
-                allwinner,pins = "PH15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH15";
+                function = "gpio_out";
         };
 
         ts_reset_pin: ts_reset_pin@0 {
-                allwinner,pins = "PB13";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB13";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
index dc31d476ef81..c3078d4f1093 100644
--- a/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
+++ b/arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -160,17 +160,14 @@
 
 &pio {
         vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin@0 {
-                allwinner,pins = "PH9";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH9";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index f7db067b0de0..2db97fc820dd 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -871,6 +871,7 @@
                         status = "disabled";
                         #address-cells = <1>;
                         #size-cells = <0>;
+                        num-cs = <4>;
                 };
 
                 spi1: spi@01c06000 {
@@ -885,6 +886,7 @@
                         status = "disabled";
                         #address-cells = <1>;
                         #size-cells = <0>;
+                        num-cs = <1>;
                 };
 
                 emac: ethernet@01c0b000 {
@@ -1037,6 +1039,7 @@
                         status = "disabled";
                         #address-cells = <1>;
                         #size-cells = <0>;
+                        num-cs = <1>;
                 };
 
                 ahci: sata@01c18000 {
@@ -1079,6 +1082,7 @@
                         status = "disabled";
                         #address-cells = <1>;
                         #size-cells = <0>;
+                        num-cs = <1>;
                 };
 
                 pio: pinctrl@01c20800 {
@@ -1093,302 +1097,231 @@
                         #gpio-cells = <3>;
 
                         clk_out_a_pins_a: clk_out_a@0 {
-                                allwinner,pins = "PI12";
-                                allwinner,function = "clk_out_a";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI12";
+                                function = "clk_out_a";
                         };
 
                         clk_out_b_pins_a: clk_out_b@0 {
-                                allwinner,pins = "PI13";
-                                allwinner,function = "clk_out_b";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI13";
+                                function = "clk_out_b";
                         };
 
                         emac_pins_a: emac0@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2",
-                                                "PA3", "PA4", "PA5", "PA6",
-                                                "PA7", "PA8", "PA9", "PA10",
-                                                "PA11", "PA12", "PA13", "PA14",
-                                                "PA15", "PA16";
-                                allwinner,function = "emac";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA0", "PA1", "PA2",
+                                       "PA3", "PA4", "PA5", "PA6",
+                                       "PA7", "PA8", "PA9", "PA10",
+                                       "PA11", "PA12", "PA13", "PA14",
+                                       "PA15", "PA16";
+                                function = "emac";
                         };
 
                         gmac_pins_mii_a: gmac_mii@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2",
-                                                "PA3", "PA4", "PA5", "PA6",
-                                                "PA7", "PA8", "PA9", "PA10",
-                                                "PA11", "PA12", "PA13", "PA14",
-                                                "PA15", "PA16";
-                                allwinner,function = "gmac";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA0", "PA1", "PA2",
+                                       "PA3", "PA4", "PA5", "PA6",
+                                       "PA7", "PA8", "PA9", "PA10",
+                                       "PA11", "PA12", "PA13", "PA14",
+                                       "PA15", "PA16";
+                                function = "gmac";
                         };
 
                         gmac_pins_rgmii_a: gmac_rgmii@0 {
-                                allwinner,pins = "PA0", "PA1", "PA2",
-                                                "PA3", "PA4", "PA5", "PA6",
-                                                "PA7", "PA8", "PA10",
-                                                "PA11", "PA12", "PA13",
-                                                "PA15", "PA16";
-                                allwinner,function = "gmac";
+                                pins = "PA0", "PA1", "PA2",
+                                       "PA3", "PA4", "PA5", "PA6",
+                                        "PA7", "PA8", "PA10",
+                                       "PA11", "PA12", "PA13",
+                                       "PA15", "PA16";
+                                function = "gmac";
                                 /*
                                  * data lines in RGMII mode use DDR mode
                                  * and need a higher signal drive strength
                                  */
-                                allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                drive-strength = <40>;
                         };
 
                         i2c0_pins_a: i2c0@0 {
-                                allwinner,pins = "PB0", "PB1";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB0", "PB1";
+                                function = "i2c0";
                         };
 
                         i2c1_pins_a: i2c1@0 {
-                                allwinner,pins = "PB18", "PB19";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB18", "PB19";
+                                function = "i2c1";
                         };
 
                         i2c2_pins_a: i2c2@0 {
-                                allwinner,pins = "PB20", "PB21";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB20", "PB21";
+                                function = "i2c2";
                         };
 
                         i2c3_pins_a: i2c3@0 {
-                                allwinner,pins = "PI0", "PI1";
-                                allwinner,function = "i2c3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI0", "PI1";
+                                function = "i2c3";
                         };
 
                         ir0_rx_pins_a: ir0@0 {
-                                    allwinner,pins = "PB4";
-                                    allwinner,function = "ir0";
-                                    allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                    allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB4";
+                                function = "ir0";
                         };
 
                         ir0_tx_pins_a: ir0@1 {
-                                    allwinner,pins = "PB3";
-                                    allwinner,function = "ir0";
-                                    allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                    allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB3";
+                                function = "ir0";
                         };
 
                         ir1_rx_pins_a: ir1@0 {
-                                    allwinner,pins = "PB23";
-                                    allwinner,function = "ir1";
-                                    allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                    allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB23";
+                                function = "ir1";
                         };
 
                         ir1_tx_pins_a: ir1@1 {
-                                    allwinner,pins = "PB22";
-                                    allwinner,function = "ir1";
-                                    allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                    allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB22";
+                                function = "ir1";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2",
-                                                 "PF3", "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1", "PF2",
+                                       "PF3", "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
-                                allwinner,pins = "PH1";
-                                allwinner,function = "gpio_in";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PH1";
+                                function = "gpio_in";
+                                bias-pull-up;
                         };
 
                         mmc2_pins_a: mmc2@0 {
-                                allwinner,pins = "PC6", "PC7", "PC8",
-                                                 "PC9", "PC10", "PC11";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PC6", "PC7", "PC8",
+                                       "PC9", "PC10", "PC11";
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc3_pins_a: mmc3@0 {
-                                allwinner,pins = "PI4", "PI5", "PI6",
-                                                 "PI7", "PI8", "PI9";
-                                allwinner,function = "mmc3";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI4", "PI5", "PI6",
+                                       "PI7", "PI8", "PI9";
+                                function = "mmc3";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         ps20_pins_a: ps20@0 {
-                                allwinner,pins = "PI20", "PI21";
-                                allwinner,function = "ps2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI20", "PI21";
+                                function = "ps2";
                         };
 
                         ps21_pins_a: ps21@0 {
-                                allwinner,pins = "PH12", "PH13";
-                                allwinner,function = "ps2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH12", "PH13";
+                                function = "ps2";
                         };
 
                         pwm0_pins_a: pwm0@0 {
-                                allwinner,pins = "PB2";
-                                allwinner,function = "pwm";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB2";
+                                function = "pwm";
                         };
 
                         pwm1_pins_a: pwm1@0 {
-                                allwinner,pins = "PI3";
-                                allwinner,function = "pwm";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI3";
+                                function = "pwm";
                         };
 
                         spdif_tx_pins_a: spdif@0 {
-                                allwinner,pins = "PB13";
-                                allwinner,function = "spdif";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PB13";
+                                function = "spdif";
+                                bias-pull-up;
                         };
 
                         spi0_pins_a: spi0@0 {
-                                allwinner,pins = "PI11", "PI12", "PI13";
-                                allwinner,function = "spi0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI11", "PI12", "PI13";
+                                function = "spi0";
                         };
 
                         spi0_cs0_pins_a: spi0_cs0@0 {
-                                allwinner,pins = "PI10";
-                                allwinner,function = "spi0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI10";
+                                function = "spi0";
                         };
 
                         spi0_cs1_pins_a: spi0_cs1@0 {
-                                allwinner,pins = "PI14";
-                                allwinner,function = "spi0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI14";
+                                function = "spi0";
                         };
 
                         spi1_pins_a: spi1@0 {
-                                allwinner,pins = "PI17", "PI18", "PI19";
-                                allwinner,function = "spi1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI17", "PI18", "PI19";
+                                function = "spi1";
                         };
 
                         spi1_cs0_pins_a: spi1_cs0@0 {
-                                allwinner,pins = "PI16";
-                                allwinner,function = "spi1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI16";
+                                function = "spi1";
                         };
 
                         spi2_pins_a: spi2@0 {
-                                allwinner,pins = "PC20", "PC21", "PC22";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC20", "PC21", "PC22";
+                                function = "spi2";
                         };
 
                         spi2_pins_b: spi2@1 {
-                                allwinner,pins = "PB15", "PB16", "PB17";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB15", "PB16", "PB17";
+                                function = "spi2";
                         };
 
                         spi2_cs0_pins_a: spi2_cs0@0 {
-                                allwinner,pins = "PC19";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC19";
+                                function = "spi2";
                         };
 
                         spi2_cs0_pins_b: spi2_cs0@1 {
-                                allwinner,pins = "PB14";
-                                allwinner,function = "spi2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB14";
+                                function = "spi2";
                         };
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PB22", "PB23";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB22", "PB23";
+                                function = "uart0";
                         };
 
                         uart2_pins_a: uart2@0 {
-                                allwinner,pins = "PI16", "PI17", "PI18", "PI19";
-                                allwinner,function = "uart2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI16", "PI17", "PI18", "PI19";
+                                function = "uart2";
                         };
 
                         uart3_pins_a: uart3@0 {
-                                allwinner,pins = "PG6", "PG7", "PG8", "PG9";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG6", "PG7", "PG8", "PG9";
+                                function = "uart3";
                         };
 
                         uart3_pins_b: uart3@1 {
-                                allwinner,pins = "PH0", "PH1";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH0", "PH1";
+                                function = "uart3";
                         };
 
                         uart4_pins_a: uart4@0 {
-                                allwinner,pins = "PG10", "PG11";
-                                allwinner,function = "uart4";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG10", "PG11";
+                                function = "uart4";
                         };
 
                         uart4_pins_b: uart4@1 {
-                                allwinner,pins = "PH4", "PH5";
-                                allwinner,function = "uart4";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH4", "PH5";
+                                function = "uart4";
                         };
 
                         uart5_pins_a: uart5@0 {
-                                allwinner,pins = "PI10", "PI11";
-                                allwinner,function = "uart5";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI10", "PI11";
+                                function = "uart5";
                         };
 
                         uart6_pins_a: uart6@0 {
-                                allwinner,pins = "PI12", "PI13";
-                                allwinner,function = "uart6";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI12", "PI13";
+                                function = "uart6";
                         };
 
                         uart7_pins_a: uart7@0 {
-                                allwinner,pins = "PI20", "PI21";
-                                allwinner,function = "uart7";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PI20", "PI21";
+                                function = "uart7";
                         };
                 };
 
@@ -1686,9 +1619,9 @@
                 };
 
                 gic: interrupt-controller@01c81000 {
-                        compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+                        compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c81000 0x1000>,
-                              <0x01c82000 0x1000>,
+                              <0x01c82000 0x2000>,
                               <0x01c84000 0x2000>,
                               <0x01c86000 0x2000>;
                         interrupt-controller;
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index e4991a78ad73..a952cc0703cc 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -84,7 +84,7 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
 
-                cpu@0 {
+                cpu0: cpu@0 {
                         compatible = "arm,cortex-a7";
                         device_type = "cpu";
                         reg = <0>;
@@ -106,14 +106,16 @@
                         #clock-cells = <0>;
                         compatible = "fixed-clock";
                         clock-frequency = <24000000>;
+                        clock-accuracy = <50000>;
                         clock-output-names = "osc24M";
                 };
 
-                osc32k: osc32k_clk {
+                ext_osc32k: ext_osc32k_clk {
                         #clock-cells = <0>;
                         compatible = "fixed-clock";
                         clock-frequency = <32768>;
-                        clock-output-names = "osc32k";
+                        clock-accuracy = <50000>;
+                        clock-output-names = "ext-osc32k";
                 };
         };
 
@@ -256,7 +258,7 @@
 
                 ccu: clock@01c20000 {
                         reg = <0x01c20000 0x400>;
-                        clocks = <&osc24M>, <&osc32k>;
+                        clocks = <&osc24M>, <&rtc 0>;
                         clock-names = "hosc", "losc";
                         #clock-cells = <1>;
                         #reset-cells = <1>;
@@ -266,7 +268,7 @@
                         /* compatible gets set in SoC specific dtsi file */
                         reg = <0x01c20800 0x400>;
                         /* interrupts get set in SoC specific dtsi file */
-                        clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+                        clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
                         clock-names = "apb", "hosc", "losc";
                         gpio-controller;
                         interrupt-controller;
@@ -274,88 +276,72 @@
                         #gpio-cells = <3>;
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PF2", "PF4";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF2", "PF4";
+                                function = "uart0";
                         };
 
                         uart1_pins_a: uart1@0 {
-                                allwinner,pins = "PG6", "PG7";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG6", "PG7";
+                                function = "uart1";
                         };
 
                         uart1_pins_cts_rts_a: uart1-cts-rts@0 {
-                                allwinner,pins = "PG8", "PG9";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG8", "PG9";
+                                function = "uart1";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2",
-                                                 "PF3", "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1", "PF2",
+                                       "PF3", "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc1_pins_a: mmc1@0 {
-                                allwinner,pins = "PG0", "PG1", "PG2",
-                                                 "PG3", "PG4", "PG5";
-                                allwinner,function = "mmc1";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG0", "PG1", "PG2",
+                                       "PG3", "PG4", "PG5";
+                                function = "mmc1";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc2_8bit_pins: mmc2_8bit {
-                                allwinner,pins = "PC5", "PC6", "PC8",
-                                                 "PC9", "PC10", "PC11",
-                                                 "PC12", "PC13", "PC14",
-                                                 "PC15", "PC16";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC5", "PC6", "PC8",
+                                       "PC9", "PC10", "PC11",
+                                       "PC12", "PC13", "PC14",
+                                       "PC15", "PC16";
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         pwm0_pins: pwm0 {
-                                allwinner,pins = "PH0";
-                                allwinner,function = "pwm0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH0";
+                                function = "pwm0";
                         };
 
                         i2c0_pins_a: i2c0@0 {
-                                allwinner,pins = "PH2", "PH3";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH2", "PH3";
+                                function = "i2c0";
                         };
 
                         i2c1_pins_a: i2c1@0 {
-                                allwinner,pins = "PH4", "PH5";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH4", "PH5";
+                                function = "i2c1";
                         };
 
                         i2c2_pins_a: i2c2@0 {
-                                allwinner,pins = "PE12", "PE13";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PE12", "PE13";
+                                function = "i2c2";
                         };
 
                         lcd_rgb666_pins: lcd-rgb666@0 {
-                                allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
-                                                 "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
-                                                 "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
-                                                 "PD24", "PD25", "PD26", "PD27";
-                                allwinner,function = "lcd0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+                                       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+                                       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
+                                       "PD24", "PD25", "PD26", "PD27";
+                                function = "lcd0";
                         };
                 };
 
@@ -486,10 +472,36 @@
                         #size-cells = <0>;
                 };
 
+                mali: gpu@1c40000 {
+                        compatible = "allwinner,sun8i-a23-mali",
+                                     "allwinner,sun7i-a20-mali", "arm,mali-400";
+                        reg = <0x01c40000 0x10000>;
+                        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "gp",
+                                          "gpmmu",
+                                          "pp0",
+                                          "ppmmu0",
+                                          "pp1",
+                                          "ppmmu1",
+                                          "pmu";
+                        clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+                        clock-names = "bus", "core";
+                        resets = <&ccu RST_BUS_GPU>;
+
+                        assigned-clocks = <&ccu CLK_GPU>;
+                        assigned-clock-rates = <408000000>;
+                };
+
                 gic: interrupt-controller@01c81000 {
                         compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c81000 0x1000>,
-                              <0x01c82000 0x1000>,
+                              <0x01c82000 0x2000>,
                               <0x01c84000 0x2000>,
                               <0x01c86000 0x2000>;
                         interrupt-controller;
@@ -502,6 +514,9 @@
                         reg = <0x01f00000 0x54>;
                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                        clock-output-names = "osc32k";
+                        clocks = <&ext_osc32k>;
+                        #clock-cells = <1>;
                 };
 
                 nmi_intc: interrupt-controller@01f00c0c {
@@ -554,6 +569,10 @@
                                 compatible = "allwinner,sun6i-a31-clock-reset";
                                 #reset-cells = <1>;
                         };
+
+                        codec_analog: codec-analog {
+                                compatible = "allwinner,sun8i-a23-codec-analog";
+                        };
                 };
 
                 cpucfg@01f01c00 {
@@ -576,7 +595,7 @@
                         compatible = "allwinner,sun8i-a23-r-pinctrl";
                         reg = <0x01f02c00 0x400>;
                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                        clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                        clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
                         clock-names = "apb", "hosc", "losc";
                         resets = <&apb0_rst 0>;
                         gpio-controller;
@@ -587,17 +606,15 @@
                         #gpio-cells = <3>;
 
                         r_rsb_pins: r_rsb {
-                                allwinner,pins = "PL0", "PL1";
-                                allwinner,function = "s_rsb";
-                                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PL0", "PL1";
+                                function = "s_rsb";
+                                drive-strength = <20>;
+                                bias-pull-up;
                         };
 
                         r_uart_pins_a: r_uart@0 {
-                                allwinner,pins = "PL2", "PL3";
-                                allwinner,function = "s_uart";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PL2", "PL3";
+                                function = "s_uart";
                         };
                 };
 
diff --git a/arch/arm/boot/dts/sun8i-a23-evb.dts b/arch/arm/boot/dts/sun8i-a23-evb.dts
index 610786e635fa..c21f5b1b255e 100644
--- a/arch/arm/boot/dts/sun8i-a23-evb.dts
+++ b/arch/arm/boot/dts/sun8i-a23-evb.dts
@@ -115,10 +115,9 @@
 
 &pio {
         mmc0_cd_pin_evb: mmc0_cd_pin@0 {
-                allwinner,pins = "PB4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PB4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index 21bb291b9568..649e31339662 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -86,15 +86,13 @@
 };
 
 &mmc1_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &r_pio {
         wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {
-                allwinner,pins = "PL6";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL6";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index 9955f85f9147..6b3bcae089f2 100644
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -79,15 +79,13 @@
 };
 
 &mmc1_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &r_pio {
         wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 {
-                allwinner,pins = "PL6";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL6";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
index 956320a6cc78..3ab5c0c09d93 100644
--- a/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
+++ b/arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
@@ -48,3 +48,26 @@
         model = "Q8 A23 Tablet";
         compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
 };
+
+&codec {
+        pinctrl-0 = <&codec_pa_pin>;
+        allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+        allwinner,audio-routing =
+                "Headphone", "HP",
+                "Headphone", "HPCOM",
+                "Speaker", "HP",
+                "MIC1", "Mic",
+                "MIC2", "Headset Mic",
+                "Mic",  "MBIAS",
+                "Headset Mic", "HBIAS";
+        status = "okay";
+};
+
+&pio {
+        codec_pa_pin: codec_pa_pin@0 {
+                allwinner,pins = "PH9";
+                allwinner,function = "gpio_out";
+                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+        };
+};
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 54d045dab825..4d1f929780a8 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -48,6 +48,22 @@
         memory {
                 reg = <0x40000000 0x40000000>;
         };
+
+        soc@01c00000 {
+                codec: codec@01c22c00 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun8i-a23-codec";
+                        reg = <0x01c22c00 0x400>;
+                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                        clock-names = "apb", "codec";
+                        resets = <&ccu RST_BUS_CODEC>;
+                        dmas = <&dma 15>, <&dma 15>;
+                        dma-names = "rx", "tx";
+                        allwinner,codec-analog-controls = <&codec_analog>;
+                        status = "disabled";
+                };
+        };
 };
 
 &ccu {
diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
index fb4665576dff..3e05959104f1 100644
--- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
@@ -71,7 +71,7 @@
 };
 
 &mmc1_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc1 {
@@ -89,10 +89,9 @@
 
 &r_pio {
         led_pin_d978: led_pin_d978@0 {
-                allwinner,pins = "PL5";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL5";
+                function = "gpio_out";
+                drive-strength = <20>;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
index 9ea637e82b2d..be9a6b8d7a1e 100644
--- a/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
+++ b/arch/arm/boot/dts/sun8i-a33-olinuxino.dts
@@ -92,24 +92,18 @@
 
 &pio {
         led_pin_olinuxino: led_pins@0 {
-                allwinner,pins = "PB7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB7";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
-                allwinner,pins = "PB4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB4";
+                function = "gpio_in";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PB3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB3";
+                function = "gpio_in";
         };
 };
 
@@ -126,7 +120,7 @@
         };
 };
 
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
 
 &reg_aldo1 {
         regulator-always-on;
diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index 71bb9418c5f9..03b89bdd55ba 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -61,6 +61,35 @@
         chosen {
                 stdout-path = "serial0:115200n8";
         };
+
+        panel {
+                compatible = "netron-dy,e231732";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                        reg = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        panel_input: endpoint@0 {
+                                reg = <0>;
+                                remote-endpoint = <&tcon0_out_panel>;
+                        };
+                };
+        };
+};
+
+&codec {
+        status = "okay";
+};
+
+&de {
+        status = "okay";
+};
+
+&dai {
+        status = "okay";
 };
 
 &ehci0 {
@@ -115,9 +144,9 @@
 
 &mmc2_8bit_pins {
         /* Increase drive strength for DDR modes */
-        allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+        drive-strength = <40>;
         /* eMMC is missing pull-ups */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &ohci0 {
@@ -126,10 +155,9 @@
 
 &pio {
         mmc0_cd_pin_sina33: mmc0_cd_pin@0 {
-                allwinner,pins = "PB4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PB4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -145,7 +173,7 @@
         };
 };
 
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
 
 &reg_aldo1 {
         regulator-always-on;
@@ -207,6 +235,23 @@
         regulator-name = "vcc-rtc";
 };
 
+&sound {
+        status = "okay";
+};
+
+&tcon0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&lcd_rgb666_pins>;
+        status = "okay";
+};
+
+&tcon0_out {
+        tcon0_out_panel: endpoint@0 {
+                reg = <0>;
+                remote-endpoint = <&panel_input>;
+        };
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_b>;
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index fd1e1cddd4a8..18c174fef84f 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -45,7 +45,42 @@
 #include "sun8i-a23-a33.dtsi"
 
 / {
+        cpu0_opp_table: opp_table0 {
+                compatible = "operating-points-v2";
+                opp-shared;
+
+                opp@648000000 {
+                        opp-hz = /bits/ 64 <648000000>;
+                        opp-microvolt = <1040000>;
+                        clock-latency-ns = <244144>; /* 8 32k periods */
+                };
+
+                opp@816000000 {
+                        opp-hz = /bits/ 64 <816000000>;
+                        opp-microvolt = <1100000>;
+                        clock-latency-ns = <244144>; /* 8 32k periods */
+                };
+
+                opp@1008000000 {
+                        opp-hz = /bits/ 64 <1008000000>;
+                        opp-microvolt = <1200000>;
+                        clock-latency-ns = <244144>; /* 8 32k periods */
+                };
+
+                opp@1200000000 {
+                        opp-hz = /bits/ 64 <1200000000>;
+                        opp-microvolt = <1320000>;
+                        clock-latency-ns = <244144>; /* 8 32k periods */
+                };
+        };
+
         cpus {
+                cpu@0 {
+                        clocks = <&ccu CLK_CPUX>;
+                        clock-names = "cpu";
+                        operating-points-v2 = <&cpu0_opp_table>;
+                };
+
                 cpu@2 {
                         compatible = "arm,cortex-a7";
                         device_type = "cpu";
@@ -69,6 +104,28 @@
                 reg = <0x40000000 0x80000000>;
         };
 
+        sound: sound {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "sun8i-a33-audio";
+                simple-audio-card,format = "i2s";
+                simple-audio-card,frame-master = <&link_codec>;
+                simple-audio-card,bitclock-master = <&link_codec>;
+                simple-audio-card,mclk-fs = <512>;
+                simple-audio-card,aux-devs = <&codec_analog>;
+                simple-audio-card,routing =
+                        "Left DAC", "Digital Left DAC",
+                        "Right DAC", "Digital Right DAC";
+                status = "disabled";
+
+                simple-audio-card,cpu {
+                        sound-dai = <&dai>;
+                };
+
+                link_codec: simple-audio-card,codec {
+                        sound-dai = <&codec>;
+                };
+        };
+
         soc@01c00000 {
                 tcon0: lcd-controller@01c0c000 {
                         compatible = "allwinner,sun8i-a33-tcon";
@@ -116,6 +173,29 @@
                         reset-names = "ahb";
                 };
 
+                dai: dai@01c22c00 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun6i-a31-i2s";
+                        reg = <0x01c22c00 0x200>;
+                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                        clock-names = "apb", "mod";
+                        resets = <&ccu RST_BUS_CODEC>;
+                        dmas = <&dma 15>, <&dma 15>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
+                codec: codec@01c22e00 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun8i-a33-codec";
+                        reg = <0x01c22e00 0x400>;
+                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                        clock-names = "bus", "mod";
+                        status = "disabled";
+                };
+
                 fe0: display-frontend@01e00000 {
                         compatible = "allwinner,sun8i-a33-display-frontend";
                         reg = <0x01e00000 0x20000>;
@@ -238,10 +318,8 @@
                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 
         uart0_pins_b: uart0@1 {
-                allwinner,pins = "PB0", "PB1";
-                allwinner,function = "uart0";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB0", "PB1";
+                function = "uart0";
         };
 
 };
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index d3473f81b12f..a789a7caf217 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -167,25 +167,21 @@
                         #gpio-cells = <3>;
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2",
-                                                 "PF3", "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1", "PF2",
+                                       "PF3", "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PF2", "PF4";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF2", "PF4";
+                                function = "uart0";
                         };
 
                         uart0_pins_b: uart0@1 {
-                                allwinner,pins = "PB9", "PB10";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PB9", "PB10";
+                                function = "uart0";
                         };
                 };
 
@@ -217,7 +213,7 @@
                 gic: interrupt-controller@01c81000 {
                         compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c81000 0x1000>,
-                              <0x01c82000 0x1000>,
+                              <0x01c82000 0x2000>,
                               <0x01c84000 0x2000>,
                               <0x01c86000 0x2000>;
                         interrupt-controller;
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
new file mode 100644
index 000000000000..b7ca916d871d
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun8i-h3-orangepi-one.dts, which is:
+ *   Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+        model = "Xunlong Orange Pi Zero";
+        compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus";
+
+        aliases {
+                serial0 = &uart0;
+                /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+                ethernet1 = &xr819;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                pwr_led {
+                        label = "orangepi:green:pwr";
+                        gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+                        default-state = "on";
+                };
+
+                status_led {
+                        label = "orangepi:red:status";
+                        gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+                };
+        };
+
+        reg_vcc_wifi: reg_vcc_wifi {
+                compatible = "regulator-fixed";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-name = "vcc-wifi";
+                enable-active-high;
+                gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+        };
+
+        wifi_pwrseq: wifi_pwrseq {
+                compatible = "mmc-pwrseq-simple";
+                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
+                post-power-on-delay-ms = <200>;
+        };
+};
+
+&ehci1 {
+        status = "okay";
+};
+
+&mmc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins_a>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+        cd-inverted;
+        status = "okay";
+};
+
+&mmc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins_a>;
+        vmmc-supply = <&reg_vcc_wifi>;
+        mmc-pwrseq = <&wifi_pwrseq>;
+        bus-width = <4>;
+        non-removable;
+        status = "okay";
+
+        /*
+         * Explicitly define the sdio device, so that we can add an ethernet
+         * alias for it (which e.g. makes u-boot set a mac-address).
+         */
+        xr819: sdio_wifi@1 {
+                reg = <1>;
+        };
+};
+
+&mmc1_pins_a {
+        bias-pull-up;
+};
+
+&ohci1 {
+        status = "okay";
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins_a>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins>;
+        status = "disabled";
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_pins>;
+        status = "disabled";
+};
+
+&usbphy {
+        /* USB VBUS is always on */
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 06fddaae8edd..c0c49dd4d3b2 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -156,24 +156,18 @@
 
 &r_pio {
         pwr_led_bpi_m2p: led_pins@0 {
-                allwinner,pins = "PL10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL10";
+                function = "gpio_out";
         };
 
         sw_r_bpi_m2p: key_pins@0 {
-                allwinner,pins = "PL3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL3";
+                function = "gpio_in";
         };
 
         wifi_en_bpi_m2p: wifi_en_pin {
-                allwinner,pins = "PL7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL7";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
new file mode 100644
index 000000000000..25b225b7dfd6
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2017 Marcus Cooper <codekipper@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+        model = "Beelink X2";
+        compatible = "roofull,beelink-x2", "allwinner,sun8i-h3";
+
+        aliases {
+                serial0 = &uart0;
+                /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+                ethernet1 = &sdiowifi;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                blue {
+                        label = "beelink-x2:blue:pwr";
+                        gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+                        default-state = "on";
+                };
+
+                red {
+                        label = "beelink-x2:red:standby";
+                        gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+                };
+        };
+
+        wifi_pwrseq: wifi_pwrseq {
+                compatible = "mmc-pwrseq-simple";
+                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+        };
+
+        sound_spdif {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "On-board SPDIF";
+
+                simple-audio-card,cpu {
+                        sound-dai = <&spdif>;
+                };
+
+                simple-audio-card,codec {
+                        sound-dai = <&spdif_out>;
+                };
+        };
+
+        spdif_out: spdif-out {
+                #sound-dai-cells = <0>;
+                compatible = "linux,spdif-dit";
+        };
+};
+
+&ehci1 {
+        status = "okay";
+};
+
+&ir {
+        pinctrl-names = "default";
+        pinctrl-0 = <&ir_pins_a>;
+        status = "okay";
+};
+
+&mmc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+        cd-inverted;
+        status = "okay";
+};
+
+&mmc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc1_pins_a>;
+        vmmc-supply = <&reg_vcc3v3>;
+        bus-width = <4>;
+        non-removable;
+        status = "okay";
+
+        /*
+         * Explicitly define the sdio device, so that we can add an ethernet
+         * alias for it (which e.g. makes u-boot set a mac-address).
+         */
+        sdiowifi: sdio_wifi@1 {
+                reg = <1>;
+        };
+};
+
+&ohci1 {
+        status = "okay";
+};
+
+&spdif {
+        pinctrl-names = "default";
+        pinctrl-0 = <&spdif_tx_pins_a>;
+        status = "okay";
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart0_pins_a>;
+        status = "okay";
+};
+
+&usbphy {
+        /* USB VBUS is on as long as VCC-IO is on */
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index 8038aa29a5a7..2216e68d1838 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -110,26 +110,20 @@
 
 &pio {
         leds_npi: led_pins@0 {
-                allwinner,pins = "PA10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA10";
+                function = "gpio_out";
         };
 };
 
 &r_pio {
         leds_r_npi: led_pins@0 {
-                allwinner,pins = "PL10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL10";
+                function = "gpio_out";
         };
 
         sw_r_npi: key_pins@0 {
-                allwinner,pins = "PL3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL3";
+                function = "gpio_in";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index e5bcaba3e87f..047e9e1c6093 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -145,33 +145,25 @@
 
 &pio {
         leds_opc: led_pins@0 {
-                allwinner,pins = "PA15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA15";
+                function = "gpio_out";
         };
 };
 
 &r_pio {
         leds_r_opc: led_pins@0 {
-                allwinner,pins = "PL10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL10";
+                function = "gpio_out";
         };
 
         sw_r_opc: key_pins@0 {
-                allwinner,pins = "PL3", "PL4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL3", "PL4";
+                function = "gpio_in";
         };
 
         wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 {
-                allwinner,pins = "PL7";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL7";
+                function = "gpio_out";
         };
 };
 
@@ -205,7 +197,7 @@
 };
 
 &usb1_vbus_pin_a {
-        allwinner,pins = "PG13";
+        pins = "PG13";
 };
 
 &usbphy {
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index 1550fee1ec68..22b99b407019 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -143,26 +143,20 @@
 
 &pio {
         leds_opc: led_pins@0 {
-                allwinner,pins = "PA15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA15";
+                function = "gpio_out";
         };
 };
 
 &r_pio {
         leds_r_opc: led_pins@0 {
-                allwinner,pins = "PL10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL10";
+                function = "gpio_out";
         };
 
         sw_r_opc: key_pins@0 {
-                allwinner,pins = "PL3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL3";
+                function = "gpio_in";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 5c9b5bfa5c21..34da853ee037 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -110,26 +110,20 @@
 
 &pio {
         leds_opc: led_pins@0 {
-                allwinner,pins = "PA15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA15";
+                function = "gpio_out";
         };
 };
 
 &r_pio {
         leds_r_opc: led_pins@0 {
-                allwinner,pins = "PL10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL10";
+                function = "gpio_out";
         };
 
         sw_r_opc: key_pins@0 {
-                allwinner,pins = "PL3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL3";
+                function = "gpio_in";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index 851fd2c2cc8c..8b93f5c781a7 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -82,7 +82,7 @@
 
 &mmc2_8bit_pins {
         /* Increase drive strength for DDR modes */
-        allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+        drive-strength = <40>;
         /* eMMC is missing pull-ups */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 3ec971285aa3..d43978d3294e 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -90,6 +90,14 @@
         };
 };
 
+&codec {
+        allwinner,audio-routing =
+                "Line Out", "LINEOUT",
+                "MIC1", "Mic",
+                "Mic",  "MBIAS";
+        status = "okay";
+};
+
 &ehci1 {
         status = "okay";
 };
@@ -132,26 +140,20 @@
 
 &pio {
         leds_opc: led_pins@0 {
-                allwinner,pins = "PA15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PA15";
+                function = "gpio_out";
         };
 };
 
 &r_pio {
         leds_r_opc: led_pins@0 {
-                allwinner,pins = "PL10";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL10";
+                function = "gpio_out";
         };
 
         sw_r_opc: key_pins@0 {
-                allwinner,pins = "PL3";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL3";
+                function = "gpio_in";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index bb585918cf54..8c40ab7bfa72 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -76,17 +76,15 @@
 
 &mmc2_8bit_pins {
         /* Increase drive strength for DDR modes */
-        allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+        drive-strength = <40>;
         /* eMMC is missing pull-ups */
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &pio {
         usb3_vbus_pin_a: usb3_vbus_pin@0 {
-                allwinner,pins = "PG11";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PG11";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6c14a6f72820..27780b97c863 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -329,106 +329,90 @@
                         #interrupt-cells = <3>;
 
                         i2c0_pins: i2c0 {
-                                allwinner,pins = "PA11", "PA12";
-                                allwinner,function = "i2c0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA11", "PA12";
+                                function = "i2c0";
                         };
 
                         i2c1_pins: i2c1 {
-                                allwinner,pins = "PA18", "PA19";
-                                allwinner,function = "i2c1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA18", "PA19";
+                                function = "i2c1";
                         };
 
                         i2c2_pins: i2c2 {
-                                allwinner,pins = "PE12", "PE13";
-                                allwinner,function = "i2c2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PE12", "PE13";
+                                function = "i2c2";
                         };
 
                         mmc0_pins_a: mmc0@0 {
-                                allwinner,pins = "PF0", "PF1", "PF2", "PF3",
-                                                 "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1", "PF2", "PF3",
+                                       "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc0_cd_pin: mmc0_cd_pin@0 {
-                                allwinner,pins = "PF6";
-                                allwinner,function = "gpio_in";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PF6";
+                                function = "gpio_in";
+                                bias-pull-up;
                         };
 
                         mmc1_pins_a: mmc1@0 {
-                                allwinner,pins = "PG0", "PG1", "PG2", "PG3",
-                                                 "PG4", "PG5";
-                                allwinner,function = "mmc1";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG0", "PG1", "PG2", "PG3",
+                                       "PG4", "PG5";
+                                function = "mmc1";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc2_8bit_pins: mmc2_8bit {
-                                allwinner,pins = "PC5", "PC6", "PC8",
-                                                 "PC9", "PC10", "PC11",
-                                                 "PC12", "PC13", "PC14",
-                                                 "PC15", "PC16";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC5", "PC6", "PC8",
+                                       "PC9", "PC10", "PC11",
+                                       "PC12", "PC13", "PC14",
+                                       "PC15", "PC16";
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
+                        };
+
+                        spdif_tx_pins_a: spdif@0 {
+                                pins = "PA17";
+                                function = "spdif";
                         };
 
                         spi0_pins: spi0 {
-                                allwinner,pins = "PC0", "PC1", "PC2", "PC3";
-                                allwinner,function = "spi0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC0", "PC1", "PC2", "PC3";
+                                function = "spi0";
                         };
 
                         spi1_pins: spi1 {
-                                allwinner,pins = "PA15", "PA16", "PA14", "PA13";
-                                allwinner,function = "spi1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA15", "PA16", "PA14", "PA13";
+                                function = "spi1";
                         };
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PA4", "PA5";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA4", "PA5";
+                                function = "uart0";
                         };
 
                         uart1_pins: uart1 {
-                                allwinner,pins = "PG6", "PG7";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG6", "PG7";
+                                function = "uart1";
                         };
 
                         uart1_rts_cts_pins: uart1_rts_cts {
-                                allwinner,pins = "PG8", "PG9";
-                                allwinner,function = "uart1";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG8", "PG9";
+                                function = "uart1";
                         };
 
                         uart2_pins: uart2 {
-                                allwinner,pins = "PA0", "PA1";
-                                allwinner,function = "uart2";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA0", "PA1";
+                                function = "uart2";
                         };
 
                         uart3_pins: uart3 {
-                                allwinner,pins = "PA13", "PA14";
-                                allwinner,function = "uart3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PA13", "PA14";
+                                function = "uart3";
                         };
                 };
 
@@ -478,6 +462,19 @@
                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                 };
 
+                spdif: spdif@01c21000 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun8i-h3-spdif";
+                        reg = <0x01c21000 0x400>;
+                        interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
+                        resets = <&ccu RST_BUS_SPDIF>;
+                        clock-names = "apb", "spdif";
+                        dmas = <&dma 2>;
+                        dma-names = "tx";
+                        status = "disabled";
+                };
+
                 pwm: pwm@01c21400 {
                         compatible = "allwinner,sun8i-h3-pwm";
                         reg = <0x01c21400 0x8>;
@@ -486,6 +483,20 @@
                         status = "disabled";
                 };
 
+                codec: codec@01c22c00 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun8i-h3-codec";
+                        reg = <0x01c22c00 0x400>;
+                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                        clock-names = "apb", "codec";
+                        resets = <&ccu RST_BUS_CODEC>;
+                        dmas = <&dma 15>, <&dma 15>;
+                        dma-names = "rx", "tx";
+                        allwinner,codec-analog-controls = <&codec_analog>;
+                        status = "disabled";
+                };
+
                 uart0: serial@01c28000 {
                         compatible = "snps,dw-apb-uart";
                         reg = <0x01c28000 0x400>;
@@ -580,7 +591,7 @@
                 gic: interrupt-controller@01c81000 {
                         compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c81000 0x1000>,
-                              <0x01c82000 0x1000>,
+                              <0x01c82000 0x2000>,
                               <0x01c84000 0x2000>,
                               <0x01c86000 0x2000>;
                         interrupt-controller;
@@ -601,6 +612,11 @@
                         #reset-cells = <1>;
                 };
 
+                codec_analog: codec-analog@01f015c0 {
+                        compatible = "allwinner,sun8i-h3-codec-analog";
+                        reg = <0x01f015c0 0x4>;
+                };
+
                 ir: ir@01f02000 {
                         compatible = "allwinner,sun5i-a13-ir";
                         clocks = <&apb0_gates 1>, <&ir_clk>;
@@ -624,10 +640,8 @@
                         #interrupt-cells = <3>;
 
                         ir_pins_a: ir@0 {
-                                allwinner,pins = "PL11";
-                                allwinner,function = "s_cir_rx";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PL11";
+                                function = "s_cir_rx";
                         };
                 };
         };
diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index 29f837a47771..c676940a96da 100644
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -83,15 +83,14 @@
 };
 
 &mmc1_pins_a {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &r_pio {
         wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 {
-                allwinner,pins = "PL6", "PL7", "PL11";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PL6", "PL7", "PL11";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts
index 47553e522982..472c03b7aeab 100644
--- a/arch/arm/boot/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts
@@ -84,6 +84,14 @@
 
 };
 
+&codec {
+        status = "okay";
+};
+
+&dai {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
@@ -149,8 +157,8 @@
 };
 
 &mmc2_8bit_pins {
-        allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        drive-strength = <40>;
+        bias-pull-up;
 };
 
 &ohci0 {
@@ -159,40 +167,32 @@
 
 &pio {
         mmc0_cd_pin_parrot: mmc0_cd_pin@0 {
-                allwinner,pins = "PD14";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PD14";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         led_pins_parrot: led_pins@0 {
-                allwinner,pins = "PE16", "PE17";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PE16", "PE17";
+                function = "gpio_out";
         };
 
         usb0_id_det: usb0_id_detect_pin@0 {
-                allwinner,pins = "PD10";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PD10";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_parrot: usb1_vbus_pin@0 {
-                allwinner,pins = "PD12";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PD12";
+                function = "gpio_out";
         };
 };
 
 &r_pio {
         wifi_reset_pin_parrot: wifi_reset_pin@0 {
-                allwinner,pins = "PL6";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL6";
+                function = "gpio_out";
         };
 };
 
@@ -209,7 +209,7 @@
         };
 };
 
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
 
 &reg_aldo1 {
         regulator-always-on;
@@ -325,6 +325,10 @@
         status = "okay";
 };
 
+&sound {
+        status = "okay";
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_b>;
diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
index 69bc0cd26ca7..7097c18ff487 100644
--- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
@@ -94,31 +94,25 @@
 
 &pio {
         bl_en_pin: bl_en_pin@0 {
-                allwinner,pins = "PH6";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH6";
+                function = "gpio_in";
         };
 
         mmc0_cd_pin: mmc0_cd_pin@0 {
-                allwinner,pins = "PB4";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PB4";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         ts_power_pin: ts_power_pin@0 {
-                allwinner,pins = "PH1";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH1";
+                function = "gpio_out";
         };
 
         usb0_id_detect_pin: usb0_id_detect_pin@0 {
-                allwinner,pins = "PH8";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH8";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -136,7 +130,7 @@
         };
 };
 
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
 
 &reg_aldo1 {
         regulator-always-on;
@@ -220,6 +214,10 @@
         regulator-name = "vcc-rtc";
 };
 
+&cpu0 {
+        cpu-supply = <&reg_dcdc2>;
+};
+
 &r_uart {
         pinctrl-names = "default";
         pinctrl-0 = <&r_uart_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
new file mode 100644
index 000000000000..387fc2aa546d
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-v3s.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+/ {
+        model = "Lichee Pi Zero";
+        compatible = "licheepi,licheepi-zero", "allwinner,sun8i-v3s";
+
+        aliases {
+                serial0 = &uart0;
+        };
+
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                blue_led {
+                        label = "licheepi:blue:usr";
+                        gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
+                };
+
+                green_led {
+                        label = "licheepi:green:usr";
+                        gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
+                        default-state = "on";
+                };
+
+                red_led {
+                        label = "licheepi:red:usr";
+                        gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */
+                };
+        };
+};
+
+&mmc0 {
+        pinctrl-0 = <&mmc0_pins_a>;
+        pinctrl-names = "default";
+        broken-cd;
+        bus-width = <4>;
+        vmmc-supply = <&reg_vcc3v3>;
+        status = "okay";
+};
+
+&uart0 {
+        pinctrl-0 = <&uart0_pins_a>;
+        pinctrl-names = "default";
+        status = "okay";
+};
+
+&usb_otg {
+        dr_mode = "otg";
+        status = "okay";
+};
+
+&usbphy {
+        usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
new file mode 100644
index 000000000000..71075969e5e6
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -0,0 +1,309 @@
+/*
+ * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&gic>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a7";
+                        device_type = "cpu";
+                        reg = <0>;
+                        clocks = <&ccu 14>;
+                };
+        };
+
+        timer {
+                compatible = "arm,armv7-timer";
+                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+        };
+
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                osc24M: osc24M_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <24000000>;
+                        clock-output-names = "osc24M";
+                };
+
+                osc32k: osc32k_clk {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                        clock-frequency = <32768>;
+                        clock-output-names = "osc32k";
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                mmc0: mmc@01c0f000 {
+                        compatible = "allwinner,sun7i-a20-mmc";
+                        reg = <0x01c0f000 0x1000>;
+                        clocks = <&ccu 22>,
+                                 <&ccu 45>,
+                                 <&ccu 47>,
+                                 <&ccu 46>;
+                        clock-names = "ahb",
+                                      "mmc",
+                                      "output",
+                                      "sample";
+                        resets = <&ccu 7>;
+                        reset-names = "ahb";
+                        interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                mmc1: mmc@01c10000 {
+                        compatible = "allwinner,sun7i-a20-mmc";
+                        reg = <0x01c10000 0x1000>;
+                        clocks = <&ccu 23>,
+                                 <&ccu 48>,
+                                 <&ccu 50>,
+                                 <&ccu 49>;
+                        clock-names = "ahb",
+                                      "mmc",
+                                      "output",
+                                      "sample";
+                        resets = <&ccu 8>;
+                        reset-names = "ahb";
+                        interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                mmc2: mmc@01c11000 {
+                        compatible = "allwinner,sun7i-a20-mmc";
+                        reg = <0x01c11000 0x1000>;
+                        clocks = <&ccu 24>,
+                                 <&ccu 51>,
+                                 <&ccu 53>,
+                                 <&ccu 52>;
+                        clock-names = "ahb",
+                                      "mmc",
+                                      "output",
+                                      "sample";
+                        resets = <&ccu 9>;
+                        reset-names = "ahb";
+                        interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                usb_otg: usb@01c19000 {
+                        compatible = "allwinner,sun8i-h3-musb";
+                        reg = <0x01c19000 0x0400>;
+                        clocks = <&ccu 29>;
+                        resets = <&ccu 17>;
+                        interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "mc";
+                        phys = <&usbphy 0>;
+                        phy-names = "usb";
+                        extcon = <&usbphy 0>;
+                        status = "disabled";
+                };
+
+                usbphy: phy@01c19400 {
+                        compatible = "allwinner,sun8i-v3s-usb-phy";
+                        reg = <0x01c19400 0x2c>,
+                              <0x01c1a800 0x4>;
+                        reg-names = "phy_ctrl",
+                                    "pmu0";
+                        clocks = <&ccu 56>;
+                        clock-names = "usb0_phy";
+                        resets = <&ccu 0>;
+                        reset-names = "usb0_reset";
+                        status = "disabled";
+                        #phy-cells = <1>;
+                };
+
+                ccu: clock@01c20000 {
+                        compatible = "allwinner,sun8i-v3s-ccu";
+                        reg = <0x01c20000 0x400>;
+                        clocks = <&osc24M>, <&osc32k>;
+                        clock-names = "hosc", "losc";
+                        #clock-cells = <1>;
+                        #reset-cells = <1>;
+                };
+
+                rtc: rtc@01c20400 {
+                        compatible = "allwinner,sun6i-a31-rtc";
+                        reg = <0x01c20400 0x54>;
+                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                pio: pinctrl@01c20800 {
+                        compatible = "allwinner,sun8i-v3s-pinctrl";
+                        reg = <0x01c20800 0x400>;
+                        interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu 37>, <&osc24M>, <&osc32k>;
+                        clock-names = "apb", "hosc", "losc";
+                        gpio-controller;
+                        #gpio-cells = <3>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+
+                        i2c0_pins: i2c0 {
+                                pins = "PB6", "PB7";
+                                function = "i2c0";
+                        };
+
+                        uart0_pins_a: uart0@0 {
+                                pins = "PB8", "PB9";
+                                function = "uart0";
+                        };
+
+                        mmc0_pins_a: mmc0@0 {
+                                pins = "PF0", "PF1", "PF2", "PF3",
+                                       "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
+                        };
+                };
+
+                timer@01c20c00 {
+                        compatible = "allwinner,sun4i-a10-timer";
+                        reg = <0x01c20c00 0xa0>;
+                        interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&osc24M>;
+                };
+
+                wdt0: watchdog@01c20ca0 {
+                        compatible = "allwinner,sun6i-a31-wdt";
+                        reg = <0x01c20ca0 0x20>;
+                        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                uart0: serial@01c28000 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28000 0x400>;
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu 40>;
+                        resets = <&ccu 49>;
+                        status = "disabled";
+                };
+
+                uart1: serial@01c28400 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28400 0x400>;
+                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu 41>;
+                        resets = <&ccu 50>;
+                        status = "disabled";
+                };
+
+                uart2: serial@01c28800 {
+                        compatible = "snps,dw-apb-uart";
+                        reg = <0x01c28800 0x400>;
+                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                        reg-shift = <2>;
+                        reg-io-width = <4>;
+                        clocks = <&ccu 42>;
+                        resets = <&ccu 51>;
+                        status = "disabled";
+                };
+
+                i2c0: i2c@01c2ac00 {
+                        compatible = "allwinner,sun6i-a31-i2c";
+                        reg = <0x01c2ac00 0x400>;
+                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu 38>;
+                        resets = <&ccu 46>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&i2c0_pins>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c1: i2c@01c2b000 {
+                        compatible = "allwinner,sun6i-a31-i2c";
+                        reg = <0x01c2b000 0x400>;
+                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu 39>;
+                        resets = <&ccu 47>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                gic: interrupt-controller@01c81000 {
+                        compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+                        reg = <0x01c81000 0x1000>,
+                              <0x01c82000 0x1000>,
+                              <0x01c84000 0x2000>,
+                              <0x01c86000 0x2000>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 67b02fe7f11c..9112a200fd5e 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -108,7 +108,7 @@
 };
 
 &mmc1_pins {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc2 {
@@ -123,7 +123,7 @@
 
 &mmc2_8bit_pins {
         /* Increase drive strength for DDR modes */
-        allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+        drive-strength = <40>;
 };
 
 &osc32k {
@@ -133,17 +133,14 @@
 
 &pio {
         led_pins_cubieboard4: led-pins@0 {
-                allwinner,pins = "PH6", "PH17";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH6", "PH17";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {
-                allwinner,pins = "PH18";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH18";
+                function = "gpio_in";
+                bias-pull-up;
         };
 };
 
@@ -153,10 +150,8 @@
 
 &r_pio {
         wifi_en_pin_cubieboard4: wifi_en_pin@0 {
-                allwinner,pins = "PL2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL2";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 7e036b2be762..0fc3a87f5576 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -150,7 +150,7 @@
 };
 
 &mmc1_pins {
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+        bias-pull-up;
 };
 
 &mmc2 {
@@ -165,7 +165,7 @@
 
 &mmc2_8bit_pins {
         /* Increase drive strength for DDR modes */
-        allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+        drive-strength = <40>;
 };
 
 &ohci0 {
@@ -183,31 +183,24 @@
 
 &pio {
         led_pins_optimus: led-pins@0 {
-                allwinner,pins = "PH0", "PH1";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH0", "PH1";
+                function = "gpio_out";
         };
 
         mmc0_cd_pin_optimus: mmc0_cd_pin@0 {
-                allwinner,pins = "PH18";
-                allwinner,function = "gpio_in";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                pins = "PH18";
+                function = "gpio_in";
+                bias-pull-up;
         };
 
         usb1_vbus_pin_optimus: usb1_vbus_pin@1 {
-                allwinner,pins = "PH4";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH4";
+                function = "gpio_out";
         };
 
         usb3_vbus_pin_optimus: usb3_vbus_pin@1 {
-                allwinner,pins = "PH5";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH5";
+                function = "gpio_out";
         };
 };
 
@@ -217,17 +210,13 @@
 
 &r_pio {
         led_r_pins_optimus: led-pins@1 {
-                allwinner,pins = "PM15";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PM15";
+                function = "gpio_out";
         };
 
         wifi_en_pin_optimus: wifi_en_pin@0 {
-                allwinner,pins = "PL2";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PL2";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 979ad1aacfb1..03f2ab47ece0 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -613,7 +613,7 @@
                 gic: interrupt-controller@01c41000 {
                         compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c41000 0x1000>,
-                              <0x01c42000 0x1000>,
+                              <0x01c42000 0x2000>,
                               <0x01c44000 0x2000>,
                               <0x01c46000 0x2000>;
                         interrupt-controller;
@@ -687,50 +687,44 @@
                         #gpio-cells = <3>;
 
                         i2c3_pins_a: i2c3@0 {
-                                allwinner,pins = "PG10", "PG11";
-                                allwinner,function = "i2c3";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG10", "PG11";
+                                function = "i2c3";
                         };
 
                         mmc0_pins: mmc0 {
-                                allwinner,pins = "PF0", "PF1" ,"PF2", "PF3",
-                                                 "PF4", "PF5";
-                                allwinner,function = "mmc0";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PF0", "PF1" ,"PF2", "PF3",
+                                       "PF4", "PF5";
+                                function = "mmc0";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc1_pins: mmc1 {
-                                allwinner,pins = "PG0", "PG1" ,"PG2", "PG3",
+                                pins = "PG0", "PG1" ,"PG2", "PG3",
                                                  "PG4", "PG5";
-                                allwinner,function = "mmc1";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                function = "mmc1";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         mmc2_8bit_pins: mmc2_8bit {
-                                allwinner,pins = "PC6", "PC7", "PC8", "PC9",
-                                                 "PC10", "PC11", "PC12",
-                                                 "PC13", "PC14", "PC15",
-                                                 "PC16";
-                                allwinner,function = "mmc2";
-                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PC6", "PC7", "PC8", "PC9",
+                                       "PC10", "PC11", "PC12",
+                                       "PC13", "PC14", "PC15",
+                                       "PC16";
+                                function = "mmc2";
+                                drive-strength = <30>;
+                                bias-pull-up;
                         };
 
                         uart0_pins_a: uart0@0 {
-                                allwinner,pins = "PH12", "PH13";
-                                allwinner,function = "uart0";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PH12", "PH13";
+                                function = "uart0";
                         };
 
                         uart4_pins_a: uart4@0 {
-                                allwinner,pins = "PG12", "PG13", "PG14", "PG15";
-                                allwinner,function = "uart4";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PG12", "PG13", "PG14", "PG15";
+                                function = "uart4";
                         };
                 };
 
@@ -912,17 +906,15 @@
                         #gpio-cells = <3>;
 
                         r_ir_pins: r_ir {
-                                allwinner,pins = "PL6";
-                                allwinner,function = "s_cir_rx";
-                                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                                pins = "PL6";
+                                function = "s_cir_rx";
                         };
 
                         r_rsb_pins: r_rsb {
-                                allwinner,pins = "PN0", "PN1";
-                                allwinner,function = "s_rsb";
-                                allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-                                allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                                pins = "PN0", "PN1";
+                                function = "s_rsb";
+                                drive-strength = <20>;
+                                bias-pull-up;
                         };
                 };
 
diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
index f1953b0c5059..17c09fed9e84 100644
--- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi
+++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
@@ -47,31 +47,23 @@
 
 &pio {
         ahci_pwr_pin_a: ahci_pwr_pin@0 {
-                allwinner,pins = "PB8";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB8";
+                function = "gpio_out";
         };
 
         usb0_vbus_pin_a: usb0_vbus_pin@0 {
-                allwinner,pins = "PB9";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PB9";
+                function = "gpio_out";
         };
 
         usb1_vbus_pin_a: usb1_vbus_pin@0 {
-                allwinner,pins = "PH6";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH6";
+                function = "gpio_out";
         };
 
         usb2_vbus_pin_a: usb2_vbus_pin@0 {
-                allwinner,pins = "PH3";
-                allwinner,function = "gpio_out";
-                allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                pins = "PH3";
+                function = "gpio_out";
         };
 };
 
diff --git a/arch/arm/boot/dts/tango4-common.dtsi b/arch/arm/boot/dts/tango4-common.dtsi
index dd7eb5f624d9..0c8cad4d6ee6 100644
--- a/arch/arm/boot/dts/tango4-common.dtsi
+++ b/arch/arm/boot/dts/tango4-common.dtsi
@@ -97,6 +97,52 @@
                         clocks = <&xtal>;
                 };
 
+                mmc0: mmc@21000 {
+                        compatible = "arasan,sdhci-8.9a";
+                        reg = <0x21000 0x200>;
+                        clock-names = "clk_xin", "clk_ahb";
+                        clocks = <&clkgen SDIO_CLK>, <&clkgen SYS_CLK>;
+                        interrupts = <60 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                mmc1: mmc@21200 {
+                        compatible = "arasan,sdhci-8.9a";
+                        reg = <0x21200 0x200>;
+                        clock-names = "clk_xin", "clk_ahb";
+                        clocks = <&clkgen SDIO_CLK>, <&clkgen SYS_CLK>;
+                        interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+                };
+
+                usb0: usb@21400 {
+                        compatible = "chipidea,usb2";
+                        reg = <0x21400 0x200>;
+                        interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
+                        phys = <&usb0_phy>;
+                        phy-names = "usb-phy";
+                };
+
+                usb0_phy: phy@21700 {
+                        compatible = "sigma,smp8642-usb-phy";
+                        reg = <0x21700 0x100>;
+                        #phy-cells = <0>;
+                        clocks = <&clkgen USB_CLK>;
+                };
+
+                usb1: usb@25400 {
+                        compatible = "chipidea,usb2";
+                        reg = <0x25400 0x200>;
+                        interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+                        phys = <&usb1_phy>;
+                        phy-names = "usb-phy";
+                };
+
+                usb1_phy: phy@25700 {
+                        compatible = "sigma,smp8642-usb-phy";
+                        reg = <0x25700 0x100>;
+                        #phy-cells = <0>;
+                        clocks = <&clkgen USB_CLK>;
+                };
+
                 eth0: ethernet@26000 {
                         compatible = "sigma,smp8734-ethernet";
                         reg = <0x26000 0x800>;
diff --git a/arch/arm/boot/dts/tango4-vantage-1172.dts b/arch/arm/boot/dts/tango4-vantage-1172.dts
index 4cab64cb581e..86d8df98802f 100644
--- a/arch/arm/boot/dts/tango4-vantage-1172.dts
+++ b/arch/arm/boot/dts/tango4-vantage-1172.dts
@@ -8,6 +8,7 @@
 
         aliases {
                 serial = &uart;
+                eth0 = &eth0;
         };
 
         memory@80000000 {
@@ -34,3 +35,7 @@
                 reg = <4>;
         };
 };
+
+&mmc1 {
+        non-removable; /* eMMC */
+};
diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index 653044a44f0d..5b860ad5cbee 100644
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -187,14 +187,8 @@
         /* Apalis SD1 */
         sdhci@700b0400 {
                 status = "okay";
-                /*
-                 * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it
-                 * features some magic properties even though the external
-                 * loopback is disabled and the internal loopback used as per
-                 * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being
-                 * set to 0xfffd according to the TRM!
-                 * cd-gpios = <&gpio TEGRA_GPIO(EE, 4) GPIO_ACTIVE_LOW>;
-                 */
+                /* SD1_CD# */
+                cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
                 bus-width = <4>;
                 vqmmc-supply = <&vddio_sdmmc3>;
         };
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 0819721dda59..f9e623bdd5c3 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -44,7 +44,7 @@
 
 /*
  * Toradex Apalis TK1 Module Device Tree
- * Compatible for Revisions 2GB: V1.0A
+ * Compatible for Revisions 2GB: V1.0A, V1.0B, V1.1A
  */
 / {
         model = "Toradex Apalis TK1";
@@ -257,7 +257,7 @@
                         };
                         dp_hpd_pff0 {
                                 nvidia,pins = "dp_hpd_pff0";
-                                nvidia,function = "rsvd2";
+                                nvidia,function = "dp";
                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -416,18 +416,10 @@
                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                         };
-                        /*
-                         * Don't use MMC1_D6 aka SDMMC3_CLK_LB_IN for now as it
-                         * features some magic properties even though the
-                         * external loopback is disabled and the internal
-                         * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0
-                         * register's SDMMC_SPARE1 bits being set to 0xfffd
-                         * according to the TRM!
-                         */
                         sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */
                                 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
-                                nvidia,function = "sdmmc3";
-                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                                nvidia,function = "rsvd2";
+                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                         };
@@ -522,20 +514,12 @@
                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                         };
-                        /*
-                         * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it
-                         * features some magic properties even though the
-                         * external loopback is disabled and the internal
-                         * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0
-                         * register's SDMMC_SPARE1 bits being set to 0xfffd
-                         * according to the TRM!
-                         */
-                        sdmmc3_clk_lb_out_pee4 { /* CD# GPIO */
-                                nvidia,pins = "sdmmc3_clk_lb_out_pee4";
-                                nvidia,function = "rsvd2";
-                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                        sdmmc3_cd_n_pv2 { /* CD# GPIO */
+                                nvidia,pins = "sdmmc3_cd_n_pv2";
+                                nvidia,function = "rsvd3";
+                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                         };
 
                         /* Apalis SPDIF */
@@ -1153,11 +1137,11 @@
                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                         };
 
-                        /* GPIO_PI6 aka TEMP_ALERT_L */
+                        /* GPIO_PI6 aka TMP451 ALERT#/THERM2# */
                         pi6 {
                                 nvidia,pins = "pi6";
                                 nvidia,function = "rsvd1";
-                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                         };
@@ -1514,13 +1498,6 @@
                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                         };
-                        sdmmc3_cd_n_pv2 { /* NC */
-                                nvidia,pins = "sdmmc3_cd_n_pv2";
-                                nvidia,function = "rsvd3";
-                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                        };
                         gpio_x1_aud_px1 { /* NC */
                                 nvidia,pins = "gpio_x1_aud_px1";
                                 nvidia,function = "rsvd2";
@@ -1570,6 +1547,22 @@
                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                         };
+                        /*
+                         * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output
+                         * driver enabled aka not tristated and input driver
+                         * enabled as well as it features some magic properties
+                         * even though the external loopback is disabled and the
+                         * internal loopback used as per
+                         * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
+                         * bits being set to 0xfffd according to the TRM!
+                         */
+                        sdmmc3_clk_lb_out_pee4 { /* NC */
+                                nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+                                nvidia,function = "sdmmc3";
+                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                        };
                 };
         };
 
diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts
index 67d7cfb32541..12eb7809d9ab 100644
--- a/arch/arm/boot/dts/tegra124-nyan-big.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-big.dts
@@ -6,7 +6,11 @@
 
 / {
         model = "Acer Chromebook 13 CB5-311";
-        compatible = "google,nyan-big", "nvidia,tegra124";
+        compatible = "google,nyan-big-rev7", "google,nyan-big-rev6",
+                     "google,nyan-big-rev5", "google,nyan-big-rev4",
+                     "google,nyan-big-rev3", "google,nyan-big-rev2",
+                     "google,nyan-big-rev1", "google,nyan-big-rev0",
+                     "google,nyan-big", "google,nyan", "nvidia,tegra124";
 
         panel: panel {
                 compatible = "auo,b133xtn01";
@@ -1098,19 +1102,19 @@
                         };
                         cam_i2c_scl_pbb1 {
                                 nvidia,pins = "cam_i2c_scl_pbb1";
-                                nvidia,function = "rsvd3";
-                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                                nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                                nvidia,function = "i2c3";
+                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                                nvidia,open-drain = <TEGRA_PIN_ENABLE>;
                         };
                         cam_i2c_sda_pbb2 {
                                 nvidia,pins = "cam_i2c_sda_pbb2";
-                                nvidia,function = "rsvd3";
-                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                                nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                                nvidia,function = "i2c3";
+                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                                nvidia,open-drain = <TEGRA_PIN_ENABLE>;
                         };
                         pbb3 {
                                 nvidia,pins = "pbb3";
diff --git a/arch/arm/boot/dts/tegra124-nyan-blaze.dts b/arch/arm/boot/dts/tegra124-nyan-blaze.dts
index c9582361c26e..1078a73d5092 100644
--- a/arch/arm/boot/dts/tegra124-nyan-blaze.dts
+++ b/arch/arm/boot/dts/tegra124-nyan-blaze.dts
@@ -6,7 +6,13 @@
 
 / {
         model = "HP Chromebook 14";
-        compatible = "google,nyan-blaze", "google,nyan", "nvidia,tegra124";
+        compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9",
+                     "google,nyan-blaze-rev8", "google,nyan-blaze-rev7",
+                     "google,nyan-blaze-rev6", "google,nyan-blaze-rev5",
+                     "google,nyan-blaze-rev4", "google,nyan-blaze-rev3",
+                     "google,nyan-blaze-rev2", "google,nyan-blaze-rev1",
+                     "google,nyan-blaze-rev0", "google,nyan-blaze",
+                     "google,nyan", "nvidia,tegra124";
 
         panel: panel {
                 compatible = "samsung,ltn140at29-301";
@@ -1094,19 +1100,19 @@
                         };
                         cam_i2c_scl_pbb1 {
                                 nvidia,pins = "cam_i2c_scl_pbb1";
-                                nvidia,function = "rsvd3";
-                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                                nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                                nvidia,function = "i2c3";
+                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                                nvidia,open-drain = <TEGRA_PIN_ENABLE>;
                         };
                         cam_i2c_sda_pbb2 {
                                 nvidia,pins = "cam_i2c_sda_pbb2";
-                                nvidia,function = "rsvd3";
-                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
-                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
-                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                                nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+                                nvidia,function = "i2c3";
+                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                                nvidia,open-drain = <TEGRA_PIN_ENABLE>;
                         };
                         pbb3 {
                                 nvidia,pins = "pbb3";
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index eabfa655a3cd..5cf987b5401e 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -65,7 +65,7 @@
                         compatible = "maxim,max98090";
                         reg = <0x10>;
                         interrupt-parent = <&gpio>;
-                        interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
+                        interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
                 };
 
                 temperature-sensor@4c {
@@ -331,10 +331,11 @@
                                         reg = <0x9>;
                                         interrupt-parent = <&gpio>;
                                         interrupts = <TEGRA_GPIO(J, 0)
-                                                        GPIO_ACTIVE_HIGH>;
+                                                        IRQ_TYPE_EDGE_BOTH>;
                                         ti,ac-detect-gpios = <&gpio
                                                         TEGRA_GPIO(J, 0)
                                                         GPIO_ACTIVE_HIGH>;
+                                        ti,external-control;
                                 };
 
                                 battery: sbs-battery@b {
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 4e361a8c167e..b4bfa5586c23 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -569,6 +569,7 @@
                         regulator-name = "+3VS,vdd_pnl";
                         regulator-min-microvolt = <3300000>;
                         regulator-max-microvolt = <3300000>;
+                        regulator-boot-on;
                         gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
                         enable-active-high;
                 };
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 381747f114a9..87b07fbadbbe 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -366,6 +366,7 @@
 
         sdhci@c8000000 {
                 status = "okay";
+                broken-cd;
                 bus-width = <4>;
         };
 
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
index 10a711041b4a..8ee79da9af7c 100644
--- a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for UniPhier SoCs default pinctrl settings
  *
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,6 +44,11 @@
  */
 
 &pinctrl {
+        pinctrl_emmc: emmc_grp {
+                groups = "emmc";
+                function = "emmc";
+        };
+
         pinctrl_i2c0: i2c0_grp {
                 groups = "i2c0";
                 function = "i2c0";
@@ -78,6 +84,16 @@
                 function = "nand";
         };
 
+        pinctrl_sd: sd_grp {
+                groups = "sd";
+                function = "sd";
+        };
+
+        pinctrl_sd1: sd1_grp {
+                groups = "sd1";
+                function = "sd1";
+        };
+
         pinctrl_system_bus: system_bus_grp {
                 groups = "system_bus", "system_bus_cs1";
                 function = "system_bus";
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
index 1e0b823f7e8f..091b738041a0 100644
--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index 21bfef957b68..b6a1eeeb2bb4 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf500-colibri-eval-v3.dts b/arch/arm/boot/dts/vf500-colibri-eval-v3.dts
index b3aeab58f718..076998968fb5 100644
--- a/arch/arm/boot/dts/vf500-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/vf500-colibri-eval-v3.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf500-colibri.dtsi b/arch/arm/boot/dts/vf500-colibri.dtsi
index 1a8a0efa19a6..515c4d2f28b0 100644
--- a/arch/arm/boot/dts/vf500-colibri.dtsi
+++ b/arch/arm/boot/dts/vf500-colibri.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi
index d7fdb2a7d97b..3d9896171bfc 100644
--- a/arch/arm/boot/dts/vf500.dtsi
+++ b/arch/arm/boot/dts/vf500.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610-colibri-eval-v3.dts b/arch/arm/boot/dts/vf610-colibri-eval-v3.dts
index dbca4f86fdbb..ef9b4d6209f6 100644
--- a/arch/arm/boot/dts/vf610-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/vf610-colibri-eval-v3.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610-colibri.dtsi b/arch/arm/boot/dts/vf610-colibri.dtsi
index 9ec9e337f5a8..395812c52933 100644
--- a/arch/arm/boot/dts/vf610-colibri.dtsi
+++ b/arch/arm/boot/dts/vf610-colibri.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index cdc100732514..53e3b8b250c6 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
index 958b4c42d320..7940408838df 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
@@ -13,17 +13,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,43 +32,23 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /dts-v1/;
-#include "vf610.dtsi"
+#include "vf610-zii-dev.dtsi"
 
 / {
         model = "ZII VF610 Development Board, Rev B";
         compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
 
-        chosen {
-                stdout-path = "serial0:115200n8";
-        };
-
-        memory {
-                reg = <0x80000000 0x20000000>;
-        };
-
-        gpio-leds {
-                compatible = "gpio-leds";
-                pinctrl-0 = <&pinctrl_leds_debug>;
-                pinctrl-names = "default";
-
-                debug {
-                        label = "zii:green:debug1";
-                        gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-                        linux,default-trigger = "heartbeat";
-                };
-        };
-
         mdio-mux {
                 compatible = "mdio-mux-gpio";
                 pinctrl-0 = <&pinctrl_mdio_mux>;
@@ -86,7 +66,7 @@
                         #address-cells = <1>;
                         #size-cells = <0>;
 
-                        switch0: switch0@0 {
+                        switch0: switch@0 {
                                 compatible = "marvell,mv88e6085";
                                 pinctrl-0 = <&pinctrl_gpio_switch0>;
                                 pinctrl-names = "default";
@@ -102,6 +82,7 @@
                                 ports {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
+
                                         port@0 {
                                                 reg = <0>;
                                                 label = "lan0";
@@ -136,6 +117,7 @@
                                                 reg = <6>;
                                                 label = "cpu";
                                                 ethernet = <&fec1>;
+
                                                 fixed-link {
                                                         speed = <100>;
                                                         full-duplex;
@@ -169,7 +151,7 @@
                         #address-cells = <1>;
                         #size-cells = <0>;
 
-                        switch1: switch1@0 {
+                        switch1: switch@0 {
                                 compatible = "marvell,mv88e6085";
                                 pinctrl-0 = <&pinctrl_gpio_switch1>;
                                 pinctrl-names = "default";
@@ -185,6 +167,7 @@
                                 ports {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
+
                                         port@0 {
                                                 reg = <0>;
                                                 label = "lan3";
@@ -208,6 +191,7 @@
                                                 label = "dsa";
                                                 link = <&switch2port9>;
                                                 phy-mode = "rgmii-txid";
+
                                                 fixed-link {
                                                         speed = <1000>;
                                                         full-duplex;
@@ -228,16 +212,19 @@
                                 mdio {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
+
                                         switch1phy0: switch1phy0@0 {
                                                 reg = <0>;
                                                 interrupt-parent = <&switch1>;
                                                 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
                                         };
+
                                         switch1phy1: switch1phy0@1 {
                                                 reg = <1>;
                                                 interrupt-parent = <&switch1>;
                                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
                                         };
+
                                         switch1phy2: switch1phy0@2 {
                                                 reg = <2>;
                                                 interrupt-parent = <&switch1>;
@@ -262,6 +249,7 @@
                                 ports {
                                         #address-cells = <1>;
                                         #size-cells = <0>;
+
                                         port@0 {
                                                 reg = <0>;
                                                 label = "lan6";
@@ -280,6 +268,7 @@
                                         port@3 {
                                                 reg = <3>;
                                                 label = "optical3";
+
                                                 fixed-link {
                                                         speed = <1000>;
                                                         full-duplex;
@@ -291,6 +280,7 @@
                                         port@4 {
                                                 reg = <4>;
                                                 label = "optical4";
+
                                                 fixed-link {
                                                         speed = <1000>;
                                                         full-duplex;
@@ -305,6 +295,7 @@
                                                 phy-mode = "rgmii-txid";
                                                 link = <&switch1port5
                                                         &switch0port5>;
+
                                                 fixed-link {
                                                         speed = <1000>;
                                                         full-duplex;
@@ -321,25 +312,6 @@
                 };
         };
 
-        reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
-                compatible = "regulator-fixed";
-                regulator-name = "vcc_3v3_mcu";
-                regulator-min-microvolt = <3300000>;
-                regulator-max-microvolt = <3300000>;
-        };
-
-        usb0_vbus: regulator-usb0-vbus {
-                compatible = "regulator-fixed";
-                pinctrl-0 = <&pinctrl_usb_vbus>;
-                regulator-name = "usb_vbus";
-                regulator-min-microvolt = <5000000>;
-                regulator-max-microvolt = <5000000>;
-                enable-active-high;
-                regulator-always-on;
-                regulator-boot-on;
-                gpio = <&gpio0 6 0>;
-        };
-
         spi0 {
                 compatible = "spi-gpio";
                 pinctrl-0 = <&pinctrl_gpio_spi0>;
@@ -376,49 +348,6 @@
         };
 };
 
-&adc0 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_adc0_ad5>;
-        vref-supply = <&reg_vcc_3v3_mcu>;
-        status = "okay";
-};
-
-&edma0 {
-        status = "okay";
-};
-
-&esdhc1 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_esdhc1>;
-        bus-width = <4>;
-        status = "okay";
-};
-
-&fec0 {
-        phy-mode = "rmii";
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_fec0>;
-        status = "okay";
-};
-
-&fec1 {
-        phy-mode = "rmii";
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_fec1>;
-        status = "okay";
-
-        fixed-link {
-                   speed = <100>;
-                   full-duplex;
-        };
-
-        mdio1: mdio {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                status = "okay";
-        };
-};
-
 &i2c0 {
         clock-frequency = <100000>;
         pinctrl-names = "default";
@@ -443,33 +372,6 @@
                 interrupt-parent = <&gpio2>;
                 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
         };
-
-        lm75@48 {
-                compatible = "national,lm75";
-                reg = <0x48>;
-        };
-
-        at24c04@50 {
-                compatible = "atmel,24c04";
-                reg = <0x50>;
-        };
-
-        at24c04@52 {
-                compatible = "atmel,24c04";
-                reg = <0x52>;
-        };
-
-        ds1682@6b {
-                compatible = "dallas,ds1682";
-                reg = <0x6b>;
-        };
-};
-
-&i2c1 {
-        clock-frequency = <100000>;
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_i2c1>;
-        status = "okay";
 };
 
 &i2c2 {
@@ -539,120 +441,8 @@
         };
 };
 
-&uart0 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_uart0>;
-        status = "okay";
-};
-
-&uart1 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_uart1>;
-        status = "okay";
-};
-
-&uart2 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_uart2>;
-        status = "okay";
-};
-
-&usbdev0 {
-        disable-over-current;
-        vbus-supply = <&usb0_vbus>;
-        dr_mode = "host";
-        status = "okay";
-};
-
-&usbh1 {
-        disable-over-current;
-        status = "okay";
-};
-
-&usbmisc0 {
-        status = "okay";
-};
-
-&usbmisc1 {
-        status = "okay";
-};
-
-&usbphy0 {
-        status = "okay";
-};
-
-&usbphy1 {
-        status = "okay";
-};
 
 &iomuxc {
-        pinctrl_adc0_ad5: adc0ad5grp {
-                fsl,pins = <
-                        VF610_PAD_PTC30__ADC0_SE5       0x00a1
-                >;
-        };
-
-        pinctrl_dspi0: dspi0grp {
-                fsl,pins = <
-                        VF610_PAD_PTB18__DSPI0_CS1      0x1182
-                        VF610_PAD_PTB19__DSPI0_CS0      0x1182
-                        VF610_PAD_PTB20__DSPI0_SIN      0x1181
-                        VF610_PAD_PTB21__DSPI0_SOUT     0x1182
-                        VF610_PAD_PTB22__DSPI0_SCK      0x1182
-                >;
-        };
-
-        pinctrl_dspi2: dspi2grp {
-                fsl,pins = <
-                        VF610_PAD_PTD31__DSPI2_CS1      0x1182
-                        VF610_PAD_PTD30__DSPI2_CS0      0x1182
-                        VF610_PAD_PTD29__DSPI2_SIN      0x1181
-                        VF610_PAD_PTD28__DSPI2_SOUT     0x1182
-                        VF610_PAD_PTD27__DSPI2_SCK      0x1182
-                >;
-        };
-
-        pinctrl_esdhc1: esdhc1grp {
-                fsl,pins = <
-                        VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
-                        VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
-                        VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
-                        VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
-                        VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
-                        VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
-                        VF610_PAD_PTA7__GPIO_134        0x219d
-                >;
-        };
-
-        pinctrl_fec0: fec0grp {
-                fsl,pins = <
-                        VF610_PAD_PTC0__ENET_RMII0_MDC  0x30d2
-                        VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3
-                        VF610_PAD_PTC2__ENET_RMII0_CRS  0x30d1
-                        VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
-                        VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
-                        VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
-                        VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
-                        VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
-                        VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
-                >;
-        };
-
-        pinctrl_fec1: fec1grp {
-                fsl,pins = <
-                        VF610_PAD_PTA6__RMII_CLKIN              0x30d1
-                        VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
-                        VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
-                        VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
-                        VF610_PAD_PTC12__ENET_RMII1_RXD1        0x30d1
-                        VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
-                        VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
-                        VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
-                        VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
-                        VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
-                >;
-        };
-
         pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {
                 fsl,pins = <
                         VF610_PAD_PTE27__GPIO_132       0x33e2
@@ -681,39 +471,6 @@
                 >;
         };
 
-        pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
-                fsl,pins = <
-                         VF610_PAD_PTE14__GPIO_119      0x31c2
-                         >;
-        };
-
-        pinctrl_i2c0: i2c0grp {
-                fsl,pins = <
-                        VF610_PAD_PTB14__I2C0_SCL       0x37ff
-                        VF610_PAD_PTB15__I2C0_SDA       0x37ff
-                >;
-        };
-
-        pinctrl_i2c1: i2c1grp {
-                fsl,pins = <
-                        VF610_PAD_PTB16__I2C1_SCL       0x37ff
-                        VF610_PAD_PTB17__I2C1_SDA       0x37ff
-                >;
-        };
-
-        pinctrl_i2c2: i2c2grp {
-                fsl,pins = <
-                        VF610_PAD_PTA22__I2C2_SCL       0x37ff
-                        VF610_PAD_PTA23__I2C2_SDA       0x37ff
-                >;
-        };
-
-        pinctrl_leds_debug: pinctrl-leds-debug {
-                fsl,pins = <
-                         VF610_PAD_PTD20__GPIO_74       0x31c2
-                         >;
-        };
-
         pinctrl_mdio_mux: pinctrl-mdio-mux {
                 fsl,pins = <
                         VF610_PAD_PTA18__GPIO_8         0x31c2
@@ -728,57 +485,4 @@
                         VF610_PAD_PTB28__GPIO_98        0x219d
                 >;
         };
-
-        pinctrl_pwm0: pwm0grp {
-                fsl,pins = <
-                        VF610_PAD_PTB0__FTM0_CH0        0x1582
-                        VF610_PAD_PTB1__FTM0_CH1        0x1582
-                        VF610_PAD_PTB2__FTM0_CH2        0x1582
-                        VF610_PAD_PTB3__FTM0_CH3        0x1582
-                >;
-        };
-
-        pinctrl_qspi0: qspi0grp {
-                fsl,pins = <
-                        VF610_PAD_PTD7__QSPI0_B_QSCK    0x31c3
-                        VF610_PAD_PTD8__QSPI0_B_CS0     0x31ff
-                        VF610_PAD_PTD9__QSPI0_B_DATA3   0x31c3
-                        VF610_PAD_PTD10__QSPI0_B_DATA2  0x31c3
-                        VF610_PAD_PTD11__QSPI0_B_DATA1  0x31c3
-                        VF610_PAD_PTD12__QSPI0_B_DATA0  0x31c3
-                >;
-        };
-
-        pinctrl_uart0: uart0grp {
-                fsl,pins = <
-                        VF610_PAD_PTB10__UART0_TX       0x21a2
-                        VF610_PAD_PTB11__UART0_RX       0x21a1
-                >;
-        };
-
-        pinctrl_uart1: uart1grp {
-                fsl,pins = <
-                        VF610_PAD_PTB23__UART1_TX       0x21a2
-                        VF610_PAD_PTB24__UART1_RX       0x21a1
-                >;
-        };
-
-        pinctrl_uart2: uart2grp {
-                fsl,pins = <
-                        VF610_PAD_PTD0__UART2_TX        0x21a2
-                        VF610_PAD_PTD1__UART2_RX        0x21a1
-                >;
-        };
-
-        pinctrl_usb_vbus: pinctrl-usb-vbus {
-                fsl,pins = <
-                        VF610_PAD_PTA16__GPIO_6 0x31c2
-                >;
-        };
-
-        pinctrl_usb0_host: usb0-host-grp {
-                fsl,pins = <
-                        VF610_PAD_PTD6__GPIO_85         0x0062
-                >;
-        };
 };
diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
new file mode 100644
index 000000000000..6a45bd24ffe6
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
@@ -0,0 +1,416 @@
+/*
+ * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
+ *
+ * Based on an original 'vf610-twr.dts' which is Copyright 2015,
+ * Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "vf610-zii-dev.dtsi"
+
+/ {
+        model = "ZII VF610 Development Board, Rev C";
+        compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
+
+        mdio-mux {
+                compatible = "mdio-mux-gpio";
+                pinctrl-0 = <&pinctrl_mdio_mux>;
+                pinctrl-names = "default";
+                gpios = <&gpio0 8  GPIO_ACTIVE_HIGH
+                         &gpio0 9  GPIO_ACTIVE_HIGH
+                         &gpio0 25 GPIO_ACTIVE_HIGH>;
+                mdio-parent-bus = <&mdio1>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                mdio_mux_1: mdio@1 {
+                        reg = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        switch0: switch@0 {
+                                compatible = "marvell,mv88e6190";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0>;
+                                dsa,member = <0 0>;
+                                eeprom-length = <512>;
+
+                                ports {
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+
+                                        port@0 {
+                                                reg = <0>;
+                                                label = "cpu";
+                                                ethernet = <&fec1>;
+
+                                                fixed-link {
+                                                        speed = <100>;
+                                                        full-duplex;
+                                                };
+                                        };
+
+                                        port@1 {
+                                                reg = <1>;
+                                                label = "lan1";
+                                        };
+
+                                        port@2 {
+                                                reg = <2>;
+                                                label = "lan2";
+                                        };
+
+                                        port@3 {
+                                                reg = <3>;
+                                                label = "lan3";
+                                        };
+
+                                        port@4 {
+                                                reg = <4>;
+                                                label = "lan4";
+                                        };
+
+                                        switch0port10: port@10 {
+                                                reg = <10>;
+                                                label = "dsa";
+                                                phy-mode = "xgmii";
+                                                link = <&switch1port10>;
+                                        };
+                                };
+                        };
+                };
+
+                mdio_mux_2: mdio@2 {
+                        reg = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        switch1: switch@0 {
+                                compatible = "marvell,mv88e6190";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                reg = <0>;
+                                dsa,member = <0 1>;
+                                eeprom-length = <512>;
+
+                                ports {
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+
+                                        port@1 {
+                                                reg = <1>;
+                                                label = "lan5";
+                                        };
+
+                                        port@2 {
+                                                reg = <2>;
+                                                label = "lan6";
+                                        };
+
+                                        port@3 {
+                                                reg = <3>;
+                                                label = "lan7";
+                                        };
+
+                                        port@4 {
+                                                reg = <4>;
+                                                label = "lan8";
+                                        };
+
+
+                                        switch1port10: port@10 {
+                                                reg = <10>;
+                                                label = "dsa";
+                                                phy-mode = "xgmii";
+                                                link = <&switch0port10>;
+                                        };
+                                };
+                        };
+                };
+
+                mdio_mux_4: mdio@4 {
+                        reg = <4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
+};
+
+&dspi0 {
+        bus-num = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_dspi0>;
+        status = "okay";
+        spi-num-chipselects = <2>;
+
+        m25p128@0 {
+                compatible = "m25p128", "jedec,spi-nor";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0>;
+                spi-max-frequency = <1000000>;
+        };
+
+        atzb-rf-233@1 {
+                compatible = "atmel,at86rf233";
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctr_atzb_rf_233>;
+
+                spi-max-frequency = <7500000>;
+                reg = <1>;
+                interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-parent = <&gpio3>;
+                xtal-trim = /bits/ 8 <0x06>;
+
+                sleep-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+                reset-gpio = <&gpio6 10 GPIO_ACTIVE_HIGH>;
+
+                fsl,spi-cs-sck-delay = <180>;
+                fsl,spi-sck-cs-delay = <250>;
+        };
+};
+
+&i2c0 {
+        /*
+         * U712
+         *
+         * Exposed signals:
+         *    P1 - WE2_CMD
+         *    P2 - WE2_CLK
+         */
+        gpio5: pca9557@18 {
+                compatible = "nxp,pca9557";
+                reg = <0x18>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
+
+        /*
+         * U121
+         *
+         * Exposed signals:
+         *    I/O0  - ENET_SWR_EN
+         *    I/O1  - ESW1_RESETn
+         *    I/O2  - ARINC_RESET
+         *    I/O3  - DD1_IO_RESET
+         *    I/O4  - ESW2_RESETn
+         *    I/O5  - ESW3_RESETn
+         *    I/O6  - ESW4_RESETn
+         *    I/O8  - TP909
+         *    I/O9  - FEM_SEL
+         *    I/O10 - WIFI_RESETn
+         *    I/O11 - PHY_RSTn
+         *    I/O12 - OPT1_SD
+         *    I/O13 - OPT2_SD
+         *    I/O14 - OPT1_TX_DIS
+         *    I/O15 - OPT2_TX_DIS
+         */
+        gpio6: sx1503@20 {
+                compatible = "semtech,sx1503q";
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_sx1503_20>;
+                #gpio-cells = <2>;
+                #interrupt-cells = <2>;
+                reg = <0x20>;
+                interrupt-parent = <&gpio0>;
+                interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
+                gpio-controller;
+                interrupt-controller;
+
+                enet_swr_en {
+                        gpio-hog;
+                        gpios = <0 GPIO_ACTIVE_HIGH>;
+                        output-high;
+                        line-name = "enet-swr-en";
+                };
+        };
+
+        /*
+         * U715
+         *
+         * Exposed signals:
+         *     IO0 - WE1_CLK
+         *     IO1 - WE1_CMD
+         */
+        gpio7: pca9554@22 {
+                compatible = "nxp,pca9554";
+                reg = <0x22>;
+                gpio-controller;
+                #gpio-cells = <2>;
+
+        };
+};
+
+&i2c1 {
+        at24mac602@00 {
+                compatible = "atmel,24c02";
+                reg = <0x50>;
+                read-only;
+        };
+};
+
+&i2c2 {
+        tca9548@70 {
+                compatible = "nxp,pca9548";
+                pinctrl-0 = <&pinctrl_i2c_mux_reset>;
+                pinctrl-names = "default";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x70>;
+                reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+
+                i2c@0 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0>;
+                };
+
+                i2c@1 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <1>;
+
+                        sfp2: at24c04@50 {
+                                compatible = "atmel,24c02";
+                                reg = <0x50>;
+                        };
+                };
+
+                i2c@2 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <2>;
+
+                        sfp3: at24c04@50 {
+                                compatible = "atmel,24c02";
+                                reg = <0x50>;
+                        };
+                };
+
+                i2c@3 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <3>;
+                };
+        };
+};
+
+&uart3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart3>;
+        status = "okay";
+};
+
+&gpio0 {
+        eth0_intrp {
+                gpio-hog;
+                gpios = <23 GPIO_ACTIVE_HIGH>;
+                input;
+                line-name = "sx1503-irq";
+        };
+};
+
+&gpio3 {
+        eth0_intrp {
+                gpio-hog;
+                gpios = <2 GPIO_ACTIVE_HIGH>;
+                input;
+                line-name = "eth0-intrp";
+        };
+};
+
+&fec0 {
+        mdio {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "okay";
+
+                ethernet-phy@0 {
+                        compatible = "ethernet-phy-ieee802.3-c22";
+
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_fec0_phy_int>;
+
+                        interrupt-parent = <&gpio3>;
+                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+                        reg = <0>;
+                };
+        };
+};
+
+&iomuxc {
+        pinctr_atzb_rf_233: pinctrl-atzb-rf-233 {
+                fsl,pins = <
+                        VF610_PAD_PTB2__GPIO_24         0x31c2
+                        VF610_PAD_PTE27__GPIO_132       0x33e2
+                >;
+        };
+
+
+        pinctrl_sx1503_20: pinctrl-sx1503-20 {
+                fsl,pins = <
+                        VF610_PAD_PTB1__GPIO_23         0x219d
+                >;
+        };
+
+        pinctrl_uart3: uart3grp {
+                fsl,pins = <
+                        VF610_PAD_PTA20__UART3_TX       0x21a2
+                        VF610_PAD_PTA21__UART3_RX       0x21a1
+                >;
+        };
+
+        pinctrl_mdio_mux: pinctrl-mdio-mux {
+                fsl,pins = <
+                        VF610_PAD_PTA18__GPIO_8         0x31c2
+                        VF610_PAD_PTA19__GPIO_9         0x31c2
+                        VF610_PAD_PTB3__GPIO_25         0x31c2
+                >;
+        };
+
+        pinctrl_fec0_phy_int: pinctrl-fec0-phy-int {
+                fsl,pins = <
+                        VF610_PAD_PTB28__GPIO_98        0x219d
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/vf610-zii-dev.dtsi b/arch/arm/boot/dts/vf610-zii-dev.dtsi
new file mode 100644
index 000000000000..ca9e1bc35e45
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-zii-dev.dtsi
@@ -0,0 +1,383 @@
+/*
+ * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
+ *
+ * Based on an original 'vf610-twr.dts' which is Copyright 2015,
+ * Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "vf610.dtsi"
+
+/ {
+        chosen {
+                stdout-path = "serial0:115200n8";
+        };
+
+        memory {
+                reg = <0x80000000 0x20000000>;
+        };
+
+        gpio-leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&pinctrl_leds_debug>;
+                pinctrl-names = "default";
+
+                debug {
+                        label = "zii:green:debug1";
+                        gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+                        linux,default-trigger = "heartbeat";
+                };
+        };
+
+        reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
+                compatible = "regulator-fixed";
+                regulator-name = "vcc_3v3_mcu";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+        };
+
+        usb0_vbus: regulator-usb0-vbus {
+                compatible = "regulator-fixed";
+                pinctrl-0 = <&pinctrl_usb_vbus>;
+                regulator-name = "usb_vbus";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                enable-active-high;
+                regulator-always-on;
+                regulator-boot-on;
+                gpio = <&gpio0 6 0>;
+        };
+};
+
+&adc0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_adc0_ad5>;
+        vref-supply = <&reg_vcc_3v3_mcu>;
+        status = "okay";
+};
+
+&edma0 {
+        status = "okay";
+};
+
+&esdhc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_esdhc1>;
+        bus-width = <4>;
+        status = "okay";
+};
+
+&fec0 {
+        phy-mode = "rmii";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_fec0>;
+        status = "okay";
+};
+
+&fec1 {
+        phy-mode = "rmii";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_fec1>;
+        status = "okay";
+
+        fixed-link {
+                   speed = <100>;
+                   full-duplex;
+        };
+
+        mdio1: mdio {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "okay";
+        };
+};
+
+&i2c0 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default", "gpio";
+        pinctrl-0 = <&pinctrl_i2c0>;
+        pinctrl-1 = <&pinctrl_i2c0_gpio>;
+        scl-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+        sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+
+        lm75@48 {
+                compatible = "national,lm75";
+                reg = <0x48>;
+        };
+
+        at24c04@50 {
+                compatible = "atmel,24c04";
+                reg = <0x50>;
+        };
+
+        at24c04@52 {
+                compatible = "atmel,24c04";
+                reg = <0x52>;
+        };
+
+        ds1682@6b {
+                compatible = "dallas,ds1682";
+                reg = <0x6b>;
+        };
+};
+
+&i2c1 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c1>;
+        status = "okay";
+};
+
+&i2c2 {
+        clock-frequency = <100000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2>;
+        status = "okay";
+};
+
+&uart0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart0>;
+        status = "okay";
+};
+
+&uart1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1>;
+        status = "okay";
+};
+
+&uart2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart2>;
+        status = "okay";
+};
+
+&usbdev0 {
+        disable-over-current;
+        vbus-supply = <&usb0_vbus>;
+        dr_mode = "host";
+        status = "okay";
+};
+
+&usbh1 {
+        disable-over-current;
+        status = "okay";
+};
+
+&usbmisc0 {
+        status = "okay";
+};
+
+&usbmisc1 {
+        status = "okay";
+};
+
+&usbphy0 {
+        status = "okay";
+};
+
+&usbphy1 {
+        status = "okay";
+};
+
+&iomuxc {
+        pinctrl_adc0_ad5: adc0ad5grp {
+                fsl,pins = <
+                        VF610_PAD_PTC30__ADC0_SE5       0x00a1
+                >;
+        };
+
+        pinctrl_dspi0: dspi0grp {
+                fsl,pins = <
+                        VF610_PAD_PTB18__DSPI0_CS1      0x1182
+                        VF610_PAD_PTB19__DSPI0_CS0      0x1182
+                        VF610_PAD_PTB20__DSPI0_SIN      0x1181
+                        VF610_PAD_PTB21__DSPI0_SOUT     0x1182
+                        VF610_PAD_PTB22__DSPI0_SCK      0x1182
+                >;
+        };
+
+        pinctrl_dspi2: dspi2grp {
+                fsl,pins = <
+                        VF610_PAD_PTD31__DSPI2_CS1      0x1182
+                        VF610_PAD_PTD30__DSPI2_CS0      0x1182
+                        VF610_PAD_PTD29__DSPI2_SIN      0x1181
+                        VF610_PAD_PTD28__DSPI2_SOUT     0x1182
+                        VF610_PAD_PTD27__DSPI2_SCK      0x1182
+                >;
+        };
+
+        pinctrl_esdhc1: esdhc1grp {
+                fsl,pins = <
+                        VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
+                        VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
+                        VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
+                        VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
+                        VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
+                        VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
+                        VF610_PAD_PTA7__GPIO_134        0x219d
+                >;
+        };
+
+        pinctrl_fec0: fec0grp {
+                fsl,pins = <
+                        VF610_PAD_PTC0__ENET_RMII0_MDC  0x30d2
+                        VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3
+                        VF610_PAD_PTC2__ENET_RMII0_CRS  0x30d1
+                        VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
+                        VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
+                        VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
+                        VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
+                        VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
+                        VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
+                >;
+        };
+
+        pinctrl_fec1: fec1grp {
+                fsl,pins = <
+                        VF610_PAD_PTA6__RMII_CLKIN              0x30d1
+                        VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
+                        VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
+                        VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
+                        VF610_PAD_PTC12__ENET_RMII1_RXD1        0x30d1
+                        VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
+                        VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
+                        VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
+                        VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
+                        VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
+                >;
+        };
+
+        pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
+                fsl,pins = <
+                        VF610_PAD_PTB22__GPIO_44        0x33e2
+                        VF610_PAD_PTB21__GPIO_43        0x33e2
+                        VF610_PAD_PTB20__GPIO_42        0x33e1
+                        VF610_PAD_PTB19__GPIO_41        0x33e2
+                        VF610_PAD_PTB18__GPIO_40        0x33e2
+                >;
+        };
+
+        pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
+                fsl,pins = <
+                         VF610_PAD_PTE14__GPIO_119      0x31c2
+                         >;
+        };
+
+        pinctrl_i2c0: i2c0grp {
+                fsl,pins = <
+                        VF610_PAD_PTB14__I2C0_SCL       0x37ff
+                        VF610_PAD_PTB15__I2C0_SDA       0x37ff
+                >;
+        };
+
+        pinctrl_i2c0_gpio: i2c0grp-gpio {
+                fsl,pins = <
+                        VF610_PAD_PTB14__GPIO_36        0x31c2
+                        VF610_PAD_PTB15__GPIO_37        0x31c2
+                >;
+        };
+
+
+        pinctrl_i2c1: i2c1grp {
+                fsl,pins = <
+                        VF610_PAD_PTB16__I2C1_SCL       0x37ff
+                        VF610_PAD_PTB17__I2C1_SDA       0x37ff
+                >;
+        };
+
+        pinctrl_i2c2: i2c2grp {
+                fsl,pins = <
+                        VF610_PAD_PTA22__I2C2_SCL       0x37ff
+                        VF610_PAD_PTA23__I2C2_SDA       0x37ff
+                >;
+        };
+
+        pinctrl_leds_debug: pinctrl-leds-debug {
+                fsl,pins = <
+                         VF610_PAD_PTD20__GPIO_74       0x31c2
+                         >;
+        };
+
+        pinctrl_qspi0: qspi0grp {
+                fsl,pins = <
+                        VF610_PAD_PTD7__QSPI0_B_QSCK    0x31c3
+                        VF610_PAD_PTD8__QSPI0_B_CS0     0x31ff
+                        VF610_PAD_PTD9__QSPI0_B_DATA3   0x31c3
+                        VF610_PAD_PTD10__QSPI0_B_DATA2  0x31c3
+                        VF610_PAD_PTD11__QSPI0_B_DATA1  0x31c3
+                        VF610_PAD_PTD12__QSPI0_B_DATA0  0x31c3
+                >;
+        };
+
+        pinctrl_uart0: uart0grp {
+                fsl,pins = <
+                        VF610_PAD_PTB10__UART0_TX       0x21a2
+                        VF610_PAD_PTB11__UART0_RX       0x21a1
+                >;
+        };
+
+        pinctrl_uart1: uart1grp {
+                fsl,pins = <
+                        VF610_PAD_PTB23__UART1_TX       0x21a2
+                        VF610_PAD_PTB24__UART1_RX       0x21a1
+                >;
+        };
+
+        pinctrl_uart2: uart2grp {
+                fsl,pins = <
+                        VF610_PAD_PTD0__UART2_TX        0x21a2
+                        VF610_PAD_PTD1__UART2_RX        0x21a1
+                >;
+        };
+
+        pinctrl_usb_vbus: pinctrl-usb-vbus {
+                fsl,pins = <
+                        VF610_PAD_PTA16__GPIO_6 0x31c2
+                >;
+        };
+
+        pinctrl_usb0_host: usb0-host-grp {
+                fsl,pins = <
+                        VF610_PAD_PTD6__GPIO_85         0x0062
+                >;
+        };
+};
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 0cfc060f94d7..80fef182c672 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610m4-colibri.dts b/arch/arm/boot/dts/vf610m4-colibri.dts
index 2931a80caccb..7198e8cceb0d 100644
--- a/arch/arm/boot/dts/vf610m4-colibri.dts
+++ b/arch/arm/boot/dts/vf610m4-colibri.dts
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610m4-cosmic.dts b/arch/arm/boot/dts/vf610m4-cosmic.dts
index 8944a2d2054c..f7474c11aabd 100644
--- a/arch/arm/boot/dts/vf610m4-cosmic.dts
+++ b/arch/arm/boot/dts/vf610m4-cosmic.dts
@@ -15,17 +15,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -34,11 +34,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vf610m4.dtsi b/arch/arm/boot/dts/vf610m4.dtsi
index 9f2c731839f2..1474bd34d0f1 100644
--- a/arch/arm/boot/dts/vf610m4.dtsi
+++ b/arch/arm/boot/dts/vf610m4.dtsi
@@ -13,17 +13,17 @@
  *     published by the Free Software Foundation; either version 2 of the
  *     License, or (at your option) any later version.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -32,11 +32,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index e9d28474c26a..5d654b5b4ce6 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -10,17 +10,17 @@
  *     modify it under the terms of the GNU General Public License
  *     version 2 as published by the Free Software Foundation.
  *
- *     This file is distributed in the hope that it will be useful
+ *     This file is distributed in the hope that it will be useful,
  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- * Or, alternatively
+ * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
  *     obtaining a copy of this software and associated documentation
  *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
+ *     restriction, including without limitation the rights to use,
  *     copy, modify, merge, publish, distribute, sublicense, and/or
  *     sell copies of the Software, and to permit persons to whom the
  *     Software is furnished to do so, subject to the following
@@ -29,11 +29,11 @@
  *     The above copyright notice and this permission notice shall be
  *     included in all copies or substantial portions of the Software.
  *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index faab9b31baf5..e40b77583c47 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -1298,6 +1298,8 @@ static const struct samsung_pll_rate_table exynos4210_vpll_rates[] __initconst =
 };
 
 static const struct samsung_pll_rate_table exynos4x12_apll_rates[] __initconst = {
+        PLL_35XX_RATE(1704000000, 213, 3, 0),
+        PLL_35XX_RATE(1600000000, 200, 3, 0),
         PLL_35XX_RATE(1500000000, 250, 4, 0),
         PLL_35XX_RATE(1400000000, 175, 3, 0),
         PLL_35XX_RATE(1300000000, 325, 6, 0),
@@ -1421,6 +1423,8 @@ static const struct exynos_cpuclk_cfg_data e4212_armclk_d[] __initconst = {
                 (((cores) << 8) | ((hpm) << 4) | ((copy) << 0))
 
 static const struct exynos_cpuclk_cfg_data e4412_armclk_d[] __initconst = {
+        { 1704000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4412_CPU_DIV1(7, 0, 7), },
+        { 1600000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4412_CPU_DIV1(7, 0, 6), },
         { 1500000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4412_CPU_DIV1(7, 0, 6), },
         { 1400000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4412_CPU_DIV1(6, 0, 6), },
         { 1300000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4412_CPU_DIV1(6, 0, 5), },
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index 29e01ed10e74..ce09915c298f 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -25,6 +25,10 @@
 #define R7S72100_CLK_SCIF6      1
 #define R7S72100_CLK_SCIF7      0
 
+/* MSTP5 */
+#define R7S72100_CLK_OSTM0      1
+#define R7S72100_CLK_OSTM1      0
+
 /* MSTP7 */
 #define R7S72100_CLK_ETHER      4
 
diff --git a/include/dt-bindings/clock/stm32fx-clock.h b/include/dt-bindings/clock/stm32fx-clock.h
new file mode 100644
index 000000000000..08bcab61b714
--- /dev/null
+++ b/include/dt-bindings/clock/stm32fx-clock.h
@@ -0,0 +1,39 @@
+/*
+ * stm32fx-clock.h
+ *
+ * Copyright (C) 2016 STMicroelectronics
+ * Author: Gabriel Fernandez for STMicroelectronics.
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+/*
+ * List of clocks wich are not derived from system clock (SYSCLOCK)
+ *
+ * The index of these clocks is the secondary index of DT bindings
+ * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt)
+ *
+ * e.g:
+        <assigned-clocks = <&rcc 1 CLK_LSE>;
+*/
+
+#ifndef _DT_BINDINGS_CLK_STMFX_H
+#define _DT_BINDINGS_CLK_STMFX_H
+
+#define SYSTICK                 0
+#define FCLK                    1
+#define CLK_LSI                 2
+#define CLK_LSE                 3
+#define CLK_HSE_RTC             4
+#define CLK_RTC                 5
+#define PLL_VCO_I2S             6
+#define PLL_VCO_SAI             7
+#define CLK_LCD                 8
+#define CLK_I2S                 9
+#define CLK_SAI1                10
+#define CLK_SAI2                11
+#define CLK_I2SQ_PDIV           12
+#define CLK_SAIQ_PDIV           13
+
+#define END_PRIMARY_CLK         14
+
+#endif
diff --git a/include/dt-bindings/mfd/stm32f4-rcc.h b/include/dt-bindings/mfd/stm32f4-rcc.h
index e98942dc0d44..082a81c94298 100644
--- a/include/dt-bindings/mfd/stm32f4-rcc.h
+++ b/include/dt-bindings/mfd/stm32f4-rcc.h
@@ -18,14 +18,20 @@
 #define STM32F4_RCC_AHB1_GPIOJ  9
 #define STM32F4_RCC_AHB1_GPIOK  10
 #define STM32F4_RCC_AHB1_CRC    12
+#define STM32F4_RCC_AHB1_BKPSRAM        18
+#define STM32F4_RCC_AHB1_CCMDATARAM     20
 #define STM32F4_RCC_AHB1_DMA1   21
 #define STM32F4_RCC_AHB1_DMA2   22
 #define STM32F4_RCC_AHB1_DMA2D  23
 #define STM32F4_RCC_AHB1_ETHMAC 25
-#define STM32F4_RCC_AHB1_OTGHS  29
+#define STM32F4_RCC_AHB1_ETHMACTX       26
+#define STM32F4_RCC_AHB1_ETHMACRX       27
+#define STM32F4_RCC_AHB1_ETHMACPTP      28
+#define STM32F4_RCC_AHB1_OTGHS          29
+#define STM32F4_RCC_AHB1_OTGHSULPI      30
 
 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
-#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit + (0x30 * 8))
+#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
 
 
 /* AHB2 */
@@ -36,13 +42,14 @@
 #define STM32F4_RCC_AHB2_OTGFS  7
 
 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8))
-#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + (0x34 * 8))
+#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20)
 
 /* AHB3 */
 #define STM32F4_RCC_AHB3_FMC    0
+#define STM32F4_RCC_AHB3_QSPI   1
 
 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8))
-#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + (0x38 * 8))
+#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40)
 
 /* APB1 */
 #define STM32F4_RCC_APB1_TIM2   0
@@ -72,14 +79,16 @@
 #define STM32F4_RCC_APB1_UART8  31
 
 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8))
-#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + (0x40 * 8))
+#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80)
 
 /* APB2 */
 #define STM32F4_RCC_APB2_TIM1   0
 #define STM32F4_RCC_APB2_TIM8   1
 #define STM32F4_RCC_APB2_USART1 4
 #define STM32F4_RCC_APB2_USART6 5
-#define STM32F4_RCC_APB2_ADC    8
+#define STM32F4_RCC_APB2_ADC1   8
+#define STM32F4_RCC_APB2_ADC2   9
+#define STM32F4_RCC_APB2_ADC3   10
 #define STM32F4_RCC_APB2_SDIO   11
 #define STM32F4_RCC_APB2_SPI1   12
 #define STM32F4_RCC_APB2_SPI4   13
@@ -91,8 +100,9 @@
 #define STM32F4_RCC_APB2_SPI6   21
 #define STM32F4_RCC_APB2_SAI1   22
 #define STM32F4_RCC_APB2_LTDC   26
+#define STM32F4_RCC_APB2_DSI    27
 
 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8))
-#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + (0x44 * 8))
+#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0)
 
 #endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */