Merge tag 'oxnas-arm-soc-for-4.10-v2' of https://github.com/OXNAS/linux into next/soc

Pull "ARM: OXNAS SoC updates for 4.10" from Neil Armstrong:

- Add SMP support for the Oxford Semiconductor OX820 SoC
from http://lkml.kernel.org/r/20161021085848.1754-1-narmstrong@baylibre.com

Changes since v1 Pull Request at : http://lkml.kernel.org/r/1305c61f-b1ef-7caf-7788-67e2b907e873@baylibre.com
 - Clarify copyright dates in commit message
 - Remove linux/arch/... lines from the top of the files

* tag 'oxnas-arm-soc-for-4.10-v2' of https://github.com/OXNAS/linux:
  ARM: oxnas: Add OX820 config and makefile entry
  ARM: oxnas: Add OX820 SMP support

6 files changed, 261 insertions, 9 deletions

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6be9ee148b78..68312a9f660a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -191,6 +191,7 @@ machine-$(CONFIG_ARCH_MXS)		+= mxs
 machine-$(CONFIG_ARCH_NETX)             += netx
 machine-$(CONFIG_ARCH_NOMADIK)          += nomadik
 machine-$(CONFIG_ARCH_NSPIRE)           += nspire
+machine-$(CONFIG_ARCH_OXNAS)            += oxnas
 machine-$(CONFIG_ARCH_OMAP1)            += omap1
 machine-$(CONFIG_ARCH_OMAP2PLUS)        += omap2
 machine-$(CONFIG_ARCH_ORION5X)          += orion5x
diff --git a/arch/arm/mach-oxnas/Kconfig b/arch/arm/mach-oxnas/Kconfig
index 29100beb2e7f..8fa4557e27a9 100644
--- a/arch/arm/mach-oxnas/Kconfig
+++ b/arch/arm/mach-oxnas/Kconfig
@@ -1,9 +1,16 @@
 menuconfig ARCH_OXNAS
         bool "Oxford Semiconductor OXNAS Family SoCs"
         select ARCH_HAS_RESET_CONTROLLER
+        select COMMON_CLK_OXNAS
         select GPIOLIB
+        select MFD_SYSCON
+        select OXNAS_RPS_TIMER
+        select PINCTRL_OXNAS
+        select RESET_CONTROLLER
+        select RESET_OXNAS
+        select VERSATILE_FPGA_IRQ
         select PINCTRL
-        depends on ARCH_MULTI_V5
+        depends on ARCH_MULTI_V5 || ARCH_MULTI_V6
         help
           Support for OxNas SoC family developed by Oxford Semiconductor.
 
@@ -11,16 +18,21 @@ if ARCH_OXNAS
 
 config MACH_OX810SE
         bool "Support OX810SE Based Products"
-        select ARCH_HAS_RESET_CONTROLLER
-        select COMMON_CLK_OXNAS
+        depends on ARCH_MULTI_V5
         select CPU_ARM926T
-        select MFD_SYSCON
-        select OXNAS_RPS_TIMER
-        select PINCTRL_OXNAS
-        select RESET_CONTROLLER
-        select RESET_OXNAS
-        select VERSATILE_FPGA_IRQ
         help
           Include Support for the Oxford Semiconductor OX810SE SoC Based Products.
 
+config MACH_OX820
+        bool "Support OX820 Based Products"
+        depends on ARCH_MULTI_V6
+        select ARM_GIC
+        select DMA_CACHE_RWFO if SMP
+        select CPU_V6K
+        select HAVE_SMP
+        select HAVE_ARM_SCU if SMP
+        select HAVE_ARM_TWD if SMP
+        help
+          Include Support for the Oxford Semiconductor OX820 SoC Based Products.
+
 endif
diff --git a/arch/arm/mach-oxnas/Makefile b/arch/arm/mach-oxnas/Makefile
new file mode 100644
index 000000000000..b625906a9970
--- /dev/null
+++ b/arch/arm/mach-oxnas/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
+obj-$(CONFIG_HOTPLUG_CPU)       += hotplug.o
diff --git a/arch/arm/mach-oxnas/headsmp.S b/arch/arm/mach-oxnas/headsmp.S
new file mode 100644
index 000000000000..25fd4f82ab3a
--- /dev/null
+++ b/arch/arm/mach-oxnas/headsmp.S
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
+ * Copyright (c) 2003 ARM Limited
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+
+        __INIT
+
+/*
+ * OX820 specific entry point for secondary CPUs.
+ */
+ENTRY(ox820_secondary_startup)
+        mov r4, #0
+        /* invalidate both caches and branch target cache */
+        mcr p15, 0, r4, c7, c7, 0
+        /*
+         * we've been released from the holding pen: secondary_stack
+         * should now contain the SVC stack for this core
+         */
+        b       secondary_startup
diff --git a/arch/arm/mach-oxnas/hotplug.c b/arch/arm/mach-oxnas/hotplug.c
new file mode 100644
index 000000000000..854f29b8cba6
--- /dev/null
+++ b/arch/arm/mach-oxnas/hotplug.c
@@ -0,0 +1,109 @@
+/*
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/smp.h>
+
+#include <asm/cp15.h>
+#include <asm/smp_plat.h>
+
+static inline void cpu_enter_lowpower(void)
+{
+        unsigned int v;
+
+        asm volatile(
+        "       mcr     p15, 0, %1, c7, c5, 0\n"
+        "       mcr     p15, 0, %1, c7, c10, 4\n"
+        /*
+         * Turn off coherency
+         */
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       bic     %0, %0, #0x20\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+        "       mrc     p15, 0, %0, c1, c0, 0\n"
+        "       bic     %0, %0, %2\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+          : "=&r" (v)
+          : "r" (0), "Ir" (CR_C)
+          : "cc");
+}
+
+static inline void cpu_leave_lowpower(void)
+{
+        unsigned int v;
+
+        asm volatile(   "mrc    p15, 0, %0, c1, c0, 0\n"
+        "       orr     %0, %0, %1\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       orr     %0, %0, #0x20\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+          : "=&r" (v)
+          : "Ir" (CR_C)
+          : "cc");
+}
+
+static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
+{
+        /*
+         * there is no power-control hardware on this platform, so all
+         * we can do is put the core into WFI; this is safe as the calling
+         * code will have already disabled interrupts
+         */
+        for (;;) {
+                /*
+                 * here's the WFI
+                 */
+                asm(".word      0xe320f003\n"
+                    :
+                    :
+                    : "memory", "cc");
+
+                if (pen_release == cpu_logical_map(cpu)) {
+                        /*
+                         * OK, proper wakeup, we're done
+                         */
+                        break;
+                }
+
+                /*
+                 * Getting here, means that we have come out of WFI without
+                 * having been woken up - this shouldn't happen
+                 *
+                 * Just note it happening - when we're woken, we can report
+                 * its occurrence.
+                 */
+                (*spurious)++;
+        }
+}
+
+/*
+ * platform-specific code to shutdown a CPU
+ *
+ * Called with IRQs disabled
+ */
+void ox820_cpu_die(unsigned int cpu)
+{
+        int spurious = 0;
+
+        /*
+         * we're ready for shutdown now, so do it
+         */
+        cpu_enter_lowpower();
+        platform_do_lowpower(cpu, &spurious);
+
+        /*
+         * bring this CPU back into the world of cache
+         * coherency, and then restore interrupts
+         */
+        cpu_leave_lowpower();
+
+        if (spurious)
+                pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
+}
diff --git a/arch/arm/mach-oxnas/platsmp.c b/arch/arm/mach-oxnas/platsmp.c
new file mode 100644
index 000000000000..442cc8a2f7dc
--- /dev/null
+++ b/arch/arm/mach-oxnas/platsmp.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
+ * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
+ * Copyright (C) 2002 ARM Ltd.
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#include <asm/cacheflush.h>
+#include <asm/cp15.h>
+#include <asm/smp_plat.h>
+#include <asm/smp_scu.h>
+
+extern void ox820_secondary_startup(void);
+extern void ox820_cpu_die(unsigned int cpu);
+
+static void __iomem *cpu_ctrl;
+static void __iomem *gic_cpu_ctrl;
+
+#define HOLDINGPEN_CPU_OFFSET           0xc8
+#define HOLDINGPEN_LOCATION_OFFSET      0xc4
+
+#define GIC_NCPU_OFFSET(cpu)            (0x100 + (cpu)*0x100)
+#define GIC_CPU_CTRL                    0x00
+#define GIC_CPU_CTRL_ENABLE             1
+
+int __init ox820_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+        /*
+         * Write the address of secondary startup into the
+         * system-wide flags register. The BootMonitor waits
+         * until it receives a soft interrupt, and then the
+         * secondary CPU branches to this address.
+         */
+        writel(virt_to_phys(ox820_secondary_startup),
+                        cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET);
+
+        writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET);
+
+        /*
+         * Enable GIC cpu interface in CPU Interface Control Register
+         */
+        writel(GIC_CPU_CTRL_ENABLE,
+                gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL);
+
+        /*
+         * Send the secondary CPU a soft interrupt, thereby causing
+         * the boot monitor to read the system wide flags register,
+         * and branch to the address found there.
+         */
+        arch_send_wakeup_ipi_mask(cpumask_of(cpu));
+
+        return 0;
+}
+
+static void __init ox820_smp_prepare_cpus(unsigned int max_cpus)
+{
+        struct device_node *np;
+        void __iomem *scu_base;
+
+        np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu");
+        scu_base = of_iomap(np, 0);
+        of_node_put(np);
+        if (!scu_base)
+                return;
+
+        /* Remap CPU Interrupt Interface Registers */
+        np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic");
+        gic_cpu_ctrl = of_iomap(np, 1);
+        of_node_put(np);
+        if (!gic_cpu_ctrl)
+                goto unmap_scu;
+
+        np = of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl");
+        cpu_ctrl = of_iomap(np, 0);
+        of_node_put(np);
+        if (!cpu_ctrl)
+                goto unmap_scu;
+
+        scu_enable(scu_base);
+        flush_cache_all();
+
+unmap_scu:
+        iounmap(scu_base);
+}
+
+static const struct smp_operations ox820_smp_ops __initconst = {
+        .smp_prepare_cpus       = ox820_smp_prepare_cpus,
+        .smp_boot_secondary     = ox820_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+        .cpu_die                = ox820_cpu_die,
+#endif
+};
+
+CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops);