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authorArnd Bergmann <arnd@arndb.de>2016-05-10 10:08:21 -0400
committerArnd Bergmann <arnd@arndb.de>2016-05-10 10:08:21 -0400
commit18aab73fba7abee4df472424d115d76b199877cb (patch)
tree036c1a5d59e8167e5791b83d8e7eaad942622f67
parente3cef9bbb5a2b3c7dd0e11fe2e6e38574e5061c0 (diff)
parent02440622656d26a0d68308db9e4ce1d2510f6530 (diff)
Merge tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux into next/dt
Merge "aspeed devicetree for 4.7" from Joel Stanley: This device trees for a pair of Aspeed BMC SoCs and the boards that they sit in. * tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux: arm/dst: Add Aspeed ast2500 device tree arm/dts: Add Aspeed ast2400 device tree doc/devicetree: Add Aspeed and Tyan to vendor-prefixes
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt2
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/aspeed-ast2500-evb.dts25
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts25
-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi161
-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi170
6 files changed, 385 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index dfe3db7c7108..d06dd3eba05c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -30,6 +30,7 @@ arm ARM Ltd.
30armadeus ARMadeus Systems SARL 30armadeus ARMadeus Systems SARL
31artesyn Artesyn Embedded Technologies Inc. 31artesyn Artesyn Embedded Technologies Inc.
32asahi-kasei Asahi Kasei Corp. 32asahi-kasei Asahi Kasei Corp.
33aspeed ASPEED Technology Inc.
33atlas Atlas Scientific LLC 34atlas Atlas Scientific LLC
34atmel Atmel Corporation 35atmel Atmel Corporation
35auo AU Optronics Corporation 36auo AU Optronics Corporation
@@ -253,6 +254,7 @@ tplink TP-LINK Technologies Co., Ltd.
253tronfy Tronfy 254tronfy Tronfy
254tronsmart Tronsmart 255tronsmart Tronsmart
255truly Truly Semiconductors Limited 256truly Truly Semiconductors Limited
257tyan Tyan Computer Corporation
256upisemi uPI Semiconductor Corp. 258upisemi uPI Semiconductor Corp.
257urt United Radiant Technology Corporation 259urt United Radiant Technology Corporation
258usi Universal Scientific Industrial Co., Ltd. 260usi Universal Scientific Industrial Co., Ltd.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index fe60a5fd0a48..0f89d87cb2a0 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -888,6 +888,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
888 mt8127-moose.dtb \ 888 mt8127-moose.dtb \
889 mt8135-evbp1.dtb 889 mt8135-evbp1.dtb
890dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb 890dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
891dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \
892 aspeed-ast2500-evb.dtb
891endif 893endif
892 894
893dtstree := $(srctree)/$(src) 895dtstree := $(srctree)/$(src)
diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
new file mode 100644
index 000000000000..1b7a5ff0e533
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts
@@ -0,0 +1,25 @@
1/dts-v1/;
2
3#include "aspeed-g5.dtsi"
4
5/ {
6 model = "AST2500 EVB";
7 compatible = "aspeed,ast2500";
8
9 aliases {
10 serial4 = &uart5;
11 };
12
13 chosen {
14 stdout-path = &uart5;
15 bootargs = "console=ttyS4,115200 earlyprintk";
16 };
17
18 memory {
19 reg = <0x80000000 0x20000000>;
20 };
21};
22
23&uart5 {
24 status = "okay";
25};
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
new file mode 100644
index 000000000000..cc5fcf2940bf
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -0,0 +1,25 @@
1/dts-v1/;
2
3#include "aspeed-g4.dtsi"
4
5/ {
6 model = "Palmetto BMC";
7 compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
8
9 aliases {
10 serial4 = &uart5;
11 };
12
13 chosen {
14 stdout-path = &uart5;
15 bootargs = "console=ttyS4,38400 earlyprintk";
16 };
17
18 memory {
19 reg = <0x40000000 0x10000000>;
20 };
21};
22
23&uart5 {
24 status = "okay";
25};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
new file mode 100644
index 000000000000..22dee5937d5c
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -0,0 +1,161 @@
1#include "skeleton.dtsi"
2
3/ {
4 model = "Aspeed BMC";
5 compatible = "aspeed,ast2400";
6 #address-cells = <1>;
7 #size-cells = <1>;
8 interrupt-parent = <&vic>;
9
10 cpus {
11 #address-cells = <1>;
12 #size-cells = <0>;
13
14 cpu@0 {
15 compatible = "arm,arm926ej-s";
16 device_type = "cpu";
17 reg = <0>;
18 };
19 };
20
21 clocks {
22 clk_clkin: clk_clkin {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <48000000>;
26 };
27
28 };
29
30 ahb {
31 compatible = "simple-bus";
32 #address-cells = <1>;
33 #size-cells = <1>;
34 ranges;
35
36 vic: interrupt-controller@1e6c0080 {
37 compatible = "aspeed,ast2400-vic";
38 interrupt-controller;
39 #interrupt-cells = <1>;
40 valid-sources = <0xffffffff 0x0007ffff>;
41 reg = <0x1e6c0080 0x80>;
42 };
43
44 apb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49
50 clk_hpll: clk_hpll@1e6e2070 {
51 #clock-cells = <0>;
52 compatible = "aspeed,g4-hpll-clock";
53 reg = <0x1e6e2070 0x4>;
54 clocks = <&clk_clkin>;
55 };
56
57 clk_apb: clk_apb@1e6e2008 {
58 #clock-cells = <0>;
59 compatible = "aspeed,g4-apb-clock";
60 reg = <0x1e6e2008 0x4>;
61 clocks = <&clk_hpll>;
62 };
63
64 clk_uart: clk_uart@1e6e2008 {
65 #clock-cells = <0>;
66 compatible = "aspeed,uart-clock";
67 reg = <0x1e6e202c 0x4>;
68 };
69
70 sram@1e720000 {
71 compatible = "mmio-sram";
72 reg = <0x1e720000 0x8000>; // 32K
73 };
74
75 timer: timer@1e782000 {
76 compatible = "aspeed,ast2400-timer";
77 reg = <0x1e782000 0x90>;
78 // The moxart_timer driver registers only one
79 // interrupt and assumes it's for timer 1
80 //interrupts = <16 17 18 35 36 37 38 39>;
81 interrupts = <16>;
82 clocks = <&clk_apb>;
83 };
84
85 wdt1: wdt@1e785000 {
86 compatible = "aspeed,wdt";
87 reg = <0x1e785000 0x1c>;
88 interrupts = <27>;
89 };
90
91 wdt2: wdt@1e785020 {
92 compatible = "aspeed,wdt";
93 reg = <0x1e785020 0x1c>;
94 interrupts = <27>;
95 clocks = <&clk_apb>;
96 status = "disabled";
97 };
98
99 uart1: serial@1e783000 {
100 compatible = "ns16550a";
101 reg = <0x1e783000 0x1000>;
102 reg-shift = <2>;
103 interrupts = <9>;
104 clocks = <&clk_uart>;
105 no-loopback-test;
106 status = "disabled";
107 };
108
109 uart2: serial@1e78d000 {
110 compatible = "ns16550a";
111 reg = <0x1e78d000 0x1000>;
112 reg-shift = <2>;
113 interrupts = <32>;
114 clocks = <&clk_uart>;
115 no-loopback-test;
116 status = "disabled";
117 };
118
119 uart3: serial@1e78e000 {
120 compatible = "ns16550a";
121 reg = <0x1e78e000 0x1000>;
122 reg-shift = <2>;
123 interrupts = <33>;
124 clocks = <&clk_uart>;
125 no-loopback-test;
126 status = "disabled";
127 };
128
129 uart4: serial@1e78f000 {
130 compatible = "ns16550a";
131 reg = <0x1e78f000 0x1000>;
132 reg-shift = <2>;
133 interrupts = <34>;
134 clocks = <&clk_uart>;
135 no-loopback-test;
136 status = "disabled";
137 };
138
139 uart5: serial@1e784000 {
140 compatible = "ns16550a";
141 reg = <0x1e784000 0x1000>;
142 reg-shift = <2>;
143 interrupts = <10>;
144 clocks = <&clk_uart>;
145 current-speed = <38400>;
146 no-loopback-test;
147 status = "disabled";
148 };
149
150 uart6: serial@1e787000 {
151 compatible = "ns16550a";
152 reg = <0x1e787000 0x1000>;
153 reg-shift = <2>;
154 interrupts = <10>;
155 clocks = <&clk_uart>;
156 no-loopback-test;
157 status = "disabled";
158 };
159 };
160 };
161};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
new file mode 100644
index 000000000000..dd94d9361fda
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -0,0 +1,170 @@
1#include "skeleton.dtsi"
2
3/ {
4 model = "Aspeed BMC";
5 compatible = "aspeed,ast2500";
6 #address-cells = <1>;
7 #size-cells = <1>;
8 interrupt-parent = <&vic>;
9
10 cpus {
11 #address-cells = <1>;
12 #size-cells = <0>;
13
14 cpu@0 {
15 compatible = "arm,arm1176jzf-s";
16 device_type = "cpu";
17 reg = <0>;
18 };
19 };
20
21 ahb {
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
25 ranges;
26
27 vic: interrupt-controller@1e6c0080 {
28 compatible = "aspeed,ast2400-vic";
29 interrupt-controller;
30 #interrupt-cells = <1>;
31 valid-sources = <0xfefff7ff 0x0807ffff>;
32 reg = <0x1e6c0080 0x80>;
33 };
34
35 apb {
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges;
40
41 clk_clkin: clk_clkin@1e6e2070 {
42 #clock-cells = <0>;
43 compatible = "aspeed,g5-clkin-clock";
44 reg = <0x1e6e2070 0x04>;
45 };
46
47 clk_hpll: clk_hpll@1e6e2024 {
48 #clock-cells = <0>;
49 compatible = "aspeed,g5-hpll-clock";
50 reg = <0x1e6e2024 0x4>;
51 clocks = <&clk_clkin>;
52 };
53
54 clk_ahb: clk_ahb@1e6e2070 {
55 #clock-cells = <0>;
56 compatible = "aspeed,g5-ahb-clock";
57 reg = <0x1e6e2070 0x4>;
58 clocks = <&clk_hpll>;
59 };
60
61 clk_apb: clk_apb@1e6e2008 {
62 #clock-cells = <0>;
63 compatible = "aspeed,g5-apb-clock";
64 reg = <0x1e6e2008 0x4>;
65 clocks = <&clk_hpll>;
66 };
67
68 clk_uart: clk_uart@1e6e2008 {
69 #clock-cells = <0>;
70 compatible = "aspeed,uart-clock";
71 reg = <0x1e6e202c 0x4>;
72 };
73
74 sram@1e720000 {
75 compatible = "mmio-sram";
76 reg = <0x1e720000 0x9000>; // 36K
77 };
78
79 timer: timer@1e782000 {
80 compatible = "aspeed,ast2400-timer";
81 reg = <0x1e782000 0x90>;
82 // The moxart_timer driver registers only one
83 // interrupt and assumes it's for timer 1
84 //interrupts = <16 17 18 35 36 37 38 39>;
85 interrupts = <16>;
86 clocks = <&clk_apb>;
87 };
88
89 wdt1: wdt@1e785000 {
90 compatible = "aspeed,wdt";
91 reg = <0x1e785000 0x1c>;
92 interrupts = <27>;
93 };
94
95 wdt2: wdt@1e785020 {
96 compatible = "aspeed,wdt";
97 reg = <0x1e785020 0x1c>;
98 interrupts = <27>;
99 status = "disabled";
100 };
101
102 wdt3: wdt@1e785040 {
103 compatible = "aspeed,wdt";
104 reg = <0x1e785074 0x1c>;
105 status = "disabled";
106 };
107
108 uart1: serial@1e783000 {
109 compatible = "ns16550a";
110 reg = <0x1e783000 0x1000>;
111 reg-shift = <2>;
112 interrupts = <9>;
113 clocks = <&clk_uart>;
114 no-loopback-test;
115 status = "disabled";
116 };
117
118 uart2: serial@1e78d000 {
119 compatible = "ns16550a";
120 reg = <0x1e78d000 0x1000>;
121 reg-shift = <2>;
122 interrupts = <32>;
123 clocks = <&clk_uart>;
124 no-loopback-test;
125 status = "disabled";
126 };
127
128 uart3: serial@1e78e000 {
129 compatible = "ns16550a";
130 reg = <0x1e78e000 0x1000>;
131 reg-shift = <2>;
132 interrupts = <33>;
133 clocks = <&clk_uart>;
134 no-loopback-test;
135 status = "disabled";
136 };
137
138 uart4: serial@1e78f000 {
139 compatible = "ns16550a";
140 reg = <0x1e78f000 0x1000>;
141 reg-shift = <2>;
142 interrupts = <34>;
143 clocks = <&clk_uart>;
144 no-loopback-test;
145 status = "disabled";
146 };
147
148 uart5: serial@1e784000 {
149 compatible = "ns16550a";
150 reg = <0x1e784000 0x1000>;
151 reg-shift = <2>;
152 interrupts = <10>;
153 clocks = <&clk_uart>;
154 current-speed = <38400>;
155 no-loopback-test;
156 status = "disabled";
157 };
158
159 uart6: serial@1e787000 {
160 compatible = "ns16550a";
161 reg = <0x1e787000 0x1000>;
162 reg-shift = <2>;
163 interrupts = <10>;
164 clocks = <&clk_uart>;
165 no-loopback-test;
166 status = "disabled";
167 };
168 };
169 };
170};